Method, apparatus, device and storage medium for executing processing tasks

Abstract

The present disclosure relates to the field of cloud computing, and in particular, to a method, apparatus, device and storage medium for executing a processing task. One of the multiple parts of the processing task includes a group of operations to be executed at a processing unit among multiple processing units, and the group of operations includes operations of a first type and a second type. In the method, a first queue for executing operations of the first type and a second queue for executing operations of the second type are established. According to the definition of the processing task, a dependency relationship between a group of operations to be executed at the processing unit and a group of operations to be executed at other processing units among the multiple processing units is obtained. Based on the dependency relationship, the operations in the first queue and the operations in the second queue are executed respectively. By adopting the above implementation method, the time and resource overhead of scheduling various types of operations can be reduced, and the execution efficiency of the processing task can be improved.

Description

Technical Field

[0001] Implementations of the present disclosure relate generally to processing tasks, and more particularly, to methods, apparatus, devices, and computer storage media for performing processing tasks in a distributed manner among multiple processing units. Background Art

[0002] With the development of computer technology, distributed processing has emerged. Multiple processing units can be provided and processing tasks can be performed in a distributed manner at multiple processing units. However, as processing tasks become more and more complex, a large number of processing units are required to coordinate operations. At this time, how to schedule multiple processing units to handle processing tasks in a more efficient manner has become a technical problem. Summary of the invention

[0003] According to an example implementation of the present disclosure, a scheme for performing a processing task is provided.

[0004] In a first aspect of the present disclosure, a method for performing a processing task is provided. One of the multiple parts of the processing task includes a set of operations to be performed at a processing unit among multiple processing units, and the set of operations includes operations of a first type and a second type. In the method, a first queue for performing operations of the first type and a second queue for performing operations of the second type are established. According to the definition of the processing task, a dependency relationship between a set of operations to be performed at the processing unit and a set of operations to be performed at other processing units among the multiple processing units is obtained. Based on the dependency relationship, the operations in the first queue and the operations in the second queue are respectively executed at the processing unit.

[0005] In a second aspect of the present disclosure, a device for executing a processing task is provided. One of the multiple parts of the processing task includes a set of operations to be executed at a processing unit among multiple processing units, and the set of operations includes operations of a first type and a second type. The device includes: an establishment module configured to establish a first queue for executing operations of the first type and a second queue for executing operations of the second type, respectively; an acquisition module configured to acquire a dependency relationship between a set of operations to be executed at the processing unit and a set of operations to be executed at other processing units among the multiple processing units according to a definition of the processing task; and an execution module configured to execute the operations in the first queue and the operations in the second queue, respectively, at the processing unit based on the dependency relationship.

[0006] In a third aspect of the present disclosure, a device for performing a processing task is provided. The device includes one or more processors; and a storage device for storing one or more programs, when the one or more programs are executed by the one or more processors, the one or more processors implement the method according to the first aspect of the present disclosure.

[0007] In a fourth aspect of the present disclosure, there is provided a computer readable medium having stored thereon a computer program, which program, when executed by a processor, implements the method according to the first aspect of the present disclosure.

[0008] In a fifth aspect of the present disclosure, a computer program is provided, which, when executed by a processor, implements the method according to the first aspect of the present disclosure.

[0009] It should be understood that the contents described in the Summary of the Invention are not intended to limit the key or important features of the implementation of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other features, advantages and aspects of various implementations of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements, wherein:

[0011] Figure 1A A block diagram schematically illustrates a processing task performed by multiple processing units;

[0012] Figure 1B A block diagram schematically shows a processing result after a processing task is executed by a plurality of processing units;

[0013] Figure 2 Schematically shows a block diagram for performing processing tasks according to an exemplary implementation of the present disclosure;

[0014] Figure 3 A flowchart of a method for executing a processing task according to an exemplary implementation of the present disclosure is schematically shown;

[0015] Figure 4 Schematically illustrates a block diagram for data distribution among multiple processing units according to an exemplary implementation of the present disclosure;

[0016] Figure 5 Schematically illustrates a block diagram for performing an accumulation operation at multiple processing units according to an exemplary implementation of the present disclosure;

[0017] Figure 6A block diagram for loading code into a processing unit according to an exemplary implementation of the present disclosure is schematically shown;

[0018] Figure 7 A block diagram schematically illustrates triggering a hardware interrupt after completing a copy operation in a copy queue according to an exemplary implementation of the present disclosure;

[0019] Figure 8 A block diagram schematically shows a method of triggering a hardware interrupt after completing an accumulation operation in an accumulation queue according to an exemplary implementation of the present disclosure;

[0020] Fig. 9 A block diagram schematically illustrates an apparatus for performing a processing task according to an exemplary implementation of the present disclosure; and

[0021] Fig.10 A block diagram of a computing device capable of implementing multiple implementations of the present disclosure is shown. DETAILED DESCRIPTION

[0022] The implementation of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain implementations of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the implementations set forth herein, but rather these implementations are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and implementations of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0023] In the description of the implementation of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "an implementation" or "the implementation" should be understood as "at least one implementation". The terms "first", "second", etc. can refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0024] In the context of the present disclosure, the processing task may be a global reduction (All Reduce) task, which is used to perform an accumulation operation on the data to be processed. The processing task may be performed at multiple processing units (e.g., GPUs, AI dedicated chips, etc.), for example, the number of multiple processing units may be represented by n. For ease of description, in the context of the present disclosure, the processing task will be described as an example of performing a processing task on four processing units. It will be understood that the value of n may also be a larger or smaller integer.

[0025] Currently, a variety of technical solutions for performing global reduction have been provided. In a ring-based global reduction solution, the data to be processed can be divided into n parts, and each of the n parts of data is processed separately at n processing units connected in a ring. Each processing unit transmits its own accumulated result to the next processing unit in the ring, and receives the accumulated result from the previous processing unit in the ring.

[0026] In the following, see first Figure 1A and Figure 1B Describe the application environment of the present disclosure. Figure 1A A block diagram 100A schematically shows a process task performed by multiple processing units. Figure 1A As shown, four processing units 110, 120, 130 and 140 connected in a ring manner are used to perform processing tasks. It is assumed that the data to be processed is M, and the data M can be divided into 4 parts, in which case each part of the data is M / 4. The data to be processed M / 4 of each part of the data to be processed is sent to each processing unit.

[0027] The data of each processing unit is divided into 4 parts evenly, and the i-th processing unit copies the i-th data to the subsequent processing unit. After each processing unit receives the data from the previous processing unit, it accumulates it with the corresponding local data and copies the accumulated result to the next processing unit. In the next round, each processing unit waits for the accumulated result of the previous processing unit, accumulates the received accumulated result with the corresponding local data, and then copies the new accumulated result to the next processing unit. Repeat the above steps until each processing unit has a part of the complete accumulated result. Then, each processing unit copies its part of the complete accumulated result to the next processing unit. After the next processing unit receives the part of the complete accumulated result, it copies it to the subsequent processing unit until each processing unit has all the complete accumulated results.

[0028] Figure 1B The block diagram schematically shows the processing results after the processing tasks are performed by multiple processing units. After the global reduction task described above has been performed, each processing unit 110, 120, 130 and 140 has all the complete accumulation results. In order to control the n processing units to coordinate work to perform the process described above, a large amount of communication resources are required to schedule the accumulation, copying and reception of data, and the scalability is poor.

[0029] Currently, a bidirectional ring-based global reduction scheme has been proposed, in which multiple processing units are divided into rings in both horizontal and vertical directions. However, this scheme requires more communication overhead between each step, making it difficult to adopt in large-scale data processing. Therefore, it is expected that a more efficient way can be provided to achieve the processing task of global reduction.

[0030] In order to at least partially solve the deficiencies in the above-mentioned technical solutions, according to an exemplary implementation of the contents of the present disclosure, a technical solution for executing processing tasks is proposed. Specifically, the exemplary implementation of the present disclosure proposes the concept of an operation queue, and corresponding operation queues can be established at a processing unit for different types of operations. Then, based on the dependency relationship between multiple operations executed at one processing unit and multiple operations executed at other processing units, the operations in each operation queue can be executed at the processing unit respectively, so as to complete the part of the processing task assigned to the processing unit. In the following, reference will be made to Figure 2 The process of the present disclosure is generally described.

[0031] Figure 2 Schematically shows a block diagram 200 for performing a processing task according to an exemplary implementation of the present disclosure. For ease of description, Figure 2 Only the processing at two of the plurality of processing units is schematically shown. When a group of processing units includes n processing units, the processing task 210 can be divided into n parts. Figure 2 As shown, the processing task 210 may include multiple parts 220, 230, etc., and one processing unit may be used to perform one part of the processing task 210. For example, the part 220 may be processed by the processing unit 110, and the part 230 may be processed by the processing unit 120. For the sake of convenience, the following description will only be based on the example of the part 220 being performed by the processing unit 110. The process of the part 230 being performed by the processing unit 120 will be similar.

[0032] Here, each section includes a first type of operation and a second type of operation. For example, section 220 may include a first type 222 and a second type 224 of operation. At processing unit 110, a first queue 226 for executing the first type 222 operation and a second queue 228 for executing the second type 224 of operation may be established. Here, each operation may be sorted in the corresponding queue according to the type of operation and the execution order of each operation.

[0033] Then, according to the definition of the processing task 210, a dependency relationship 240 between a set of operations to be executed at the processing unit 110 and a set of operations to be executed at other processing units 120 in the plurality of processing units may be obtained. The dependency relationship 240 here refers to the order in which the various operations are executed. For example, for the operations to be executed at the processing unit 110, the copy operation of copying a data block to a subsequent processing unit may not depend on other operations, while the accumulation operation depends on the previous processing unit having copied the data block to the processing unit 110. In the case where the dependency relationship 240 has been obtained, the operations in the first queue 226 and the operations in the second queue 228 may be respectively executed at the processing unit 110 based on the dependency relationship 240.

[0034] Similarly, for the processing unit 120, the portion 230 assigned to be executed on the processing unit 120 may include operations of a first type 232 and operations of a second type 234, and a first queue 236 and a second queue 238 may be established to manage operations of each type. Then, the operations in the first queue 236 and the operations in the second queue 238 may be executed at the processing unit 120 based on the dependency relationship 240. By adopting the technical solution of this case, the execution of multiple operations of different types is scheduled based on queues and dependencies, which can greatly improve the parallelism of global reduction and reduce various time and resource overheads during execution. Further, the technical solution of this case can be combined with the existing global reduction method.

[0035] In the following, we will refer to Figure 3 More details of exemplary implementations of the present disclosure are described. Figure 3 A flow chart of a method 300 for executing a processing task according to an exemplary implementation of the present disclosure is schematically shown. Here, a portion 220 of a processing task 210 will be executed at a processing unit 110. At block 310, a first queue for executing a first type of operation and a second queue for executing a second type of operation may be established at the processing unit.

[0036] According to an exemplary implementation of the present disclosure, the processing task 210 may be a global reduction task, and the plurality of processing units may be connected in a ring manner. For example, the plurality of processing units 110, 120, 130, 140 may be connected in a ring manner as follows: Figure 1A In the manner shown, the processing units are connected in a ring manner one after another. For another example, the processing units are divided into two directions, horizontal and vertical, and the processing units are connected in the rings in the two directions respectively.

[0037] It will be understood that the data to be processed by the processing task 210 can be divided into a plurality of data blocks. For example, assuming that the processing task 210 is to be performed by n processing units, the data to be processed can be divided into n data blocks, and the corresponding data blocks can be sent to each processing unit respectively. At this time, at each processing unit, a data block can be received, and the data block is a portion of the data to be processed of the processing task 210 that will be processed at the processing unit.

[0038] For the convenience of description, it is assumed that all the data to be processed is M. When four processing units are used, the data to be processed can be divided into four data blocks. At this time, the data blocks to be processed can be distributed to the processing units 110, 120, 130 and 140 respectively. At each processing unit, the received data can be divided into four parts. At this time, at the processing unit 110, data A1, B1, C1, D1 can be included; at the processing unit 120, data A2, B2, C2, D2 can be included, and so on. In the following, an example of the operation at each processing unit will be described. Figure 4 A block diagram 400 for distributing data among multiple processing units according to an exemplary implementation of the present disclosure is schematically shown. For example, Table 1 below shows an example of operations performed at the processing unit 120, where the processing unit 120 already has data A2, B2, C2, and D2.

[0039] Table 1 Examples of operations performed at a processing unit

[0040]

[0041] As shown in Table 1, the first column shows the identifier of the operation, the second column shows the type of operation and the third column shows the content of the operation. In Table 1, only a part of the operations to be performed at the processing unit 120 is schematically shown. After operation 2, the accumulation operation and the copy operation can be performed alternately until the accumulation result (A1+A2+A3+A4) is obtained. It will be understood that the accumulation result (A1+A2+A3+A4) here is only a part of the complete accumulation result, so each processing unit needs to copy a part of its local complete accumulation result to the next processing unit, and the next processing unit performs a circular copy until each processing unit has all the complete accumulation results.

[0042] A set of operations to be performed at the processing unit 120 may include a copy operation and an accumulation operation. At this time, a first queue and a second queue may be established respectively according to the type of operation to be performed at the processing unit 120. Specifically, the first queue may include the accumulation operation shown in Table 2 below, and the second queue may include the copy operation shown in Table 3 below.

[0043] Table 2 Example of cumulative queue

[0044] Operation 2 Operation 4 ……

[0045] Table 3 Example of copy queue

[0046] Operation 1 Operation 3 ……

[0047] In the following, we will refer to Figure 4 and Figure 5 More details about the copy operation and the accumulation operation are described. It will be understood that the copy operation here can copy the accumulation result / data block at the processing unit to the subsequent processing unit connected after the processing unit. For the processing unit 110, as shown by arrow 410, the processing unit 110 can copy the data A1 to the processing unit 120 to form a copy. For the processing unit 120, as shown by arrow 420, the processing unit 120 can copy the data B2 to the processing unit 130 to form a copy. Similar copy operations can also be performed at other processing units. Although in Figure 4 Not shown in the figure, the object of the copy operation may also be the accumulated result at the processing unit.

[0048] According to an exemplary implementation of the present disclosure, the accumulation operation represents accumulating a data block at a processing unit to an accumulation result copied from a previous processing unit connected before the processing unit to the processing unit as the accumulation result of the processing unit. Figure 5 A block diagram 500 for performing accumulation operations at multiple processing units according to an exemplary implementation of the present disclosure is schematically shown. Figure 5 Shown in Figure 4 The state of the processing unit 120 after the copy operation of , at this time, the processing unit 120 already has a copy of the data A1. At the processing unit 120, the accumulation result 510 (i.e., A1+A2) can be determined based on the copy of the data A1 and the data A2. Similarly, at other processing units, the accumulation results of other data can also be determined.

[0049] According to an exemplary implementation of the present disclosure, in order to perform a copy operation and an accumulation operation, codes for performing corresponding types of operations may be loaded into the processing unit respectively. Figure 6 Schematically shows a block diagram 600 for loading code into a processing unit according to an exemplary implementation of the present disclosure. Figure 6 As shown, the host 410 may be connected to each of the processing units 110, 120, 130, and 140. Here, the host 410 may load a first code for performing an accumulation type operation and a second code for performing a copy operation into the memory in each of the processing units.

[0050] It will be understood that the process of loading codes into each processing unit is similar, and for the sake of simplicity of description, only the loading process for the processing unit 110 will be described below. According to an exemplary implementation of the present disclosure, the first code 612 for performing the accumulation operation and the second code 614 for performing the copy operation can be loaded into the memory 610 of the processing unit 110, respectively.

[0051] After the first code 612 and the second code 614 are loaded into the memory 610, the processing unit 110 can quickly execute the operation corresponding to the code. According to the exemplary implementation of the present disclosure, in order to improve the response speed of the processing unit 110, at least one of the first code 612 and the second code 614 can be kept in the memory 610 of the processing unit 110. Using the exemplary implementation of the present disclosure, by preloading the data copy and data accumulation codes into each processing unit and resident in the memory of each processing unit, it is possible to avoid repeated loading / releasing to cause additional time and resource overhead.

[0052] At this time, the operations in the first queue may be executed based on the first code 612, and the operations in the second queue may be executed based on the second code 614. It will be understood that since the copy operation needs to occupy bandwidth resources between processing units, and the accumulation operation will occupy computing resources in each processing unit, for some operations that do not have a dependency relationship, the operations in the two queues may be executed in parallel.

[0053] At block 320, the dependencies between the multiple operations may be determined according to the definition of the processing task 210. The dependencies between a set of operations to be performed at the processing unit 110 and a set of operations to be performed at other processing units in the multiple processing units may be obtained. In the following, only the multiple operations performed at the processing unit 120 will be used as an example to describe how to obtain the dependencies. Continuing with the above example, it is assumed that 4 data blocks have been transmitted to the processing units 110, 120, 130, and 140, respectively. According to the global reduction process, it can be determined that the dependencies between the various operations are as shown in the last column of Table 4:

[0054] Table 4 Example of dependency relationship

[0055]

[0056] return Figure 3, at block 330, based on the dependency, the operations in the first queue and the operations in the second queue are respectively executed at the processing unit. It will be appreciated that a hardware interrupt may be used to notify the processing unit that the dependency for executing a particular operation has been satisfied, thereby triggering the processing unit to execute the particular operation. According to an exemplary implementation of the present disclosure, if it is determined that the operations in either the first queue or the second queue have been completed at the processing unit, the hardware interrupt of the processing unit is used to notify other processing units.

[0057] By using the exemplary implementation of the present disclosure, tasks in the queue are scheduled based on the hardware interrupt of the processing unit, and the processing unit itself ensures the order of task execution, avoiding unnecessary communication with the host. The technical solution of this case can greatly improve the parallel efficiency of global reduction and reduce various time and resource overheads during execution. Figure 7 and Figure 8 Describes how to perform notification based on hardware interrupts.

[0058] Figure 7 A block diagram 700 schematically illustrates triggering a hardware interrupt after completing an operation in a copy queue according to an exemplary implementation of the present disclosure. Figure 7 A copy queue 710 for the processing unit 120 is shown, and the copy queue 710 may include multiple copy operations, such as Figure 7 The copy operation 712 in the copy queue 710 shown in represents the operation 1 in the above Table 1, that is, copying the data B2 at the processing unit 120 to the subsequent processing unit 130. According to the dependency relationship in Table 4, since this operation does not depend on other operations, it can be directly executed.

[0059] Further, based on the dependency relationship, it can be known that the accumulation operation at the subsequent processing unit 130 depends on the copy operation 712, so after the copy operation 712 has been completed, a hardware interrupt 714 can be generated to notify 716 the subsequent processing unit 130 to perform the corresponding accumulation operation. At the subsequent processing unit 130, once the hardware interrupt 714 from the previous processing unit 120 is received, the accumulation operation can be performed (i.e., the received data B2 is accumulated with the data block B3 at the subsequent processing unit 130).

[0060] According to an exemplary implementation of the present disclosure, the processing unit and the subsequent processing unit share a cache area, so that the accumulated result can be copied from the processing unit to the cache area to implement the copy operation. For example, the processing unit 120 and the processing unit 130 described above may have a shared cache area, in which case the processing unit 120 can copy data to the cache area, and the processing unit 130 can read data from the cache area. It will be understood that although Figure 7Only an example of generating 714 in hardware after one copy operation 712 in the copy queue 710 has been executed is shown in detail. After other copy operations have been executed, subsequent processing units may be notified in a similar manner to execute corresponding accumulation operations.

[0061] According to an exemplary implementation of the present disclosure, if an accumulation operation in the first queue has been executed at a processing unit, the previous processing unit can be notified based on a hardware interrupt to execute the next copy operation in the second queue. Figure 8 Describe in detail, the Figure 8 A block diagram 800 schematically illustrates triggering a hardware interrupt after completing operations in an accumulation queue according to an exemplary implementation of the present disclosure. Figure 8 An accumulation queue 810 for a processing unit 120 is shown, which may include multiple copy operations. Figure 8 The accumulation operation 712 in the accumulation queue 810 shown in the figure represents the operation 2 in the above Table 1, that is, the data A1 received from the processing unit 110 is accumulated with the local data A2 to obtain the accumulation result (A1+A2). Since this operation depends on the fact that the processing unit 110 has previously copied the data A1 to the processing unit 120, the accumulation operation 812 can be started when the processing unit 120 has received the hardware interrupt from the processing unit 110.

[0062] Further, based on the dependency of the accumulation operation 812, it can be known that the copy operation of the previous processing unit 110 to copy the subsequent accumulation result to the processing unit 120 will depend on the accumulation operation 812. Therefore, after the accumulation operation 812 has been completed, a hardware interrupt 814 can be generated to notify 816 the previous processing unit 110 to copy the subsequent accumulation result to the processing unit 120. At the previous processing unit 110, upon receiving the hardware interrupt 814 from the processing unit 120, the processing unit 110 can perform the copy operation.

[0063] By using the exemplary implementation of the present disclosure, since the copy operation and the accumulation operation use bandwidth resources and computing resources respectively, by using the copy queue and the accumulation queue to store the copy operation and the accumulation operation to be executed respectively, the two types of operations will not cause resource conflicts, thereby improving the possibility of parallel execution. Further, compared with the technical solution of scheduling the operation of each processing unit by the host or continuously confirming whether the dependency relationship is satisfied by using the polling technology, the use of hardware interrupts to notify that the dependency relationship has been satisfied can greatly improve the efficiency of the scheduling operation, thereby improving the execution efficiency of a group of operations.

[0064] According to an exemplary implementation of the present disclosure, if it is determined that all operations in the first queue and the second queue have been executed at the processing unit, a message can be sent to indicate that the processing unit has executed part of the processing task. It will be understood that although the specific process of executing the processing task is described by taking the process executed at one processing unit as an example in the exemplary implementation of the present disclosure, the operations executed at other processing units in the multiple processing units are also similar. By executing the method 300 described above at all multiple processing units in a parallel manner, the efficiency of each processing unit executing a part of the task assigned to itself in the processing task can be improved, so as to improve the execution efficiency of the entire processing task.

[0065] In the above, multiple implementations of the method 300 for executing a processing task have been described in detail. According to an exemplary implementation of the present disclosure, an apparatus for executing a processing task is also provided. Fig. 9 Detailed description. Fig. 9 A block diagram of an apparatus 900 for performing a processing task according to an exemplary implementation of the present disclosure is schematically shown. One of the multiple parts of the processing task includes a set of operations to be performed at one of the multiple processing units, the set of operations including operations of a first type and a second type. Fig. 9 As shown, the device 900 includes: an establishment module 910, configured to establish a first queue for executing the first type of operations and a second queue for executing the second type of operations; an acquisition module 920, configured to acquire, according to the definition of the processing task, the dependency relationship between a set of operations to be executed at the processing unit and a set of operations to be executed at other processing units among the multiple processing units; and an execution module 930, configured to execute the operations in the first queue and the operations in the second queue at the processing unit, respectively, based on the dependency relationship.

[0066] According to an exemplary implementation of the present disclosure, it further includes: a loading module configured to load into the processing unit a first code for executing a first group of operations of the first type and a second code for executing a second group of operations of the second type. According to an exemplary implementation of the present disclosure, the execution module 930 includes: a first execution module configured to execute operations in the first queue based on the first code; and a second execution module configured to execute operations in the second queue based on the second code.

[0067] According to an exemplary implementation of the present disclosure, the method further includes: a retaining module configured to retain at least any one of the first code and the second code in a memory of the processing unit.

[0068] According to an exemplary implementation of the present disclosure, it further includes: a receiving module, configured to receive, at a processing unit, data blocks to be processed at the processing unit from data to be processed of a processing task, wherein the data blocks are obtained by dividing the data to be processed according to the number of multiple processing units.

[0069] According to an exemplary implementation of the present disclosure, the execution module 930 further includes: a data processing module configured to execute operations in the first queue and operations in the second queue for the data block at the processing unit.

[0070] According to an exemplary implementation of the present disclosure, the processing task is a global reduction task, and a plurality of processing units are connected in a ring manner.

[0071] According to an exemplary implementation of the present disclosure, the first set of operations includes an accumulation operation for accumulating a data block at a processing unit to an accumulation result copied to the processing unit from a previous processing unit connected before the processing unit as an accumulation result of the processing unit.

[0072] According to an exemplary implementation of the present disclosure, the second group of operations includes a copy operation for copying at least any one of a data block and an accumulated result at a processing unit to a subsequent processing unit connected after the processing unit.

[0073] According to an exemplary implementation of the present disclosure, the execution module 930 includes: a notification module configured to notify other processing units using a hardware interrupt of the processing unit in response to the completion of operations in any queue in the first queue and the second queue at the processing unit.

[0074] According to an exemplary implementation of the present disclosure, the notification module includes: a first notification module configured to notify the previous processing unit to execute the next copy operation in the second queue based on a hardware interrupt in response to an accumulation operation in the first queue having been executed at the processing unit.

[0075] According to an exemplary implementation of the present disclosure, the notification module includes: a second notification module configured to notify a subsequent processing unit to execute a next accumulation operation in the first queue based on a hardware interrupt in response to a copy operation in the second queue having been executed at the processing unit.

[0076] According to an exemplary implementation of the present disclosure, the processing unit and the subsequent processing unit share a cache area, and the device further includes: a copy module configured to copy at least any one of a data block and an accumulation result from the processing unit to the cache area.

[0077] According to an exemplary implementation of the present disclosure, it further includes: a reporting module configured to report that the processing unit has executed part of the processing task in response to determining that all operations in the first queue and the second queue have been executed at the processing unit.

[0078] Fig.10 1 is a block diagram of a computing device 1000 capable of implementing multiple implementations of the present disclosure. The device 1000 may be used to implement Figure 3 As shown in the figure, the device 1000 includes a central processing unit (CPU) 1001, which can perform various appropriate actions and processes according to computer program instructions stored in a read-only memory (ROM) 1002 or computer program instructions loaded from a storage unit 1008 into a random access memory (RAM) 1003. In the RAM 1003, various programs and data required for the operation of the device 1000 can also be stored. The CPU 1001, the ROM 1002, and the RAM 1003 are connected to each other via a bus 1004. An input / output (I / O) interface 1005 is also connected to the bus 1004.

[0079] A number of components in the device 1000 are connected to the I / O interface 1005, including: an input unit 1006, such as a keyboard, a mouse, etc.; an output unit 1007, such as various types of displays, speakers, etc.; a storage unit 1008, such as a disk, an optical disk, etc.; and a communication unit 1009, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 1009 allows the device 1000 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0080] The processing unit 1001 performs the various methods and processes described above, such as the method 300. For example, in some implementations, the method 300 may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as the storage unit 1008. In some implementations, part or all of the computer program may be loaded and / or installed on the device 1000 via the ROM 1002 and / or the communication unit 1009. When the computer program is loaded into the RAM 1003 and executed by the CPU 1001, one or more steps of the method 300 described above may be performed. Alternatively, in other implementations, the CPU 1001 may be configured to perform the method 300 in any other suitable manner (e.g., by means of firmware).

[0081] According to an exemplary implementation of the present disclosure, a computer-readable storage medium having a computer program stored thereon is provided. When the program is executed by a processor, the method described in the present disclosure is implemented.

[0082] The functions described above herein may be performed at least in part by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chip systems (SOCs), load programmable logic devices (CPLDs), and the like.

[0083] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0084] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0085] In addition, although each operation is described in a specific order, this should be understood as requiring such operation to be performed in the specific order shown or in a sequential order, or requiring that all illustrated operations should be performed to obtain the desired result. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details are included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate implementation can also be implemented in a single implementation in combination. On the contrary, the various features described in the context of a single implementation can also be implemented in multiple implementations individually or in any suitable sub-combination.

[0086] Although the subject matter has been described in language specific to structural features and / or methodological logical actions, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. On the contrary, the specific features and actions described above are merely example forms of implementing the claims.

Claims

1. A method for performing a processing task, wherein one of a plurality of parts of the processing task comprises a set of operations to be performed at one of a plurality of processing units, the set of operations comprising operations of a first type and a second type, the method comprising: Establishing a first queue for executing a first set of operations of the first type and a second queue for executing a second set of operations of the second type; According to the definition of the processing task, obtaining a dependency relationship between the set of operations to be performed at the processing unit and a set of operations to be performed at other processing units in the plurality of processing units, wherein the dependency relationship includes an order of the plurality of sets of operations to be performed at the plurality of processing units; as well as Based on the dependency, respectively executing the operations in the first queue and the operations in the second queue at the processing unit includes: executing the operations in the first queue based on a first code; And executing the operations in the second queue based on the second code, wherein the operations in the first queue and the operations in the second queue are executed in parallel.

2. The method according to claim 1, further comprising: The first code for executing the first set of operations of the first type and the second code for executing the second set of operations of the second type are respectively loaded into the processing unit.

3. The method according to claim 2, further comprising: At least any one of the first code and the second code is respectively maintained in a memory of the processing unit.

4. The method according to claim 1, further comprising: At the processing unit, receiving a data block to be processed at the processing unit from the data to be processed of the processing task, wherein the data block is obtained by dividing the data to be processed according to the number of the plurality of processing units; Wherein executing the operations in the first queue and the operations in the second queue at the processing unit respectively includes: at the processing unit, executing the operations in the first queue and the operations in the second queue respectively for the data block.

5. The method according to claim 4, wherein: The processing task is a global reduction task, and the plurality of processing units are connected in a ring manner; The first set of operations includes an accumulation operation for accumulating a data block at the processing unit to an accumulation result copied to the processing unit from a previous processing unit connected before the processing unit as an accumulation result of the processing unit; as well as The second group of operations includes a copy operation for copying the accumulated result at the processing unit to a subsequent processing unit connected after the processing unit.

6. The method according to claim 5, wherein based on the dependency, executing the operations in the first queue and the operations in the second queue at the processing unit respectively comprises: In response to the processing unit completing operations in any one of the first queue and the second queue, the other processing unit is notified by using a hardware interrupt of the processing unit.

7. The method according to claim 6, wherein in response to the processing unit having completed operations in any one of the first queue and the second queue, notifying the other processing unit using the hardware interrupt of the processing unit comprises: In response to one accumulation operation in the first queue having been executed at the processing unit, the previous processing unit is notified based on the hardware interrupt to execute a next copy operation in the second queue.

8. The method according to claim 6, wherein in response to the processing unit having completed operations in any one of the first queue and the second queue, notifying the other processing unit based on the hardware interrupt of the processing unit comprises: In response to a copy operation in the second queue having been executed at the processing unit, the subsequent processing unit is notified based on the hardware interrupt to execute a next accumulation operation in the first queue.

9. The method according to claim 8, wherein the processing unit and the subsequent processing unit share a cache area, and performing the copy operation at the processing unit comprises: The accumulated result is copied from the processing unit to the buffer area.

10. The method according to claim 1, further comprising: In response to determining that all operations in the first queue and the second queue have been executed at the processing unit, reporting that the processing unit has executed the portion of the processing tasks.

11. An apparatus for performing a processing task, one of a plurality of parts of the processing task comprising a set of operations to be performed at a processing unit of a plurality of processing units, the set of operations comprising operations of a first type and a second type, the apparatus comprising: an establishing module configured to establish a first queue for executing a first group of operations of the first type and a second queue for executing a second group of operations of the second type; an acquisition module configured to acquire, according to a definition of the processing task, a dependency relationship between the set of operations to be executed at the processing unit and a set of operations to be executed at other processing units among the plurality of processing units, wherein the dependency relationship includes an order of the plurality of sets of operations to be executed at the plurality of processing units; as well as an execution module, configured to execute the operations in the first queue and the operations in the second queue at the processing unit respectively based on the dependency relationship, including: executing the operations in the first queue based on a first code; And executing the operations in the second queue based on the second code, wherein the operations in the first queue and the operations in the second queue are executed in parallel.

12. The apparatus according to claim 11, further comprising: A loading module is configured to load the first code for executing the first group of operations of the first type and the second code for executing the second group of operations of the second type into the processing unit respectively.

13. The apparatus according to claim 12, further comprising: A retaining module is configured to retain at least any one of the first code and the second code in a memory of the processing unit.

14. The apparatus according to claim 11, further comprising: a receiving module configured to receive, at the processing unit, a data block to be processed at the processing unit from the data to be processed of the processing task, wherein the data block is obtained by dividing the data to be processed according to the number of the plurality of processing units; The execution module further comprises: a data processing module configured to respectively execute the operations in the first queue and the operations in the second queue for the data block at the processing unit.

15. The device according to claim 14, wherein: The processing task is a global reduction task, and the plurality of processing units are connected in a ring manner; The first set of operations includes an accumulation operation for accumulating a data block at the processing unit to an accumulation result copied to the processing unit from a previous processing unit connected before the processing unit as an accumulation result of the processing unit; as well as The second group of operations includes a copy operation for copying at least any one of the data block and the accumulated result at the processing unit to a subsequent processing unit connected after the processing unit.

16. The apparatus according to claim 15, wherein the execution module comprises: The notification module is configured to notify the other processing units by using the hardware interrupt of the processing unit in response to the completion of the operations in any one of the first queue and the second queue at the processing unit.

17. The apparatus according to claim 16, wherein the notification module comprises: The first notification module is configured to notify the previous processing unit to execute a next copy operation in the second queue based on the hardware interrupt in response to an accumulation operation in the first queue having been executed at the processing unit.

18. The apparatus according to claim 16, wherein the notification module comprises: The second notification module is configured to notify the subsequent processing unit to execute the next accumulation operation in the first queue based on the hardware interrupt in response to a copy operation in the second queue having been executed at the processing unit.

19. The apparatus according to claim 18, wherein the processing unit and the subsequent processing unit share a cache area, and the apparatus further comprises: The copy module is configured to copy at least any one of the data block and the accumulated result from the processing unit to the buffer area.

20. The apparatus according to claim 11, further comprising: A reporting module is configured to report that the processing unit has executed the portion of the processing tasks in response to determining that all operations in the first queue and the second queue have been executed at the processing unit.

21. A device for performing a processing task, the device comprising: one or more processors; as well as A storage device, used for storing one or more programs, when the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1-10.

22. A computer-readable storage medium having a computer program stored thereon, wherein when the program is executed by a processor, the method according to any one of claims 1 to 10 is implemented.

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