Display Devices

Abstract

A display device includes: a substrate layer including a display area and a first non-display area and a second non-display area; a circuit device layer on the substrate layer and including: a driving circuit unit overlapping the first non-display area and the second non-display area, a power electrode outside the driving circuit unit, and a shielding electrode connected to the power electrode, and a first through hole is defined by the shielding electrode; a light-emitting device layer on the circuit device layer and including: a second electrode and a connecting electrode electrically connecting the power electrode to the second electrode, and a second through hole is defined by the connecting electrode; a thin film encapsulation layer on the light-emitting device layer; and a touch sensing layer on the thin film encapsulation layer. The first through hole and the second through hole do not overlap each other in the first non-display area, and the first through hole and the second through hole overlap each other in the second non-display area.

Description

Technical Field

[0001] Embodiments relate to display devices. More particularly, embodiments relate to display devices including a touch sensing layer. Background Art

[0002] Various display devices have been developed for multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles. Keyboards, mice, etc. have been widely used as input devices for display devices. Recently, display devices may include a touch sensing unit as an input device. Summary of the invention

[0003] The embodiment provides a display device having improved touch sensitivity of a touch sensing layer, in which a light emitting device of the display device is effectively prevented from being degraded.

[0004] According to an embodiment of the present invention, a display device includes: a substrate layer, the substrate layer including a display area, a first non-display area, and a second non-display area between the display area and the first non-display area; a circuit device layer arranged on the substrate layer, wherein the circuit device layer includes: a driving circuit unit overlapping the first non-display area and the second non-display area, a power electrode arranged outside the driving circuit unit, and a shielding electrode connected to the power electrode and overlapping the driving circuit unit, wherein a plurality of first through holes are defined by the shielding electrode; a light-emitting device layer arranged on the circuit device layer, wherein the light-emitting device layer includes: a light-emitting device overlapping the display area and including a first electrode, a light-emitting layer, and a second electrode, and a connecting electrode electrically connecting the power electrode to the second electrode, wherein a plurality of second through holes are defined by the connecting electrode; a thin film encapsulation layer arranged on the light-emitting device layer; and a touch sensing layer arranged on the thin film encapsulation layer, wherein the touch sensing layer includes: a plurality of touch sensing electrodes and a plurality of touch signal lines connected to the plurality of touch sensing electrodes and overlapping the connecting electrode. In such an embodiment, the first through hole and the second through hole do not overlap with each other in the first non-display area, and the first through hole and the second through hole overlap with each other in the second non-display area.

[0005] In an embodiment, the second electrode may cover the second through hole in the second non-display area.

[0006] In an embodiment, the second electrode may overlap the second non-display area and not overlap the first non-display area.

[0007] In an embodiment, the second electrode may overlap the first non-display area and the second non-display area.

[0008] In an embodiment, each of the plurality of touch signal lines may overlap at least one of the shielding electrode and the connection electrode in the first non-display area.

[0009] In an embodiment, each of the plurality of touch signal lines may overlap at least one of the connection electrode and the second electrode in the second non-display area.

[0010] In an embodiment, the circuit device layer may further include: a first planarization layer disposed between the driving circuit unit and the shielding electrode, and a second planarization layer disposed between the shielding electrode and the connection electrode.

[0011] In an embodiment, the first through hole may expose the first planarization layer, and the second through hole may expose the second planarization layer.

[0012] In an embodiment, a valley between the first non-display area and the second non-display area may be defined in the first planarization layer and the second planarization layer.

[0013] In an embodiment, the shield electrode may not overlap the valley.

[0014] In an embodiment, the second through hole connecting the electrode may not overlap with the valley.

[0015] In an embodiment, the circuit device layer may further include: a pixel circuit unit arranged on the base layer and overlapping the display area, and a pixel connection electrode arranged between the first planarization layer and the second planarization layer, wherein the pixel connection electrode is electrically connected to the pixel circuit unit through a first contact hole, and is electrically connected to the first electrode through a second contact hole, the first contact hole is defined by the first planarization layer, and the second contact hole is defined by the second planarization layer.

[0016] In an embodiment, the shielding electrode may include the same material as the pixel connection electrode, and the connection electrode may include the same material as the first electrode.

[0017] In an embodiment, when viewed in a plan view, the first through holes and the second through holes may be alternately arranged in the first direction in the first non-display area.

[0018] In an embodiment, the first through holes and the second through holes may be alternately arranged in a second direction crossing the first direction in the first non-display area when viewed in a plan view.

[0019] In an embodiment, the first through holes and the second through holes may define a plurality of rows arranged in a first direction on a plane, the first through holes in odd-numbered rows among the plurality of rows and the first through holes in even-numbered rows among the plurality of rows may be arranged alternately with each other in a second direction intersecting the first direction in the second non-display area, and the second through holes in odd-numbered rows among the plurality of rows and the second through holes in even-numbered rows among the plurality of rows may be arranged alternately with each other in the second direction.

[0020] In an embodiment, the thin film encapsulation layer may include a first inorganic layer disposed on the second electrode, an organic layer disposed on the first inorganic layer and having a flat top surface, and a second inorganic layer disposed on the organic layer and having one end contacting the first inorganic layer.

[0021] According to an embodiment of the present invention, a display device includes: a substrate layer, the substrate layer including a display area, a first non-display area, and a second non-display area between the display area and the first non-display area; a circuit device layer arranged on the substrate layer, wherein the circuit device layer includes: a driving circuit unit overlapping the first non-display area and the second non-display area, a power electrode arranged outside the driving circuit unit, and a shielding electrode connected to the power electrode, the shielding electrode overlapping the first non-display area and not overlapping the second non-display area, wherein a plurality of first through holes are defined by the shielding electrode; a light-emitting device layer arranged on the circuit device layer, wherein the light-emitting device layer includes: a light-emitting device and a connecting electrode electrically connecting the power electrode to a second electrode, the light-emitting device including a first electrode, a light-emitting layer, and a second electrode overlapping at least the second non-display area, wherein a plurality of second through holes are defined by the connecting electrode; a thin film encapsulation layer arranged on the light-emitting device layer; and a touch sensing layer arranged on the thin film encapsulation layer, wherein the touch sensing layer includes: a plurality of touch sensing electrodes and a plurality of touch signal lines connected to the plurality of touch sensing electrodes and overlapping the connecting electrode. In such an embodiment, the first through hole and the second through hole do not overlap each other in the first non-display area, and the second electrode covers the second through hole in the second non-display area.

[0022] In an embodiment, the second electrode may not overlap with the shielding electrode.

[0023] In an embodiment, the second electrode may partially overlap the shielding electrode.

[0024] In an embodiment of the display device according to the present invention, the first through hole of the shielding electrode may not overlap with the second through hole of the connecting electrode in the first non-display area away from the display area, so that the noise propagating from the driving circuit unit to the touch sensing layer can be blocked. Therefore, the touch sensitivity of the touch sensing layer can be improved.

[0025] In such an embodiment, the first through hole of the shielding electrode may overlap with the second through hole of the connecting electrode in the second non-display area close to the display area, or the shielding electrode may not be arranged in the second non-display area, so that the gas generated from the planarization layer can be discharged smoothly. Therefore, the light emitting device can be prevented from being degraded. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other features of the present invention will become more apparent by describing in detail exemplary embodiments of the present invention with reference to the accompanying drawings, in which:

[0027] Figure 1 is a perspective view showing a display device according to an embodiment of the present invention;

[0028] Figure 2 It is along Figure 1 A cross-sectional view taken along line AA′ of the display device DD shown in FIG.

[0029] Figure 3 It is shown Figure 2 A cross-sectional view of an embodiment of a display module DM of a display device DD;

[0030] Figure 4 It is shown Figure 3 A plan view of an embodiment of a display panel DP of a display module DM;

[0031] Figure 5 It is shown Figure 4 A circuit diagram of an embodiment of a pixel PX of a display panel DP;

[0032] Figure 6 is shown with Figure 5 A cross-sectional view of an embodiment of a pixel PX corresponding to line BB';

[0033] Figure 7 It is shown Figure 3 A cross-sectional view of an embodiment of a touch sensing layer TS of a display module DM;

[0034] Figure 8 It is shown Figure 7 A plan view of an embodiment of a touch sensing layer TS;

[0035] Fig. 9 is shown with Figure 3 A cross-sectional view of an embodiment of a display module DM corresponding to an area AA;

[0036] Fig.10 It is shown Fig. 9 A plan view of a first through hole TH1 of a shielding electrode SHL and a second through hole TH2 of a connecting electrode E-CNT;

[0037] Fig.11 is shown with Figure 3 A cross-sectional view of an alternative embodiment of the display module DM corresponding to the area AA;

[0038] Fig.12 is shown with Figure 3 A cross-sectional view of another alternative embodiment of the display module DM corresponding to the area AA;

[0039] Fig.13 It is shown Fig.12 A plan view of the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connection electrode E-CNT; and

[0040] Fig.14 is shown with Figure 3 FIG. 2 is a cross-sectional view of yet another alternative embodiment of the display module DM corresponding to the area AA. DETAILED DESCRIPTION

[0041] The present invention will now be more fully described below with reference to the accompanying drawings in which various embodiments are shown. However, the present invention can be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. Throughout the text, the same reference numerals refer to the same elements.

[0042] It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements may be between the element and the other element. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present.

[0043] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Therefore, without departing from the teachings of this article, the first element, component, region, layer or section discussed below may be referred to as the second element, component, region, layer or section.

[0044] The terms used herein are only for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, unless the content clearly indicates otherwise, the singular forms "one" and "the" are intended to include plural forms, including "at least one". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more associated listed items. It will be further understood that when used in this specification, the terms "include" and / or "comprise" specify the presence of the features, regions, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components and / or their groups.

[0045] In addition, as illustrated in the figures, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element. It will be understood that, in addition to the orientation depicted in the figures, relative terms are intended to cover different orientations of the device. For example, if the device in one of the figures is turned over, the element described as being on the "lower" side of the other elements will subsequently be oriented to be on the "upper" side of the other elements. Therefore, depending on the specific orientation of the figure, the exemplary term "lower" can cover both the orientation of "lower" and "upper". Similarly, if the device in one of the figures is turned over, the element described as being "below" or "below" the other elements will subsequently be oriented to be "above" the other elements. Therefore, the exemplary term "below" or "below" can cover both the orientation of the upper and lower parts.

[0046] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense, unless explicitly defined herein.

[0047] Exemplary embodiments are described herein with reference to schematically illustrated cross-sectional illustrations as ideal embodiments. Therefore, variations in the shapes of the illustrations, for example due to manufacturing techniques and / or tolerances, are to be expected. Therefore, the embodiments described herein should not be interpreted as being limited to the specific shapes of the regions as illustrated herein, but rather to include deviations in shapes, for example, caused by manufacturing. For example, a region illustrated or described as flat may typically have rough and / or nonlinear features. In addition, the illustrated acute angles may be rounded. Therefore, the regions illustrated in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shapes of the regions and are not intended to limit the scope of the claims.

[0048] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0049] Figure 1 is a perspective view showing a display device according to an embodiment of the present invention.

[0050] refer to Figure 1 , an embodiment of the display device DD may display an image through a display surface. The display surface may be parallel to a surface defined by a first direction DR1 and a second direction DR2 crossing the first direction DR1. A normal direction of the display surface (that is, a thickness direction of the display device DD) may be defined as a third direction DR3.

[0051] In an embodiment, the display device DD may include a flat display surface, but the present invention is not limited thereto. In an alternative embodiment, the display device DD may include a curved display surface, a three-dimensional display surface, or the like.

[0052] In an embodiment, the display device DD may be a rigid display device, but the present invention is not limited thereto. In an alternative embodiment, the display device DD may be a flexible display device.

[0053] The display surface may include a display area DA in which an image is displayed and a non-display area NDA in which an image is not displayed. In one embodiment, for example, the display area DA may have a rectangular shape. The non-display area NDA may be adjacent to the display area DA. In one embodiment, for example, the non-display area NDA may surround the periphery of the display area DA.

[0054] Figure 2 It is along Figure 1 1 is a cross-sectional view taken along line AA′ of the display device DD shown in .

[0055] refer to Figure 2 , an embodiment of the display device DD may include a protection member PM, a display module DM, an optical member LM, a window member WM, a first adhesive member AM1, a second adhesive member AM2, and a third adhesive member AM3.

[0056] The window member WM may be arranged above the display module DM, the optical member LM may be arranged between the display module DM and the window member WM, and the protection member PM may be arranged under the display module DM. The first adhesive member AM1 may couple the display module DM and the protection member PM to each other, the second adhesive member AM2 may couple the display module DM and the optical member LM to each other, and the third adhesive member AM3 may couple the optical member LM and the window member WM to each other.

[0057] The protective member PM may protect the lower portion of the display module DM. The protective member PM may define a first outer surface OS-L of the display device DD exposed to the outside, and may include an adhesive surface bonded to the first adhesive member AM1. The protective member PM may prevent impurities from penetrating into the display module DM from the outside, and may absorb external impacts. The protective member PM may include plastics such as polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI) or polycarbonate (PC).

[0058] The window member WM can protect the upper part of the display module DM and can define the second outer surface OS-U of the display device DD exposed to the user. The window member WM may include a substrate layer. The substrate layer may include glass, plastic, etc. The window member WM may further include a functional layer arranged on the substrate layer. The functional layer may include a hard coating layer, an anti-fingerprint layer, an anti-reflection layer, a self-repairing layer, etc.

[0059] The optical member LM may reduce external light reflectivity of the display device DD. The optical member LM may include a polarizing film. In an embodiment, the optical member LM may further include a retardation film.

[0060] The display module DM may include a display panel DP and a touch sensing layer TS. In an embodiment, the display panel DP may be an organic light-emitting display panel, but the present invention is not limited thereto. In an alternative embodiment, the display panel DP may be a quantum dot light-emitting display panel. Hereinafter, for ease of description, an embodiment in which the display panel DP is an organic light-emitting display panel will be described in detail.

[0061] The display panel DP may generate an image corresponding to input image data. The display panel DP may include a first display panel surface BS1 -L and a second display panel surface BS1 -U facing each other in the thickness direction DR3 .

[0062] The touch sensing layer TS may be directly arranged on the display panel DP. The touch sensing layer TS may obtain coordinate information of an external input. The external input may be a touch event generated on the touch sensing layer TS by a user, a sensing pen, etc. In an embodiment, the touch sensing layer TS may sense the external input in a capacitive manner. However, the operation mode of the touch sensing layer TS is not limited thereto. In an alternative embodiment, the touch sensing layer TS may sense the external input in an electromagnetic induction manner, a pressure sensing manner, etc.

[0063] Each of the first bonding member AM1, the second bonding member AM2, and the third bonding member AM3 may be an organic bonding film such as an optically clear adhesive (OCA) film, a pressure sensitive adhesive (PSA) film, etc. The organic bonding film may include an organic bonding material such as a polyurethane resin, a polyacrylate resin, a polyester resin, a polyepoxy resin, a polyvinyl acetate resin, etc.

[0064] Figure 3 It is shown Figure 2 FIG. 5 is a cross-sectional view of an embodiment of a display module DM of a display device DD.

[0065] refer to Figure 3, an embodiment of the display panel DP may include a base layer SUB and a circuit device layer DP-CL, a light emitting device layer DP-OLED and a thin film encapsulation layer TFE arranged on the base layer SUB. The base layer SUB may include a plastic substrate, a glass substrate, a metal substrate, an organic / inorganic composite material substrate, etc.

[0066] The circuit device layer DP-CL may include a semiconductor layer, an insulating layer, and a conductive layer. The conductive layer of the circuit device layer DP-CL may define a signal line, a driving circuit unit, a pixel circuit unit, and the like.

[0067] The light emitting device layer DP-OLED may include a light emitting device such as an organic light emitting diode.

[0068] The thin film encapsulation layer TFE may seal the light emitting device layer DP-OLED. The thin film encapsulation layer TFE may include an inorganic layer and an organic layer. In one embodiment, for example, the thin film encapsulation layer TFE may include two inorganic layers and a single organic layer arranged between the two inorganic layers. The inorganic layer may protect the light emitting device layer DP-OLED from moisture, oxygen, etc., and the organic layer may protect the light emitting device layer DP-OLED from foreign matter such as dust particles. For example, the inorganic layer may include at least one material selected from silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide. The organic layer may include an acrylic organic material.

[0069] The touch sensing layer TS may be directly disposed on the thin film encapsulation layer TFE. The touch sensing layer TS may include touch sensing electrodes and touch signal lines. The touch sensing electrodes and the touch signal lines may have a single-layer structure or a multi-layer structure.

[0070] In an embodiment, for example, the touch sensing electrodes and the touch signal lines may include at least one material selected from indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), poly (3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, and graphene. In an alternative embodiment, the touch sensing electrodes and the touch signal lines may include a metal such as molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), or aluminum (Al), or a combination thereof (e.g., an alloy).

[0071] Figure 4 It is shown Figure 3 FIG. 5 is a plan view of an embodiment of a display panel DP of a display module DM.

[0072] refer to Figure 4 , the non-display area NDA may be defined along the periphery of the display area DA. The display area DA and the non-display area NDA of the display panel DP may correspond to the display area DA and the non-display area NDA of the display device DD, respectively.

[0073] The display panel DP may include a driving circuit unit GDC, signal lines GL, EL, DL, SL-VDD, SL-Vint, and SL-D, a power electrode E-VSS, and a plurality of pixels PX. An area in which the pixels PX are arranged may be defined as a display area DA.

[0074] In an embodiment, the driving circuit unit GDC may generate a plurality of scan signals, and the scan signals may be sequentially output to a plurality of scan lines GL, respectively. In such an embodiment, the driving circuit unit GDC may generate a plurality of light emission control signals, and may output the light emission control signals to a plurality of light emission control lines EL, respectively.

[0075] In an embodiment, Figure 4 As shown in FIG. 1 , the scanning signal and the light emitting control signal can be output from a single driving circuit unit GDC, but the present invention is not limited thereto. In an alternative embodiment, a driving circuit unit for generating and outputting the scanning signal and a driving circuit unit for generating and outputting the light emitting control signal can be provided separately. In one embodiment, for example, in the second direction DR2, the scanning signal and the light emitting control signal are output from a single driving circuit unit GDC, but the present invention is not limited thereto. Figure 4 Another driving circuit unit of the driving circuit unit GDC shown in FIG. 1 may be further provided, with the display area DA being interposed between the driving circuit unit GDC and the another driving circuit unit.

[0076] The driving circuit unit GDC may be included in the circuit device layer DP-CL. The driving circuit unit GDC may include a plurality of thin film transistors provided or formed by the same process as the thin film transistors of the pixel circuit unit of the pixel PX.

[0077] although Figure 4 Although not shown in the figure, the display panel DP may further include a data driving circuit unit coupled to the pad PD in a chip on film (COF) form. The data driving circuit unit may be integrated in the circuit device layer DP-CL.

[0078] The signal lines GL, EL, DL, SL-VDD, SL-Vint, and SL-D may include a scan line GL, a light emitting control line EL, a data line DL, a power line SL-VDD, an initialization voltage line SL-Vint, and a control signal line SL-D. The signal lines GL, EL, DL, SL-VDD, SL-Vint, and SL-D may be included in the circuit device layer DP-CL, and alternatively, some signal lines may be omitted. The pads PD may be connected to the ends of the signal lines GL, EL, DL, SL-VDD, SL-Vint, and SL-D.

[0079] The scan lines GL may extend in the second direction DR2 and be respectively connected to the corresponding pixels PX, and the data lines DL may extend in the first direction DR1 and be respectively connected to the corresponding pixels PX. The light emission control lines EL may be arranged in parallel with the corresponding scan lines GL.

[0080] The power line SL-VDD may be connected to the pixel PX and may provide a first power voltage to the pixel PX. The power line SL-VDD may include a plurality of lines extending in the first direction DR1 and a plurality of lines extending in the second direction DR2.

[0081] The initialization voltage line SL-Vint may provide an initialization voltage to the pixel PX. The initialization voltage line SL-Vint may include a plurality of lines extending in the first direction DR1 and a plurality of lines extending in the second direction DR2.

[0082] The control signal line SL-D may provide a control signal to the driving circuit unit GDC. The control signal line SL-D may provide a second power supply voltage to the power supply electrode E-VSS. The second power supply voltage may have a voltage level different from the first power supply voltage. In one embodiment, for example, the second power supply voltage may have a voltage level lower than the first power supply voltage.

[0083] The power electrode E-VSS may be arranged in the non-display area NDA and may have a shape extending along the periphery of the substrate layer SUB. In one embodiment, for example, the power electrode E-VSS may be arranged to face three edges of the non-display area NDA. The power electrode E-VSS may be included in the circuit device layer DP-CL. The power electrode E-VSS may be arranged outside the driving circuit unit GDC.

[0084] The display panel DP may further include a shielding electrode (not shown). The shielding electrode may be arranged in the non-display area NDA. The shielding electrode may be directly connected to the power electrode E-VSS and may overlap with at least a portion of the driving circuit unit GDC. The shielding electrode may be electrically insulated from the driving circuit unit GDC. In an embodiment, the shielding electrode overlaps with at least the portion of the driving circuit unit GDC so that the shielding electrode may shield noise generated by the driving circuit unit GDC and propagated toward the touch sensing layer TS located above the driving circuit unit GDC. Therefore, the touch sensitivity of the touch sensing layer TS may be improved by the shielding electrode. This will be referred to later. Fig. 9 and Fig.10 The shield electrode is described in more detail.

[0085] Figure 5 It is shown that the Figure 4 A circuit diagram of an embodiment of a pixel PX in a display panel DP.

[0086] refer to Figure 5 , an embodiment of the pixel PX may include a pixel circuit unit PC and a light emitting device OLED. In an embodiment, the pixel circuit unit PC may include first to seventh transistors T1 to T7 and a capacitor Cst.

[0087] The data signal Data, the first scan signal GW, the second scan signal GI, the third scan signal GB and the light emitting control signal EM may be provided to the pixel PX. The second scan signal GI may be the same as the first scan signal GW of the previous pixel or the previous row. In one embodiment, for example, the second scan signal GI[n] provided to the pixel PX of the nth row may be the same as the first scan signal GW[n-1] provided to the pixel PX of the n-1th row. In an embodiment, the third scan signal GB may be the same as the first scan signal GW of the next pixel or the next row. In one embodiment, for example, the third scan signal GB[n] provided to the pixel PX of the nth row may be the same as the first scan signal GW[n+1] provided to the pixel PX of the n+1th row.

[0088] Each of the first to seventh transistors T1 to T7 may include a first electrode, a second electrode, and a gate electrode. One of the first and second electrodes may be a source electrode, and the other of the first and second electrodes may be a drain electrode.

[0089] Each of the first to seventh transistors T1 to T7 may be a thin film transistor. In one embodiment, for example, each of the first to seventh transistors T1 to T7 may be a P-type metal oxide semiconductor (PMOS) transistor or an N-type metal oxide semiconductor (NMOS) transistor. Hereinafter, for ease of description, an embodiment in which each of the first to seventh transistors T1 to T7 is a PMOS transistor will be described in detail.

[0090] The light emitting device OLED may be electrically connected to the pixel circuit unit PC. The light emitting device OLED may include an anode and a cathode. The anode of the light emitting device OLED may be connected to the fourth node N4, and the cathode may be connected to a wiring transmitting the second power supply voltage ELVSS.

[0091] The first transistor T1 (or driving transistor) may include a first electrode connected to the first node N1, a second electrode connected to the second node N2, and a gate electrode connected to the third node N3. The first transistor T1 may provide a driving current Id to the light emitting device OLED based on a voltage of the third node N3 (or a voltage stored in the capacitor Cst).

[0092] The second transistor T2 (or switching transistor) may include a first electrode configured to receive the data signal Data, a second electrode connected to the first node N1, and a gate electrode configured to receive the first scan signal GW. The second transistor T2 may be turned on in response to the first scan signal GW and may transmit the data signal Data to the first node N1.

[0093] The third transistor T3 may include a first electrode connected to the second node N2, a second electrode connected to the third node N3, and a gate electrode configured to receive the first scan signal GW. The third transistor T3 may be turned on in response to the first scan signal GW and may diode-connect the second electrode and the gate electrode of the first transistor T1 to each other.

[0094] The capacitor Cst may be connected between the third node N3 and a wiring for transmitting the first power voltage ELVDD. The capacitor Cst may store or hold the data signal Data.

[0095] The fourth transistor T4 may include a first electrode connected to the third node N3, a second electrode connected to receive the initialization voltage VINIT, and a gate electrode connected to receive the second scan signal GI. The fourth transistor T4 may be turned on in response to the second scan signal GI before the data signal Data is stored in the capacitor Cst, and may initialize the third node N3 by using the initialization voltage VINIT.

[0096] In an embodiment, the third transistor T3 and the fourth transistor T4 may be double transistors (that is, transistors in which two transistors are combined with each other). In such an embodiment, leakage current of the third transistor T3 and the fourth transistor T4 may be reduced.

[0097] The fifth transistor T5 and the sixth transistor T6 (or the first light emission control transistor and the second light emission control transistor) may form a current moving path through which the driving current Id transmitted from the first transistor T1 flows.

[0098] The fifth transistor T5 may include a first electrode connected to receive the first power voltage ELVDD, a second electrode connected to the first node N1, and a gate electrode connected to receive the light emitting control signal EM. The sixth transistor T6 may include a first electrode connected to the second node N2, a second electrode connected to the fourth node N4 (or the anode of the light emitting device OLED), and a gate electrode connected to receive the light emitting control signal EM.

[0099] The fifth transistor T5 and the sixth transistor T6 may be turned on in response to the light emitting control signal EM. Therefore, the driving current Id may be provided to the light emitting device OLED, and the light emitting device OLED may emit light having brightness corresponding to the driving current Id.

[0100] The seventh transistor T7 may include a first electrode connected to the fourth node N4, a second electrode connected to receive the initialization voltage VINIT, and a gate electrode connected to receive the third scan signal GB. The seventh transistor T7 may be turned on in response to the third scan signal GB, and may initialize the anode of the light emitting device OLED by using the initialization voltage VINIT. The light emitting device OLED may include a parasitic capacitor, and the parasitic capacitor may be charged or discharged by the driving current Id when the light emitting device OLED emits light, so that the anode of the light emitting device OLED may have an irregular voltage. Therefore, the parasitic capacitor of the light emitting device OLED may be initialized by the seventh transistor T7.

[0101] Figure 6 is shown with Figure 5 A cross-sectional view of an embodiment of a pixel PX corresponding to line BB′.

[0102] refer to Figure 6 , an embodiment of the pixel PX may include a substrate layer SUB, a circuit device layer DP-CL, a light emitting device layer DP-OLED, and a thin film encapsulation layer TFE.

[0103] The circuit device layer DP-CL may be disposed on the base layer SUB. The circuit device layer DP-CL may include a buffer layer BFL, a semiconductor layer 100, a first insulating layer 10, a first conductive layer 200, a second insulating layer 20, a second conductive layer 300, a first planarization layer 30, a third conductive layer 400, and a second planarization layer 40.

[0104] The buffer layer BFL may be disposed on the base layer SUB. The buffer layer BFL may provide a flat surface on the base layer SUB and may prevent impurities from penetrating upward into the base layer SUB. The buffer layer BFL may include an inorganic material. Alternatively, the buffer layer BFL may be omitted.

[0105] The semiconductor layer 100 may be disposed on the buffer layer BFL. The semiconductor layer 100 may include a semiconductor pattern OSP1 (hereinafter referred to as a first semiconductor pattern) of the first transistor T1, a semiconductor pattern OSP2 (hereinafter referred to as a second semiconductor pattern) of the second transistor T2, and a semiconductor pattern OSP6 (hereinafter referred to as a sixth semiconductor pattern) of the sixth transistor T6. For example, the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, and the sixth semiconductor pattern OSP6 may include at least one selected from amorphous silicon, polycrystalline silicon, and an oxide semiconductor.

[0106] The first insulating layer 10 may be disposed on the semiconductor layer 100. The first insulating layer 10 may include an inorganic material such as silicon nitride, silicon oxide, or silicon oxynitride.

[0107] The first conductive layer 200 may be disposed on the first insulating layer 10. The first conductive layer 200 may include a gate electrode GE1 (hereinafter referred to as a first gate electrode) of the first transistor T1, a gate electrode GE2 (hereinafter referred to as a second gate electrode) of the second transistor T2, and a gate electrode GE6 (hereinafter referred to as a sixth gate electrode) of the sixth transistor T6. The first gate electrode GE1, the second gate electrode GE2, and the sixth gate electrode GE6 may be connected to the scanning line ( Figure 4 GL) in the same process.

[0108] The second insulating layer 20 may be disposed on the first conductive layer 200. The second insulating layer 20 may cover the first gate electrode GE1, the second gate electrode GE2, and the sixth gate electrode GE6. The second insulating layer 20 may include an inorganic material such as silicon nitride, silicon oxide, or silicon oxynitride.

[0109] The second conductive layer 300 may be disposed on the second insulating layer 20. The second conductive layer 300 may include an input electrode SE1 (hereinafter referred to as a first input electrode) and an output electrode DE1 (hereinafter referred to as a first output electrode) of the first transistor T1, an input electrode SE2 (hereinafter referred to as a second input electrode) and an output electrode DE2 (hereinafter referred to as a second output electrode) of the second transistor T2, and an input electrode SE6 (hereinafter referred to as a sixth input electrode) and an output electrode DE6 (hereinafter referred to as a sixth output electrode) of the sixth transistor T6.

[0110] The first output electrode DE1 and the first input electrode SE1 may be connected to the first semiconductor pattern OSP1 through the first contact hole CNT1 and the second contact hole CNT2, respectively, which are defined by the first insulating layer 10 and the second insulating layer 20. The second output electrode DE2 and the second input electrode SE2 may be connected to the second semiconductor pattern OSP2 through the third contact hole CNT3 and the fourth contact hole CNT4, respectively, which are defined by the first insulating layer 10 and the second insulating layer 20. The second input electrode SE2 may be electrically connected to the first output electrode DE1 or integrally formed as a single integral unit. The sixth output electrode DE6 and the sixth input electrode SE6 may be connected to the sixth semiconductor pattern OSP6 through the fifth contact hole CNT5 and the sixth contact hole CNT6, respectively, which are defined by the first insulating layer 10 and the second insulating layer 20. The sixth output electrode DE6 may be electrically connected to the first input electrode SE1 or integrally formed as a single integral unit. In an embodiment, each of the first transistor T1, the second transistor T2 and the sixth transistor T6 may have a top gate structure, but the present invention is not limited thereto. In an alternative embodiment, at least one of the first transistor T1, the second transistor T2 and the sixth transistor T6 may have a bottom gate structure.

[0111] The first planarization layer 30 may be disposed on the second conductive layer 300. The first planarization layer 30 may cover the first input electrode SE1, the first output electrode DE1, the second input electrode SE2, the second output electrode DE2, the sixth input electrode SE6, and the sixth output electrode DE6. The first planarization layer 30 may have a flat top surface to provide a flat surface on the layers below it. The first planarization layer 30 may include an organic material.

[0112] The third conductive layer 400 may be disposed on the first planarization layer 30. The third conductive layer 400 may include a data line DL and a pixel connection electrode 410. The data line DL may be connected to the second output electrode DE2 of the second transistor T2 through a seventh contact hole CNT7 defined by the first planarization layer 30. The pixel connection electrode 410 may be connected to the sixth input electrode SE6 of the sixth transistor T6 through an eighth contact hole CNT8 defined by the first planarization layer 30.

[0113] In the embodiment, although Figure 6 Although not shown in the figure, the third conductive layer 400 may further include a shielding electrode arranged in the non-display area NDA. Fig. 9 The shield electrode is described in more detail.

[0114] The second planarization layer 40 may be disposed on the third conductive layer 400. The second planarization layer 40 may cover the data line DL and the pixel connection electrode 410. The second planarization layer 40 may have a flat top surface to provide a flat surface on a layer therebelow. The second planarization layer 40 may include an organic material.

[0115] The light emitting device layer DP-OLED may be disposed on the circuit device layer DP-CL. The light emitting device layer DP-OLED may include a light emitting device including a first electrode AE, a hole control layer HCL, a light emitting layer EML, an electron control layer ECL and a second electrode CE, and a pixel defining layer PDL.

[0116] The first electrode AE ​​may be disposed on the second planarization layer 40. The first electrode AE ​​may be connected to the pixel connection electrode 410 through a ninth contact hole CNT9 defined by the second planarization layer 40. In such an embodiment in which the pixel connection electrode 410 is connected to the sixth input electrode SE6, the first electrode AE ​​may be electrically connected to the sixth transistor T6 through the pixel connection electrode 410.

[0117] The pixel defining layer PDL may be disposed on the first electrode AE. An opening OP may be defined in the pixel defining layer PDL. The opening OP of the pixel defining layer PDL may expose at least a portion of the first electrode AE.

[0118] When viewed in a plan view in the thickness direction of the display module DM or the third direction DR3, the pixel PX may be arranged in the display area DA. The display area DA may include a light emitting area PXA and a non-light emitting area NPXA adjacent to the light emitting area PXA. The non-light emitting area NPXA may surround the light emitting area PXA. The light emitting area PXA may be defined to correspond to a portion of the first electrode AE ​​exposed by the opening OP.

[0119] The hole control layer HCL may be disposed on the first electrode AE ​​and the pixel defining layer PDL. The hole control layer HCL may be provided in common in the emission area PXA and the non-emission area NPXA. In such an embodiment, the hole control layer HCL may be formed in common in the pixel PX.

[0120] The light emitting layer EML may be disposed on the hole control layer HCL. The light emitting layer EML may be disposed in a region corresponding to the opening OP of the pixel defining layer PDL. In such an embodiment, the light emitting layer EML may be formed separately from each of the pixels PX. The light emitting layer EML may include an organic material.

[0121] The electronic control layer ECL may be disposed on the light emitting layer EML. The electronic control layer ECL may be provided in common in the light emitting region PXA and the non-light emitting region NPXA. In such an embodiment, the electronic control layer ECL may be formed in common in the pixel PX.

[0122] The second electrode CE may be disposed on the electronic control layer ECL. The second electrode CE may be provided in common in the light emitting area PXA and the non-light emitting area NPXA. In such an embodiment, the second electrode CE may be formed in common in the pixel PX.

[0123] The thin film encapsulation layer TFE may be arranged on the second electrode CE. The thin film encapsulation layer TFE may be provided together in the pixel PX. The thin film encapsulation layer TFE may directly cover the second electrode CE. In an embodiment, a capping layer covering the second electrode CE may be further arranged between the thin film encapsulation layer TFE and the second electrode CE. In such an embodiment, the thin film encapsulation layer TFE may directly cover the capping layer.

[0124] Figure 7 It is shown Figure 3 FIG. 5 is a cross-sectional view of an embodiment of a touch sensing layer TS of a display module DM.

[0125] refer to Figure 7 The touch sensing layer TS may include a first conductive layer TS-CL1 (hereinafter referred to as a first touch conductive layer), a first insulating layer TS-IL1 (hereinafter referred to as a first touch insulating layer), a second conductive layer TS-CL2 (hereinafter referred to as a second touch conductive layer) and a second insulating layer TS-IL2 (hereinafter referred to as a second touch insulating layer).

[0126] The first touch conductive layer TS-CL1 may be directly arranged on the thin film encapsulation layer TFE. Each of the first touch conductive layer TS-CL1 and the second touch conductive layer TS-CL2 may have a single-layer structure or may have a multi-layer structure stacked along the third direction DR3. Each of the first touch conductive layer TS-CL1 and the second touch conductive layer TS-CL2 may include a transparent conductive layer and / or a metal layer. For example, the transparent conductive layer may include at least one material selected from ITO, IZO, ZnO, ITZO, PEDOT, metal nanowires, and graphene. For example, the metal layer may include at least one material selected from Mo, Ag, Ti, Cu, and Al. In one embodiment, for example, each of the first touch conductive layer TS-CL1 and the second touch conductive layer TS-CL2 may have a three-layer structure of Ti / Al / Ti.

[0127] Each of the first touch insulating layer TS-IL1 and the second touch insulating layer TS-IL2 may include an inorganic material or an organic material. The inorganic material may include at least one material selected from aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The organic material may include at least one material selected from acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0128] Each of the first touch insulating layer TS-IL1 and the second touch insulating layer TS-IL2 may have a single layer structure or a multi-layer structure. The first touch insulating layer TS-IL1 may insulate the first touch conductive layer TS-CL1 and the second touch conductive layer TS-CL2.

[0129] Figure 8 It is shown Figure 7 FIG. 1 is a plan view of an embodiment of a touch sensing layer TS.

[0130] refer to Figure 8 , the touch sensing layer TS may include first touch sensing electrodes TE1-1 to TE1-4 (or first to fourth driving electrodes), first touch signal lines SL1-1 to SL1-4 (or first to fourth driving signal lines) connected to the first touch sensing electrodes TE1-1 to TE1-4, second touch sensing electrodes TE2-1 to TE2-5 (or first to fifth sensing electrodes), second touch signal lines SL2-1 to SL2-5 (or first to fifth sensing signal lines) connected to the second touch sensing electrodes TE2-1 to TE2-5, and pad portions PADa connected to the first touch signal lines SL1-1 to SL1-4 and the second touch signal lines SL2-1 to SL2-5, respectively. Although Figure 8 An embodiment in which the touch sensing layer TS includes four first touch sensing electrodes TE1-1 to TE1-4 and five second touch sensing electrodes TE2-1 to TE2-5 is illustrated, but the number of the first touch sensing electrodes TE1-1 to TE1-4 and the number of the second touch sensing electrodes TE2-1 to TE2-5 are not limited thereto.

[0131] Each of the first touch sensing electrodes TE1-1 to TE1-4 may have a grid shape in which a plurality of touch openings are defined. Each of the first touch sensing electrodes TE1-1 to TE1-4 may include a plurality of first touch sensor portions SP1 and a plurality of first connection portions CP1. The first touch sensor portions SP1 may be arranged along a first direction DR1. Each of the first connection portions CP1 may connect two adjacent first touch sensor portions SP1 among the first touch sensor portions SP1 to each other.

[0132] The second touch sensing electrodes TE2-1 to TE2-5 may be insulated from the first touch sensing electrodes TE1-1 to TE1-4 and arranged alternately with the first touch sensing electrodes TE1-1 to TE1-4. Each of the second touch sensing electrodes TE2-1 to TE2-5 may have a mesh shape in which a plurality of touch openings are defined. Each of the second touch sensing electrodes TE2-1 to TE2-5 may include a plurality of second touch sensor portions SP2 and a plurality of second connection portions CP2. The second touch sensor portions SP2 may be arranged along the second direction DR2. Each of the second connection portions CP2 may connect two adjacent second touch sensor portions SP2 among the second touch sensor portions SP2 to each other.

[0133] The first touch sensing electrodes TE1-1 to TE1-4 and the second touch sensing electrodes TE2-1 to TE2-5 may be electrostatically coupled to each other. Sensing signals are applied to the first touch sensing electrodes TE1-1 to TE1-4 so that capacitors may be formed between the first touch sensor portion SP1 and the second touch sensor portion SP2.

[0134] The first touch sensor portion SP1, the first connection portion CP1, the first touch signal lines SL1-1 to SL1-4, the second touch sensor portion SP2, the second connection portion CP2, and a portion of the second touch signal lines SL2-1 to SL2-5 can be connected to the first touch conductive layer ( Figure 7 The TS-CL1 of the touch conductive layer is formed by patterning, and another part thereof can be formed by patterning the second touch conductive layer ( Figure 7 TS-CL2) is patterned to form. Figure 8 An embodiment in which each of the first touch sensor portion SP1 and the second touch sensor portion SP2 has a rhombus shape is illustrated, but the shape of each of the first touch sensor portion SP1 and the second touch sensor portion SP2 is not limited thereto.

[0135] Fig. 9 is shown with Figure 3 FIG. 5 is a cross-sectional view of an embodiment of a display module DM corresponding to an area AA.

[0136] refer to Fig. 9 Each stacked structure of the circuit device layer DP-CL, the light emitting device layer DP-OLED and the thin film encapsulation layer TFE arranged in the display area DA is the same as that of the above reference Figure 6 The stacked structures described are substantially the same, and any repeated detailed description thereof will be omitted hereinafter. Fig. 9 The hole control layer HCL and the electron control layer ECL are omitted in FIG. 1 , but it will be understood that the light emitting device layer DP-OLED includes the hole control layer HCL and the electron control layer ECL.

[0137] In such an embodiment, the stacked structure of the touch sensing layer TS arranged in the display area DA is the same as that described above with reference to FIG. Figure 7 The stacked structures described are substantially the same, and any repeated detailed description thereof will be omitted. Fig. 9 The first touch conductive layer TS-CL1 and the second touch insulating layer TS-IL2 are omitted in FIG. 1 , but it will be understood that the touch sensing layer TS includes the first touch conductive layer TS-CL1 and the second touch insulating layer TS-IL2.

[0138] Fig. 9 The illustrated embodiment shows that the thin film encapsulation layer TFE includes a first inorganic layer IOL1 , an organic layer OL and a second inorganic layer IOL2 .

[0139] Hereinafter, the non-display area NDA will be mainly described.

[0140] The non-display area NDA may include a first non-display area NDA1 and a second non-display area NDA2. The second non-display area NDA2 may be located between the display area DA and the first non-display area NDA1. The first non-display area NDA1 may be located at a portion of the non-display area NDA that is far from the display area DA, and the second non-display area NDA2 may be located at a portion of the non-display area NDA that is close to the display area DA. In such an embodiment, the second non-display area NDA2 may be located outside the display area DA (or may be positioned outward from the display area DA), and the first non-display area NDA1 may be located outside the second non-display area NDA2.

[0141] The circuit device layer DP-CL may include a driving circuit unit GDC, a power electrode E-VSS, and a shield electrode SHL.

[0142] The driving circuit unit GDC may overlap the first non-display area NDA1 and the second non-display area NDA2. The driving circuit unit GDC may include at least one transistor GDL-T formed by the same process as the sixth transistor T6 of the pixel circuit unit PC.

[0143] The power electrode E-VSS may be disposed on the second insulating layer 20. The power electrode E-VSS may overlap the first non-display area NDA1. Figure 4 As shown in , the power electrode E-VSS may be arranged outside the driving circuit unit GDC. The power electrode E-VSS may be formed in the same layer by the same process as the sixth input electrode SE6 and the sixth output electrode DE6 of the sixth transistor T6, and may include the same material as the sixth input electrode SE6 and the sixth output electrode DE6 of the sixth transistor T6.

[0144] In an embodiment, a valley VAL located between the first non-display area NDA1 and the second non-display area NDA2 may be defined in the first planarization layer 30 and the second planarization layer 40. The first non-display area NDA1 and the second non-display area NDA2 may be defined by the valley VAL. The valley VAL may physically separate the first planarization layer 30 and the second planarization layer 40 located in the first non-display area NDA1 from the first planarization layer 30 and the second planarization layer 40 located in the second non-display area NDA2. In such an embodiment, in the case where the valley VAL is formed in the first planarization layer 30 and the second planarization layer 40 (the first planarization layer 30 and the second planarization layer 40 are formed together in the display area DA and the non-display area NDA), impurities such as gas and moisture may be prevented from being transferred from the outside to the display area DA through the non-display area NDA via the first planarization layer 30 and the second planarization layer 40.

[0145] The shielding electrode SHL may be disposed on the first planarization layer 30. The shielding electrode SHL may be connected to the power electrode E-VSS and may overlap the driving circuit unit GDC. The shielding electrode SHL may overlap the first non-display area NDA1 and the second non-display area NDA2. The shielding electrode SHL may be formed in the same layer by the same process as the pixel connection electrode 410 and may include the same material as the pixel connection electrode 410.

[0146] The shielding electrode SHL may not overlap the valley VAL. In such an embodiment, the shielding electrode SHL may not be formed between the first non-display area NDA1 and the second non-display area NDA2.

[0147] A plurality of first through holes TH1 may be defined in the shielding electrode SHL. The first through holes TH1 may expose the first planarization layer 30. In one embodiment, for example, the first through holes TH1 may expose a portion of a top surface of the first planarization layer 30. The first through holes TH1 may discharge gas generated from the first planarization layer 30.

[0148] The light emitting device layer DP-OLED may include a connection electrode E-CNT and a second electrode CE.

[0149] The connection electrode E-CNT may be arranged on the second planarization layer 40. A portion of the connection electrode E-CNT may be in contact with the shielding electrode SHL. Therefore, the connection electrode E-CNT may electrically connect the power electrode E-VSS to the second electrode CE. The connection electrode E-CNT may transfer the second power supply voltage from the power electrode E-VSS to the second electrode CE. The connection electrode E-CNT may be formed in the same layer by the same process as the first electrode AE, and may include the same material as the first electrode AE.

[0150] The connection electrode E-CNT may overlap the valley VAL. The connection electrode E-CNT may be formed along the valley VAL to cover the top surface of the second insulating layer 20, the side surface of the first planarization layer 30, and the side surface of the second planarization layer 40.

[0151] A plurality of second through holes TH2 may be defined in the connection electrode E-CNT. The second through holes TH2 may expose the second planarization layer 40. In one embodiment, for example, the second through holes TH2 may expose a portion of the top surface of the second planarization layer 40. The second through holes TH2 may discharge gas generated from the first planarization layer 30 and the second planarization layer 40.

[0152] The second through hole TH2 of the connection electrode E-CNT may not overlap with the valley VAL. In such an embodiment, the second through hole TH2 may not be formed in the valley VAL. In such an embodiment, in the case where the first planarization layer 30 and the second planarization layer 40 including an organic material are not formed in the valley VAL, the second through hole TH2 for exhausting gas may not be formed. The second electrode CE may be arranged on the connection electrode E-CNT.

[0153] The second electrode CE may overlap the second non-display area NDA2 and may not overlap the first non-display area NDA1. In such an embodiment, the second electrode CE may extend from the display area DA to the second non-display area NDA2. The second electrode CE may cover the second through hole TH2 of the connection electrode E-CNT in the second non-display area NDA2.

[0154] The first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connecting electrode E-CNT may not overlap with each other in the first non-display area NDA1. In a conventional display module, the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connecting electrode E-CNT may overlap with each other in the first non-display area NDA1, so that noise may propagate from the driving circuit unit GDC to the touch sensing layer TS through the first through hole TH1 and the second through hole TH2 overlapping each other, and the noise may have an impact on the touch signal line SL2, thereby reducing the touch sensitivity of the touch sensing layer TS. In an embodiment of the present invention, the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connecting electrode E-CNT do not overlap with each other in the first non-display area NDA1, so that the noise propagating from the driving circuit unit GDC to the touch sensing layer TS can be blocked by the shielding electrode SHL or the connecting electrode E-CNT. Therefore, the touch sensitivity of the touch sensing layer TS can be improved.

[0155] The first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connecting electrode E-CNT may overlap with each other in the second non-display area NDA2. In a conventional display module, the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connecting electrode E-CNT may not overlap with each other in the second non-display area NDA2 close to the display area DA, so that the gas generated from the first planarization layer 30 and / or the second planarization layer 40 may move to the display area DA without being smoothly discharged through the first through hole TH1 and / or the second through hole TH2, and the gas may have an impact on the light-emitting layer EML, thereby deteriorating the light-emitting device OLED. In an embodiment of the present invention, the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connecting electrode E-CNT overlap with each other in the second non-display area NDA2, so that the gas generated from the first planarization layer 30 and / or the second planarization layer 40 may be smoothly discharged through the first through hole TH1 and / or the second through hole TH2. Therefore, the light-emitting device OLED can be prevented from being deteriorated.

[0156] In the embodiment, even when the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connection electrode E-CNT overlap each other in the second non-display area NDA2, the second electrode CE covers the second through hole TH2 in the second non-display area NDA2, so that the noise propagating from the driving circuit unit GDC to the touch sensing layer TS can be blocked by the shielding electrode SHL or the second electrode CE. Therefore, the touch sensitivity of the touch sensing layer TS can be improved.

[0157] In an embodiment, the first dam DM1 and the second dam DM2 may be arranged in the first non-display area NDA1.

[0158] The first dam DM1 and the second dam DM2 may be spaced apart from each other in the second direction DR2. Fig. 9 Although not shown in the drawings, the first dam DM1 and the second dam DM2 may be arranged to surround the display area DA when viewed in a plan view.

[0159] The first dam DM1 may be disposed on the power electrode E-VSS. The first dam DM1 may have a single-layer structure. The first dam DM1 may be formed by the same process as the pixel defining layer PDL and may include the same material as the pixel defining layer PDL. The first dam DM1 may have a thickness less than that of the pixel defining layer PDL.

[0160] The second dam DM2 may be disposed outside the first dam DM1. In one embodiment, for example, a distance between the second dam DM2 and the display area DA may be greater than a distance between the first dam DM1 and the display area DA.

[0161] The second dam DM2 may cover a portion of the power electrode E-VSS. The second dam DM2 may have a multi-layer structure. The first layer of the second dam DM2 may be formed by the same process as the first planarization layer 30 and may include the same material as the first planarization layer 30. The second layer of the second dam DM2 may be formed by the same process as the second planarization layer 40 and may include the same material as the second planarization layer 40. The third layer of the second dam DM2 may be formed by the same process as the pixel definition layer PDL and may include the same material as the pixel definition layer PDL.

[0162] The first inorganic layer IOL1 may cover the first dam DM1 and the second dam DM2. One end of the first inorganic layer IOL1 may contact the second insulating layer 20. The organic layer OL may overlap the pixel circuit unit PC and the driving circuit unit GDC, and may have a flat top surface. One end of the organic layer OL may not be arranged outside the second dam DM2. The second inorganic layer IOL2 may overlap the first dam DM1 and the second dam DM2. One end of the second inorganic layer IOL2 may contact one end of the first inorganic layer IOL1.

[0163] The first touch insulating layer TS-IL1 may overlap the first dam DM1 and the second dam DM2. One end of the first touch insulating layer TS-IL1 may contact the second inorganic layer IOL2.

[0164] Each of the touch signal lines SL2 arranged on the first touch insulating layer TS-IL1 may overlap at least one of the shielding electrode SHL, the connecting electrode E-CNT, and the second electrode CE. Each of the touch signal lines SL2 may overlap at least one of the shielding electrode SHL and the connecting electrode E-CNT in the first non-display area NDA1. Each of the touch signal lines SL2 may overlap at least one of the connecting electrode E-CNT and the second electrode CE in the second non-display area NDA2. Therefore, the noise propagating from the driving circuit unit GDC to the touch signal line SL2 may be blocked by the shielding electrode SHL, the connecting electrode E-CNT, and the second electrode CE, and the touch sensitivity of the touch sensing layer TS may be improved.

[0165] Fig.10 It is shown Fig. 9 FIG. 1 is a plan view of the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connection electrode E-CNT.

[0166] refer to Fig.10 , each of the first through holes TH1 of the shielding electrode SHL and the second through holes TH2 of the connection electrode E-CNT may have a polygonal shape, a circular shape, or the like, when viewed in a plan view. Fig.10 An embodiment in which each of the first through holes TH1 and the second through holes TH2 has a rectangular shape is illustrated, but the present invention is not limited thereto.

[0167] The size of each of the first through holes TH1 may be substantially the same as or different from the size of each of the second through holes TH2. Fig.10 As shown in , the size of each of the second through holes TH2 is larger than the size of each of the first through holes TH1, but the present invention is not limited thereto. Alternatively, the size of each of the second through holes TH2 may be smaller than the size of each of the first through holes TH1, or substantially the same as the size of each of the first through holes TH1.

[0168] The first through holes TH1 and the second through holes TH2 may define a plurality of rows H-L1 to H-L4. The rows H-L1 to H-L4 may be arranged in the first direction DR1, and each of the rows H-L1 to H-L4 may extend in the second direction DR2.

[0169] When viewed in a plan view, the first through holes TH1 and the second through holes TH2 may be alternately arranged in the first direction DR1 and the second direction DR2 in the first non-display area NDA1. In one embodiment, for example, the first through holes TH1 may be arranged in the first column of the first row H-L1 and the first column of the third row H-L3, respectively, and the second through holes TH2 may be arranged in the first column of the second row H-L2 and the first column of the fourth row H-L4, respectively. In such an embodiment, the first through holes TH1 may be arranged in the first column and the third column of the first row H-L1, respectively, and the second through holes TH2 may be arranged in the second column and the fourth column of the first row H-L1, respectively.

[0170] The first through holes TH1 and the second through holes TH2 of the odd rows H-L1 and H-L3 among the plurality of rows H-L1 to H-L4 and the first through holes TH1 and the second through holes TH2 of the even rows H-L2 and H-L4 among the rows H-L1 to H-L4 may be arranged alternately with each other in the second direction DR2 in the second non-display area NDA2. In one embodiment, for example, the first through holes TH1 and the second through holes TH2 of the odd rows H-L1 and H-L3 may not overlap with the first through holes TH1 and the second through holes TH2 of the even rows H-L2 and H-L4 when viewed in the first direction DR1.

[0171] Fig.11 is shown with Figure 3 A cross-sectional view of an alternative embodiment of the display module DM corresponding to area AA.

[0172] In addition to the second electrode CE, Fig.11 The display module DM_1 shown in FIG. 1 can be used with the above reference Fig. 9 The display modules DM described are substantially the same. Fig.11 The same or similar components shown in the drawings have been labeled with the same reference numerals as used in the description above. Fig. 9 The embodiments of the display module DM shown in FIG. 1 are denoted by the same reference numerals, and any repeated detailed description thereof will be omitted or simplified hereinafter.

[0173] refer to Fig.11 In an embodiment, the second electrode CE may overlap the first non-display area NDA1 and the second non-display area NDA2. In such an embodiment, the second electrode CE may extend from the display area DA through the second non-display area NDA2 to the first non-display area NDA1. The second electrode CE may cover the second through hole TH2 of the connection electrode E-CNT in the first non-display area NDA1 and the second non-display area NDA2.

[0174] In such an embodiment, the second electrode CE covers the second through hole TH2 in the first non-display area NDA1, so that the noise propagating from the driving circuit unit GDC to the touch sensing layer TS can be further blocked by the second electrode CE. Therefore, the touch sensitivity of the touch sensing layer TS can be improved.

[0175] Fig.12 is shown with Figure 3 FIG. 2 is a cross-sectional view of another alternative embodiment of the display module DM corresponding to the area AA. Fig.13 It is shown Fig.12 FIG. 1 is a plan view of the first through hole TH1 of the shielding electrode SHL and the second through hole TH2 of the connection electrode E-CNT.

[0176] In addition to the shielding electrode SHL, Fig.12 and Fig.13 The display module DM_2 shown in FIG. 1 can be used with the above reference Fig. 9 and Fig.10 The display modules DM described are substantially the same. Fig.12 and Fig.13 The same or similar components shown in the drawings have been labeled with the same reference numerals as used in the description above. Fig. 9 and Fig.10 The embodiments of the display module DM shown in FIG. 1 are denoted by the same reference numerals, and any repeated detailed description thereof will be omitted or simplified hereinafter.

[0177] refer to Fig.12 and Fig.13 , in an embodiment, the shielding electrode SHL may be connected to the power electrode E-VSS and may partially overlap with the driving circuit unit GDC. The shielding electrode SHL may overlap with the first non-display area NDA1 and may not overlap with the second non-display area NDA2. In such an embodiment, the shielding electrode SHL may not be arranged or formed in the second non-display area NDA2. Therefore, the shielding electrode SHL may overlap with the driving circuit unit GDC located in the first non-display area NDA1 and may not overlap with the driving circuit unit GDC located in the second non-display area NDA2.

[0178] In such an embodiment, the second electrode CE may overlap with the second non-display area NDA2 and may not overlap with the first non-display area NDA1. Therefore, the second electrode CE may not overlap with the shielding electrode SHL. The second electrode CE may cover the second through hole TH2 of the connection electrode E-CNT in the second non-display area NDA2.

[0179] In such an embodiment, although the shielding electrode SHL is not formed in the second non-display area NDA2, the second electrode CE covers the second through hole TH2 in the second non-display area NDA2, so that the noise propagating from the driving circuit unit GDC to the touch sensing layer TS can be blocked by the connection electrode E-CNT or the second electrode CE. Therefore, the touch sensitivity of the touch sensing layer TS can be improved.

[0180] Fig.14 is shown with Figure 3 FIG. 2 is a cross-sectional view of yet another alternative embodiment of the display module DM corresponding to the area AA.

[0181] In addition to the second electrode CE, Fig.14 The display module DM_3 shown in FIG. 1 can be used with the above reference Fig.12 The display module DM_2 described is basically the same. Fig.14 The same or similar components shown in the drawings have been labeled with the same reference numerals as used in the description above. Fig. 9 , Fig.10 and Fig.12 The embodiments of the display module DM and the display module DM_2 shown in FIG. 1 are denoted by the same reference numerals, and any repeated detailed description thereof will be omitted or simplified hereinafter.

[0182] refer to Fig.14 , in an embodiment, the second electrode CE may overlap the first non-display area NDA1 and the second non-display area NDA2. In such an embodiment, the second electrode CE may extend from the display area DA through the second non-display area NDA2 to the first non-display area NDA1. Therefore, the second electrode CE may partially overlap the shielding electrode SHL. The second electrode CE may cover the second through hole TH2 of the connection electrode E-CNT in the first non-display area NDA1 and the second non-display area NDA2.

[0183] Embodiments of the display device described herein may be applied to display devices included in computers, laptop computers, mobile phones, smart phones, smart tablets, portable media players (PMPs), personal digital assistants (PDAs), MP3 players, and the like.

[0184] The present invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art.

[0185] While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit or scope of the invention as defined by the following claims.

Claims

1. A display device comprising a light-emitting device, wherein the light-emitting device comprises a first electrode, a light-emitting layer and a second electrode, the display device comprising: a substrate layer, the substrate layer comprising a display area, a first non-display area, and a second non-display area between the display area and the first non-display area; a circuit device layer disposed on the substrate layer, wherein the circuit device layer includes: a driving circuit unit overlapping the first non-display area and the second non-display area, a power electrode disposed outside the driving circuit unit, and a shielding electrode connected to the power electrode and overlapping the driving circuit unit, wherein a plurality of first through holes are defined by the shielding electrode; a light emitting device layer disposed on the circuit device layer, wherein the light emitting device layer includes: the light emitting device overlapping the display area and a connection electrode electrically connecting the power electrode to the second electrode, wherein a plurality of second through holes are defined by the connection electrode; a thin film encapsulation layer disposed on the light emitting device layer; and a touch sensing layer disposed on the thin film encapsulation layer, wherein the touch sensing layer comprises: a plurality of touch sensing electrodes and a plurality of touch signal lines connected to the plurality of touch sensing electrodes and overlapping the connection electrodes; in, The first through hole and the second through hole do not overlap each other in the first non-display area, and The first through hole and the second through hole overlap each other in the second non-display area.

2. The display device according to claim 1, wherein: The second electrode covers the second through hole in the second non-display area.

3. The display device according to claim 2, wherein: The second electrode overlaps the second non-display area and does not overlap the first non-display area.

4. The display device according to claim 2, wherein: The second electrode overlaps the first non-display area and the second non-display area.

5. The display device according to claim 1, wherein: Each of the plurality of touch signal lines overlaps at least one of the shielding electrode and the connecting electrode in the first non-display area.

6. The display device according to claim 1, wherein: Each of the plurality of touch signal lines overlaps at least one of the connection electrode and the second electrode in the second non-display area.

7. The display device according to claim 1, wherein: The circuit device layer further comprises: a first planarization layer disposed between the driving circuit unit and the shielding electrode; and A second planarization layer is disposed between the shielding electrode and the connecting electrode.

8. The display device according to claim 7, wherein: The first through hole exposes the first planarization layer, and The second through hole exposes the second planarization layer.

9. The display device according to claim 7, wherein: A valley between the first non-display area and the second non-display area is defined in the first planarization layer and the second planarization layer.

10. The display device according to claim 9, wherein: The shielding electrode does not overlap the valley.

11. The display device according to claim 9, wherein: The second through hole of the connection electrode does not overlap the valley.

12. The display device according to claim 7, wherein: The circuit device layer further comprises: a pixel circuit unit arranged on the base layer and overlapping the display area; and A pixel connection electrode is arranged between the first planarization layer and the second planarization layer, wherein the pixel connection electrode is electrically connected to the pixel circuit unit through a first contact hole and is electrically connected to the first electrode through a second contact hole, the first contact hole is defined by the first planarization layer, and the second contact hole is defined by the second planarization layer.

13. The display device according to claim 12, wherein: The shielding electrode comprises the same material as the pixel connection electrode, and The connection electrode includes the same material as the first electrode.

14. The display device according to claim 1, wherein: When viewed in a plan view, the first through holes and the second through holes are alternately arranged in a first direction in the first non-display area.

15. The display device according to claim 14, wherein: The first through holes and the second through holes are alternately arranged in a second direction crossing the first direction in the first non-display area when viewed in the plan view.

16. The display device according to claim 1, wherein: The first through holes and the second through holes define a plurality of rows arranged in a first direction on a plane, The first through holes in odd-numbered rows among the plurality of rows and the first through holes in even-numbered rows among the plurality of rows are alternately arranged with each other in a second direction crossing the first direction in the second non-display area, and The second through holes in the odd-numbered rows among the plurality of rows and the second through holes in the even-numbered rows among the plurality of rows are arranged alternately with each other in the second direction.

17. The display device according to claim 1, wherein: The thin film encapsulation layer comprises: a first inorganic layer disposed on the second electrode; an organic layer disposed on the first inorganic layer and having a flat top surface; and A second inorganic layer is disposed on the organic layer and has one end in contact with the first inorganic layer.

18. A display device comprising a light emitting device, the light emitting device comprising a first electrode, a light emitting layer and a second electrode, the display device comprising: a substrate layer, the substrate layer comprising a display area, a first non-display area, and a second non-display area between the display area and the first non-display area; a circuit device layer disposed on the substrate layer, wherein the circuit device layer includes: a driving circuit unit overlapping the first non-display area and the second non-display area, a power electrode disposed outside the driving circuit unit, and a shielding electrode connected to the power electrode, the shielding electrode overlapping the first non-display area and not overlapping the second non-display area, wherein a plurality of first through holes are defined by the shielding electrode; a light emitting device layer disposed on the circuit device layer, wherein the light emitting device layer includes the light emitting device and a connection electrode electrically connecting the power electrode to the second electrode, wherein a plurality of second through holes are defined by the connection electrode; a thin film encapsulation layer disposed on the light emitting device layer; and a touch sensing layer disposed on the thin film encapsulation layer, wherein the touch sensing layer comprises: a plurality of touch sensing electrodes and a plurality of touch signal lines connected to the plurality of touch sensing electrodes and overlapping the connection electrodes; in, The first through hole and the second through hole do not overlap each other in the first non-display area, and The second electrode covers the second through hole in the second non-display area.

19. The display device according to claim 18, wherein: The second electrode does not overlap with the shielding electrode.

20. The display device according to claim 18, wherein: The second electrode partially overlaps the shielding electrode.

Images