Fast charging circuit, rectification module, CC detection module with rectification and fast charging line

Abstract

The application provides a fast charging circuit, a rectification module, a CC detection module with rectification and a fast charging line. The fast charging circuit comprises an input interface end, an output interface end, a CC detection module, a verification module and a rectification module. The input interface end is used for connecting with an adapter to receive a detection signal and a charging voltage from the adapter, and providing the detection signal and the charging voltage to the CC detection module and the output interface end respectively, wherein the detection signal is used for powering the CC detection module. The output interface end is used for connecting with a mobile phone end to receive a communication signal from the mobile phone end and providing the charging voltage to the mobile phone end. The verification module is used for performing data verification according to the communication signal. The rectification module is used for rectifying the communication signal into an adjustment signal and providing the adjustment signal to the CC detection module to adjust a load voltage of the CC detection module. When the communication signal passes the verification, the charging voltage is increased, and when the load voltage of the CC detection module is increased, the charging voltage is decreased.

Description

Technical Field

[0001] This invention relates to the field of charging technology, specifically to a fast charging circuit, a rectifier module, a CC detection module with rectification, and a fast charging cable. Background Technology

[0002] Currently, some mobile phones on the market already support USB PD (USB-Power Delivery) fast charging. USB PD is one of the mainstream fast charging protocols, a fast charging specification developed by the USB-IF (USB Implementers Forum) organization. USB PD increases power delivery through USB cables and connectors, expanding the cable bus power supply capability in USB applications. This specification can achieve higher voltage and current, delivering up to 100 watts of power, and can freely change the direction of power delivery.

[0003] Taking one of the chargers on the market that supports USB PD fast charging as an example, such as Figure 1 The diagram shown is a schematic of a fast charging circuit 100 supporting USB PD fast charging. This fast charging circuit includes an input interface 1, an output interface 4, a CC (Configuration Channel) detection module 2, and a verification module 3. All modules and ports are packaged together with the printed circuit board on a single fast charging circuit. The fast charging circuit 100 connects to an adapter (not shown in the diagram) via the input interface 1 and to a mobile phone (not shown in the diagram) via the output interface 4, forming a complete charging system. When the adapter connected to the fast charging circuit 100 is plugged into the power supply, it outputs a detection signal CC to the CC detection module 2. The detection signal CC is a constant output current source of 3V / 320uA (in this circuit, the CC detection module 2 acts as a load, and the load voltage is denoted as VLOAD). It also outputs a charging voltage VBUS of 5V or 15V to the fast charging circuit 100. The value of the output charging voltage VBUS is adjusted according to whether the data verification is successful or the value of the load voltage VLOAD of the CC detection module 2 changes. When the data verification is successful, the charging voltage VBUS will switch from 5V to 15V. When the load voltage VLOAD is detected to rise, it will be reset from 15V to 5V. When the mobile phone is connected to the fast charging circuit 100 with the adapter connected, it provides a power signal SB and a communication signal SA to the fast charging circuit 100 through two different pins of the output interface terminal 4. The power signal SB has two functions: one is to provide the voltage to drive the verification module 3 to operate, and the other is to provide an adjustment signal to change the value of the load voltage VLOAD. The communication signal SA is used as a signal to establish communication between the mobile phone and the fast charging circuit 100 for data verification.

[0004] The drawback of the fast charging circuit 100 is that, in addition to receiving the communication signal SA sent from the mobile phone, the adapter's charging output adjustment also needs to receive the power signal SB from the mobile phone. On the one hand, this requires the mobile phone and the output interface 4 to respectively reserve pins for sending and receiving the power signal SB, making the interface circuit structure complex. On the other hand, the requirement to send the communication signal SA and the power signal SB at the same time poses a very serious challenge to mobile phones with low battery.

[0005] Therefore, a fast charging circuit that no longer requires receiving power signals from the mobile phone is desirable, without affecting the stable adjustment of charging output. Summary of the Invention

[0006] In view of the above, the present invention provides a fast charging circuit, a rectifier module, a CC detection module with rectification, and a fast charging cable.

[0007] A fast charging circuit includes an input interface, an output interface, a CC detection module, a verification module, and a rectification module;

[0008] The input interface is used to connect to the adapter to receive a detection signal and a charging voltage from the adapter, and to provide the detection signal and the charging voltage to the CC detection module and the output interface, respectively, wherein the detection signal is used to power the CC detection module;

[0009] The output interface is used to connect to a mobile phone to receive communication signals from the mobile phone and to provide the charging voltage to the mobile phone.

[0010] The verification module is used to perform data verification based on the communication signal;

[0011] The rectifier module is used to rectify the communication signal into an adjustment signal and provide it to the CC detection module to adjust the load voltage of the CC detection module;

[0012] This causes the charging voltage to increase when the communication signal verification passes, and the charging voltage to decrease when the load voltage of the CC detection module increases.

[0013] Preferably, the CC detection module includes a detection signal input terminal, an adjustment signal input terminal, a diode D1, resistors R1 and R2, NMOS transistors Q1 and Q2, an inverter, a capacitor C1, and a load voltage output terminal; the detection signal input terminal is used to receive the detection signal sent by the adapter; the positive terminal of the diode D1 and the input terminal of the inverter are both connected to the adjustment signal input terminal to receive the adjustment signal sent by the rectifier module; the negative terminal of the diode D1 is connected to the control terminal of the inverter and one end of the capacitor C1; the capacitor... The other end of C1 is grounded; the output terminal of the inverter is connected to the gate of the NMOS transistor Q1; the drain of the NMOS transistor Q1 is connected to the detection signal input terminal through the resistor R1, and the drain of the NMOS transistor Q1 is also connected to the gate of the NMOS transistor Q2, with the source of the NMOS transistor Q1 grounded; the drain of the NMOS transistor Q2 is connected to the detection signal input terminal through the resistor R2, with the source of the NMOS transistor Q2 grounded; the load voltage output terminal is located between the detection signal input terminal and the resistor R2, and is used to output the load voltage.

[0014] Preferably, the rectifier module includes a rectifier input terminal, a diode D2, a capacitor C2, and a rectifier output terminal; the rectifier input terminal is connected to the output interface terminal to receive communication signals from the mobile phone terminal; the positive terminal of the diode D2 is connected to the rectifier input terminal; one end of the capacitor C2 is connected to the negative terminal of the diode D2, and the other end is grounded; the rectifier output terminal is located between the negative terminal of the diode D2 and the capacitor C2, and is connected to the adjustment signal input terminal to provide an adjustment signal to it.

[0015] Preferably, the verification module is an encryption module, used to encrypt and verify the data using an encryption algorithm.

[0016] Preferably, the verification module is a handshake module that verifies the data based on a challenge handshake authentication protocol.

[0017] Preferably, the CC detection module is packaged on a first chip, the verification module is packaged on a second chip, and the rectification module is packaged on a third chip.

[0018] The beneficial effect of the fast charging circuit described above is that it eliminates the need for additional input pins for sending / receiving power signals at both the output interface and the mobile phone. The rectifier module rectifies the discontinuous high and low level communication signal into a continuous high level adjustment signal, thereby enabling the adapter's charging output to switch stably and controllably.

[0019] A rectifier module includes a rectifier input terminal, a diode D2, a capacitor C2, and a rectifier output terminal. The rectifier input terminal is connected to an output interface terminal to receive communication signals. The anode of the diode D2 is connected to the rectifier input terminal. One end of the capacitor C2 is connected to the cathode of the diode D2, and the other end of the capacitor C2 is grounded. The rectifier output terminal is located between the cathode of the diode D2 and the capacitor C2 and is connected to a CC detection module to provide it with an adjustment signal for regulating the load voltage.

[0020] This causes the charging voltage of the fast charging circuit to increase when the communication signal verification passes, and the charging voltage of the fast charging circuit to decrease when the load voltage of the CC detection module increases.

[0021] Preferably, the communication signal verification method is to verify data through an encryption algorithm or a challenge handshake authentication protocol.

[0022] The beneficial effect of the aforementioned rectifier module for fast charging circuits is that it eliminates the need for additional input pins for sending / receiving power signals at the output interface of both the mobile phone and the fast charging circuit. The rectifier module rectifies the discontinuous high and low level communication signal into a continuously high level regulating signal, thereby enabling the adapter's charging voltage output to switch stably and controllably.

[0023] A rectified CC detection module includes a rectifier input terminal, a diode D2, a capacitor C2, a detection signal input terminal, a diode D1, resistors R1 and R2, NMOS transistors Q1 and Q2, an inverter, capacitor C1, and a load voltage output terminal. The rectifier input terminal is connected to an output interface terminal to receive communication signals from a mobile phone. The anode of diode D2 is connected to the input terminal. One end of capacitor C2 is connected to the cathode of diode D2, and the other end is grounded. The cathode of diode D2 is connected to both the anode of diode D1 and the input terminal of the inverter. The detection signal input terminal receives detection signals sent by an adapter. The signal is generated as follows: the cathode of diode D1 is connected to the control terminal of the inverter and one end of capacitor C1; the other end of capacitor C1 is grounded; the output terminal of the inverter is connected to the gate of NMOS transistor Q1; the drain of NMOS transistor Q1 is connected to the detection signal input terminal through resistor R1, and the drain of NMOS transistor Q1 is also connected to the gate of NMOS transistor Q2, with the source of NMOS transistor Q1 grounded; the drain of NMOS transistor Q2 is connected to the detection signal input terminal through resistor R2, with the source of NMOS transistor Q2 grounded; the load voltage output terminal is located between the detection signal input terminal and resistor R2, and is used to output the load voltage.

[0024] This causes the charging voltage of the fast charging circuit to increase when the communication signal verification passes, and the charging voltage of the fast charging circuit to decrease when the load voltage of the CC detection module increases.

[0025] Preferably, the communication signal verification method is to verify data through an encryption algorithm or a challenge handshake authentication protocol.

[0026] The beneficial effect of the aforementioned rectified CC detection module is that it eliminates the need for additional input pins for sending / receiving power signals at the output interface of both the mobile phone and the fast charging circuit. The rectifier module rectifies the discontinuous high and low level communication signal into a continuously high level adjustment signal, thereby enabling the adapter's charging voltage output to switch stably and controllably. Attached Figure Description

[0027] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:

[0028] Figure 1 A structural schematic diagram of a fast charging circuit is provided for the background art of this invention;

[0029] Figure 2 A circuit structure diagram of a CC detection module provided by the prior art of this invention;

[0030] Figure 3 A schematic diagram of a fast charging circuit provided in an embodiment of the present invention;

[0031] Figure 4 A circuit structure diagram of a rectifier module provided in an embodiment of the present invention;

[0032] Figure 5 This is a circuit structure diagram of a CC detection module provided in an embodiment of the present invention;

[0033] Figure 6 A waveform diagram of a communication signal provided in an embodiment of the present invention;

[0034] Figure 7 This is a circuit diagram of a rectified CC detection module for a fast charging circuit provided in an embodiment of the present invention. Detailed Implementation

[0035] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0037] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0038] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0039] like Figure 2 The diagram shows the circuit structure of an existing CC detection module 2. The CC detection module 2 includes a detection signal input terminal S1 for receiving a detection signal CC sent from the adapter, a first resistor R1 and a second resistor R2 connected to the detection signal input terminal S1, a first NMOS transistor Q1 and a second NMOS transistor Q2 connected to the first resistor R1 and the second resistor R2 respectively, and the control terminal of the second NMOS transistor Q2 connected to the drain terminal of the first NMOS transistor Q1. The other ends of both the first NMOS transistor Q1 and the second NMOS transistor Q2 are grounded. It also includes an adjustment signal input terminal S2 for receiving a power signal SB sent from the mobile phone. Furthermore, it includes a first diode D1 with its positive terminal connected to the adjustment signal input terminal S2, and a first capacitor C1 connected to the negative terminal of the first diode D1, with the other end of the first capacitor C1 grounded. Finally, it includes an inverter U1, with its input terminal connected to the adjustment signal input terminal S2, its output terminal connected to the control terminal of the first NMOS transistor Q1, and the control terminal of the inverter U1 connected to the non-grounded terminal of the first capacitor C1. It also includes a load voltage output terminal, located between the detection signal input terminal S1 and the second resistor R2, for outputting the load voltage VLOAD.

[0040] The following describes the detailed charging process of the fast charging circuit 100 in conjunction with the circuit structure diagram of the CC detection module 2.

[0041] During the first charging state of the fast charging circuit 100, i.e., when the mobile phone is not connected to the charging cable 100, since no power signal SB is provided to the fast charging circuit 100, the first capacitor C1 is de-energized, the inverter U1 does not work, and the first NMOS transistor Q1 is cut off. Because the input node S1 of the CC detection module 2 is always supplied with the detection signal CC (a 3V / 320uA current source), and the driving voltage provided from the line "node S1 - first resistor R1 - gate of the second NMOS transistor Q2" is higher than the threshold voltage (0.8V) required to turn on the second NMOS transistor Q2, Q2 is turned on. Therefore, the CC detection module 2 is equivalent to a load connected to the second resistor R2, so VLOAD = 4.99 * 320uA = 1.6V. Since the mobile phone is not connected, no communication signal SA is received, there is no data verification, and the adapter maintains a 5V charging output.

[0042] During the second charging state of the fast charging circuit 100, i.e., when the mobile phone is connected to the charging cable 100, a 3.3V power signal SB is provided to the fast charging circuit. The first capacitor C1 begins charging, the inverter U1 operates and receives a high level input (3.3V high-level power signal SB), and the inverter U1 outputs a low level after inversion. The first NMOS transistor Q1 remains off. Similarly, in the previous state, the second NMOS transistor Q2 turns on. The CC detection module 2 is still equivalent to the load connected to the second resistor R2, VLOAD = 4.99K * 320uA = 1.6V. After the mobile phone is connected, if the communication signal SA sent by the mobile phone passes the data verification, the adapter switches from a 5V charging output to a 15V output; if the data verification fails, it maintains a 5V charging output.

[0043] During the third charging state of the fast charging circuit 100, i.e., when the phone is unplugged from the charging cable 100, the 3.3V power signal SB is no longer provided. The capacitor C1, which has already been charged, begins to discharge. Therefore, the inverter U1 continues to operate. Since the power signal SB disappears, the input of the inverter U1 switches from high to low. The low level is inverted and outputs a high level, turning on the first NMOS transistor Q1. Because the first NMOS transistor Q1 is turned on, the control node voltage of the second NMOS transistor Q2 is directly grounded, thus turning off the second NMOS transistor Q2. Therefore, the CC detection module 2 is equivalent to the load connected to resistor R1, so VLOAD = 130K * 320uA = 4.2V. The adapter detects the rise in the load voltage VLOAD and resets the charging output from 15V to 5V.

[0044] The table below shows the changes in key parameters corresponding to the charging process described above.

[0045]

[0046] Given that the existing fast charging circuit 100 requires the mobile phone end and the output interface end 4 to respectively reserve pins for sending and receiving power signals SB, making the interface end circuit structure complex, and at the same time, sending communication signals SA and power signals SB poses a serious challenge to mobile phones with low battery, the present invention provides a fast charging circuit 200, a rectifier module 50 for the fast charging circuit, and a CC detection module 20 with rectification for the fast charging circuit.

[0047] Example 1

[0048] This invention provides a fast charging circuit 200, such as... Figure 3 The diagram shown is a schematic diagram of the fast charging circuit 200. Figure 1 The difference in the fast charging circuit 100 shown is that the output interface 4 of this fast charging circuit 200 no longer has a pin for receiving the power signal SB. This fast charging circuit 200 includes an input interface 1, an output interface 4, a CC detection module 2, a verification module 3, and a rectifier module 5. The input interface 1 is used to connect to the adapter, and it is also connected to the CC detection module 2 and the output interface 4. The output interface 4 is also used to connect to the mobile phone, and it is also connected to the verification module 3 and the rectifier module 5. The rectifier module 5 is also connected to the CC detection module 2. The input interface 1 receives the detection signal CC and the charging voltage VBUS from the adapter, and provides the detection signal CC to the CC detection module 2 and the charging voltage VBUS to the output interface 4. Specifically, when the adapter connected to the fast charging circuit 200 is plugged into a power source, it outputs a detection signal CC and a charging voltage VBUS to the CC detection module 2. The detection signal CC is a constant output current source of 3V / 320uA. When the output interface 4 is connected to the mobile phone, the charging voltage VBUS is provided to the mobile phone, thus forming a complete charging system. The output interface 4 is used to receive the communication signal SA from the mobile phone.

[0049] The verification module 3 is used to perform data verification based on the communication signal SA.

[0050] The verification module 3 can be an encryption module, which uses symmetric encryption algorithms, asymmetric encryption algorithms, and linear hash algorithms (i.e., signature algorithms) to encrypt and verify the data. Symmetric encryption algorithms include AES (Advanced Encryption Standard), DES (Data Encryption Standard), and 3DES (Triple Advanced Encryption Standard); asymmetric encryption algorithms include RSA (an algorithm designed by three mathematicians Rivest, Shamir, and Adleman), DSA (Digital Signature Algorithm), and ECC (Elliptic Computational Cryptography); linear hash algorithms (i.e., signature algorithms) include MD5 (Message-Digest Algorithm 5), SHA1 (Secure Hash Algorithm), and HMAC (Hash-based Message Authentication Code).

[0051] Verification module 3 can also be a handshake module, which verifies data based on the challenge handshake authentication protocol.

[0052] The rectifier module 5 rectifies the communication signal SA into an adjustment signal VCC and provides it to the CC detection module 2. The detection signal CC powers the CC detection module 2, and the adjustment signal VCC regulates the load voltage VLOAD of the CC detection module 2. This ensures that when the communication signal SA passes the verification, the charging voltage VBUS increases, and when the load voltage VLOAD of the CC detection module 2 increases, the charging voltage VBUS decreases.

[0053] The rectifier module 5 can also be connected to the verification module 3 to provide the adjustment signal VCC to the verification module 3, so that the adjustment signal VCC can be used as the operating voltage of the verification module 3.

[0054] The circuit structure diagram of rectifier module 5 is as follows: Figure 4 As shown. Output interface 4 has a communication input pin for connection to the mobile phone. Rectifier module 5 includes rectifier input AID, diode D2, capacitor C2, and rectifier output S3. Rectifier input AID is connected to output interface 4 to receive communication signal SA from the mobile phone. The anode of diode D2 is connected to rectifier input AID. One end of capacitor C2 is connected to the cathode of diode D2, and the other end is grounded. Rectifier output S3 is located between the cathode of diode D2 and capacitor C2 and is connected to CC detection module 2 to provide it with adjustment signal VCC.

[0055] like Figure 5As shown, the CC detection module 2 includes a detection signal input terminal S1, an adjustment signal input terminal S2, a diode D1, resistors R1 and R2, NMOS transistors Q1 and Q2, an inverter U1, a capacitor C1, and a load voltage output terminal Vload. The detection signal input terminal S1 receives the detection signal CC sent by the adapter. The anode of diode D1 and the input terminal of inverter U1 are both connected to the adjustment signal input terminal S2 to receive the adjustment signal VCC sent by the rectifier module 5. The cathode of diode D1 is connected to the control terminal of inverter U1 and one end of capacitor C1. The other end of capacitor C1 is grounded. The output terminal of inverter U1 is connected to the gate of NMOS transistor Q1. The drain of NMOS transistor Q1 is connected to the detection signal input terminal S1 through resistor R1. The drain of NMOS transistor Q1 is also connected to the gate of NMOS transistor Q2, and the source of NMOS transistor Q1 is grounded. The drain of NMOS transistor Q2 is connected to the detection signal input terminal S1 through resistor R2, and the source of NMOS transistor Q2 is grounded. The load voltage output terminal Vload is located between the detection signal input terminal S1 and resistor R2, and is used to output the load voltage VLOAD.

[0056] The detailed process of the fast charging circuit 200 achieving VBUS switching of the charging voltage is as follows:

[0057] When the mobile phone is not connected to output interface 4, it does not provide a communication signal SA to fast charging circuit 200, and therefore does not provide an adjustment signal VCC to CC detection module 2. Thus, the charging state of fast charging circuit 200 is consistent with the first charging state of fast charging circuit 100. Capacitor C1 is de-energized, inverter U1 is not working, and NMOS transistor Q1 is cut off. Since the detection signal input terminal S1 of CC detection module 2 is always supplied with the detection signal CC (3V / 320uA current source), and the driving voltage provided from the line "detection signal input terminal S1 - resistor R1 - gate of NMOS transistor Q2" is higher than the threshold voltage (0.8V) required to turn on NMOS transistor Q2, NMOS transistor Q2 is turned on. Therefore, CC detection module 2 is equivalent to a load connected to resistor R2, so VLOAD = 4.99 * 320uA = 1.6V. Since the mobile phone is not connected, it does not receive the communication signal SA, and there is no data verification by verification module 3. The adapter maintains a 5V charging output.

[0058] Once the mobile phone is connected to output interface 4, it begins to provide communication signal SA to fast charging circuit 200. The waveform of communication signal SA provided in this embodiment is shown below. Figure 6As shown in the waveform diagram, the value 1 represents that the communication signal SA is at a high level. That is, within a unit time t, when the actual duty cycle is greater than the set value, the signal will be in the state of "1" within that unit time t. For example, when the set value is 60%, then within that unit time t, when the ratio of the high level time to the sum of the low level and high level times is greater than or equal to 60%, the signal will be in the state of "1" within that unit time t.

[0059] At the beginning stage (time period t0-t1) when the communication signal SA is input to the output interface 4, the communication signal SA sent by the mobile phone enables the verification module 3 to pass the data verification. The communication signal SA presents a continuous high level state (this characteristic is unique to the communication signal of the fast charging circuit; after passing the data verification, the communication signal presents a continuous 80uS high level, which varies slightly in different fast charging circuits). Since this high level is greater than the threshold voltage (0.7V) of diode D2, diode D2 conducts, and the rectifier output terminal S3 of the rectifier module 5 outputs a high-level adjustment signal VCC to the CC detection module 2. At the same time, capacitor C2 starts charging. Therefore, the charging state of fast charging circuit 200 at this time is consistent with the second charging state of fast charging circuit 100 mentioned above. Capacitor C1 starts charging, inverter U1 works and inputs a high level (rectified high-level adjustment signal VCC greater than 3.3V). After inversion, inverter U1 outputs a low level, and NMOS transistor Q1 remains off; similarly to the previous state, NMOS transistor Q2 conducts. CC detection module 2 remains equivalent to the load connected to resistor R2, with VLOAD = 4.99K * 320uA = 1.6V. Next, if the communication signal SA causes verification module 3 to pass data verification, the adapter switches from a 5V charging voltage VBUS output to a 15V charging voltage VBUS output; if verification module 3 fails data verification, the adapter maintains a 5V charging voltage VBUS output.

[0060] In the second stage (time period t1-t2), the communication signal SA begins to enter a low-level state. During the low-level period, since this low level is less than the threshold voltage (0.7V) of diode D2, diode D2 is cut off. However, the already charged capacitor C2 begins to discharge. The rectifier output terminal S3 of rectifier module 5 still outputs a high-level adjustment signal VCC. Therefore, in the second stage, rectifier module 5 always provides a high-level adjustment signal VCC to CC detection module 2. At this time, the charging state of fast charging circuit 200 is still consistent with the second charging state of fast charging circuit 100. Capacitor C1 begins to charge, inverter U1 works and inputs a high level (rectified high-level adjustment signal VCC greater than 3.3V). After inversion, inverter U1 outputs a low level, and NMOS transistor Q1 remains cut off. Similarly, as in the previous state, NMOS transistor Q2 is turned on. CC detection module 2 is still equivalent to a load connected to resistor R2, VLOAD = 4.99K * 320uA = 1.6V. Next, if the communication signal SA passes the data verification, the adapter switches from a 5V charging voltage VBUS output to a 15V charging voltage VBUS output; if the verification module 3 fails the data verification, the adapter maintains a 5V charging voltage VBUS output.

[0061] In the third stage (time period t2-t3), the fast charging circuit disconnects the mobile phone, and the mobile phone no longer provides the communication signal SA to the fast charging circuit 200 system. At this time, since capacitor C2 has not yet fully discharged, the adjustment signal VCC output from the rectifier output terminal S3 remains at a high level for a period of time (approximately 0.2us). After the discharge is complete, the adjustment signal VCC disappears. Therefore, the charging state of fast charging circuit 200 at this time is consistent with the third charging state of fast charging circuit 100 mentioned above. The already charged capacitor C1 begins to discharge, so inverter U1 continues to work. However, since the adjustment signal VCC is no longer provided, the input of inverter U1 switches from high level to low level. The low level is inverted and outputs a high level, and NMOS transistor Q1 is turned on. Due to the conduction of NMOS transistor Q1, the control node voltage of NMOS transistor Q2 is directly grounded, thus NMOS transistor Q2 is turned off. Therefore, CC detection module 2 is equivalent to the load connected to resistor R1, so VLOAD = 130K * 320uA = 4.2V. The adapter detects the rise in load voltage VLOAD and resets the charging voltage VBUS output from 15V to 5V.

[0062] Since both capacitors C1 and C2 need to function as chargers and dischargers in the circuit to maintain a high-level signal output, their capacitance values ​​cannot be too small and must both be greater than 50pF. Optionally, the capacitance value of capacitors C1 and C2 can be 0.1uF.

[0063] Optionally, one of the packaging methods for the fast charging circuit 200 provided in this embodiment of the invention is that the rectifier module 5, the CC detection module 2 and the verification module 3 are integrated and packaged on a single chip.

[0064] Optionally, another packaging method for the fast charging circuit 200 provided in this embodiment of the invention is that the CC detection module 2 is packaged on the first chip, the verification module 3 is packaged on the second chip, and the rectifier module 5 is packaged on the third chip. That is, the CC detection module 2 and the verification module 3 are two independently packaged chips, and the rectifier module 5 is a circuit designed on the reference circuit board, independent of these two chips.

[0065] Optionally, another packaging method of the fast charging circuit 200 provided in this embodiment of the invention is that the CC detection module 2 and the rectifier module 5 are packaged on the first chip, and the verification module 3 is packaged on the second chip. That is, the CC detection module 2 and the rectifier module 5 are integrated and packaged on one chip, and the verification module 3 is independently packaged on another chip.

[0066] The beneficial effect of the fast charging circuit 200 provided by this solution is that it eliminates the need to set additional input pins for sending / receiving power signals SB at both the output interface 4 and the mobile phone. The rectifier module 50 rectifies the discontinuous high and low level communication signal SA into a continuous high level adjustment signal VCC, thereby enabling the adapter's charging output VBUS to switch stably and controllably.

[0067] This embodiment also provides a fast charging cable, which includes the fast charging circuit 200 described above.

[0068] Example 2

[0069] This invention provides a rectifier module 5 for a fast charging circuit. For example... Figure 4 The diagram shows the circuit structure of the rectifier module 50. The rectifier module 50 includes a rectifier input terminal AID, a diode D2, a capacitor C2, and a rectifier output terminal S3. The rectifier input terminal AID is connected to the communication input pin of the output interface terminal 4 and receives the communication signal SA sent from the mobile phone. The anode of the diode D2 is connected to the rectifier input terminal AID. One end of the capacitor C2 is connected to the cathode of the diode D2, and the other end is grounded. The rectifier output terminal S3 is located between the cathode of the diode D2 and the capacitor C2, and is connected to the adjustment signal input terminal S2 of the CC detection module 2 to provide it with the adjustment signal VCC.

[0070] The detailed process of the rectifier module 50 used in the fast charging circuit to switch the adapter's charging output VBUS is as follows:

[0071] When the mobile phone is not connected to the output interface of the fast charging circuit, it does not provide a communication signal SA to the fast charging circuit and rectifier module 50. Therefore, it does not provide an adjustment signal to the CC detection module on the fast charging circuit. Thus, the charging state of the fast charging circuit at this time is consistent with the first charging state of the fast charging circuit 100 mentioned above. The load voltage VLOAD of the CC detection module on the fast charging circuit is 1.6V, and since the mobile phone is not connected, it does not receive the communication signal SA. Therefore, there is no data verification, and the adapter maintains a 5V charging output.

[0072] Once the mobile phone is connected to the output interface of the fast charging circuit, it begins to provide the communication signal SA to the input terminal AID of the rectifier module 5. The waveform diagram of the communication signal SA provided in this embodiment is shown below. Figure 6 As shown.

[0073] At the beginning stage (time period t0-t1) when the communication signal SA is connected to the input terminal AID of the rectifier module 5, the communication signal SA ensures that the verification module 3 has passed the data verification. The communication signal SA is in a continuous high-level state. Since this high level is greater than the threshold voltage (0.7V) of diode D2, diode D2 conducts, and the rectifier output terminal S3 of the rectifier module 5 outputs a high-level adjustment signal VCC to the CC detection module. At the same time, capacitor C2 begins to charge. Therefore, the charging state of the fast charging circuit at this time is consistent with the second charging state of the fast charging circuit 100 mentioned above. The load voltage VLOAD of the CC detection module is still equal to 1.6V. Since the communication signal SA has ensured that the data verification has passed, the adapter charging output is 15V at this time.

[0074] In the second stage (time period t1-t2), the communication signal SA begins to enter a low-level state. During this low-level period, since the low level is less than the threshold voltage (0.7V) of diode D2, diode D2 is cut off. However, the already charged capacitor C2 begins to discharge. The rectifier output terminal S3 of rectifier module 5 still outputs a high-level adjustment signal VCC. Therefore, during the second stage, rectifier module 5 always provides a high-level adjustment signal VCC to the CC detection module. Thus, the charging state of the fast charging circuit at this time is still consistent with the second charging state of the fast charging circuit 100 described above. The load voltage VLOAD of the CC detection module remains equal to 1.6V. The adapter maintains a 15V charging output.

[0075] In the third stage (time period t2-t3), the fast charging circuit disconnects the phone, and the phone no longer provides the communication signal SA to the input terminal AID of the rectifier module 50. At this time, since capacitor C2 has not yet fully discharged, the adjustment signal VCC output from the rectifier output terminal S3 remains at a high level for a period of time (approximately 0.2us). After the discharge is complete, the adjustment signal VCC disappears. Therefore, the charging state of the fast charging circuit at this time is consistent with the third charging state of the fast charging circuit 100 described above. The load voltage VLOAD of the CC detection module rises to 4.2V. The adapter detects the rise in the load voltage VLOAD and resets the charging output from 15V to 5V.

[0076] The data verification method mentioned above is encryption verification, which involves verifying the data using algorithms such as symmetric encryption, asymmetric encryption, and linear hash algorithms (i.e., signature algorithms). Symmetric encryption algorithms include AES (Advanced Encryption Standard), DES (Data Encryption Standard), and 3DES (Triple Advanced Encryption Standard); asymmetric encryption algorithms include RSA (an algorithm designed by three mathematicians Rivest, Shamir, and Adleman), DSA (Digital Signature Algorithm), and ECC (Elliptic Computational Cryptography); linear hash algorithms (i.e., signature algorithms) include MD5 (Message-Digest Algorithm 5), SHA1 (Secure Hash Algorithm), and HMAC (Hash-based Message Authentication Code).

[0077] The above data verification method can also be handshake authentication, that is, verifying data based on the challenge handshake authentication protocol.

[0078] Since capacitor C2 needs to function as a charger and discharger in the circuit to maintain a high-level signal output, its capacitance value cannot be too small and must be greater than 50pF. Optionally, the capacitance value of capacitor C2 is 0.1uF.

[0079] Optionally, the rectifier module 5 for fast charging circuit provided in this embodiment of the invention is a circuit designed on a printed circuit board, independent of the CC detection module and verification module packaged as integrated circuit chips.

[0080] Optionally, the rectifier module 5 for fast charging circuit and the above-mentioned CC detection module and verification module provided in this embodiment of the invention are packaged into an integrated circuit chip.

[0081] Optionally, the rectifier module 5 for fast charging circuit and the CC detection module described above are packaged into an integrated circuit chip in the embodiments of the present invention.

[0082] The beneficial effect of the rectifier module 5 for fast charging circuit provided in this solution is that it eliminates the need to set additional input pins for sending / receiving power signals SB at the output interface of both the mobile phone and the fast charging circuit. The rectifier module 5 rectifies the discontinuous high and low level communication signal SA into a continuously high level adjustment signal VCC, thereby enabling the adapter's charging voltage VBUS output to switch stably and controllably.

[0083] Example 3

[0084] This invention provides a rectified CC detection module 20 for fast charging circuits. For example... Figure 7 The diagram shows the circuit structure of the rectified CC detection module 20. The rectified CC detection module includes a rectifier input terminal AID, diode D2, capacitor C2, a detection signal input terminal S1, diode D1, resistors R1 and R2, NMOS transistors Q1 and Q2, inverter U1, capacitor C1, and load voltage output terminal Vload. The rectifier input terminal AID is connected to the output interface terminal 4 to receive the communication signal SA from the mobile phone. The anode of diode D2 is connected to the input terminal AID. One end of capacitor C2 is connected to the cathode of diode D2, and the other end is grounded. The cathode of diode D2 is connected to both the anode of diode D1 and the input terminal of inverter U1. The detection signal input terminal S1 receives the detection signal CC sent by the adapter. The cathode of diode D1 is connected to both the control terminal of inverter U1 and one end of capacitor C1. The other end of capacitor C1 is grounded. The output terminal of inverter U1 is connected to the gate of NMOS transistor Q1. The drain of NMOS transistor Q1 is connected to the detection signal input terminal S1 through resistor R1. The drain of NMOS transistor Q1 is also connected to the gate of NMOS transistor Q2, and the source of NMOS transistor Q1 is grounded. The drain of NMOS transistor Q2 is connected to the detection signal input terminal S1 through resistor R2, and the source of NMOS transistor Q2 is grounded. The load voltage output terminal Vload is located between the detection signal input terminal S1 and resistor R2, and is used to output the load voltage VLOAD.

[0085] Diode D2 and capacitor C2 work together to rectify the communication signal SA into an adjustment signal VCC, and provide the adjustment signal VCC to the positive terminal of diode D1. The detection signal input terminal S1 is used to receive the detection signal CC.

[0086] The detailed process of the rectified CC detection module 20 used in the fast charging circuit to switch the adapter's charging output VBUS is as follows:

[0087] When the mobile phone is not connected to the output interface of the fast charging circuit, it does not provide a communication signal SA to the fast charging circuit and the rectified CC detection module 20. Capacitor C1 is de-energized, inverter U1 is not working, and NMOS transistor Q1 is cut off. Since the detection signal input terminal S1 of the CC detection module 2 always provides the detection signal CC (a 3V / 320uA current source), and the driving voltage provided from the line "detection signal input terminal S1 - resistor R1 - gate of NMOS transistor Q2" is higher than the threshold voltage (0.8V) required to turn on NMOS transistor Q2, Q2 is turned on. Therefore, the rectified CC detection module 20 is equivalent to a load connected to resistor R2, so VLOAD = 4.99 * 320uA = 1.6V. Because the mobile phone is not connected, it does not receive the communication signal SA, and there is no data verification; the adapter maintains a 5V charging output. When the mobile phone is connected to the output interface of the fast charging circuit, it begins to provide the communication signal SA to the rectified input terminal AID of the rectified CC detection module 20. One example provides a waveform diagram of a communication signal SA, as shown below. Figure 6 As shown.

[0088] During the initial stage (t0-t1) when the communication signal SA is connected to the rectifier input terminal AID, the communication signal SA sent by the mobile phone has passed the data verification. The communication signal SA is in a continuous high-level state. Since this high level is greater than the threshold voltage (0.7V) of diodes D1 and D2, both diodes D1 and D2 are turned on. The high-level communication signal SA causes capacitors C1 and C2 to start charging. At the same time, the high level causes inverter U1 to work and input a high level. After inversion, inverter U1 outputs a low level, so NMOS transistor Q1 remains off. Similarly, as in the previous stage, NMOS transistor Q2 is turned on. The rectified CC detection module 20 is still equivalent to the load connected to resistor R2, VLOAD = 4.99K * 320uA = 1.6V. Since the communication signal SA has caused the verification module 3 to pass the data verification, the adapter charging output is 15V at this time.

[0089] In the second phase (time period t1-t2), the communication signal SA begins to enter a low-level state. During this low-level period, since the low level is less than the threshold voltage (0.7V) of diode D2, diode D2 is cut off. However, the already charged capacitor C2 begins to discharge, causing the discharge voltage to turn on diode D1 and simultaneously causing capacitor C1 to continue charging. Therefore, in the second phase, inverter U1 still operates and its input remains high. After inversion, inverter U1 outputs a low level, thus NMOS transistor Q1 remains cut off. Similarly, as in the previous phase, NMOS transistor Q2 turns on. The rectified CC detection module 20 remains equivalent to a load connected to resistor R2, VLOAD = 4.99K * 320uA = 1.6V. The adapter maintains a 15V charging output.

[0090] In the third stage (time period t2-t3), the fast charging circuit disconnects the phone, and the phone no longer provides the communication signal SA to the rectifier input terminal AID. At this time, since capacitor C2 has not yet fully discharged, the adjustment signal VCC output from the rectifier output terminal S3 remains at a high level for a period of time (approximately 0.2us). When capacitor C2 fully discharges, the charged capacitor C1 discharges to the control terminal of inverter U1, causing it to work. At the same time, the discharge of capacitor C2 causes the input terminal of inverter U1 to change from a high level to a low level. The low level is inverted and outputs a high level, causing NMOS transistor Q1 to conduct. Due to the conduction of NMOS transistor Q1, the control node voltage of NMOS transistor Q2 is directly grounded, thus NMOS transistor Q2 is turned off. Therefore, the CC detection module 20 with rectification is equivalent to the load connected to resistor R1, so VLOAD = 130K * 320uA = 4.2V. The adapter detects the rise in the load voltage VLOAD and resets the charging voltage VBUS from 15V to 5V.

[0091] The data verification method mentioned above is encryption verification, which involves verifying the data using algorithms such as symmetric encryption, asymmetric encryption, and linear hash algorithms (i.e., signature algorithms). Symmetric encryption algorithms include AES (Advanced Encryption Standard), DES (Data Encryption Standard), and 3DES (Triple Advanced Encryption Standard); asymmetric encryption algorithms include RSA (an algorithm designed by three mathematicians Rivest, Shamir, and Adleman), DSA (Digital Signature Algorithm), and ECC (Elliptic Computational Cryptography); linear hash algorithms (i.e., signature algorithms) include MD5 (Message-Digest Algorithm 5), SHA1 (Secure Hash Algorithm), and HMAC (Hash-based Message Authentication Code).

[0092] The above data verification method can also be handshake authentication, that is, verifying data based on the challenge handshake authentication protocol.

[0093] Since both capacitors C1 and C2 need to function as chargers and dischargers in the circuit to maintain a high-level signal output, their capacitance values ​​cannot be too small and must both be greater than 50pF. Optionally, the capacitance value of capacitors C1 and C2 can be 0.1uF.

[0094] Optionally, the rectified CC detection module 20 provided in this embodiment of the invention is independent of other modules on the fast charging circuit and is packaged on an integrated circuit chip.

[0095] Optionally, the rectified CC detection module 20 and other modules on the fast charging circuit provided in this embodiment of the invention are packaged on the same integrated circuit chip.

[0096] The beneficial effect of the CC detection module 20 with rectification provided by this solution for fast charging circuit is that it eliminates the need to set additional input pins for sending / receiving power signals SB at the output interface of both the mobile phone and the fast charging circuit. The rectifier module 5 rectifies the discontinuous high and low level communication signal SA into a continuously high level adjustment signal VCC, thereby enabling the adapter's charging voltage VBUS output to switch stably and controllably.

[0097] The diode D1 mentioned above can also be the first diode D1, the diode D2 can also be the second diode D2, the resistor R1 can also be the first resistor R1, the resistor R2 can also be the second resistor R2, the NMOS transistor Q1 can also be the first NMOS transistor Q1, the NMOS transistor Q2 can also be the second NMOS transistor Q2, the capacitor C1 can also be the first capacitor C1, and the capacitor C2 can also be the second capacitor C2.

Claims

1. A fast charging circuit, characterized by, The input interface end is used for connecting with an adapter to receive a detection signal and a charging voltage from the adapter, and providing the detection signal and the charging voltage to the CC detection module and the output interface end respectively, wherein the detection signal is used for powering the CC detection module. The output interface end is used for connecting with a mobile phone end to receive a communication signal from the mobile phone end and provide the charging voltage to the mobile phone end. The verification module is used for verifying data according to the communication signal. The rectifier module is used for rectifying the communication signal into an adjustment signal and providing the adjustment signal to the CC detection module to adjust a load voltage of the CC detection module. The rectifier module includes a rectifier input end, a diode D2, a capacitor C2 and a rectifier output end. The CC detection module includes a detection signal input end, an adjustment signal input end, a diode D1, a resistor R1, a resistor R2, an NMOS tube Q1, an NMOS tube Q2, an inverter, a capacitor C1 and a load voltage output end. The verification module is an encryption module used for verifying data by an encryption algorithm.

2. The fast charging circuit of claim 1, wherein, The verification module is a handshake module used for verifying data based on a challenge handshake authentication protocol.

3. The fast charging circuit of any of claims 1-2, wherein, The CC detection module is packaged on a first chip, the verification module is packaged on a second chip, and the rectifier module is packaged on a third chip.

4. The fast charging circuit of any of claims 1-2, wherein, ​ 5. The fast charging circuit of claim 1, wherein, ​ 6. A rectifier module characterized by The rectification module comprises a rectification input end, a diode D2, a capacitor C2 and a rectification output end, the rectification input end is used for being connected to an output interface end to receive a communication signal; a positive electrode of the diode D2 is connected with the rectification input end; one end of the capacitor C2 is connected with a negative electrode of the diode D2, and the other end of the capacitor C2 is grounded; the rectification output end is located between the negative electrode of the diode D2 and the capacitor C2 and is connected to the CC detection module to provide an adjusting signal for adjusting a load voltage to the CC detection module; So that when the communication signal is verified, the charging voltage of the fast charging circuit is raised, and when the load voltage of the CC detection module is raised, the charging voltage of the fast charging circuit is lowered; In the initial stage when the communication signal accesses the input end of the rectification module, the communication signal presents a continuous high level state, the rectification output end of the rectification module outputs a high level adjusting signal, and at the same time, the capacitor C2 starts to charge; In the second stage, the communication signal starts to present a low level state, the capacitor C2 which has been charged starts to discharge, and the rectification output end of the rectification module still outputs a high level adjusting signal; In the third stage, the mobile phone end no longer provides the communication signal to the input end of the rectification module, the adjusting signal still maintains a high level before the capacitor C2 is discharged, and the adjusting signal disappears after the capacitor C2 is discharged.

7. The rectifier module of claim 6, wherein, The communication signal verification mode is data verification through an encryption algorithm or a challenge handshake authentication protocol.

8. A CC detection module with rectification, characterized in that, The CC detection module with rectification comprises a rectification input end, a diode D2, a capacitor C2, a detection signal input end, a diode D1, a resistor R1, a resistor R2, an NMOS tube Q1, an NMOS tube Q2, an inverter, a capacitor C1 and a load voltage output end; the rectification input end is used for being connected to an output interface end to receive a communication signal from a mobile phone end; a positive electrode of the diode D2 is connected with the input end; one end of the capacitor C2 is connected with a negative electrode of the diode D2, and the other end of the capacitor C2 is grounded; the negative electrode of the diode D2 is connected with a positive electrode of the diode D1 and an input end of the inverter respectively; the detection signal input end is used for receiving a detection signal sent by an adapter; a negative electrode of the diode D1 is connected with a control end of the inverter and one end of the capacitor C1 respectively; the other end of the capacitor C1 is grounded; an output end of the inverter is connected with a gate electrode of the NMOS tube Q1; a drain electrode of the NMOS tube Q1 is connected with the detection signal input end through the resistor R1, the drain electrode of the NMOS tube Q1 is also connected with a gate electrode of the NMOS tube Q2, and a source electrode of the NMOS tube Q1 is grounded; a drain electrode of the NMOS tube Q2 is connected with the detection signal input end through the resistor R2, and a source electrode of the NMOS tube Q2 is grounded; the load voltage output end is located between the detection signal input end and the resistor R2 and is used for outputting a load voltage; So that when the communication signal is verified, the charging voltage of the fast charging circuit is raised, and when the load voltage of the CC detection module is raised, the charging voltage of the fast charging circuit is lowered.

9. The CC detection module with rectification of claim 8, wherein, The communication signal verification mode is data verification through an encryption algorithm or a challenge handshake authentication protocol.

10. A fast charging cord, characterized in that, The fast charging circuit of any one of claims 1-2.

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