Time dependent defect inspection apparatus

Abstract

An improved charged particle beam inspection apparatus is disclosed, more specifically a particle beam inspection apparatus for detecting defects of a thin device structure. The beam inspection apparatus comprises a charged particle beam source for directing charged particles at a location of a wafer under inspection in a time sequence and a controller configured to sample a plurality of images (510-538) of a region of the wafer at different times in the time sequence. The plurality of images are compared to detect a voltage contrast difference or a voltage contrast change (560-564) to identify a thin device structure defect (562).

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to U.S. Application 62 / 723,995, filed August 28, 2018, the entire contents of which are incorporated herein by reference. TECHNICAL FIELD

[0003] Embodiments provided herein disclose a particle beam inspection apparatus, and more specifically, a particle beam inspection apparatus including an improved detection unit. BACKGROUND

[0004] When manufacturing semiconductor integrated circuit (IC) chips, pattern defects or uninvited particles (residues) inevitably appear on wafers or masks during the manufacturing process, thereby reducing the yield. For example, for patterns having smaller critical feature sizes, which have been adopted to meet the increasing performance requirements of IC chips, uninvited particles can be troublesome.

[0005] Pattern inspection tools with charged particle beams have been used to detect defects or uninvited particles. These tools typically employ a scanning electron microscope (SEM). In a SEM, a primary electron beam of relatively high energy is decelerated to land on a sample with a relatively low landing energy and is focused to form a probe spot thereon. From this focused probe spot of primary electrons, secondary electrons are generated from the surface. The secondary electrons can include backscattered electrons, secondary electrons, or auger electrons resulting from the interaction of the primary electrons with the wafer. By scanning the probe spot over the sample surface and collecting the secondary electrons, the pattern inspection tool can obtain an image of the sample surface. SUMMARY

[0006] Embodiments provided herein disclose a charged particle beam system for inspecting a wafer, and more specifically, a particle beam system including an improved detection unit.

[0007] In some embodiments, a charged particle beam system for inspecting a wafer includes a charged particle beam source including circuitry to direct charged particles to one or more regions of a wafer over one or more time sequences. The charged particle beam system also includes a controller including circuitry to generate a first set of images of a first region of the one or more regions during a first time sequence of the one or more time sequences. The controller further includes circuitry to process the first set of images to detect defects in a thin device structure in the wafer.

[0008] In some embodiments, a wafer inspection method is provided. The method uses a charged particle beam system having a charged particle beam source to direct charged particles onto one or more areas of a wafer over one or more time sequences. The method includes generating a first set of images of a first area of the one or more areas during a first time sequence of the one or more time sequences. The method also includes processing the first set of images to detect defects in a thin device structure in the wafer.

[0009] In some embodiments, a non-transitory computer readable medium storing a set of instructions executable by a processor of a charged particle beam system is provided. The instructions cause the charged particle beam system, having a charged particle beam source to direct charged particles onto one or more areas of a wafer over one or more time sequences, to perform a method. The method includes generating a first set of images of a first area of the one or more areas during a first time sequence of the one or more time sequences. The method also includes processing the first set of images to detect defects in a thin device structure in the wafer.

[0010] Other advantages of the present application will become apparent from the following description taken in conjunction with the accompanying drawings wherein, by way of illustration and example, certain embodiments of the present application are disclosed. BRIEF DESCRIPTION OF DRAWINGS

[0011] The above and other aspects of the present disclosure become more apparent from the following description taken in conjunction with the accompanying drawings, wherein:

[0012] Figure 1 FIG. 1 is a schematic diagram illustrating an exemplary charged particle beam inspection system according to embodiments of the present disclosure.

[0013] Figure 2 FIG. 2 is a schematic diagram illustrating an exemplary electron beam tool according to embodiments of the present disclosure.

[0014] Figure 3 FIG. 3 is an exemplary chart illustrating a good part yield versus landing energy of secondary electrons relative to primary electrons.

[0015] Figure 4 FIG. 4 is a schematic diagram illustrating a voltage contrast response of a wafer according to embodiments of the present disclosure.

[0016] Figure 5A and Figure 5B FIG. 5 is an illustration of exemplary voltage contrast images over a time sequence according to embodiments of the present disclosure.

[0017] Figure 6 FIG. 6 is an illustration of exemplary processing of voltage contrast images according to embodiments of the present disclosure.

[0018] Figure 7is a flowchart illustrating an exemplary method for detecting time-dependent defects, according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0019] Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers represent the same or similar elements between the several drawings. The implementation set forth in the following description of exemplary embodiments does not represent all of the implementations consistent with the present disclosure. Instead, they merely represent different ways of implementing aspects of the present disclosure, as outlined in the appended claims.

[0020] While reducing the physical size of the device, the computing power of electronic devices can be enhanced by significantly increasing the packaging density of circuit components such as transistors, capacitors, diodes, etc. on IC chips. For example, an IC chip of a smartphone (which is the size of a thumbnail) can include more than 2 billion transistors, each transistor smaller than 1 / 1000 of a human hair. Thus, it is not surprising that the manufacturing of semiconductor ICs is a complex and time-consuming process with hundreds of individual steps. Even a single error in one step can greatly affect the functionality of the final product. Even one “killer defect” can cause the device to fail. The goal of the manufacturing process is to improve the overall yield of the process. For example, to achieve a 75% yield for a 50-step process, the yield of each step must be greater than 99.4%, if the single-step yield is 95%, the overall process yield drops to 7%.

[0021] While high process yield is required in IC chip manufacturing facilities, it is also critical to maintain a high chip throughput, which is defined as the number of chips processed per hour. The presence of defects, especially in cases where operator intervention is required to inspect the defects, can affect both high process yield and high chip throughput. Thus, high throughput inspection and identification of both micron-scale and nanometer-scale defects by inspection tools such as SEMs are critical to maintaining high yield and low cost.

[0022] An SEM uses a focused electron beam to scan the surface of a wafer. The electrons interact with the wafer and generate secondary electrons. By scanning the chip using the electron beam and capturing the secondary electrons using a detector, the SEM generates an image of the chip that shows the internal device structure within the area of the chip being inspected.

[0023] Conventional SEM inspection tools obtain a single image of a wafer area and compare the obtained image to a reference image, which represents the corresponding device structure without any defects. Differences detected from the comparison of the images can indicate defects in the wafer area being inspected.

[0024] However, because the electrical characteristics of a defective thin structure change over time, such conventional inspection techniques (e.g., capturing a single image at any point in time) can not be useful for identifying defects in thin device structures. For example, even if a defect is actually present in the wafer under inspection, due to this time-dependent behavior of thin structures, it can sometimes happen that a single obtained image captured at the right moment in time shows a difference from a reference image, but images obtained at other times can not show any difference at all. Thus, conventional SEM inspection tools cannot reliably identify defects in thin device structures.

[0025] One aspect of the present disclosure includes an improved inspection tool that can reliably detect thin device defects that exhibit the time-dependent behavior described above. For example, the improved inspection tool can obtain multiple images from the same area of a wafer over a time sequence. By comparing multiple images of the same location (where those images are sampled at different times), the improved inspection tool can detect any changes in electrical characteristics caused by a thin device defect within the wafer area.

[0026] For clarity, relative dimensions of the parts depicted in the drawings can be exaggerated. In the following description of the drawings, like or similar components are referred to with like or similar reference numerals, and differences between the various embodiments will only be described with respect to the differences. As used in this document, the term "or" encompasses all possible combinations, except where expressly stated otherwise or where the use of "or" is clearly intended to mean an exclusive "or." As used in this document, the term "comprises" means "consists of," unless expressly stated otherwise. As used in this document, the term "exemplary" means "an example of."

[0027] Reference will now be made to the Figure 1 , Figure 1 is a schematic diagram illustrating an exemplary charged particle beam inspection system 100, in accordance with embodiments of the present disclosure. As shown in Figure 1 The charged particle beam inspection system 100 includes a main chamber 10, a load lock chamber 20, an electron beam tool 40, and an equipment front end module (EFEM) 30. The electron beam tool 40 is located within the main chamber 10. While the description and drawings are directed to an electron beam, it should be appreciated that embodiments are not intended to limit the present disclosure to a particular charged particle.

[0028] EFEM 30 includes a first loading port 30a and a second loading port 30b. EFEM 30 may include other loading ports. The first loading port 30a and the second loading port 30b may, for example, receive a front-opening wafer transfer cassette (FOUP) containing wafers to be inspected (e.g., semiconductor wafers or wafers made of one or more other materials) or samples (wafers and samples are collectively referred to as “wafers” hereinafter). One or more robotic arms (not shown) in EFEM 30 transport the wafers to the loading locking chamber 20.

[0029] Load-locking chamber 20 may be connected to a load-locking vacuum pump system (not shown) that removes gas molecules from load-locking chamber 20 to achieve a first pressure below atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) transport the wafer from load-locking chamber 20 to main chamber 10. Main chamber 10 is connected to a main chamber vacuum pump system (not shown) that removes gas molecules from main chamber 10 to achieve a second pressure below the first pressure. After reaching the second pressure, the wafer is inspected by an electron beam tool 40. In some embodiments, electron beam tool 40 may include a single-beam electron inspection tool. In other embodiments, electron beam tool 40 may include a multi-beam electron inspection tool.

[0030] The controller 50 is electrically connected to the electron beam tool 40. The controller 50 can be a computer configured to perform various controls on the charged particle beam inspection system 100. Although the controller 50 is... Figure 1 The controller 50 is shown outside the structure comprising the main chamber 10, the loading and locking chamber 20, and the EFEM 30; however, it should be understood that the controller 50 may be part of this structure. While this disclosure provides an example of a main chamber 10 for housing an electron beam inspection tool, it should be noted that aspects of this disclosure are not, in their broadest sense, limited to chambers housing electron beam inspection tools. Rather, it should be understood that the foregoing principles can also be applied to other tools operating under a second pressure.

[0031] Now, for reference Figure 2 , Figure 2 This is a schematic diagram illustrating an exemplary imaging system 200 including an electron beam tool 40 and an image processing system 250 according to an embodiment of the present disclosure.

[0032] like Figure 2As shown, the e-beam tool 40 can include a motorized stage 201 and a wafer holder 202 supported by the motorized stage 201 to hold a wafer 203 to be inspected. The e-beam tool 40 can also include a compound lens 204, an electron detector 206 (which includes an electron sensor surface), an objective aperture 208, a condenser lens 210, a beam-limit aperture 212, a gun aperture 214, an anode 216, and a cathode 218, one or more of which can be aligned with an optical axis 217 of the e-beam tool 40. In some embodiments, the detector 206 can be arranged off-axis from the axis 217.

[0033] In some embodiments, the compound lens 204 can include a modified swing-out reduced in-lens objective (SORIL), which can include pole pieces 204a, control electrodes 204b, a deflector or set of deflectors 204c, and a kick coil 204d. Additionally, the e-beam tool 40 can include an energy dispersive X-ray spectrometer (EDS) detector (not shown) for characterizing materials on the wafer.

[0034] A primary electron beam 220 can be emitted from the cathode 218 by applying a voltage between the anode 216 and the cathode 218. The primary electron beam 220 can pass through the gun aperture 214 and the beam-limit aperture 212, both of which can determine the current of the electron beam entering the condenser lens 210, which is located below the beam-limit aperture 212. The condenser lens 210 can focus the primary electron beam 220 before the beam enters the objective aperture 208 to set the current of the electron beam before entering the compound lens 204.

[0035] The compound lens 204 can focus the primary electron beam 220 onto the wafer 203 for inspection and can form a probe spot 222 on the surface of the wafer 203. The deflector or set of deflectors 204c can deflect the primary electron beam 220 to scan the probe spot 222 across the wafer 203. For example, during a scan, the deflector or set of deflectors 204c can be controlled to deflect the primary electron beam 220 onto different locations of the top surface of the wafer 203 at different points in time to provide data for image reconstruction of different portions of the wafer 203. Also, in some embodiments, the deflector or set of deflectors 204c can also be controlled to deflect the primary electron beam 220 onto different sides of the wafer 203 at different points in time at a particular location to provide data for stereoscopic image reconstruction of the wafer structure at that location. Further, in some embodiments, the anode 216 and the cathode 218 can be configured to generate multiple primary electron beams 220, and the e-beam tool 40 can include multiple deflectors 204c for simultaneously projecting the multiple primary electron beams 220 to different portions / sides of the wafer 203.

[0036] When current is applied to the excitation coil 204d, an axially symmetric (i.e., symmetric about the optical axis 217) magnetic field can be generated in the wafer surface region. A portion of the wafer 203 being scanned by the primary electron beam 220 is immersed in the magnetic field. In some embodiments, different voltages can be applied to the wafer 203, the pole piece 204a, and the control electrode 204b to generate an axially symmetric decelerating electric field near the wafer surface. The electric field can reduce the energy of the electrons of the beam that impinge the primary electron beam 220 near the surface of the wafer 203 before the electrons collide with the wafer 203. The control electrode 204b, which is electrically isolated from the pole piece 204a, can control the axially symmetric electric field on the wafer to prevent the wafer from generating micro-arcs and to ensure proper beam focusing at the wafer surface by the axially symmetric magnetic field.

[0037] Subsequent to receiving the primary electron beam 220, a secondary electron beam 230 can be emitted from a portion of the wafer 203. The secondary electron beam 230 can include backscattered electrons, secondary electrons, or Auger electrons generated as a result of the interaction of the primary electrons with the wafer 203. The secondary electron beam 230 can be received by the sensor surface of the electron detector 206. In some embodiments, the electron detector 206 can generate a signal (e.g., a voltage, a current, etc.) representative of the intensity of the secondary electron beam 230 and 230; and can provide the signal to the image processing system 250 in communication with the electron detector 206. The intensity of the secondary electron beam 230 can vary depending on the external or internal structure of the wafer 203, and thus can be indicative of whether the wafer 203 includes a defect. Moreover, as discussed above, the primary electron beam 220 can be projected onto different locations on the top surface of the wafer 203 or different sides of the wafer 203 at a particular location to generate different intensities of the secondary electron beam 230. Thus, by mapping the regions of the wafer 203 and the intensities of the secondary electron beam 230, the image processing system 250 can reconstruct an image reflecting the characteristics of the internal or external structure of the wafer 203.

[0038] In some embodiments, the imaging system 200 can also include an image processing system 250 that includes an image acquirer 260, a storage 270, and a controller 50. The image acquirer 260 can include one or more processors. For example, the image acquirer 260 can include a computer, a server, a mainframe, a terminal, a personal computer, any kind of mobile computing device, etc., or a combination thereof. The image acquirer 260 can be communicatively coupled to the detector 206 of the e-beam tool 40 through a medium such as an electrical conductor, a fiber optic cable, a portable storage medium, IR, Bluetooth, the Internet, a wireless network, a wireless broadcast, or a combination thereof. In some embodiments, the image acquirer 260 can receive signals from the detector 206 and can construct images. Thus, the image acquirer 260 can acquire images of the wafer 203. The image acquirer 260 can also perform various post-processing functions such as generating contours, superimposing indicators on the acquired images, etc. The image acquirer 260 can be configured to perform adjustments to brightness and contrast, etc., of the acquired images. In some embodiments, the storage 270 can be a storage medium such as a hard disk, a flash drive, a cloud storage, a random access memory (RAM), other types of computer readable memory, etc. The storage 270 can be coupled with the image acquirer 260 and can be used to save the scanned raw image data as raw images and post-processed images. The image acquirer 260 and the storage 270 can be connected to the controller 50. In some embodiments, the image acquirer 260, the storage 270, and the controller 50 together can be integrated as one control unit.

[0039] In some embodiments, the image acquirer 260 can acquire one or more images of the sample based on the imaging signals received from the detector 206. The imaging signals can correspond to a scanning operation for charged particle imaging. The acquired images can be a single image that includes a plurality of imaging regions. The single image can be stored in the storage 270. The single image can be a raw image that can be divided into a plurality of regions. Each of the regions can include one imaging region that contains a feature of the wafer 203. The acquired images can include a plurality of images of a single imaging region of the wafer 203 that are sampled a plurality of times over a time sequence. The plurality of images can be stored in the storage 270. In some embodiments, the image processing system 250 can be configured to perform image processing steps for a plurality of images of the same location of the wafer 203.

[0040] In some embodiments, the image processing system 250 can include measurement circuitry (e.g., an analog-to-digital converter) to obtain a distribution of the detected secondary electrons. In combination with corresponding scan path data of the primary electron beam 220 incident on the wafer surface, the electron distribution data collected during the detection time window can be used to reconstruct an image of the wafer structure under inspection. The reconstructed image can be used to reveal various features of the internal or external structure of the wafer 203, which can be used to reveal any defects that can exist in the wafer.

[0041] Also, although Figure 2 The electron beam tool 40 is shown using a single primary electron beam, but it should be appreciated that the electron beam tool 40 can also be a multi-beam inspection tool using multiple primary electron beams. The present disclosure does not limit the number of primary electron beams used for the electron beam tool 40.

[0042] Reference is now made to Figure 3 which is an exemplary graph showing the yield of secondary electrons relative to the landing energy of primary electrons. The graph illustrates the relationship of the landing energy of a primary electron beam, such as the primary electron beam 220 of Figure 2 to the yield of a secondary electron beam, such as the secondary electron beam 230 of Figure 2 The yield indicates how many secondary electrons are generated in response to the impact of a primary electron. For example, a yield higher than 1.0 indicates that a greater number of secondary electrons can be generated compared to the number of primary electrons that have landed on the wafer. Likewise, a yield lower than 1.0 indicates that a smaller number of secondary electrons can be generated in response to the impact of a primary electron.

[0043] As shown in the graph of Figure 3 when the landing energy of the primary electrons is in the range of El to E2, more electrons can leave the wafer surface than have landed on the surface, thus generating a positive potential at the wafer surface. In some embodiments, defect inspection can be performed in the aforementioned range of landing energies, which is referred to as “positive mode.” As described in more detail with respect to Figure 4 Because the detector, such as the detector 206 of Figure 2 can receive a smaller number of secondary electrons, device structures with a higher positive surface potential can generate darker voltage contrast images.

[0044] When the landing energy is lower than El or higher than E2, a smaller number of electrons can leave the surface, thus generating a negative potential at the surface. In some embodiments, defect inspection can be performed in this range of landing energies, which is referred to as “negative mode.” Device structures with a higher negative surface potential can generate brighter voltage contrast images of the chip.

[0045] In some embodiments, the landing energy of the primary electron beam can be controlled by the total bias between the electron gun and the wafer.

[0046] Reference is now made to Figure 4 , which is a schematic plot of a voltage contrast response of a device structure of a chip in accordance with embodiments of the present disclosure. In some embodiments, a voltage contrast method of a charged-particle inspection system can be used to detect physical defects and electrical defects on a wafer. To detect defects using voltage contrast images, a process known as pre-charging is typically employed, in which charged particles are applied to the area to be inspected prior to conducting the inspection. Pre-charging can be used to enhance voltage contrast type defect signals, for example, as discussed in U.S. Patent Nos. 8,748,815 and 8,759,762, the entireties of which are incorporated herein by reference.

[0047] For example, an electron beam tool can be used to detect defects in an internal structure or an external structure of a wafer, such as Figure 2 wafer 203, based on a voltage contrast response of the wafer to illumination by a primary electron beam. In some embodiments, the wafer can include test devices 420 developed on top of a substrate 410. In some embodiments, the test devices 420 can include multiple device structures 430 and 440 separated by an insulating material 450. For example, device structure 430 is connected to the substrate 410. In contrast, device structure 440 is spaced apart by the insulating material 450, which forms a thin insulator structure 470 (e.g., a thin oxide) between the device structure 440 and the substrate 410.

[0048] When an electron beam tool, such as Figure 2 electron beam tool 40, scans a surface of a test device 420 using primary electrons, such as Figure 2 primary electron beam 220, secondary electrons, such as Figure 2 secondary electron beam 230, can be generated from the surface. As previously described in Figure 2 , when the landing energy of the primary electrons is in the range of El to E2 (such that the productivity is higher than 1.0), more electrons can leave the wafer surface than have landed on the surface, generating a positive potential at the chip surface.

[0049] Figure 4It is appreciated how positive potential can accumulate at the surface of the wafer. For example, after the electron beam scan test apparatus 420 (e.g., during the pre-charge phase), because the device structure 440 is not connected to electrical ground in the substrate, the device structure 440 can retain more positive charge, thereby generating a positive potential at the surface of the device structure 440. In contrast, although primary electrons have been applied with the same landing energy (thus producing the same throughput), because the accumulated positive charge can be neutralized by additional electrons supplied through the connection to the substrate 410, the device structure 430 can retain less positive charge.

[0050] The image processing system (such as the image processing system 250 of Figure 2 may generate voltage contrast images 435 and 445 corresponding to the device structures 430 and 440, respectively. For example, the device structure 430 is shorted to ground and cannot retain the positive charge accumulated during the pre-charge phase. As such, when a primary electron beam lands on the surface of the wafer during the inspection phase, the device structure 430 can repel more secondary electrons, thereby generating a brighter region on the voltage contrast image. In contrast, the device structure 440 has no connection to the substrate or any other ground, and thus can retain the positive charge accumulated during the pre-charge phase, which can cause the device structure 440 to repel fewer secondary electrons during the inspection phase, thereby generating a darker region on the voltage contrast image.

[0051] Conventional defect inspection tools use electrons to accumulate potential on the surface of the wafer during the pre-charge phase. After pre-charging, the inspection tool obtains images of multiple dies within the wafer. Because all dies can contain the same device structure, the defect can be detected by comparing voltage contrast differences of these images from multiple dies. For example, if the voltage contrast level of one of the images is lower or higher than the other images, it can be determined that the corresponding die has a defect in the die area. Conventional inspection techniques assume that the surface potential accumulated during the pre-charge phase can remain above the detection level of the tool throughout the inspection phase.

[0052] However, as semiconductor process technology nodes shrink (e.g., 10 nm, 7 nm, and below), the accumulated surface potential level can change during the inspection phase due to the effects of electrical breakdown or tunneling, resulting in the inability to detect thin device defects. When a sufficiently high voltage is applied to a thin insulator structure (e.g., thin oxide) such as insulator structure 470, a leakage current can flow through the thin insulator structure, and the thin insulator structure can not function completely as an insulator. This can affect circuit functionality and cause malfunction. Similar leakage current effects can also occur between a tungsten (W) plug and a source region or a drain region of a field effect transistor (FET) through a high resistance metal layer (e.g., a cobalt silicide (e.g., CoSi, CoSi2, Co2Si, Co3Si, etc.) layer).

[0053] Insulator structure 470 can represent a thin defect that is susceptible to such breakdown effects. For example, due to manufacturing errors, even though device structures 430 and 440 are designed to be in contact with substrate 410 and to function in the same way, insulator structure 470 can have been created in a defective manner in device structure 440. A defect etch process can leave a thin oxide, resulting in an unwanted electrical blockage (e.g., open circuit) between two structures that should be electrically connected (e.g., device structure 440 and substrate 410).

[0054] In this case, if insulator structure 470 is thick enough (e.g., greater than 10 nm), the positive charge accumulated in device structure 440 does not leak through insulator structure 470, and thus, a conventional defect inspection tool can detect the defect by taking one sample image during the inspection phase and comparing the image to a reference image. As a result, a voltage contrast difference between 435 and 445 can be detected, indicating a defect (e.g., insulator structure 470) in device structure 440.

[0055] However, as the insulator structure 470 thins (e.g., less than 10 nm), the accumulated positive surface potential level in the device structure 440 can decrease over time with a higher likelihood due to the leakage current described above. As the device structure 440 loses positive charge, the voltage contrast level can change from darker (e.g., image 445) to lighter (e.g., image 446) over time, and the final inspection tool can not be able to detect anything because the voltage contrast level is below the threshold of the detector (e.g., image 447). As a result, by the time the cutoff inspection phase begins and the inspection tool starts sampling the voltage contrast images, the accumulated positive potential in the device structure 440 can all be gone due to the leakage current through the thin insulator structure 470, resulting in no difference in surface potential between the device structures 430 and 440. In this case, if the conventional inspection tool samples the images after the positive charge is all gone, the defect inspection tool can not reliably detect the thin device defects. For example, the inspection tool can not be able to detect any difference between the voltage contrast image 435 (from the device structure 430) and the voltage contrast image 447 (from the device structure 440).

[0056] Therefore, to detect thin device defects that are susceptible to the time-dependent changes in accumulated surface potential described above, the inspection tool can sample multiple images of the wafer over one or more time sequences while gradually increasing the surface potential so that the time-dependent changes can be captured by the sequence of multiple images. Additionally, in some embodiments, the inspection tool can use low-energy primary electrons to gradually charge the wafer without incurring such breakdown effects during the pre-charge phase. In other embodiments, the inspection tool can sample and generate voltage contrast images while the pre-charge is ongoing so that transient voltage contrast changes can be captured even during the pre-charge phase.

[0057] The foregoing description has described the presence of a short condition resulting in a bright appearance of the corresponding feature, and the presence of an open condition resulting in a dark appearance of the corresponding feature. However, one skilled in the art will appreciate that the bright appearance and the dark appearance can change or even be reversed depending on the actual processing of the test structure or the settings of the e-beam tool.

[0058] Reference is now made to Figure 5A which is a graphical illustration of exemplary voltage contrast images over a time sequence in accordance with embodiments of the present disclosure. In some embodiments, the defect inspection process can include a pre-charge phase 501 and an inspection phase 503. During the pre-charge phase 501, an imaging system (such as the e-beam tool 100) can gradually charge the wafer 101 to a predetermined voltage level. The imaging system can then sample the wafer 101 and generate a voltage contrast image 502. The imaging system can then gradually increase the voltage level and sample the wafer 101 again to generate a voltage contrast image 503. The imaging system can continue to gradually increase the voltage level and sample the wafer 101 to generate a voltage contrast image 504, a voltage contrast image 505, and so on. In some embodiments, the imaging system can sample the wafer 101 at a predetermined time interval (e.g., 1 second, 2 seconds, 5 seconds, etc.) to generate the voltage contrast images 502-505. In other embodiments, the imaging system can sample the wafer 101 at a predetermined voltage level (e.g., 1 V, 2 V, 5 V, etc.) to generate the voltage contrast images 502-505. Figure 2The imaging system can use electrons to accumulate potential on the wafer surface. As explained above, to detect thin device defects, the imaging system can use low energy electrons to gradually accumulate surface potential without incurring breakdown or tunneling while pre-charging. During the inspection phase 503, the imaging system can sample multiple images of a location area of the wafer (such as the wafer 203 in FIG. 5B) over a time sequence, in some embodiments. By comparing multiple voltage contrast images of the same location but from different times, the system can detect changes in surface potential over time that are indicative of device breakdown or tunneling effects due to thin device defects. Figure 2

[0059] For example, as shown in FIG. 5B, at the beginning of the pre-charging phase 501, the surface potential can be insufficient to reveal any detectable voltage contrast regions, as shown in voltage contrast images 510 and 512. At the end of the pre-charging phase, dark voltage contrast (DVC) regions 560a, 562a, and 564a can start to appear (e.g., at time T pre3 Figure 5A

[0060] In some embodiments, during the pre-charging phase 501, the electron beam tool (such as the electron beam tool 40 in FIG. 4) can use primary electrons with lower energy than conventional systems to avoid device breakdown during the pre-charging phase (e.g., before the sampling of voltage contrast images begins), as explained above. Figure 2

[0061] In other embodiments, the electron beam tool can skip the pre-charging phase 501 and start the inspection process from the inspection phase 503 to detect thin device structure defects. In such embodiments, the electron beam tool can start sampling images as soon as the inspection process is initiated. Because there is no pre-charging of potential at the surface of the wafer, the primary electron beam scans used for image generation can be used to gradually accumulate charge at the surface of the wafer while continuously sampling images.

[0062] After the pre-charging is complete, the electron beam tool can start sampling multiple images from the area of the wafer over a time sequence. For example, as shown in FIG. 5B, multiple images 530, 532, 534, 536, and 538 are sampled at times Tl, T2, T3, T4, and T5, respectively, during the inspection phase. Figure 5A

[0063] At time Tl, image 530 shows that there are three DVC regions 560a, 562a, and 564a. DVC regions 560b, 562b, and 564b can represent three device structures (such as the device structures 210a, 210b, and 210c in FIG. 2A) that have been damaged due to thin device defects. Figure 4 ​​​​​accumulated surface potential in the device structure 440. At times T2 and T3, images 532 and 534 show that DVC regions 560b, 562b, and 564b are again detected, which can indicate that the accumulated positive charge remains in the device structure and has remained unchanged since time Tl.

[0064] At time T4, image 536 shows that DVC region 562b has disappeared, while DVC regions 560b and 564b remain. This can indicate that the corresponding device structure for DVC region 562b can have lost the accumulated positive charge due to a leakage current, causing the surface potential to drop to an undetectable level (e.g., a breakdown effect). When high voltage is applied to a thin-type structure (e.g., the insulator structure 470), leakage current can flow through the thin-type structure even if the structure is made of insulating material. The ratio of leakage current is higher when the device structure is thinner. For example, if the thickness of the device structure is less than 10 nm, for example, device breakdown can occur more frequently. Thus, the accumulated positive charge at the corresponding device structure of DVC region 562b can have been neutralized due to device breakdown caused by a thin-type device structure defect. Figure 4

[0065] In some embodiments, a thin-type device structure defect can be identified by detecting such transient effects on the surface potential. For example, an e-beam tool can compare multiple images of the same location, e.g., images 530, 532, 534, 536, and 538, and detect changes in DVC regions over a time sequence to identify a thin-type device structure defect. In some embodiments, by comparing multiple voltage contrast images of the same location but from different times, the system can detect changes in the surface potential over time that are indicative of device breakdown due to a thin-type device defect. For example, as shown in FIG. 5B, voltage contrast image 534 (sampled at time T3) and voltage contrast image 536 (sampled at time T4) show that DVC region 562b has disappeared between times T3 and T4, which can indicate that the corresponding device structure can include a thin-type device structure defect. Figure 5B

[0066] Although Figure 5A The example illustrates five images, but it should be appreciated that two or more images can be used to detect a thin-type device structure defect. Further, although Figure 5A and Figure 5B The images shown in FIGS. 5A and 5B illustrate detection mechanisms using dark voltage contrast, but it should be appreciated that bright voltage contrast can also be used when the e-beam tool is operated in negative mode.

[0067] ​​In some embodiments, the time intervals between the sampling times T1, T2, T3, T4, and T5 can be adjusted to capture different timing of the transient effects on the voltage contrast images. The timing can depend on the amount of current supplied during the pre-charge phase, or on the characteristics of the thin-film device structure defects, such as the thickness of the structure, the speed of electron movement through the structure due to breakdown, etc.

[0068] In some embodiments, a positive surface potential can be accumulated because the electron beam tool is operated in positive mode (e.g., El < landing energy < E2). In other embodiments, a negative potential can be accumulated because the electron beam tool is operated in negative mode (e.g., landing energy < El or landing energy > E2).

[0069] Reference is now made to Figure 6 , which is an illustration of an exemplary processing of voltage contrast images according to embodiments of the present disclosure. In some embodiments, an inspection tool, such as the imaging system 200 in Figure 2 , can compare one set of voltage contrast images to another set of voltage contrast images. For example, the inspection tool can generate a first set of voltage contrast images 610 and a second set of voltage contrast images 640, and then compare corresponding images from each set (e.g., 612 vs. 642, 614 vs. 644, 616 vs. 646, 618 vs. 648) one by one to detect time-dependent defects caused by breakdown at the thin-film device structure. In some embodiments, the two sets of voltage contrast images 610 and 640 can be sampled from the same location of the wafer but at two different time sequences. In other embodiments, the first set of voltage contrast images 610 can be sampled from a first location of the wafer, and the second set of voltage contrast images 640 can be sampled from a second location of the wafer, where the first and second locations of the wafer can include the same device structure.

[0070] As shown in Figure 6 , the first set of voltage contrast images 610 illustrates that the DVC region 621 can temporarily disappear (as on image 616) and reappear (as on image 618). The disappearance can be caused by a breakdown due to a leakage current through the thin-film device structure. After the breakdown, a positive surface potential can accumulate again because a primary particle beam is subsequently scanned for inspection, causing the DVC region 621 to potentially reappear, as shown on image 618. The inspection tool can detect the transient change in the DVC region 621 by comparing the voltage contrast image 616 and the voltage contrast image 646. Because the two sets of images (610 and 640) represent the same device structure (either from the same location or from different locations with the same device structure), the difference between the images 616 and 646 can be indicative of a thin-film device defect at the wafer location.

[0071] Now, referring to Figure 7 which is a flowchart illustrating an exemplary method for detecting time-dependent defects according to embodiments of the present disclosure. The method can be performed by an imaging system (such as Figure 2 imaging system 200).

[0072] In step 710, an e-beam tool (such as Figure 2 e-beam tool 40) pre-charges the wafer under inspection to build up an electric potential on the wafer surface. As the e-beam tool scans the surface of the wafer using primary electrons (such as Figure 2 primary electron beam 220), secondary electrons (such as Figure 2 secondary electron beam 230) can be generated from the surface. As previously described in Figure 2 , when the landing energy of the primary electrons is in the range of El to E2 (such that the productivity is higher than 1.0), more electrons can leave the wafer surface than have landed on the surface, thereby generating a positive potential at the chip surface.

[0073] If the insulator structure (such as Figure 4 insulator structure 470) is thick enough (e.g., greater than 10 nm), the positive charge built up in the device structure (such as Figure 4 device structure 440) does not leak through the insulator structure, so a conventional defect inspection tool can detect defects during the inspection phase by taking one sample image. As a result, a voltage contrast difference between the defective structure and the non-defective structure can be detected.

[0074] However, as the device structure becomes thin (e.g., less than 10 nm), the surface potential level built up during the inspection phase can change due to electrical breakdown or tunneling effects. As a result, by the time the inspection phase begins and the inspection tool starts sampling the voltage contrast image, the positive potential built up in the device structure can all be lost through the thin insulator structure due to breakdown or other thin-film related mechanisms, resulting in no difference in surface potential between the defective device structure and the non-defective device structure, or a difference that is below the detection threshold. As a result, a conventional defect inspection tool can not be able to detect thin device defects. Therefore, the imaging system can use low-energy primary electrons to gradually charge up the wafer to avoid causing a breakdown that results in the loss of surface potential during the pre-charge phase.

[0075] In step 720, after pre-charging the wafer, the e-beam tool takes multiple voltage contrast images (e.g., Figure 5A at different times (e.g., Figure 5AImages 530, 532, 534, 536, and 538 are sampled. In order to detect changes in surface potential over time, in some embodiments, the inspection tool can sample images multiple times from the same location area of ​​the wafer over a certain time series while gradually increasing the surface potential.

[0076] In step 730, the image processing system (such as...) Figure 2 The image processing system 250 processes multiple voltage contrast images and detects dark voltage contrast (DVC) differences between the multiple images to identify defects in the thin device structure. In some embodiments, by comparing multiple voltage contrast images from the same location but from different times, the system can detect changes in surface potential over time, indicating device breakdown due to defects in the thin device. For example, as Figure 5B As shown, voltage contrast image 534 (sampled at time T3) and voltage contrast image 536 (sampled at time T4) show that the DVC region 562b has disappeared between times T3 and T4, which can indicate that the corresponding device structure may include thin device structure defects. In some embodiments, a bright voltage contrast difference can be detected.

[0077] The embodiments can also be described using the following terms:

[0078] 1. A charged particle beam system for inspecting wafers, comprising:

[0079] A charged particle beam source, including a circuit system that guides charged particles to one or more regions of a wafer in one or more time sequences; and

[0080] The controller includes a circuit system for:

[0081] During a first time series within one or more time series, generate a first set of images of a first region within one or more regions; and

[0082] The first set of images is processed to detect defects in the thin device structure within the wafer.

[0083] 2. The system according to Clause 1, wherein the controller includes a circuit system for:

[0084] A first image and a second image are sampled from a first set of images, wherein the first image is sampled at a first time point in a first time series, and the second image is sampled at a second time point in the first time series; and

[0085] Compare the first image with the second image to identify defects in the first region of one or more regions of the wafer.

[0086] 3. The system of clause 1, wherein the controller comprises circuitry to:

[0087] generate a second set of images of a first region of the one or more regions during a second time sequence of the one or more time sequences;

[0088] sample a first image from the first set of images and a second image from the second set of images; and

[0089] compare the first image and the second image to identify a defect at the first region of the one or more regions of the wafer.

[0090] 4. The system of clause 1, wherein the controller comprises circuitry to:

[0091] generate a second set of images of a second region of the one or more regions during a second time sequence of the one or more time sequences, wherein the first region and the second region comprise the same device structure;

[0092] sample a first image from the first set of images and a second image from the second set of images; and

[0093] compare the first image and the second image to identify a defect at the first region or the second region of the one or more regions of the wafer.

[0094] 5. The system of any of clauses 3 and 4, wherein the first image and the second image are sampled at corresponding times in the first time sequence and the second time sequence.

[0095] 6. The system of any of clauses 2-5, wherein the first image and the second image comprise a voltage contrast level.

[0096] 7. The system of clause 6, wherein the controller comprises circuitry to detect a difference between the voltage contrast level of the first image and the voltage contrast level of the second image to identify a defect in the thin device structure.

[0097] 8. The system of any of clauses 1-7, wherein the charged particle beam source comprises circuitry to:

[0098] pre-scan the one or more regions of the wafer during a first portion of the one or more time sequences; and

[0099] inspect the one or more regions of the wafer during a second portion of the one or more time sequences.

[0100] 9. The system of clause 8, wherein the charged particle beam source includes circuitry to establish one or more surface potentials at one or more regions of the wafer concurrently with performing the pre-scan during a first portion of the one or more time sequences.

[0101] 10. The system of clause 9, wherein the charged particle beam source performs the pre-scan until device breakdown occurs.

[0102] 11. The system of any one of clauses 1-10, wherein the controller includes circuitry to adjust a time interval between generation of each image of the first set of images.

[0103] 12. The system of any one of clauses 2-10, wherein the controller includes circuitry to adjust a time interval between generation of each image of the second set of images.

[0104] 13. The system of any one of clauses 1-12, wherein the defects include electrical defects associated with electrical leakage in the thin device structures at the regions.

[0105] 14. The system of clause 13, wherein the thin device structures include thin oxides that remain after an etch process.

[0106] 15. The system of any one of clauses 1-14, further comprising:

[0107] a detector communicatively coupled to the controller configured to generate detection data based on detection of secondary charged particles associated with the charged particles affecting the one or more regions of the wafer.

[0108] 16. The system of clause 15, wherein the controller includes circuitry to construct a corresponding voltage contrast image based on the detection data generated by the detector.

[0109] 17. A method of inspecting a wafer using a charged particle beam system having a charged particle beam source to direct charged particles onto one or more regions of the wafer over one or more time sequences, the method comprising:

[0110] generating a first set of images of a first region of the one or more regions during a first time sequence of the one or more time sequences; and

[0111] processing the first set of images to detect defects in thin device structures in the wafer.

[0112] 18. The method of clause 17, further comprising:

[0113] sampling a first image from the first set of images and a second image from the second set of images; and

[0114] comparing the first image and the second image to identify a defect at the first region of the one or more regions of the wafer.

[0115] 19. The method of clause 17, further comprising:

[0116] generating a second set of images of the first region of the one or more regions during a second time sequence of the one or more time sequences;

[0117] sampling the first image from the first set of images and the second image from the second set of images; and

[0118] comparing the first image and the second image to identify a defect at the first region of the one or more regions of the wafer.

[0119] 20. The method of clause 17, further comprising:

[0120] generating a second set of images of a second region of the one or more regions during a second time sequence of the one or more time sequences, wherein the first region and the second region comprise the same device structure;

[0121] sampling the first image from the first set of images and the second image from the second set of images; and

[0122] comparing the first image and the second image to identify a defect at the first region or the second region of the one or more regions of the wafer.

[0123] 21. The method of any of clauses 19 and 20, the first image and the second image are sampled at corresponding times of the first time sequence and the second time sequence.

[0124] 22. The method of any of clauses 18 to 21, wherein the first image and the second image comprise a voltage contrast level.

[0125] 23. The method of clause 22, further comprising detecting a difference between the voltage contrast level of the first image and the voltage contrast level of the second image to identify a defect in the thin device structure.

[0126] 24. The method of any of clauses 17 to 23, further comprising adjusting a time interval between generation of each image of the first set of images.

[0127] 25. The method of any of clauses 18-23, further comprising adjusting a time interval between generation of each image of the second set of images.

[0128] 26. A non-transitory computer readable medium storing a set of instructions executable by a processor of a charged particle beam system having a charged particle beam source to direct a charged particle beam onto one or more regions of a wafer over one or more time sequences to cause the charged particle beam system to perform a method comprising:

[0129] generating a first set of images of a first region of the one or more regions during a first time sequence of the one or more time sequences; and

[0130] processing the first set of images to detect a defect in a thin device structure in the wafer.

[0131] 27. The computer readable medium of clause 26, wherein the set of instructions are executable by the processor of the charged particle beam system to cause the charged particle beam system to further perform:

[0132] sampling a first image and a second image from the first set of images, wherein the first image is sampled at a first time of the first time sequence and the second image is sampled at a second time of the first time sequence; and

[0133] comparing the first image and the second image to identify a defect at the first region of the one or more regions of the wafer.

[0134] 28. The computer readable medium of clause 26, wherein the set of instructions are executable by the processor of the charged particle beam system to cause the charged particle beam system to further perform:

[0135] generating a second set of images of the first region of the one or more regions during a second time sequence of the one or more time sequences;

[0136] sampling a first image from the first set of images and a second image from the second set of images; and

[0137] comparing the first image and the second image to identify a defect at the first region of the one or more regions of the wafer.

[0138] 29. The computer readable medium of clause 26, wherein the set of instructions are executable by the processor of the charged particle beam system to cause the charged particle beam system to further perform:

[0139] generating a second set of images of a second region of the one or more regions during a second time sequence of the one or more time sequences, wherein the first region and the second region comprise the same device structure;

[0140] sampling a first image from a first set of images and a second image from a second set of images; and

[0141] comparing the first image and the second image to identify a defect at the first region or at the second region in the one or more regions of the wafer.

[0142] 30. The computer readable medium of any of clauses 28 and 29, wherein the set of instructions is executable by a processor of a charged particle beam system to cause the charged particle beam system to perform a method, wherein the first image and the second image are sampled at corresponding times in a first time sequence and a second time sequence.

[0143] 31. The computer readable medium of any of clauses 27 to 30, wherein the set of instructions is executable by a processor of a charged particle beam system to cause the charged particle beam system to perform a method, wherein the first image and the second image comprise a voltage contrast level.

[0144] 32. The computer readable medium of clause 31, wherein the set of instructions is executable by a processor of a charged particle beam system to cause the charged particle beam system to perform:

[0145] detecting a difference between the voltage contrast level of the first image and the voltage contrast level of the second image to identify a defect in the thin device structure.

[0146] 33. The computer readable medium of any of clauses 26 to 32, wherein the set of instructions is executable by a processor of a charged particle beam system to cause the charged particle beam system to perform:

[0147] adjusting a time interval between generation of each image in the first set of images.

[0148] 34. The computer readable medium of any of clauses 27 to 32, wherein the set of instructions is executable by a processor of a charged particle beam system to cause the charged particle beam system to perform:

[0149] adjusting a time interval between generation of each image in the second set of images.

[0150] It will be appreciated that the image processing system can use software to control the functionality described above. For example, the image processing system can receive the images from a detector (such as a charged particle beam system) and perform the functionality described above using software. Figure 2The signals are received by the image processing system (e.g., by the detector 206) and reconstruct an image of the wafer. Still further, the image processing system can execute image processing algorithms to adjust the brightness or contrast of the reconstructed image. The image processing system can also execute control functions to adjust the time interval between the sampled images. This software can be stored on a non-transitory computer readable medium. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, a hard disk, a solid-state drive, a magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with patterns of holes, a RAM, a PROM, and EPROM, a FLASH-EPROM, or any other flash memory, NVRAM, a cache, a register, any other memory chip or cartridge, and a networked version of any of the foregoing.

[0151] While the disclosed embodiments have been explained in relation to their preferred embodiments, it is to be understood that other modifications and variations can be made without departing from the spirit and scope of the subject matter claimed below.

Claims

1. A charged particle beam system for inspecting wafers, comprising: A charged particle beam source, including a circuit system that guides charged particles to one or more regions of the wafer in one or more time sequences; as well as The controller includes a circuit system for: During a first time series in one or more time series, a first set of images of a first region in one or more regions is generated; as well as The first set of images is processed to detect defects in the thin device structure within the wafer. The controller includes a circuit system for adjusting the time interval between the generation of each image in the first set of images. The controller includes a circuit system that is used for: During a second time series in one or more time series, a second set of images of the first region in one or more regions is generated; A first image is sampled from the first set of images, and a second image is sampled from the second set of images; as well as The first image is compared with the second image to identify the defect at the first region in one or more regions of the wafer.

2. The system according to claim 1, wherein the first image and the second image are sampled at corresponding times in the first time series and the second time series.

3. The system of claim 1, wherein the first image and the second image include voltage contrast levels.

4. The system of claim 3, wherein the controller includes a circuit system for detecting a difference between the voltage contrast level of the first image and the voltage contrast level of the second image to identify defects in the thin device structure.

5. The system of claim 1, wherein the charged particle beam source comprises a circuit system, the circuit system being used for: During a first portion of the one or more time series, the one or more regions of the wafer are pre-scanned; and During the second part of the one or more time series, the one or more regions of the wafer are examined.

6. The system of claim 5, wherein the charged particle beam source includes a circuit system configured to establish one or more surface potentials at the one or more regions of the wafer while performing the pre-scan during the first portion of the one or more time series.

7. The system of claim 6, wherein the charged particle beam source performs the pre-scan until device breakdown occurs.

8. The system of claim 1, wherein the controller includes a circuit system for adjusting the time interval between the generation of each image in the second set of images.

9. The system of claim 1, wherein the defect includes an electrical defect associated with electrical leakage in the thin device structure at the region.

10. The system of claim 9, wherein the thin device structure includes thin oxide residue remaining after the etching process.

11. A charged particle beam system for inspecting wafers, comprising: A charged particle beam source, including a circuit system that guides charged particles to one or more regions of the wafer in one or more time sequences; as well as The controller includes a circuit system for: During a first time series in one or more time series, a first set of images of a first region in one or more regions is generated; as well as The first set of images is processed to detect defects in the thin device structure within the wafer. The controller includes a circuit system for adjusting the time interval between the generation of each image in the first set of images. The controller includes a circuit system that is used for: During a second time series in one or more time series, a second set of images of a second region in one or more regions is generated, wherein the first region and the second region include the same device structure; A first image is sampled from the first set of images, and a second image is sampled from the second set of images; as well as The first image is compared with the second image to identify the defect at the first region or the second region of one or more regions of the wafer.

12. A non-transitory computer-readable medium storing a set of instructions executable by a processor of a charged particle beam system to cause the charged particle beam system to perform a method having a charged particle beam source to direct a charged particle beam onto one or more regions of a wafer in one or more time sequences, the method comprising: During a first time series in one or more time series, a first set of images of a first region in one or more regions is generated; as well as The first set of images is processed to detect defects in the thin device structure within the wafer. The processor includes a circuit system for adjusting the time interval between the generation of each image in the first set of images. The processor includes a circuit system for: During a second time series in one or more time series, a second set of images of the first region in one or more regions is generated; A first image is sampled from the first set of images, and a second image is sampled from the second set of images; as well as The first image is compared with the second image to identify the defect at the first region in one or more regions of the wafer.

13. A non-transitory computer-readable medium storing a set of instructions executable by a processor of a charged particle beam system to cause the charged particle beam system to perform a method having a charged particle beam source to direct a charged particle beam onto one or more regions of a wafer in one or more time sequences, the method comprising: During a first time series in one or more time series, a first set of images of a first region in one or more regions is generated; as well as The first set of images is processed to detect defects in the thin device structure within the wafer. The processor includes a circuit system for adjusting the time interval between the generation of each image in the first set of images. The processor includes a circuit system for: During a second time series in one or more time series, a second set of images of a second region in one or more regions is generated, wherein the first region and the second region include the same device structure; A first image is sampled from the first set of images, and a second image is sampled from the second set of images; as well as The first image is compared with the second image to identify the defect at the first region or the second region of one or more regions of the wafer.

Images