Semiconductor device with embedded flex circuit

Abstract

Embodiments of the present disclosure relate to semiconductor devices with embedded flex circuits. A semiconductor device is provided that includes a substrate including an antenna and a conductive feature, an integrated circuit (IC) die attached to the substrate and including radio frequency (RF) circuitry, and a flex circuit integrated with the substrate, where the flex circuit is electrically coupled to the IC die and the substrate, a first portion of the flex circuit is disposed between opposing sidewalls of the substrate, a second portion of the flex circuit extends beyond the opposing sidewalls of the substrate, and the second portion of the flex circuit includes an electrical connector at a distal end.

Description

Technical Field

[0001] The present invention generally relates to semiconductor packaging, and in specific embodiments, to packaged antenna (AiP) devices. Background Technology

[0002] Antenna-in-Package (AiP) represents a new trend in integrated circuit (IC) packaging, a driving force behind smaller and highly integrated semiconductor devices. AiP devices integrate integrated circuits (ICs) (e.g., baseband ICs and RF transceiver ICs) and antennas within the same package. AiP devices allow complex RF components to be integrated with baseband circuitry into a self-contained module. AiP devices not only reduce the footprint of their integrated functional modules but also simplify the work of system integrators. For example, system integrators no longer need to design complex RF circuitry at the application printed circuit board (PCB) level. Furthermore, the overall size of the entire application is reduced.

[0003] As the form factor of mobile devices continues to shrink, the reduction in internal space presents new requirements and challenges for the design of semiconductor devices within these devices, such as AiP devices. For example, as mobile devices become thinner, reducing the thickness of the mobile device necessitates a corresponding reduction in the height of the AiP device. Improved packaging technologies are needed in this field for use in semiconductor devices such as AiP devices. Summary of the Invention

[0004] According to an embodiment of the present invention, a semiconductor device includes: a substrate including an antenna and conductive features; an integrated circuit (IC) die attached to the substrate and including radio frequency (RF) circuitry; and a flexible circuit integrated with the substrate, wherein the flexible circuit is electrically coupled to the IC die and the substrate, a first portion of the flexible circuit is disposed between opposing sidewalls of the substrate, a second portion of the flexible circuit extends beyond the opposing sidewalls of the substrate, and the second portion of the flexible circuit includes an electrical connector at a distal end.

[0005] According to an embodiment of the present invention, a semiconductor device includes: an integrated circuit (IC) including radio frequency (RF) circuitry and an RF terminal configured to transmit or receive RF signals; a substrate including an antenna adjacent to a first side of the substrate, the first side being away from the IC, and the substrate including a conductive feature adjacent to a second side of the substrate facing the IC, wherein the IC is attached to the second side of the substrate and the RF terminal of the IC is electrically coupled to the conductive feature of the substrate; and a flexible circuit attached to the substrate, wherein the flexible circuit is electrically coupled to the IC and the substrate, wherein a first segment of the flexible circuit is disposed within a lateral region of the substrate, and a second segment of the flexible circuit is disposed outside the lateral region of the substrate, the second segment of the flexible circuit including an electrical connector.

[0006] According to an embodiment of the present invention, a method of forming an electrical device includes: attaching a first portion of a flexible circuit to a first substrate, wherein the first substrate includes an antenna in a first metal layer of the first substrate, wherein after attachment, a second portion of the flexible circuit extends beyond a lateral extent of the first substrate, the second portion of the flexible circuit having an electrical connector at a distal end; and bonding a radio frequency integrated circuit (RFIC) to a first surface of the first substrate, wherein after bonding, the RFIC is electrically coupled to the first substrate and the flexible circuit. Attached Figure Description

[0007] To more fully understand the invention and its advantages, the following description is now provided with reference to the accompanying drawings, wherein...

[0008] Figures 1A to 1C The illustration shows cross-sectional views of an antenna-in-package (AiP) device at various manufacturing stages according to an embodiment;

[0009] Figure 1D The illustration shows a functional block diagram of a radio frequency integrated circuit (RFIC) according to an embodiment;

[0010] Figures 2A to 2C The illustration shows cross-sectional views of an antenna-in-package (AiP) device at various manufacturing stages according to an embodiment;

[0011] Figures 3A to 3C The illustration shows cross-sectional views of an antenna-in-package (AiP) device at various manufacturing stages according to an embodiment;

[0012] Figures 4A to 4D The illustration shows various views of the packaged antenna (AiP) device at various manufacturing stages according to an embodiment;

[0013] Figure 5A This is a cross-sectional view illustrating the electrical connection between the in-package antenna (AiP) device in the embodiment and another electrical component inside the electronic device;

[0014] Figure 5B This is a cross-sectional view illustrating the electrical connection between an AiP (Antenna-in-Package) device and another electrical component inside an electronic device in another embodiment;

[0015] Figure 6A This is a cross-sectional view illustrating the location of the in-package antenna (AiP) device inside the electronic device in the embodiment;

[0016] Figure 6B This is a cross-sectional view illustrating the location of an in-package antenna (AiP) device inside an electronic device in another embodiment; and

[0017] Figure 7 This is a flowchart of a method for forming a semiconductor device according to an embodiment. Detailed Implementation

[0018] The manufacture and use of the currently disclosed embodiments are discussed in detail below. However, it should be understood that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of particular ways of making and using the invention and do not limit the scope of the invention. Throughout this discussion, unless otherwise stated, the same or similar reference numerals in different figures refer to the same or similar parts. Further, as shown in the figures, spatial relative terms such as “below,” “under,” “lower,” “above,” “upper,” etc., are used herein to facilitate the description of the relationship of one element or feature to one or more other elements or features. In addition to the orientations illustrated in the figures, spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein can be interpreted accordingly.

[0019] The invention is described in this context (i.e., an antenna-in-package (AiP) device with embedded flexible circuitry) with respect to exemplary embodiments. Note that the AiP device is used herein as a non-limiting example. The scope of the invention includes semiconductor devices other than AiP devices. For example, such devices differ from AiP devices in that they include one or more antennas not located within their substrate, but rather on one or more of their outer surfaces. In other words, non-AiP semiconductor devices with embedded flexible circuitry are also included within the scope of this disclosure. For example, the AiP devices in the various embodiments disclosed herein may be replaced by another semiconductor device (e.g., a non-AiP device) having a multilayer structure. These and other variations are fully intended to be included within the scope of this disclosure.

[0020] In embodiments of the invention, a flexible circuit is attached to a substrate such that a first portion of the flexible circuit is within the lateral extent of the substrate, and a second portion of the flexible circuit is outside the lateral extent of the substrate. The substrate has one or more antennas formed in a metal layer of the substrate. The flexible circuit is electrically coupled to a conductive feature of the substrate. The second portion of the flexible circuit has an electrical connector for connection to an external circuit. A radio frequency integrated circuit (RFIC) is bonded to the substrate and electrically coupled to both the flexible circuit and the substrate. The electrical connection between the RFIC and the external circuit is achieved through the electrical connector of the flexible circuit. RF signals are transmitted from or received by the RFIC using one or more antennas in the substrate, which are electromagnetically coupled to RF terminals of the RFIC. The substrate having the attached flexible circuit and RFIC forms an AiP device with embedded flexible circuitry. The disclosed embodiments reduce the height of the formed AiP device, which in some embodiments allows the AiP device to be embedded in various locations and at various angles within the bezel of a mobile device.

[0021] Now, for reference Figures 1A to 1C , Figures 1A to 1C The illustration shows cross-sectional views of the AiP device 500A at various manufacturing stages according to an embodiment. Figure 1A The illustration shows a substrate 100 (e.g., a printed circuit board (PCB)) including one or more dielectric layers 101 and conductive features (e.g., metal lines and vias) formed in the one or more dielectric layers 101. The conductive features are formed in one or more metal layers of the substrate. The substrate 100 may also include solder resist layers 105 on the upper and lower surfaces of the one or more dielectric layers 101.

[0022] One or more dielectric layers 101 can be formed from any suitable dielectric material, such as resin or glass fiber. For example, bismaleimide triazine (BT) resin, FR-4 (a composite material consisting of woven glass fiber cloth and a flame-retardant epoxy resin binder), ceramics, glass, plastics, strips, films, or other support materials can be used as the dielectric material for one or more dielectric layers 101. In the illustrated embodiment, the substrate 100 includes at least one antenna (e.g., 103A) and is designed for radio frequency (RF) applications. Therefore, one or more dielectric layers 101 can be formed using low-loss high-frequency materials, such as woven glass-reinforced hydrocarbon / ceramic or polytetrafluoroethylene (PTFE). Examples of dielectric materials include Rogers 400C, 4350, 3003 from Rogers Corporation, Mitsubishi HL972LF, HL970LF from Mitsubishi, or Panasonic's Megtron series. The thickness of each dielectric layer in dielectric layer 101 can be, for example, between about 50 μm and about 400 μm, although other suitable thicknesses may also be used.

[0023] The conductive features 103 (e.g., 103L, 103V, 103G, 103A, 103B) of substrate 100 include conductive lines (e.g., copper wires) and vias (e.g., copper vias) formed using suitable forming methods. For example, copper can be deposited on a dielectric layer to form a metal layer, and then the deposited metal layer can be patterned to form metal lines. As another example, openings or recesses can be formed in the dielectric layer, and copper can be formed in the openings or recesses to form conductive features such as vias. Throughout this specification, copper is used as an example of a material for forming conductive features, where it is understood that other suitable conductive materials such as aluminum, tungsten, cobalt, gold, silver, combinations thereof, alloys thereof, etc., can also be used to form various conductive features. Depending on the design of substrate 100, the number of metal layers in substrate 100 can be between, for example, 2 and 10, although other numbers of metal layers are also possible. Figure 1A The configuration of substrate 100 illustrated in (or other accompanying drawings) (e.g., the location and interconnection of conductive features 103) is merely an example and not a limitation. Other configurations of substrate 100 are possible depending on the design of substrate 100 and are fully intended to be included within the scope of this disclosure.

[0024] exist Figure 1A In the example, the conductive features of substrate 100 include conductive lines 103L and vias 103V. In subsequent processing (see...) Figure 1C The via 103V (e.g., near the lower surface of substrate 100) illustrated in Figure 1 is electrically coupled to the RF terminal (e.g., 303R) of RFIC 300. Figure 1AThe diagram also illustrates an antenna 103A (e.g., a copper patch antenna) near the upper surface of substrate 100, and a ground plane 103G between antenna 103A and conductive line 103L. In some embodiments, the ground plane 103G is a copper plane electrically coupled to a reference voltage level (such as electrical ground). Figure 1A In the middle, the ground plane 103G has an opening 106 (e.g., a perforation) disposed between the antenna 103A and the conductive line 103L. Figure 1A A conductive pattern 103B disposed in the same metal layer as antenna 103A is also illustrated. This conductive pattern 103B can be an additional antenna. For example, substrate 100 may have two or more antennas for simultaneously transmitting and receiving RF signals.

[0025] in addition, Figure 1A The illustration shows a conductive feature 104 (e.g., a copper pad) formed in a solder resist layer 105 at the lower surface of substrate 100. The conductive feature 104 is used for bonding to the flexible circuit 200 in subsequent processing (see [reference]). Figure 1B In some embodiments, the conductive feature 104 is formed, for example, by forming an opening in the solder resist layer 105 and then plating a conductive material (e.g., copper) into the opening. Although in Figure 1A Not shown in the figure, but conductive feature 104 is electrically coupled to conductive feature 103 of substrate 100.

[0026] Next, in Figure 1B In this circuit, flexible circuit 200 is attached to the lower surface of substrate 100. Flexible circuit 200 includes cable 201 and connector 203 (e.g., electrical connector) at the end of cable 201. Cable 201 includes one or more conductive layers (e.g., copper layers) formed in a suitable dielectric material (such as polyimide). Example dielectric materials for flexible circuit 200 include Pyralux AP or Pyralux LF Coverlay from DuPont. Connector 203 is used for electrical connection to another workpiece (e.g., another PCB, another electrical component). Note that while flexible circuit 200 is flexible (e.g., it can be folded, bent, twisted, etc. during normal operation), substrate 100 is a rigid substrate (e.g., PCB) that does not change its shape or dimensions under normal operating conditions.

[0027] like Figure 1BAs shown, a first portion (also referred to as a first segment) of the flexible circuit 200 is disposed within the lateral region of the substrate 100, and a second portion (also referred to as a first segment) of the flexible circuit 200 is disposed outside the lateral region of the substrate 100. In other words, the first portion of the flexible circuit 200 is disposed between opposite sidewalls of the substrate 100, and the second portion of the flexible circuit 200 is disposed outside the opposite sidewalls of the substrate 100. In some embodiments, the length L of the portion of the cable 201 of the flexible circuit 200 disposed outside the opposite sidewalls of the substrate 100 is between about 0.5 mm and about 10 mm, such as between about 0.5 mm and about 5 mm. In other embodiments, depending on, for example, the design and / or application of the device, the length L is greater than 10 mm.

[0028] In some embodiments, the width of the portion of the cable 201 of the flexible circuit 200 disposed outside the opposite sidewalls of the substrate 100 is between about 0.2 mm and about 5 mm. In other embodiments, depending on, for example, the design and / or application of the device, the width is greater than 5 mm, for example, about 10 mm or more.

[0029] In some embodiments, a first portion of the flexible circuit 200 has conductive features (e.g., copper pads, not shown) exposed at the upper surface of the cable 201. The flexible circuit 200 can be attached to the lower surface of the substrate 100 by direct metal-to-metal bonding. In other words, the conductive features 104 of the substrate 100 and the exposed conductive features of the flexible circuit 200 are bonded together by a direct metal-to-metal bonding process. In other embodiments, the flexible circuit 200 is mechanically and electrically coupled to the lower surface of the substrate 100 (e.g., conductive features 104) using conductive adhesive or conductive paste. In another embodiment, the conductive feature 104 is not formed in the solder resist layer 105. In this case, an opening (e.g., a via) is formed at the lower surface of the substrate 100, extending through portions of the dielectric layer 101 to expose some conductive features (e.g., 103L, 103V) ​​of the conductive feature 103 of the substrate 100, and an electroplating process (e.g., electroplating or electroless plating) is performed to fill the opening with a conductive material (e.g., copper), thereby forming a conductive pattern exposed at the lower surface of the substrate (e.g., see...). Figure 2B (Through-hole 205 in the middle). The flexible circuit 200 can then be mechanically and electrically coupled to the conductive pattern on the lower surface of the substrate using suitable methods (such as direct metal-to-metal bonding, conductive adhesive or conductive paste).

[0030] Next, in Figure 1CIn this configuration, a radio frequency integrated circuit (RFIC) 300 is attached to the lower surface of a substrate 100, such that a first portion of a flexible circuit 200 is disposed between the substrate 100 and the RFIC 300. The RFIC 300 is an integrated circuit (also referred to as an IC die) that includes RF circuitry (e.g., circuitry designed for processing radio frequency signals). Additionally, the RFIC 300 may include other circuitry, such as baseband processing circuitry. After attachment, the RFIC 300 is electrically coupled to the flexible circuit 200 and the substrate 100. The system includes the substrate 100, the flexible circuit 200, and the RFIC 300. Figure 1C The semiconductor structure shown is referred to as AiP device 500A with embedded flexible circuit 200, or simply AiP device 500.

[0031] like Figure 1C As shown, RFIC 300 includes a semiconductor substrate 301, such as an active layer of doped or undoped silicon, or a semiconductor-on-insulator (SOI) substrate. The semiconductor substrate may include other semiconductor materials, such as: germanium; compound semiconductors, including silicon carbide, gallium arsenide, gallium phosphide, gallium nitride, indium phosphide, indium arsenide, and / or indium antimonide; alloy semiconductors, including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP; or combinations thereof. Other substrates, such as multilayer substrates or gradient substrates, may also be used. Devices such as transistors, diodes, capacitors, resistors, etc., may be formed in and / or on the semiconductor substrate 301 and may be interconnected via interconnect structures to form an integrated circuit, the interconnect structures being formed, for example, through metallization patterns in one or more dielectric layers above the semiconductor substrate 301. A die connector 303 (e.g., a copper pillar) of RFIC 300 is formed on the front side of RFIC 300 and provides electrical connection to the circuitry of RFIC 300.

[0032] For reference only Figure 1D , Figure 1D The illustration shows a functional block diagram of the RFIC 300 in an embodiment. Note that, for simplicity, not all functional blocks of the RFIC 300 are shown. Figure 1D The image is shown in the middle. Figure 1DIn the example, RFIC 300 includes a baseband module 311, an RF module 313, a Tx module 315, and an Rx module 317. Baseband module 311 is designed to perform digital baseband processing functions, such as digital filtering, equalization, and digital resampling. RF module 313 is designed to process RF signals and perform RF-related functions, such as modulating or demodulating RF signals. RF module 313 may include RF-related components such as mixers and oscillators. Depending on the design of RFIC 300, analog-to-digital converters (ADCs) and / or digital-to-analog converters (DACs) may be formed in RF module 313 or baseband module 311. Tx module 315 is designed to perform functions related to transmitting RF signals and may include electrical components such as power amplifiers. Rx module 3157 is designed to perform functions related to receiving RF signals and may include electrical components such as analog filters and low-noise amplifiers. RFIC 300 is electrically coupled to external circuitry via die connector 303. Figure 1D Also illustrated is an RF terminal 303R (e.g., a die connector for a Tx or Rx module), electrically coupled to a Tx module 315 and / or an Rx module 317. In some embodiments, the RFIC 300 includes a Tx module 315 but not an Rx module 317. In other embodiments, the RFIC 300 includes an Rx module 317 but not a Tx module 315. These and other variations are fully intended to be included within the scope of this disclosure.

[0033] Return to reference Figure 1C To attach the RFIC 300 to the substrate 100, one or more openings (e.g., through-holes) are formed in the cable 201 to expose at least a portion of the conductive features 104, and in some embodiments, die connectors 303 extend through the openings(s) to connect to the conductive features 104 (e.g., using a soldering process). In other words, the RFIC 300 is connected to the conductive features 104 of the substrate(s) via flexible circuitry. In the illustrated example, some die connectors (e.g., RF terminals 303R) of the die connectors 303 are coupled to conductive features (e.g., vias 103V) ​​exposed at the lower surface of the substrate 100. In embodiments where conductive features 104 are not formed, openings extending through portions of the cable 201, solder resist layer 105, and dielectric layer 101 may be formed to expose some conductive features 103 of the substrate 100, and an electroplating process may be performed to fill the openings with a conductive material to form vias. The RFIC 300 can then be bonded to the vias using, for example, solder. In addition to the method of attaching RFIC 300 to substrate 100 described above, other methods are also possible and are fully intended to be included within the scope of this disclosure.

[0034] exist Figure 1C In one example, the RF terminal 303R of the RFIC 300, configured to transmit or receive RF signals, is electrically coupled to conductive features (e.g., 103V and 103L) of the substrate 100. In an embodiment where the antenna 103A is a transmitting antenna, the RF signal generated by the RFIC 300 is electrically coupled to the conductive feature 103L through the via 103V and the RF terminal 303R. The conductive feature 103L radiates the RF signal, which travels through the opening 106 and is electromagnetically coupled to the antenna 103A. The RF signal is then transmitted by the antenna 103A. In an embodiment where the antenna 103A is a receiving antenna, the antenna 103A picks up the RF signal (e.g., via electromagnetic coupling), and the received RF signal is then electromagnetically coupled to the RF terminal 303R, for example, through the opening 106 and the conductive features 103L / 103V.

[0035] Note that in Figure 1C In the example, the electrical connection between the RFIC 300 and external circuitry (such as another PCB or other electrical component) is achieved via connector 203 of the flexible circuitry 200. Connector 203 may have multiple connection pins, multiple conductive pads, etc., to provide electrical connections for multiple signals. Because the flexible circuitry 200 is used for the electrical connection between the RFIC 300 and external circuitry, there is no need to form multiple external connectors (e.g., solder bumps, conductive pillars) on the lower surface of the substrate 100. This advantageously reduces the height of the AiP device 500A, which allows the AiP device 500A to be used in applications where the height of the available AiP device is limited (see [reference]). Figure 5A , Figure 5B , Figure 6A and Figure 6B (and related discussions below).

[0036] Figures 2A to 2C The illustration shows cross-sectional views of an AiP device 500B with embedded flexible circuitry 200 at various manufacturing stages according to an embodiment. The formation process of the AiP device 500B is similar to that of the AiP device 500A, but... Figure 2A The substrate 100 in the middle does not have any conductive features exposed at the lower surface of the substrate 100 (e.g., Figure 1A (104 in the middle). In addition, Figure 2A The substrate 100 in the middle has no solder resist layer 105 on its lower surface.

[0037] refer to Figure 2AThe flexible circuit 200 is attached to the substrate 100 using a dielectric-dielectric bonding process. The high temperature and high pressure of the dielectric-dielectric bonding process bond the dielectric material of the flexible circuit 200 (e.g., polyimide) to the dielectric material of the substrate 100 (e.g., braided glass-reinforced hydrocarbon / ceramic or PTFE), thereby bonding the flexible circuit 200 to the substrate 100.

[0038] Next, in Figure 2B In this process, openings (e.g., through-holes) are formed in the flexible circuit 200 using processes such as laser drilling or etching. The openings extend through the flexible circuit 200 and a portion of the dielectric layer 101 of the substrate 100 to expose some conductive features (e.g., 130L) of the conductive features 130 of the substrate 100. Next, an electroplating process (e.g., electroplating or electroless plating) is performed to fill the openings with a conductive material (e.g., copper) to form conductive features, such as vias 205. In some embodiments, the openings are formed to extend through conductive regions (e.g., copper regions) of the flexible circuit 200, so that vias 205 are electrically coupled to the flexible circuit 200 once formed. In some embodiments, the openings are formed in regions of the flexible circuit 200 without conductive features, so vias 205 extend through dielectric regions (e.g., polyimide regions) of the cable 201. Next, an optional solder resist layer 105 may be formed on the lower surface of the flexible circuit 200 (see [link to documentation]). Figure 2C ).

[0039] Next, in Figure 2C In this embodiment, the RFIC 300 is attached to the lower surface of the substrate 100 to form an AiP device 500B with embedded flexible circuitry. To attach the RFIC 300, an opening is formed extending through the solder resist layer 105 (if formed) to expose a via 205. The opening may also partially extend through the dielectric material of the flexible circuitry 200 to expose conductive features of the flexible circuitry 200. In some embodiments, die connectors 303 / 303R of the RFIC 300 extend through the opening and are bonded (e.g., using solder) to the via 205 and / or the exposed conductive features of the flexible circuitry 200.

[0040] Figures 3A to 3C The illustration shows cross-sectional views of an AiP device 500C with embedded flexible circuitry 200 at various manufacturing stages according to an embodiment. The formation process of AiP device 500C is similar to that of AiP device 500B, but... Figure 3A The substrate 100 includes an upper portion 100U and a lower portion 100L. The flexible circuit 200 is stacked between the upper portion 100U and the lower portion 100L.

[0041] like Figure 3AAs shown, the upper surface of the flexible circuit 200 is attached to the lower surface 100S1 of the upper portion 100U of the substrate 100, and the lower surface of the flexible circuit 200 is attached to the upper surface 100S2 of the lower portion 100L. Depending on whether conductive features are exposed at the lower surface 100S1 or the upper surface 100S2, the flexible circuit 200 can be attached to the upper portion 100U and the lower portion 100L using any suitable method similar to the process discussed above for AiP devices 500A and 500B, such as direct metal-to-metal bonding, dielectric-to-dielectric bonding, conductive paste, conductive adhesive, etc. Although not illustrated, similar to the process discussed above for AiP device 500B, a drilling process can be performed to form openings in the upper portion 100U and / or the lower portion 100L, and an electroplating process can be performed to fill the openings with a conductive material (e.g., copper) to form conductive features in the upper portion 100U and / or the lower portion 100L for electrical connection with the flexible circuit 200.

[0042] Figure 3B The diagram shows the completion. Figure 3A The substrate 100 after processing, featuring embedded flexible circuitry 200. For example... Figure 3B As shown, the upper portion 100U and the lower portion 100L are bonded together to form a single substrate 100, in which a flexible circuit 200 is stacked. The flexible circuit 200 is electrically coupled to the substrate 100 and can serve as an intermediate metal layer of the substrate 100.

[0043] Next, in Figure 3C In this configuration, the RFIC 300 is attached to the lower surface of the substrate 100 and electrically coupled to the substrate 100 and the flexible circuit 200, thereby forming an AiP device 500C. The RFIC 300 can be attached by forming an opening in the solder resist layer 105 to expose the conductive features 103 of the substrate 100 and bonding the die connectors 303 / 303R of the RFIC 300 to the exposed conductive features 103.

[0044] Figures 4A to 4D Various views (e.g., cross-sectional view, top view) of an AiP device 500D with embedded flexible circuitry according to an embodiment are illustrated. The formation process of AiP device 500D is similar to that of AiP device 500B, but the flexible circuitry 200 is attached to the upper surface of substrate 100.

[0045] exist Figure 4A In this configuration, antenna 103A is located on the upper surface of substrate 100. Flexible circuit 200 is attached to the upper surface of substrate 100 using any suitable method (e.g., the methods discussed above for AiP devices 500A, 500B and 500C).

[0046] Figure 4B A substrate 100 with the flexible circuit 200 attached is shown. After attachment, the flexible circuit 200 is electrically coupled to the substrate 100. Next, a solder resist layer 105 is formed above the upper surface of the flexible circuit 200. In other embodiments, the solder resist layer 105 is omitted.

[0047] Next, in Figure 4C In this context, RFIC 300 uses any appropriate method (such as those described above for...) Figure 3C The AiP device 500D is formed by mechanically and electrically coupling the AiP device 500D to the lower surface of the substrate 100 using the process described in AiP device 500C. RFIC 300 is also electrically coupled to flexible circuit 200 through the metal layer of substrate 100.

[0048] Figure 4D The diagram illustrates along Figure 4C A top view of the AiP device 500D with cross-section AA shown. For simplicity, not all features of the AiP device 500D are shown. Figure 4D As shown, the flexible circuit 200 has an opening 202 that exposes the base antenna 103A. In other words, there is no metal region disposed above (e.g., directly above) the antenna 103A in the flexible circuit 200, allowing RF signals to be transmitted and / or received through the antenna 103A without obstruction or attenuation. Note that in other embodiments (such as AiP devices 500A, 500B, or 500C), this may be omitted. Figure 4D The opening 202 in the flexible circuit 200, because in those embodiments, the flexible circuit 200 is positioned between the antenna 103A and the RFIC 300, therefore will not interfere with the transmission and / or reception of RF signals through the antenna 103A. For example, in Figure 1C In this configuration, antenna 103A is formed in the topmost metal layer of substrate 100 (e.g., the metal layer furthest from RFIC 300), while flexible circuit 200 is close to the bottommost metal layer of substrate 100 (e.g., the metal layer closest to RFIC 300). Figure 4D The diagram also illustrates conductive features 215 (e.g., copper wires, vias) formed in the flexible circuit 200, which are connected to the connector 203 (see Figure 203). Figure 4C It is also used to make electrical connections between the RFIC 300 and another PCB board or other electrical components.

[0049] Figure 5AThis is a cross-sectional view illustrating the electrical connection between an embodiment of the embodiment-in-package (AiP) device 500 (e.g., 500A, 500B, 500C, or 500D) and another electrical component within an electronic device 400. Electronic device 400 may be a mobile phone, tablet computer, laptop computer, speaker, home assistant device, television, etc. For simplicity, not all features of electronic device 400 and AiP device 500 are shown. Figure 5A The illustrated embodiment shows that the electronic device 400 is a mobile phone, which has a front side 401 (e.g., with an LCD display), a back side 403, and a bezel 405 between the front side 401 and the back side 403. Figure 5A The diagram also illustrates electrical components 411 and 413 (e.g., a PCB) inside the electronic device 400. Figure 5A In the example, the connector 203 of the flexible circuit 200 of the AiP device 500 is a surface mount connector and is connected to the electrical component 413 using, for example, a soldering process. The flexible circuit 200 enables flexibility in selecting the location of the AiP device 500 within the electronic device 400.

[0050] Figure 5B This is a cross-sectional view illustrating the electrical connection between an embodiment-packaged antenna (AiP) device 500 (e.g., 500A, 500B, 500C, or 500D) and another electrical component inside an electronic device 400 in another embodiment. Figure 5B Implementation examples and Figure 5A The implementation is similar, but Figure 5B The connector 203 of the flexible circuit 200 of the AiP device 500 is a plug-in connector. Therefore, the connector 203 is connected to the electrical component 413 via an electrical socket.

[0051] Figure 6A This is a cross-sectional view illustrating the location of an embodiment-packaged antenna (AiP) device 500 (e.g., 500A, 500B, 500C, or 500D) within an electronic device 400 in one embodiment. Figure 6A As shown, the flexible circuit 200 allows the AiP device 500 to be located anywhere suitable within the electronic device 400. As mobile phones become increasingly thinner, fitting packages such as AiP devices inside the phone becomes increasingly difficult. Figure 6A In the example, the flexible circuit 200 allows the AiP device 500 to be placed in a corner area near the frame 405 of the phone, which provides more space for the AiP device 500. Additionally, the AiP device 500 can be placed at an angle relative to the phone. For example, the upper surface 500U of the AiP device 500 can form an angle of approximately 45 degrees with the front side 401 of the electronic device 400.

[0052] Figure 6B The illustration shows a cross-sectional view of the location of an embodiment-packaged antenna (AiP) device 500 (e.g., 500A, 500B, 500C, or 500D) within an electronic device 400 in another embodiment. Figure 6B In the example, the upper surface 500U of the AiP device 500 forms a 90-degree angle with the front side 401 of the electronic device 400. Other angles and positions of the AiP device 500 within the mobile device are also possible and are fully intended to be included within the scope of this disclosure. The flexibility in the position of the AiP device 500 provided by the disclosed structure of the AiP device 500 makes it easier to adapt the AiP device 500 to various mobile devices.

[0053] Figure 7 A flowchart illustrating a method 1000 for forming an electrical device according to some embodiments is shown. It should be understood that... Figure 7 The illustrated embodiments are merely examples of many possible embodiments. Those skilled in the art will recognize many variations, alternatives, and modifications. For example, additions, removals, substitutions, rearrangements, and repetitions may be made. Figure 7 The steps are illustrated in the diagram.

[0054] Method 1000 can be used to manufacture various AiP devices with embedded flexible circuitry, such as AiP devices 500A, 500B, 500C, or 500D. (See reference...) Figure 7 At step 1010, a first portion of the flexible circuit is attached to a first surface (e.g., an upper or lower surface) of a first substrate, wherein the first substrate includes an antenna in a first metal layer of the first substrate, and wherein, after attachment, a second portion of the flexible circuit extends beyond the lateral extent of the first substrate. At step 1020, a radio frequency integrated circuit (RFIC) (e.g., 300) is bonded to a first surface of the first substrate or to a second surface of the first substrate opposite to the first surface, wherein, after bonding, the RFIC is electrically coupled to the first substrate and the flexible circuit.

[0055] The embodiments can achieve advantages. For example, the various embodiments disclosed herein form different AiP devices with embedded flexible circuitry. Electrical connections between the AiP device and external electrical components are achieved through connectors in the flexible circuitry, eliminating the need to form large external connectors, such as solder bumps or conductive pillars, on the AiP device. This reduces the height of the formed AiP device, allowing it to be adapted to small mobile devices. Furthermore, the flexible circuitry embedded in the AiP device provides flexibility in selecting the location of the AiP device within the mobile device, allowing it to be adapted to even smaller mobile devices. Further, the flexible circuitry 200 is designed for easy integration with the substrate 100 without negatively impacting RF performance. For example, the opening 202 in the flexible circuitry 200 (see...) Figure 4D It allows RF signals to be transmitted and / or received through antenna 103A without being attenuated or blocked by flexible circuitry.

[0056] Embodiments of the present invention are summarized herein. Other embodiments may be understood from the description and claims as a whole.

[0057] Example 1. In an embodiment, a semiconductor device includes: a substrate including an antenna and conductive features; an integrated circuit (IC) die attached to the substrate and including radio frequency (RF) circuitry; and a flexible circuit integrated with the substrate, wherein the flexible circuit is electrically coupled to the IC die and the substrate, a first portion of the flexible circuit is disposed between opposing sidewalls of the substrate, a second portion of the flexible circuit extends beyond the opposing sidewalls of the substrate, and the second portion of the flexible circuit includes an electrical connector at a distal end.

[0058] Example 2. The semiconductor device of Example 1, wherein a first portion of the flexible circuit extends parallel to a first side of the substrate and is in physical contact with the substrate.

[0059] Example 3. A semiconductor device of Example 1, wherein a substrate includes a bottom metal layer facing an IC die, wherein a first portion of a flexible circuit is disposed between the bottom metal layer of the substrate and the IC die.

[0060] Example 4. The semiconductor device of Example 1, wherein the substrate includes a bottom metal layer facing the IC die and a top metal layer facing away from the IC die, wherein a first portion of the flexible circuit is disposed between the top metal layer and the bottom metal layer.

[0061] Example 5. The semiconductor device of Example 1, wherein the substrate includes a topmost metal layer facing away from the IC die, wherein the topmost metal layer is disposed between the flexible circuit and the IC die.

[0062] Example 6. The semiconductor device of Example 5, wherein a first portion of the flexible circuit has an opening through which an antenna of the substrate is exposed.

[0063] Example 7. A semiconductor device of Example 1, wherein an IC die has an RF terminal configured to transmit or receive RF signals, wherein a conductive feature of a substrate is electrically coupled to the RF terminal of the IC die.

[0064] Example 8. The semiconductor device of Example 7, wherein the substrate further includes a ground plane between the antenna and the conductive feature, wherein the ground plane has an opening disposed between the antenna and the conductive feature.

[0065] Example 9. A semiconductor device of Example 1, wherein the substrate includes a first solder resist layer at a first side of the substrate and a second solder resist layer at a second side of the substrate opposite to the first side, wherein a first portion of a flexible circuit is disposed between the first solder resist layer and the second solder resist layer.

[0066] Example 10. The semiconductor device of Example 1 further includes a conductive via that extends through the flexible circuit and electrically couples the flexible circuit to a conductive line of the substrate.

[0067] Example 11. A semiconductor device comprising: an integrated circuit (IC) including radio frequency (RF) circuitry and RF terminals configured to transmit or receive RF signals; a substrate including an antenna proximate to a first side of the substrate, the first side facing away from the IC, and the substrate including a conductive feature proximate to a second side of the substrate facing the IC, wherein the IC is attached to the second side of the substrate and an RF terminal of the IC is electrically coupled to the conductive feature of the substrate; and a flexible circuit attached to the substrate, wherein the flexible circuit is electrically coupled to the IC and the substrate, wherein a first segment of the flexible circuit is disposed within a lateral region of the substrate, and a second segment of the flexible circuit is disposed outside the lateral region of the substrate, the second segment of the flexible circuit including an electrical connector.

[0068] Example 12. The semiconductor device of Example 11, wherein a first segment of the flexible circuit is disposed between the IC and a metal layer of the substrate.

[0069] Example 13. The semiconductor device of Example 11, wherein a metal layer of a substrate is disposed between a first segment of a flexible circuit and an IC.

[0070] Example 14. The semiconductor device of Example 11, wherein a first segment of the flexible circuit is disposed between the topmost metal layer and the bottommost metal layer of the substrate.

[0071] Example 15. The semiconductor device of Example 11, wherein the length of the second segment of the flexible circuit is between about 0.5 mm and about 10 mm.

[0072] Example 16. A method of forming an electrical device, comprising: attaching a first portion of a flexible circuit to a first substrate, wherein the first substrate includes an antenna in a first metal layer of the first substrate, wherein, after attachment, a second portion of the flexible circuit extends beyond a lateral extent of the first substrate, the second portion of the flexible circuit having an electrical connector at a distal end; and bonding a radio frequency integrated circuit (RFIC) to a first surface of the first substrate, wherein, after bonding, the RFIC is electrically coupled to the first substrate and the flexible circuit.

[0073] Example 17. The method of Example 16 further includes: attaching the first portion of the flexible circuit to the second substrate after attaching the first portion of the flexible circuit and before bonding the RFIC, such that the first portion of the flexible circuit is located between the first substrate and the second substrate.

[0074] Example 18. The method of Example 16, wherein bonding the RFIC includes: forming an opening in the flexible circuit to expose a conductive feature of the flexible circuit; and bonding a conductive post of the RFIC to a conductive feature of the flexible circuit.

[0075] Example 19. The method of Example 16, wherein bonding the RFIC includes: forming an opening in a first substrate to expose a conductive feature of the first substrate; and bonding a conductive pillar of the RFIC to the conductive feature of the first substrate.

[0076] Example 20. The method of Example 16, wherein attaching a first portion of a flexible circuit includes: attaching the first portion of the flexible circuit to a second surface of a first substrate, the second surface being opposite to the first surface, wherein after attachment, a metal layer of the first substrate is located between the flexible circuit and the RFIC.

[0077] Although the invention has been described with reference to illustrative embodiments, this description is not intended to be limiting. Various modifications and combinations of exemplary embodiments, as well as other embodiments of the invention, will be apparent to those skilled in the art from the description. Therefore, it is intended that the appended claims cover any such modifications or embodiments.

Claims

1. A semiconductor device comprising: a substrate comprising an antenna and a conductive feature; an integrated circuit (IC) die attached to the substrate and comprising radio frequency (RF) circuitry; and a flexible circuit integrated with the substrate, wherein the substrate comprises a topmost metal layer facing away from the IC die, wherein the topmost metal layer is disposed between the flexible circuit and the IC die, wherein the flexible circuit is electrically coupled to the IC die and the substrate, a first portion of the flexible circuit is disposed between opposing sidewalls of the substrate, a second portion of the flexible circuit extends beyond the opposing sidewalls of the substrate, the second portion of the flexible circuit comprises an electrical connector at a distal end, wherein the first portion of the flexible circuit has an opening, wherein the antenna of the substrate is exposed through the opening.

2. The semiconductor device of claim 1, wherein the first portion of the flexible circuit extends parallel to a first side of the substrate and physically contacts the substrate.

3. The semiconductor device of claim 1, wherein the IC die has an RF terminal configured to transmit or receive an RF signal, wherein the conductive feature of the substrate is electrically coupled to the RF terminal of the IC die.

4. The semiconductor device of claim 3, wherein the substrate further comprises a ground plane between the antenna and the conductive feature, wherein the ground plane has an opening disposed between the antenna and the conductive feature.

5. The semiconductor device of claim 1, wherein the substrate comprises a first solder resist layer at a first side of the substrate and a second solder resist layer at a second side of the substrate, the second side being opposite the first side, wherein the first portion of the flexible circuit is disposed between the first solder resist layer and the second solder resist layer.

6. A semiconductor device comprising: an integrated circuit (IC) comprising radio frequency (RF) circuitry and an RF terminal configured to transmit or receive an RF signal; a substrate comprising an antenna proximate to a first side of the substrate, the first side of the substrate facing away from the IC, and the substrate comprising a conductive feature proximate to a second side of the substrate, the second side of the substrate facing the IC, wherein the IC is attached to the second side of the substrate and the RF terminal of the IC is electrically coupled to the conductive feature of the substrate; and a flexible circuit attached to the substrate, wherein the flexible circuit is electrically coupled to the IC and the substrate, wherein a first segment of the flexible circuit is disposed within a lateral extent of the substrate and a second segment of the flexible circuit is disposed outside the lateral extent of the substrate, the second segment of the flexible circuit comprising an electrical connector, wherein the antenna is disposed between the flexible circuit and the IC, wherein the first segment of the flexible circuit has an opening, wherein the antenna is exposed through the opening.

7. The semiconductor device of claim 6, wherein a metal layer of the substrate is disposed between the first segment of the flexible circuit and the IC. ​ 8. The semiconductor device of claim 6, wherein the second segment of the flexible circuit has a length between 0.5 mm and 10 mm.

9. A method of forming an electrical device, the method comprising: attaching a first portion of a flexible circuit to a first substrate, wherein the first substrate includes an antenna in a first metal layer of the first substrate, wherein the first portion of the flexible circuit has an opening, wherein after the attaching, the antenna is exposed through the opening, wherein after the attaching, a second portion of the flexible circuit extends beyond a lateral extent of the first substrate, the second portion of the flexible circuit having an electrical connector at a distal end; and bonding a radio frequency integrated circuit (RFIC) to a first surface of the first substrate, wherein after the bonding, the RFIC is electrically coupled to the first substrate and the flexible circuit.

10. The method of claim 9, wherein bonding the RFIC comprises: forming an opening in the first substrate to expose a conductive feature of the first substrate; and bonding a conductive pillar of the RFIC with the conductive feature of the first substrate.

11. The method of claim 9, wherein attaching the first portion of the flexible circuit comprises: attaching the first portion of the flexible circuit to a second surface of the first substrate, the second surface opposite the first surface, wherein after the attaching, a metal layer of the first substrate is between the flexible circuit and the RFIC.

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