Display device and method of manufacturing a display device

Abstract

A display device and a method of manufacturing a display device are provided. The method of manufacturing a display device includes forming a first light emitting region on a substrate, and forming a first color adjustment pattern on the first light emitting region by emitting first light from the first light emitting region, wherein the first light emitting region includes a first semiconductor layer, a second semiconductor layer provided on the first semiconductor layer, a first active layer disposed between the first semiconductor layer and the second semiconductor layer, a first contact electrically connecting the substrate and the first semiconductor layer, and a first initial common electrode electrically connected to the second semiconductor layer.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a display device and a method of manufacturing the same. BACKGROUND

[0002] Liquid crystal displays (LCDs) and organic light emitting diode (OLED) displays are widely used as display devices. Recently, a technology of manufacturing a high-resolution display device using micro light emitting diodes (micro-LEDs) has attracted attention. However, a high-efficiency and small LED chip is required to manufacture a high-resolution display device using micro-LEDs, and a high level of transfer technology is required to arrange the small LED chip at a proper position. SUMMARY

[0003] A display device having improved durability and a method of manufacturing the same are provided.

[0004] A method of manufacturing a display device is provided, which provides improved yield.

[0005] Additional aspects will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following description, or can be learned by practice of the presented embodiments of the disclosure.

[0006] According to an aspect of the disclosure, a method of manufacturing a display device includes forming a first light emitting region on a support substrate, and forming a first color adjustment pattern on the first light emitting region by emitting first light from the first light emitting region, wherein forming the first light emitting region includes providing a first semiconductor layer, a first active layer, and a second semiconductor layer, the first active layer being between the first semiconductor layer and the second semiconductor layer, providing a first contact electrically connecting the support substrate and the first semiconductor layer, and providing a first initial common electrode electrically connected to the second semiconductor layer.

[0007] Forming the first light emitting region on the support substrate includes sequentially forming the second semiconductor layer, the first active layer, and the first semiconductor layer on a growth substrate, forming the first contact on the first semiconductor layer, forming the support substrate on the first contact, removing the growth substrate, and forming the first initial common electrode on a surface of the second semiconductor layer exposed by removing the growth substrate.

[0008] The support substrate can be directly bonded to the first contact.

[0009] The method can further include forming a bonding layer between the support substrate and the first contact, wherein the support substrate and the first contact are bonded to each other by the bonding layer.

[0010] The forming of the first color adjustment pattern can include: providing a first color adjustment material layer on the first active layer; curing a portion of the first color adjustment material layer by emitting first light to the first color adjustment material layer; and removing an uncured portion of the first color adjustment material layer.

[0011] The method can further include providing the first light extraction pattern on the upper surface of the second semiconductor layer.

[0012] The forming of the first light emitting region can further include forming a first initial driving transistor, wherein a source region of the first initial driving transistor is electrically connected to the first contact.

[0013] The method can further include forming a second light emitting region on the support substrate; and forming a second color adjustment pattern on the second light emitting region by emitting second light from the second light emitting region, wherein the forming of the second light emitting region can include: providing a third semiconductor layer; providing a fourth semiconductor layer on the third semiconductor layer; providing a second active layer between the third semiconductor layer and the fourth semiconductor layer; providing a second contact electrically connecting the support substrate and the third semiconductor layer; and providing a second initial common electrode electrically connected to the fourth semiconductor layer, wherein the first light emitting region and the second light emitting region are spaced apart from each other along a first direction parallel to the upper surface of the support substrate.

[0014] The emitting of the first light can include: applying a first voltage to the first initial common electrode; applying a second voltage different from the first voltage to the second initial common electrode; and applying a ground voltage to the support substrate, the first voltage having a greater magnitude than the second voltage.

[0015] The emitting of the second light can include: applying a third voltage to the first initial common electrode; applying a fourth voltage different from the third voltage to the second initial common electrode; and applying a ground voltage to the support substrate, the fourth voltage having a greater magnitude than the third voltage.

[0016] The method can further include forming an isolation region between the first light emitting region and the second light emitting region, wherein the isolation region is formed by an ion implantation process.

[0017] The forming of the second color adjustment pattern can include: providing a second color adjustment material layer on the second light emitting region; curing a portion of the second color adjustment material layer by irradiating second light to the second color adjustment material layer; and removing an uncured portion of the second color adjustment material layer.

[0018] The method can further include forming a light-absorbing partition wall between the first color adjustment pattern and the second color adjustment pattern.

[0019] The method can further include forming a first reflective film between the light-absorbing partition wall and the first color adjustment pattern; and forming a second reflective film between the light-absorbing partition wall and the second color adjustment pattern.

[0020] The method can further include forming a third reflective film on an upper surface of the light-absorbing partition wall.

[0021] The method can further include forming an insulating partition wall between the first color adjustment pattern and the second color adjustment pattern; forming a first reflective film between the insulating partition wall and the first color adjustment pattern; and forming a second reflective film between the insulating partition wall and the second color adjustment pattern, wherein the insulating partition wall has a light-transmitting property.

[0022] The width of the insulating partition wall can decrease in a second direction perpendicular to the upper surface of the support substrate, and wherein the width of the insulating partition wall can be a dimension of the insulating partition wall along the first direction.

[0023] The width of the insulating partition wall can be constant, and wherein the width of the insulating partition wall can be a dimension of the insulating partition wall along the first direction.

[0024] The method can further include forming a first color filter on the first color adjustment pattern; and forming a second color filter on the second color adjustment pattern, wherein the first color filter allows first color light to pass, the second color filter allows second color light to pass, and the first color light is different from the second color light.

[0025] According to another aspect of the disclosure, there is provided a method of manufacturing a display device, the method including: forming a first semiconductor layer on a growth substrate; forming active patterns arranged along a first direction on the first semiconductor layer, the first direction being parallel to an upper surface of the first semiconductor layer; forming second semiconductor layers on the active patterns, respectively; forming one or more contacts on the second semiconductor layers, respectively; bonding a support substrate to the one or more contacts; removing the growth substrate; forming one or more initial common electrodes corresponding to the one or more active patterns, respectively, on a side of the active patterns opposite the second semiconductor layers; and forming color adjustment patterns on the active patterns, respectively, by emitting light from the active patterns.

[0026] The method can further include reducing a thickness of the first semiconductor layer by performing an etching process on the first semiconductor layer exposed by removing the growth substrate.

[0027] The method can further include patterning the first semiconductor layer to form light extraction patterns on the active patterns, respectively.

[0028] The method can further include forming openings exposing the first semiconductor layer in the initial common electrodes, respectively.

[0029] The removing of the growth substrate can include performing a polishing process and a dry etching process on the growth substrate, wherein the growth substrate includes silicon (Si).

[0030] The removing of the growth substrate can include performing a lift-off process on the growth substrate using a laser, wherein the growth substrate includes sapphire.

[0031] Among the color adjustment patterns, the color adjustment patterns emitting light having different colors can be formed at different times.

[0032] According to another aspect of the disclosure, there is provided a method of manufacturing a display device, the method including: forming first, second, and third contacts on a substrate, the first, second, and third contacts being arranged in a first direction parallel to an upper surface of the substrate; forming first, second, and third light emitting patterns on the first, second, and third contacts, respectively; forming first and second initial common electrodes on the first and second light emitting patterns, respectively; forming a first color adjustment pattern on the first light emitting pattern by emitting first light from the first light emitting pattern; and forming a second color adjustment pattern on the second light emitting pattern by emitting second light from the second light emitting pattern, wherein each of the first, second, and third light emitting patterns includes a first semiconductor layer, a second semiconductor layer, and an active layer provided between the first and second semiconductor layers.

[0033] The forming of the first color adjustment pattern and the forming of the second color adjustment pattern can be performed at different times.

[0034] The method can further include forming an insulating pattern on the third light emitting pattern; and forming a reflective film between the insulating pattern and the first color adjustment pattern and between the insulating pattern and the second color adjustment pattern, respectively, wherein the first color adjustment pattern, the second color adjustment pattern, and the insulating pattern are arranged in the first direction.

[0035] The method can further include forming an insulating film on the first color adjustment pattern, the second color adjustment pattern, the insulating pattern, and the reflective film, wherein the insulating film and the insulating pattern form a single structure.

[0036] The method can further include forming a dummy initial common electrode on the third light emitting pattern, wherein a voltage is not applied to the dummy initial common electrode.

[0037] The method can further include forming a third initial common electrode on the third light emitting pattern; and forming a third color adjustment pattern on the third light emitting pattern by emitting third light from the third light emitting pattern.

[0038] The method can further include forming a conductive pad on the third initial common electrode; and forming a via electrically connecting the conductive pad and the third initial common electrode.

[0039] According to another aspect of the disclosure, a display device is provided, including: first, second, and third drive transistors provided on a substrate; first, second, and third light emitting patterns each corresponding to one of the first to third drive transistors; first and second common electrodes each corresponding to one of the first and second light emitting patterns; first and second color adjustment patterns each corresponding to one of the first and second common electrodes; and a first contact configured to electrically connect the first drive transistor to the first light emitting pattern, a second contact configured to electrically connect the second drive transistor to the second light emitting pattern, and a third contact configured to electrically connect the third drive transistor to the third light emitting pattern, wherein the first to third light emitting patterns are controlled by the first to third drive transistors, respectively, and wherein each of the first to third light emitting patterns includes a first semiconductor layer, a second semiconductor layer, and an active layer provided between the first and second semiconductor layers.

[0040] The display device can further include: a first reflective electrode provided between the first light emitting pattern and the first contact; a second reflective electrode provided between the second light emitting pattern and the second contact; and a third reflective electrode provided between the third light emitting pattern and the third contact, wherein the reflective electrodes reflect light generated in the active layer and emitted toward lower portions of the first to third light emitting patterns.

[0041] The display device can further include first, second, and third light extraction patterns provided on the first, second, and third light emitting patterns, respectively.

[0042] Each of the first and second common electrodes can extend in a first direction parallel to an upper surface of the substrate, the first light emitting pattern and the first common electrode overlap each other in a second direction perpendicular to the upper surface of the substrate, and the second light emitting pattern and the second common electrode overlap each other in the second direction.

[0043] The first common electrode can have a first opening exposing the first light emitting pattern, and the second common electrode can have a second opening exposing the second light emitting pattern.

[0044] The display device can further include a dummy common electrode provided on the third light emitting pattern, wherein the dummy common electrode is not electrically connected.

[0045] The display device can further include a third common electrode provided on the third light emitting pattern, a third color adjustment pattern provided on the third common electrode, a conductive pad provided on the third common electrode, and a via electrically connecting the third common electrode and the conductive pad.

[0046] The first light emitting pattern, the second light emitting pattern, and the third light emitting pattern can be provided on a first layer above the first to third driving transistors, the first common electrode and the second common electrode can be provided on a second layer above the first light emitting pattern and the second light emitting pattern, and the first color adjustment pattern and the second color adjustment pattern can be provided on a third layer above the first common electrode and the second common electrode.

[0047] According to another aspect of the disclosure, a display device is provided, including a support substrate, a first light emitting area on the support substrate, the first light emitting area including a first semiconductor layer provided on the support substrate, an active layer provided on the first semiconductor layer, a second semiconductor layer provided on the active layer, a contact electrically connecting the support substrate and the first semiconductor layer, and a first initial common electrode provided on the second semiconductor layer, the first initial common electrode configured to be electrically connected to the second semiconductor layer, and a first color adjustment pattern formed on the first light emitting area. BRIEF DESCRIPTION OF DRAWINGS

[0048] The above and other aspects, features, and advantages of certain example embodiments of the disclosure will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0049] Figure 1 is a conceptual diagram illustrating a display device according to an example embodiment;

[0050] Figure 2 is a circuit diagram illustrating a display device according to an example embodiment;

[0051] Figures 3 to 20 A method of manufacturing a display device 11 according to an example embodiment is illustrated. For example, Figures 3 to 10 and Figures 12 to 20 are cross-sectional views for describing a method of manufacturing a display device according to an example embodiment, Figure 11 is a plan view for describing a method of manufacturing a display device according to an example embodiment;

[0052] Figure 21 is a plan view for describing a method of manufacturing a display device according to an example embodiment;

[0053] Figure 22 and Figure 23 are cross-sectional views for describing a method of manufacturing a display device according to an example embodiment;

[0054] Figure 24 is a plan view for describing a method of manufacturing a display device according to an example embodiment;

[0055] Figure 25 and Figure 26 is a sectional view for describing a method of manufacturing a display device according to an example embodiment;

[0056] Figures 27 to 35 is a sectional view for describing a method of manufacturing a display device according to an example embodiment; and

[0057] Figure 36 is a sectional view for describing a method of manufacturing a display device according to an example embodiment. DETAILED DESCRIPTION

[0058] Reference will now be made in detail embodiments, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, the example embodiments can have different forms and should not be construed as being limited to the description given herein. Rather, the embodiments are provided as illustrative examples so as to explain aspects. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of," when preceding a list of two or more items, cover also any combination of one or more of the items, but do not cover combinations involving at least one, but not all, of the items.

[0059] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. In the drawings, like reference numerals refer to the same elements throughout, and the size of elements can be exaggerated for clarity. The following embodiments are examples only and various modifications can be made thereto.

[0060] When an element is referred to as being "on" another element, it can be directly on the other element or an intervening element can also be present.

[0061] Unless otherwise defined, the singular forms of terms can include the plural forms. When a part "includes" or "comprises" some elements, unless otherwise noted, the part can further include other elements.

[0062] The term "... unit" or the like indicates a unit for processing at least one function or operation and can be implemented as hardware or software or a combination thereof.

[0063] Figure 1 is a conceptual diagram illustrating a display device 1 according to an example embodiment. Figure 2 is a circuit diagram illustrating a display device 1 according to an example embodiment.

[0064] Referring to Figure 1 and Figure 2The display device 1 can include a display area DA and a non-display area NDA. The display area DA, which is an area for displaying an image, can be referred to as a display portion. The display area DA can include pixels P for displaying an image. Each pixel P can include a sub-pixel SP, which emits a different color, to be described later. Also, each sub-pixel SP can include a driving transistor, a capacitor, and a light emitting area.

[0065] The display device 1 can include a display 2, a scan driver 3, a data driver 4, and a processor 5. According to an embodiment, the display 2 can be a display panel Figure 1 as illustrated in DA. That is, the display 2 can be disposed in the display area DA of the display device 1, and the scan driver 3, the data driver 4, and the processor 5 can be disposed in the non-display area NDA of the display device 1.

[0066] The display 2 can include scan lines SL for transmitting scan signals, data lines DL for transmitting data signals in response to the scan signals from the scan lines SL, and sub-pixels SP corresponding to the data lines DL and the scan lines SL. The scan lines SL and the data lines DL receive signals from the scan driver 3 and the data driver 4 disposed in the non-display area, and thus the scan lines SL and the data lines DL can extend to the non-display area NDA as illustrated in Figure 1

[0067] Figure 2 It is illustrated that the scan lines SL extend in a direction X and the data lines DL extend in a direction Y crossing the direction X, but embodiments are not limited thereto. For example, the extension directions of the data lines DL and the scan lines SL can be exchanged with each other.

[0068] Figures 3 to 20 A method of manufacturing a display device 11 according to an example embodiment is illustrated. For example, Figures 3 to 10 and Figures 12 to 20 are cross-sectional views for describing a method of manufacturing a display device 11 according to an example embodiment. Figure 11 is a plan view for describing a method of manufacturing a display device 11 according to an example embodiment. Further, Figures 3 to 6 the viewing angle of Figures 7 to 10 and Figures 12 to 19 are vertically opposite to the viewing angle of Figures 3 to 6 the second direction of Figures 7 to 10 and Figures 12 to 19 are defined as being opposite to each other.

[0069] Referring to Figure 3 ​The first buffer layer 210 can be formed on the growth substrate 21 in a direction DR2. For example, the growth substrate 21 can be a mother substrate for growing the first semiconductor layer 220, and the growth substrate 21 can be a silicon (Si) substrate or a sapphire substrate.

[0070] Forming the first buffer layer 210 can include, for example, performing a chemical vapor deposition (CVD) process, a physical vapor deposition (PVD) process, or an atomic layer deposition (ALD) process. The first buffer layer 210 can reduce a lattice constant difference between the growth substrate 21 and the first semiconductor layer 220, which will be described later. For example, a lattice constant of the first buffer layer 210 can have a value between a lattice constant of the first semiconductor layer 220 and a lattice constant of the substrate 21. The first buffer layer 210 can include a III-V compound semiconductor having a first conductivity type. For example, the first buffer layer 210 can include n-type GaN or n-type AlN / AlGaN.

[0071] The first semiconductor layer 220 can be formed on the first buffer layer 210. Forming the first semiconductor layer 220 can include, for example, performing a CVD process, a PVD process, or an ALD process. The first semiconductor layer 220 can include a III-V compound semiconductor having a first conductivity type. For example, the first semiconductor layer 220 can include n-type GaN.

[0072] According to an example embodiment, the active layer 230 can be formed on the first semiconductor layer 220. Forming the active layer 230 can include, for example, performing a CVD process, a PVD process, or an ALD process. The active layer 230 can generate light by receiving electrons and holes provided from the first semiconductor layer 220 and the second semiconductor layer 240, which will be described later. The active layer 230 can include a single quantum well (SQW), a multiple quantum well (MQW), a superlattice (SL), or a combination thereof. For example, the active layer 230 can include In x Ga 1-x N / GaN (0 ≤ x < 1).

[0073] According to an example embodiment, the second semiconductor layer 240 can be formed on the active layer 230. Forming the second semiconductor layer 240 can include, for example, performing a CVD process, a PVD process, or an ALD process. The second semiconductor layer 240 can include a III-V compound semiconductor having a second conductivity type different from the first conductivity type. For example, the second semiconductor layer 240 can include p-type GaN.

[0074] Referring to Figure 4The isolation pattern 250 can be formed in the second semiconductor layer 240 and the active layer 230. The formation of the isolation pattern 250 can include injecting impurities into the second semiconductor layer 240 and the active layer 230 by performing an ion implantation process. For example, the impurities can include elemental argon (Ar). The isolation pattern 250 can have an electrically insulating property. The isolation pattern 250 can be arranged along a first direction DR1 parallel to the upper surface of the growth substrate 21. The isolation pattern 250 can define the active pattern 232 and the second semiconductor pattern 242. According to an example embodiment, the active pattern 232 and the second semiconductor pattern 242 that are adjacent to each other can be sequentially stacked between the isolation patterns 250.

[0075] Referring to Figure 5 The passivation pattern 260 can be formed on the isolation pattern 250, respectively. The formation of the passivation pattern 260 can include forming a passivation film extending along surfaces of the second semiconductor pattern 242 and the isolation pattern 250, and exposing the second semiconductor pattern 242 by patterning the passivation film. The formation of the passivation film can include, for example, performing a CVD process, a PVD process, or an ALD process. The passivation film can include an insulating material. For example, the passivation film can include SiO2, Al2O3, SiN, AlN, or a combination thereof. Patterning the passivation film can include etching the passivation film using an etching mask provided on the passivation film. The etching mask can be removed during a process of etching the passivation film or after the etching process ends.

[0076] The reflective electrode 270 can be formed on the second semiconductor pattern 242, respectively. The formation of the reflective electrode 270 can include forming a reflective electrode film extending along surfaces of the second semiconductor pattern 242 and the passivation pattern 260, and exposing the passivation pattern 260 by patterning the reflective electrode film. The formation of the reflective electrode film can include, for example, performing a CVD process, a PVD process, or an ALD process. The reflective electrode film can reflect light. The reflective electrode film can include a p-type electrode material. For example, the reflective electrode film can include at least one of silver (Ag), aluminum (Al), indium (In), titanium (Ti), nickel (Ni), copper (Cu), chromium (Cr), gold (Au), palladium (Pd), tungsten (W), or platinum (Pt).

[0077] Patterning the reflective electrode film can include etching the reflective electrode film using an etching mask provided on the reflective electrode film. The etching mask can be removed during a process of etching the reflective electrode film or after the etching process ends. An end portion of the reflective electrode 270 can be provided on the passivation pattern 260. An end portion of the passivation pattern 260 can be provided between the end portion of the reflective electrode 270 and the isolation pattern 250.

[0078] According to an example embodiment, a first insulating layer 280 can be formed on the reflective electrode 270 and the passivation pattern 260. The formation of the first insulating layer 280 can include, for example, performing a CVD process, a PVD process, or an ALD process. The first insulating layer 280 can extend along the first direction DR1. The first insulating layer 280 can cover the reflective electrode 270 and the passivation pattern 260. The first insulating layer 280 can include SiO2, Al2O3, SiN, AlN, or a combination including one or more of SiO2, Al2O3, SiN, or AlN.

[0079] Referring to Figure 6 A second buffer layer 290 can be formed on the first insulating layer 280. The formation of the second buffer layer 290 can include, for example, performing a CVD process, a PVD process, or an ALD process. The second buffer layer 290 can include an insulating material. For example, the buffer layer 290 can include SiO2, Al2O3, SiN, AlN, or a combination including one or more of SiO2, Al2O3, SiN, or AlN.

[0080] According to an example embodiment, a contact CT can be formed that penetrates the second buffer layer 290 and the first insulating layer 280. The contact CT can be electrically connected to and respectively connected to the reflective electrode 270. For example, the contact CT can directly contact the reflective electrode 270, respectively. The formation of the contact CT can include forming an opening that penetrates the second buffer layer 290 and the first insulating layer 280 to expose the reflective electrode 270, and providing a conductive material in the opening. Although the conductive material provided in the opening is shown as completely filling the opening, this is merely an example. In another example, the conductive material can extend along the surfaces of the first insulating layer 280 and the second buffer layer 290 exposed by the opening, and can not completely fill the opening. An upper portion of the contact CT can be exposed on the second buffer layer 290.

[0081] According to an example embodiment, a semiconductor pattern 330 can be formed on the second buffer layer 290. Each semiconductor pattern 330 can include a source region S, a drain region D, and a channel region C. The formation of the semiconductor pattern 330 can include forming an amorphous semiconductor pattern on the second buffer layer 290, and irradiating both end portions of each amorphous semiconductor pattern with a laser to crystallize both end portions. For example, the amorphous semiconductor pattern can include amorphous silicon. The two crystallized end portions can be defined as the source region S and the drain region D, respectively. A portion between the two end portions of the semiconductor pattern 330 can be amorphous. The amorphous portion can be defined as the channel region C. The semiconductor pattern 330 can be provided on the isolation pattern 250. In other words, the semiconductor pattern 330 can overlap the isolation pattern 250 along a second direction DR2 perpendicular to the upper surface of the growth substrate 21.

[0082] According to an example embodiment, a second insulating layer 310 can be formed on the semiconductor pattern 330, the second buffer layer 290, and the contact CT. The formation of the second insulating layer 310 can include, for example, performing a CVD process, a PVD process, or an ALD process. The second insulating layer 310 can extend along the first direction DR1. The second insulating layer 310 can include SiO2, Al2O3, SiN, AlN, or a combination including one or more of SiO2, Al2O3, SiN, or AlN.

[0083] According to an example embodiment, a gate electrode G can be formed on the second insulating layer 310. The formation of the gate electrode G can include forming a gate electrode film extending along the second insulating layer 310, and patterning the gate electrode film. The formation of the gate electrode film can include, for example, performing a CVD process, a PVD process, or an ALD process. The gate electrode film can include a conductive material. According to an example embodiment, the conductive material can be a metal. The patterning of the gate electrode film can include etching the gate electrode film using an etching mask provided on the gate electrode film. The etching mask can be removed during the process of etching the gate electrode film or after the etching process ends. The gate electrode G can be respectively provided over the channel regions C. The gate electrode G can be provided opposite the channel regions C with respect to the second insulating layer 310. The gate electrode G can overlap the channel regions C along the second direction DR2.

[0084] According to an example embodiment, a third insulating layer 320 can be formed on the gate electrode G and the second insulating layer 310. The formation of the third insulating layer 320 can include, for example, performing a CVD process, a PVD process, or an ALD process. The third insulating layer 320 can extend along the first direction DR1. The third insulating layer 320 can include SiO2, Al2O3, SiN, AlN, or a combination thereof.

[0085] According to an example embodiment, a drain vertical line DVL can be formed penetrating the second insulating layer 310 and the third insulating layer 320. The drain vertical line DVL can include a conductive material. According to an example embodiment, the conductive material can be a metal. The formation of the drain vertical line DVL can include forming an opening penetrating the second insulating layer 310 and the third insulating layer 320 to expose the drain regions D, and providing the conductive material in the opening. Although the conductive material provided in the opening is illustrated as completely filling the opening, this is merely an example. In another example, the conductive material can extend along surfaces of the second insulating layer 310 and the third insulating layer 320 exposed by the opening, and can not completely fill the opening. The drain vertical line DVL can be electrically connected and respectively connected to the drain regions D. For example, the drain vertical line DVL can respectively directly contact the drain regions D.

[0086] According to an example embodiment, drain horizontal lines DHL can be formed on the drain vertical lines DVL, respectively. The drain horizontal lines DHL can be formed together with the drain vertical lines DVL when the drain vertical lines DVL are formed. For example, when the conductive material is provided in the openings for forming the drain vertical lines DVL, the conductive material can be provided on the upper surface of the third insulating layer 320. The conductive material provided on the upper surface of the third insulating layer 320 and directly contacting the drain vertical lines DVL can be defined as the drain horizontal lines DHL. The drain regions D can be electrically connected to the source regions S through the drain vertical lines DVL and the drain horizontal lines DHL. Figure 1 and Figure 2 The data driver 4 (shown) is described. Figure 2

[0087] According to an example embodiment, the source vertical lines SVL and the contact vertical lines CVL can be formed penetrating the second insulating layer 310 and the third insulating layer 320. The source vertical lines SVL and the contact vertical lines CVL can be formed together when the drain vertical lines DVL are formed. The source vertical lines SVL and the contact vertical lines CVL can include a conductive material. According to an example embodiment, the conductive material can be a metal. The formation of the source vertical lines SVL and the contact vertical lines CVL can include forming openings penetrating the second insulating layer 310 and the third insulating layer 320 to expose the source regions S and the contacts CT, and providing the conductive material in the openings. Although the conductive material provided in the openings is shown as completely filling the openings, this is merely an example. In another example, the conductive material can extend along the surfaces of the second insulating layer 310 and the third insulating layer 320 exposed by the openings, and can not completely fill the openings. The source vertical lines SVL can be electrically connected to and connected to the source regions S, respectively. For example, the source vertical lines SVL can directly contact the source regions S, respectively. The contact vertical lines CVL can be electrically connected to and connected to the contacts CT, respectively. For example, the contact vertical lines CVL can directly contact the contacts CT, respectively.

[0088] According to an example embodiment, source horizontal lines SHL can be formed on the source vertical lines SVL, respectively. The source horizontal lines SHL can be formed together with the source vertical lines SVL when the source vertical lines SVL are formed. For example, when the conductive material is provided in the openings for forming the source vertical lines SVL, the conductive material can be provided on the upper surface of the third insulating layer 320. The conductive material provided on the upper surface of the third insulating layer 320 and directly contacting the source vertical lines SVL can be defined as the source horizontal lines SHL.

[0089] ​The source horizontal lines SHL can extend along the first direction DR1 to the contact vertical lines CVL. Each source horizontal line SHL can electrically connect the source vertical lines SVL and the contact vertical lines CVL next to each other. For example, each source horizontal line SHL can directly contact the source vertical lines SVL and the contact vertical lines CVL next to each other.

[0090] The channel region C, the source region S, the drain region D, and the gate electrode G can define an initial driving transistor. When the display device 11 is driven, the initial driving transistor can control a light emitting operation of the active pattern 232 next to the initial driving transistor.

[0091] Referring to Figure 7 , the growth substrate 21 can be located at the highest position, and the drain horizontal lines DHL and the source horizontal lines SHL can be located at the lowest position, which is flipped compared to the illustration of Figure 6 For convenience, the second direction DR2 is assumed to be opposite to the second direction DR2 of Figures 3 to 6 According to an example embodiment, a first sub-pixel region SP1, a second sub-pixel region SP2, and a third sub-pixel region SP3 arranged along the first direction DR1 can be defined. The initial driving transistor and the active pattern 232 can be provided in each of the first to third sub-pixel regions SP1 to SP3.

[0092] According to an example embodiment, a substrate 100 can be formed under the third insulating layer 320, the drain horizontal lines DHL, and the source horizontal lines SHL. In an example, the substrate 100 can be directly bonded to the third insulating layer 320, the drain horizontal lines DHL, and the source horizontal lines SHL. In another example, a bonding layer can be provided between the substrate 100 and the third insulating layer 320, the drain horizontal lines DHL, and the source horizontal lines SHL to fix the substrate 100 on the third insulating layer 320, the drain horizontal lines DHL, and the source horizontal lines SHL. For example, the substrate 100 can be a silicon substrate or a glass substrate.

[0093] Referring to Figure 8 , the growth substrate 21 can be removed. In the case where the growth substrate 21 is a silicon substrate, removing the growth substrate 21 can include performing a polishing process and an etching process. For example, the etching process can be a dry etching process. In the case where the growth substrate 21 is a sapphire substrate, removing the growth substrate 21 can include performing a laser lift-off process. As the growth substrate 21 is removed, the first buffer layer 210 can be exposed.

[0094] After the process of removing the growth substrate 21 is performed, an etching process can be performed on the first buffer layer 210 and the first semiconductor layer 220. By the etching process, an upper portion of the first semiconductor layer 220 and the first buffer layer 210 can be removed. Accordingly, a thickness of the first semiconductor layer 220 can be reduced. The thickness of the first semiconductor layer 220 can be a size of the first semiconductor layer 220 along the second direction DR2.

[0095] Referring to Figure 9 , a light extraction pattern 410 can be formed on the first semiconductor layer 220. In an example embodiment, the light extraction pattern 410 can be formed by the etching process described with reference to Figure 8 In this case, the light extraction pattern 410 can form a single structure with the first semiconductor layer 220. The light extraction pattern 410 can be provided to each of the first sub-pixel area SP1, the second sub-pixel area SP2, and the third sub-pixel area SP3. The light extraction pattern 410 can be arranged along the first direction DR1. The light extraction pattern 410 can protrude from an upper surface of the first semiconductor layer 220. The light extraction pattern 410 can be formed on the active pattern 232, respectively. The light extraction pattern 410 can overlap the active pattern 232 along the second direction DR2. The light extraction pattern 410 can improve light extraction efficiency.

[0096] Referring to Figure 10 and Figure 11 , an initial common electrode 420 can be formed on the first semiconductor layer 220. The initial common electrode 420 can be a common electrode to which a same voltage is applied when the display apparatus 11 is driven. The formation of the initial common electrode 420 can include forming an initial common electrode film on the first semiconductor layer 220 and patterning the initial common electrode film. The formation of the initial common electrode film can include, for example, performing a CVD process, a PVD process, or an ALD process. The initial common electrode film can include a conductive material. The initial common electrode film can include an opaque metal or a transparent conductive material. The patterning of the initial common electrode film can include etching the initial common electrode film using an etching mask provided on the initial common electrode film. The etching mask can be removed during a process of etching the initial common electrode film or after the etching process ends.

[0097] The initial common electrode 420 can be provided to each of the first sub-pixel area SP1, the second sub-pixel area SP2, and the third sub-pixel area SP3. As Figure 11 indicated, the initial common electrode 420 can extend parallel to an upper surface of the substrate 100 along a third direction DR3 crossing the first direction DR1. According to an embodiment, the initial common electrode 420 can have an opening OP. As Figure 11As illustrated, the first pad P1, the second pad P2, and the third pad P3 can be provided outside the first sub-pixel area SP1, the second sub-pixel area SP2, and the third sub-pixel area SP3. The first pad P1, the second pad P2, and the third pad P3 can electrically connect the initial common electrode 420 to a controller outside the first sub-pixel area SP1, the second sub-pixel area SP2, and the third sub-pixel area SP3.

[0098] The initial common electrode 420 in the first sub-pixel area SP1 can extend outside the first sub-pixel area SP1 along the third direction DR3, thereby being electrically connected to the first pad P1. The initial common electrode 420 in the third sub-pixel area SP3 can extend outside the third sub-pixel area SP3 along a direction opposite to the third direction DR3, thereby being electrically connected to the third pad P3. The initial common electrode 420 in the second sub-pixel area SP2 can be electrically connected to the second pad P2 through a via V. The via V can extend in the second direction DR2. The second pad P2 can be disposed at a higher position than the initial common electrode 420. The second pad P2 can overlap the initial common electrode 420 in the second sub-pixel area SP2 along the second direction DR2. In the processes of forming the first to third color adjustment patterns described below, different voltages can be applied to the initial common electrodes 420 in the first sub-pixel area SP1, the second sub-pixel area SP2, and the third sub-pixel area SP3.

[0099] Referring to Figure 12 A planarization layer 430 can be formed on the initial common electrode 420 and the light extraction pattern 410. The formation of the planarization layer 430 can include, for example, performing a CVD process, a PVD process, or an ALD process. The planarization layer 430 can include an electrically conductive material. For example, the planarization layer 430 can include SiO2, Al2O3, SiN, AlN, or a combination including one or more of SiO2, Al2O3, SiN, or AlN. Although an upper surface of the planarization layer 430 is illustrated as being located at a higher position than an upper surface of the initial common electrode 420 and an upper end of the light extraction pattern 410, this is merely an example. In other example embodiments, the planarization layer 430 can be flush with the upper surface of the initial common electrode 420 and the upper end of the light extraction pattern 410. According to an example embodiment, the planarization layer 430 can be formed in the opening OP of the initial common electrode 420.

[0100] According to an example embodiment, the light-absorbing separation wall 510 can be formed on the planarization layer 430. The formation of the light-absorbing separation wall 510 can include forming a light-absorbing film on the planarization layer 430 and patterning the light-absorbing film. The formation of the light-absorbing film can include, for example, performing a CVD process, a PVD process, or an ALD process. The patterning of the light-absorbing film can include etching the light-absorbing film using an etching mask provided on the light-absorbing film. The etching process described above can be performed until the planarization layer 430 is exposed. The etching mask can be removed during the process of etching the light-absorbing film or after the etching process ends. The light-absorbing separation wall 510 can be respectively provided above the isolation patterns 250. The light-absorbing separation wall 510 can overlap the isolation patterns 250 along the second direction DR2. The light-absorbing separation wall 510 can prevent crosstalk between the sub-pixel regions SP1 to SP3.

[0101] According to an example embodiment, the reflective film 520 can be formed on the light-absorbing separation wall 510 and the planarization layer 430. The formation of the reflective film 520 can include, for example, performing a CVD process, a PVD process, or an ALD process. The reflective film 520 can reflect light. For example, the reflective film 520 can include at least one of silver (Ag), aluminum (Al), indium (In), titanium (Ti), nickel (Ni), copper (Cu), chromium (Cr), gold (Au), palladium (Pd), tungsten (W), or platinum (Pt). The reflective film 520 can extend conformally on the light-absorbing separation wall 510 and the planarization layer 430.

[0102] Referring to Figure 13 , the reflective pattern 522 can be formed on the side surfaces of the light-absorbing separation wall 510. The formation of the reflective pattern 522 can include exposing the upper surface of the planarization layer 430 and the upper surface of the light-absorbing separation wall 510 by performing an anisotropic etching process on the reflective film. In another example, the reflective film on the upper surface of the light-absorbing separation wall 510 can not be removed. In other words, the reflective pattern 522 can be provided on the two side surfaces of the light-absorbing separation wall 510 and the upper surface therebetween.

[0103] Referring to Figure 14 , the first color adjustment material layer 610 can be formed on the planarization layer 430, the light-absorbing separation wall 510, and the reflective pattern 522. The formation of the first color adjustment material layer 610 can include, for example, performing a spin coating process or a spray coating process. The first color adjustment material layer 610 can fill the regions between the light-absorbing separation wall 510 in the first to third sub-pixel regions SP1 to SP3.

[0104] The first color adjustment material layer 610 can include quantum dots (QDs) or phosphors excited by blue light to emit red light. The quantum dots can have a core-shell structure with a core portion and a shell portion, or can have a particle structure without a shell. The core-shell structure can have a single shell or a multi-shell. For example, the multi-shell can be a double shell. In an example embodiment, the quantum dots can include at least one of a II-VI compound semiconductor, a III-V compound semiconductor, a IV-VI compound semiconductor, a IV semiconductor, or graphene quantum dots. For example, the quantum dots can include at least one of Cd, Se, Zn, S, or InP, but are not limited thereto. The quantum dots can have a diameter of several tens of nanometers or less. For example, the diameter of the quantum dots can be about 10 nm or less. The first color adjustment material layer 610 can include a photoresist and a light scattering agent.

[0105] The first light L1 emitted from the active pattern 232 in the first sub-pixel area SP1 can be irradiated to the first color adjustment material layer 610. Irradiating the first light L1 can include applying a first voltage to the initial common electrode 420 of the first sub-pixel area SP1, applying a second voltage lower than the first voltage to at least one of the initial common electrode 420 in the second sub-pixel area SP2 or the initial common electrode 420 in the third sub-pixel area SP3, and applying a ground voltage to the substrate 100. In an example, the first voltage can be from about 5 V to about 6 V, and the second voltage can be from about -3.5 V to about 3 V. For example, the first light L1 can be blue light. The first color adjustment material layer 610 can be cured by the first light L1.

[0106] Referring to Figure 15 The first color adjustment pattern 612 can be formed between the pair of light-absorbing partition walls 510 in the first sub-pixel area SP1. The formation of the first color adjustment pattern 612 can include removing uncured portions of the first color adjustment material layer 610. For example, removing the uncured portions can include performing a developing process. In an example embodiment, the first color adjustment pattern 612 can receive blue light to emit red light.

[0107] The first color adjustment pattern 612 can be formed by irradiating the first light L1 to the first color adjustment material layer 610 under the first color adjustment material layer 610. Accordingly, the first color adjustment pattern 612 can be stably formed between the pair of light-absorbing partition walls 510.

[0108] Referring to Figure 16The second color adjustment material layer 620 can be formed on the planarization layer 430, the light absorbing partition wall 510, the reflection pattern 522, and the first color adjustment pattern 612. The formation of the second color adjustment material layer 620 can include, for example, performing a spin coating process or a spray coating process. The second color adjustment material layer 620 can fill regions between the light absorbing partition walls 510 in the second and third sub-pixel regions SP2 and SP3. The second color adjustment material layer 620 can include a photoresist and a light scattering agent. The second light L2 emitted from the active pattern 232 in the second sub-pixel region SP2 can be irradiated to the second color adjustment material layer 620.

[0109] Irradiating the second light L2 can include applying a third voltage to the initial common electrode 420 in the second sub-pixel region SP2, applying a fourth voltage lower than the third voltage to at least one of the initial common electrode 420 in the first sub-pixel region SP1 or the initial common electrode 420 in the third sub-pixel region SP3, and applying a ground voltage to the substrate 100. In an example, the third voltage can be from about 5 V to about 6 V, and the fourth voltage can be from about -3.5 V to about 3 V. For example, the second light L2 can be blue light. The second color adjustment material layer 620 can be cured by the second light L2.

[0110] Referring to Figure 17 The second color adjustment pattern 622 can be formed between the pair of light absorbing partition walls 510 in the second sub-pixel region SP2. The formation of the second color adjustment pattern 622 can include removing uncured portions of the second color adjustment material layer 620. For example, removing the uncured portions can include performing a developing process. In an example embodiment, the second color adjustment pattern 622 can receive blue light to emit blue light.

[0111] The second color adjustment pattern 622 can be formed by irradiating the second light L2 to the second color adjustment material layer 620 under the second color adjustment material layer 620. Accordingly, the second color adjustment pattern 622 can be stably formed between the pair of light absorbing partition walls 510.

[0112] Referring to Figure 18The third color adjustment material layer 630 can be formed on the planarization layer 430, the light absorbing partition wall 510, the reflection pattern 522, the first color adjustment pattern 612, and the second color adjustment pattern 622. The formation of the third color adjustment material layer 630 can include, for example, performing a spin coating process or a spray coating process. The third color adjustment material layer 630 can fill a region between the light absorbing partition walls 510 in the third sub-pixel region SP3. The third color adjustment material layer 630 can include quantum dots (QDs) or phosphors that are excited by blue light to emit green light. The third color adjustment material layer 630 can include a photoresist and a light scattering agent. Third light L3 emitted from the active pattern 232 in the third sub-pixel region SP3 can be irradiated to the third color adjustment material layer 630. Irradiating the third light L3 can include applying a fifth voltage to the initial common electrode 420 in the third sub-pixel region SP3, applying a sixth voltage lower than the fifth voltage to at least one of the initial common electrode 420 in the first sub-pixel region SP1 or the initial common electrode 420 in the second sub-pixel region SP2, and applying a ground voltage to the substrate 100. In an example, the fifth voltage can be from about 5 V to about 6 V, and the sixth voltage can be from about -3.5 V to about 3 V. For example, the third light L3 can be blue light. The third color adjustment material layer 630 can be cured by the third light L3.

[0113] Referring to Figure 19 The third color adjustment pattern 632 can be formed between the pair of light absorbing partition walls 510 in the third sub-pixel region SP3. The formation of the third color adjustment pattern 632 can include removing an uncured portion of the third color adjustment material layer 630. For example, removing the uncured portion can include performing a developing process. In an example embodiment, the third color adjustment pattern 632 can receive blue light to emit green light.

[0114] The third color adjustment pattern 632 can be formed by irradiating the third light L3 to the third color adjustment material layer 630 under the third color adjustment material layer 630. Accordingly, the third color adjustment pattern 632 can be stably formed between the pair of light absorbing partition walls 510.

[0115] Referring to Figure 20 The fourth insulating layer 710 can be formed on the light absorbing partition wall 510, the reflection pattern 522, the first color adjustment pattern 612, the second color adjustment pattern 622, and the third color adjustment pattern 632. The formation of the fourth insulating layer 710 can include, for example, performing a CVD process, a PVD process, or an ALD process. The fourth insulating layer 710 can extend along the first direction DR1. The fourth insulating layer 710 can include SiO2, Al2O3, SiN, AlN, or a combination thereof.

[0116] According to an example embodiment, an encapsulation layer 720 can be formed on the fourth insulating layer 710. The formation of the encapsulation layer 720 can include, for example, performing a CVD process, a PVD process, or an ALD process. The encapsulation layer 720 can include an insulating material. For example, the encapsulation layer 720 can include SiO2, Al2O3, SiN, AlN, or a combination thereof.

[0117] According to an example embodiment, a black matrix pattern 810 can be formed on the encapsulation layer 720. The black matrix pattern 810 can be respectively provided on the light-absorbing partition walls 510. The black matrix pattern 810 can overlap the light-absorbing partition walls 510 in the third direction DR3. The black matrix pattern 810 can absorb light. The black matrix pattern 810 can prevent a cross-talk phenomenon between the first to third sub-pixel regions SP1 to SP3.

[0118] According to an example embodiment, a first color filter 822 can be formed above the first color adjustment pattern 612. For example, the first color filter 822 can pass red light. In other words, the first color filter 822 can block light other than red light. Accordingly, the first sub-pixel region SP1 can emit red light to the outside of the display device 11.

[0119] According to an example embodiment, a second color filter 824 can be formed above the second color adjustment pattern 622. For example, the second color filter 824 can pass blue light. In other words, the second color filter 824 can block light other than blue light. Accordingly, the second sub-pixel region SP2 can emit blue light to the outside of the display device 11.

[0120] According to an example embodiment, a third color filter 826 can be formed above the third color adjustment pattern 632. For example, the third color filter 826 can pass green light. In other words, the third color filter 826 can block light other than green light. Accordingly, the third sub-pixel region SP3 can emit green light to the outside of the display device 11. Accordingly, the display device 11 can be formed.

[0121] An operation method of the display device 11 is described below. After a manufacturing process of the display device 11 is completed, the initial common electrode 420 can be referred to as a common electrode 420. A common voltage can be applied to the first to third pads P1 to P3 so as to apply the common voltage to the common electrode 420. Although a voltage, i.e., a ground voltage, can be applied to the substrate 100 during a manufacturing method of the display device 11, the voltage including the ground voltage can not be applied to the substrate 100.

[0122] The initial driving transistor can be referred to as a driving transistor. A drain region D of the driving transistor can be electrically connected to a data line DL extended from the data driver 4. Figure 2 The data line DL extended by the described data driver 4. A gate electrode G of the driving transistor can be electrically connected to a gate line GL extended from the gate driver 3.Figure 2 The scan driver 3 described extends the scan line SL.

[0123] When the scan driver 3 applies a scan signal to one scan line SL and the data driver 4 applies a data signal to one data line DL, light can be emitted from the active pattern 232 in one sub-pixel region including the gate electrode G electrically connected to the one scan line SL and the drain region D electrically connected to the one data line DL.

[0124] In the related method of manufacturing the display device, when light for curing the first to third color adjustment material layers 610, 620, and 630 is irradiated from above the first to third color adjustment material layers 610, 620, and 630 when forming the first to third color adjustment patterns 612, 622, and 632, the light can not reach lower portions of the first to third color adjustment material layers 610, 620, and 630. In this case, the lower portions of the first to third color adjustment material layers 610, 620, and 630 can not be cured. Accordingly, the first to third color adjustment patterns 612, 622, and 632 can not be stably formed between the light-absorbing partition walls 510. When the first to third color adjustment patterns 612, 622, and 632 are not stably formed, all or some of the first to third color adjustment patterns 612, 622, and 632 can be peeled or separated between the light-absorbing partition walls 510.

[0125] The method of manufacturing the display device 11 according to an embodiment can include forming the first to third color adjustment patterns 612, 622, and 632 by irradiating the first to third light L1 to L3 to the first to third color adjustment material layers 610, 620, and 630 below the first to third color adjustment material layers 610, 620, and 630. Since the first to third light L1 to L3 are first irradiated to lower portions of the first to third color adjustment material layers 610, 620, and 630, the lower portions of the first to third color adjustment material layers 610, 620, and 630 can be cured. Accordingly, the first to third color adjustment patterns 612, 622, and 632 can be stably formed between the light-absorbing partition walls 510. As a result, the defect rate of the manufacturing process of the display device 11 can be reduced, thus the yield can be improved, and the durability of the display device 11 can be improved.

[0126] Figure 21 is a plan view for describing a method of manufacturing a display device 12 according to an example embodiment. Figure 22 and Figure 23 is a cross-sectional view for describing a method of manufacturing a display device 12 according to an example embodiment. For brevity, the following can not provide descriptions substantially the same as those provided above with reference to Figures 3 to 20 .

[0127] Referring to Figure 21 In the display device 12, the initial common electrode 420 in the second sub-pixel region SP2 can not be electrically connected to another wire or pad. That is, the initial common electrode 420 in the second sub-pixel region SP2 can be a floating electrode. The display device 12 can not include a second pad. Accordingly, the active pattern 232 in the second sub-pixel region SP2 can not generate the second light during a manufacturing process of the display device 12.

[0128] Referring to Figure 22 The first color adjustment pattern 612 and the third color adjustment pattern 632 can be formed. Since the active pattern 232 in the second sub-pixel region SP2 does not generate the second light L2, the reference Figure 16 and Figure 17 described process of forming the second color adjustment pattern can not be performed.

[0129] Referring to Figure 23 The fourth insulating layer 710 can be formed on the light-absorbing partition wall 510, the reflection pattern 522, the first color adjustment pattern 612, and the third color adjustment pattern 632 in the second sub-pixel region SP2. Unlike the fourth insulating layer described with reference to Figure 20 The fourth insulating layer 710 can extend to the region between the light-absorbing partition walls 510 in the second sub-pixel region SP2. The fourth insulating layer 710 can fill the region between the light-absorbing partition walls 510 in the second sub-pixel region SP2. Accordingly, the light emitted from the active pattern 232 in the second sub-pixel region SP2 can pass through the fourth insulating layer 710 to reach the second color filter 824, without passing through the second color adjustment pattern (622) described with reference to Figure 17 Figure 17 .

[0130] The present disclosure can provide a method of manufacturing a display device 12 by which yield can be improved, and can provide a display device 12 having improved durability.

[0131] Figure 24 is a plan view for describing a method of manufacturing a display device 13 according to an example embodiment. Figure 25 and Figure 26 are cross-sectional views for describing a method of manufacturing a display device 13 according to an example embodiment. For brevity, the following can not provide substantially the same description as provided above with reference to Figures 3 to 20 .

[0132] Referring to Figure 24 The display device 13 can not include the initial common electrode (420) in the second sub-pixel region SP2 and the second pad (described with reference to Figure 10 and Figure 11 . Figure 10 Figure 11 .​​Figure 11 (P2 in the image). Therefore, during the manufacturing process of the display device 13, the active pattern 232 in the second sub-pixel region SP2 may not generate second light.

[0133] Reference Figure 25 The first color adjustment pattern 612 and the third color adjustment pattern 632 can be formed. Since the active pattern 232 in the second sub-pixel region SP2 does not generate the second light L2, the process of forming the second color adjustment pattern can be omitted.

[0134] Reference Figure 26 The fourth insulating layer 710 can be formed on the light-absorbing partition 510, the reflective pattern 522, the first color-adjusting pattern 612, and the third color-adjusting pattern 632. (Refer to reference...) Figure 20 Unlike the previously described fourth insulating layer, the fourth insulating layer 710 can extend into the region between the light-absorbing partitions 510 in the second sub-pixel region SP2. The fourth insulating layer 710 can fill the region between the light-absorbing partitions 510 in the second sub-pixel region SP2. Therefore, light emitted from the active pattern 232 in the second sub-pixel region SP2 can pass through the fourth insulating layer 710 to reach the second color filter 824 without passing through the reference. Figure 17 The second color adjustment pattern described ( Figure 17 (622 in the middle).

[0135] This disclosure provides a method for manufacturing a display device 13 that can increase production output and provides a display device 13 with improved durability.

[0136] Figures 27 to 35 This is a cross-sectional view used to describe a method of manufacturing a display device 14 according to an exemplary embodiment. For the sake of brevity, references to the above may not be provided below. Figures 3 to 20 The descriptions provided are essentially the same.

[0137] Reference Figure 27 The display device 14 may not include a reference. Figure 12 The light-absorbing partition wall described Figure 12 (510 in the middle).

[0138] The first color adjustment material layer 610 can be formed on the planarization layer 430. The formation of the first color adjustment material layer 610 may include, for example, performing a CVD process, a PVD process, or an ALD process.

[0139] The first light L1 can illuminate the first color adjustment material layer 610. Therefore, a portion of the first color adjustment material layer 610 can be cured. The first light L1 generated from the active pattern 232 in the first sub-pixel region SP1 can be compared with a reference. Figure 14 The descriptions are basically the same.

[0140] Referring to Figure 28 A first color adjustment pattern 612 can be formed. The formation of the first color adjustment pattern 612 can include removing another portion of the first color adjustment material layer 610 that is not cured. A width W1 of the first color adjustment pattern 612 can increase in the second direction DR2. The width W1 of the first color adjustment pattern 612 can be a dimension of the first color adjustment pattern 612 along the first direction DR1.

[0141] Referring to Figure 29 A second color adjustment material layer 620 can be formed on the planarization layer 430 and the first color adjustment pattern 612. The formation of the second color adjustment material layer 620 can include, for example, performing a CVD process, a PVD process, or an ALD process.

[0142] Second light L2 can be irradiated to the second color adjustment material layer 620. Accordingly, a portion of the second color adjustment material layer 620 can be cured. The generation of the second light L2 from the active pattern 232 in the second sub-pixel area SP2 can be substantially the same as described with reference to Figure 16 .

[0143] Referring to Figure 30 A second color adjustment pattern 622 can be formed. The formation of the second color adjustment pattern 622 can include removing another portion of the second color adjustment material layer 620 that is not cured. A width W2 of the second color adjustment pattern 622 can increase in the second direction DR2. The width W2 of the second color adjustment pattern 622 can be a dimension of the second color adjustment pattern 622 along the first direction DR1.

[0144] Referring to Figure 31 A third color adjustment material layer 630 can be formed on the planarization layer 430, the first color adjustment pattern 612, and the second color adjustment pattern 622. The formation of the third color adjustment material layer 630 can include, for example, performing a CVD process, a PVD process, or an ALD process.

[0145] Third light L3 can be irradiated to the third color adjustment material layer 630. Accordingly, a portion of the third color adjustment material layer 630 can be cured. The generation of the third light L3 from the active pattern 232 in the third sub-pixel area SP3 can be substantially the same as described with reference to Figure 18 .

[0146] Referring to Figure 32A third color adjustment pattern 632 can be formed. The formation of the third color adjustment pattern 632 can include removing another portion of the third color adjustment material layer 630 that is not cured. A width W3 of the third color adjustment pattern 632 can increase in the second direction DR2. The width W3 of the third color adjustment pattern 632 can be a dimension of the third color adjustment pattern 632 along the first direction DR1.

[0147] Referring to Figure 33 A reflective film 520 can be formed on the planarization layer 430, the first color adjustment pattern 612, the second color adjustment pattern 622, and the third color adjustment pattern 632. The formation of the reflective film 520 can include, for example, performing a CVD process, a PVD process, or an ALD process. For example, the reflective film 520 can include at least one of silver (Ag), aluminum (Al), indium (In), titanium (Ti), nickel (Ni), copper (Cu), chromium (Cr), gold (Au), palladium (Pd), tungsten (W), or platinum (Pt). The reflective film 520 can conformally cover the planarization layer 430, the first color adjustment pattern 612, the second color adjustment pattern 622, and the third color adjustment pattern 632.

[0148] Referring to Figure 34 A reflective pattern 522 can be formed on side surfaces of the first color adjustment pattern 612, the second color adjustment pattern 622, and the third color adjustment pattern 632. The formation of the reflective pattern 522 can include exposing upper surfaces of the first color adjustment pattern 612, the second color adjustment pattern 622, the third color adjustment pattern 632, and the planarization layer 430 by performing an anisotropic etching process on the reflective film 520.

[0149] Referring to Figure 35 A fourth insulating layer 710 can be formed on the planarization layer 430, the first color adjustment pattern 612, the second color adjustment pattern 622, the third color adjustment pattern 632, and the reflective pattern 522. The fourth insulating layer 710 can fill regions between the reflective pattern 522 to be formed as an insulating partition wall having light transmittance.

[0150] An encapsulation layer 720, a black matrix pattern 810, a first color filter 822, a second color filter 824, and a third color filter 826 can be formed on the fourth insulating layer 710. Accordingly, the display device 14 can be formed.

[0151] The present disclosure can provide a method of manufacturing a display device 14 by which yield can be improved, and provide a display device 14 having improved durability.

[0152] Figure 36is a cross-sectional view for describing a method of manufacturing the display device 15 according to an example embodiment. For brevity, the following can not provide descriptions of features that are substantially the same as those described above with reference to Figures 27 to 35 substantially the same descriptions are provided.

[0153] Referring to Figure 36 , the first to third color adjustment patterns described with reference to Figures 27 to 35 Unlike the first to third color adjustment patterns described above, each of the first color adjustment pattern 612, the second color adjustment pattern 622, and the third color adjustment pattern 632 can have a constant width W4. In other words, the side surfaces of the first color adjustment pattern 612, the second color adjustment pattern 622, and the third color adjustment pattern 632 can extend along the second direction DR2, while the width W4 of the first color adjustment pattern 612, the second color adjustment pattern 622, and the third color adjustment pattern 632 is not increased.

[0154] The present disclosure can provide a method of manufacturing a display device 15 by which yield can be improved, and can provide a display device 15 having improved durability.

[0155] One or more example embodiments of the present disclosure can provide a display device having improved durability.

[0156] One or more example embodiments of the present disclosure can provide a display device manufacturing method that provides improved yield.

[0157] It is to be understood, however, that the example embodiments described herein are to be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects in each of the example embodiments generally should be considered to extend to other similar features or aspects in other example embodiments. While one or more example embodiments have been described with reference to the attached drawings, it will be evident for those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the disclosure as defined by the following claims.

[0158] This application claims priority to Korean Patent Application No. 10-2019-0132388, filed on October 23, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.

Claims

1. A method for manufacturing a display device, the method comprising: A first light-emitting region and a second light-emitting region are formed on a supporting substrate; as well as A first color adjustment pattern is formed on the first light-emitting area by emitting first light from the first light-emitting area. The formation of the first light-emitting region includes: A first semiconductor layer, a first active layer, and a second semiconductor layer are provided, wherein the first active layer is located between the first semiconductor layer and the second semiconductor layer; Provide a first contact for electrically connecting the support substrate and the second semiconductor layer; and Provide a first initial common electrode electrically connected to the first semiconductor layer. The formation of the second light-emitting region includes: Provide a third semiconductor layer; A fourth semiconductor layer is provided on the third semiconductor layer; A second active layer is provided between the third semiconductor layer and the fourth semiconductor layer; Provide a second contact for electrically connecting the support substrate and the third semiconductor layer; and Provide a second initial common electrode electrically connected to the fourth semiconductor layer. The first semiconductor layer and the fourth semiconductor layer are different parts of a single semiconductor layer. When the first color adjustment pattern is formed, a first voltage is applied to the first initial common electrode, a second voltage is applied to the second initial common electrode, and a ground voltage is applied to the supporting substrate. Where the magnitude of the first voltage is greater than the magnitude of the second voltage, and When the display device is driven, a common voltage is applied to the first initial common electrode and the second initial common electrode.

2. The method according to claim 1, wherein, Forming the first light-emitting region on the supporting substrate includes: The first semiconductor layer, the first active layer, and the second semiconductor layer are sequentially formed on the growth substrate; The first contact is formed on the second semiconductor layer; The support substrate is formed on the first contact; Remove the growth substrate; and The first initial common electrode is formed on the surface of the first semiconductor layer exposed by removing the growth substrate.

3. The method according to claim 2, wherein, The support substrate is directly bonded to the first contact.

4. The method according to claim 2, further comprising: A bonding layer is formed between the support substrate and the first contact. The supporting substrate and the first contact are bonded to each other through the bonding layer.

5. The method according to claim 1, wherein, The formation of the first color adjustment pattern includes: A first color-adjusting material layer is provided on the first active layer; A portion of the first color-adjusting material layer is cured by emitting the first light onto the first color-adjusting material layer; and Remove the uncured portion of the first color-adjusting material layer.

6. The method according to claim 1, further comprising: A first light extraction pattern is provided on the upper surface of the first semiconductor layer.

7. The method according to claim 1, in, The formation of the first luminescent region further includes: Forming the first initial driving transistor, The source region of the first initial driving transistor is electrically connected to the first contact.

8. The method according to claim 1, further comprising: A second color adjustment pattern is formed on the second light-emitting area by emitting a second light from the second light-emitting area. The first light-emitting region and the second light-emitting region are spaced apart from each other along a first direction parallel to the upper surface of the supporting substrate.

9. The method according to claim 8, wherein, The emission of the second light includes: A third voltage is applied to the first initial common electrode; A fourth voltage, different from the third voltage, is applied to the second initial common electrode; and Apply a ground voltage to the support substrate. The magnitude of the fourth voltage is greater than the magnitude of the third voltage.

10. The method of claim 8, further comprising: An isolation region is formed between the first light-emitting region and the second light-emitting region; The isolation region is formed by ion implantation.

11. The method according to claim 8, in, The formation of the second color adjustment pattern includes: A second color-adjusting material layer is provided on the second light-emitting region; A portion of the second color-adjusting material layer is cured by irradiating the second color-adjusting material layer with the second light; and Remove the uncured portion of the second color-adjusting material layer.

12. The method of claim 8, further comprising forming a light-absorbing partition wall between the first color adjustment pattern and the second color adjustment pattern.

13. The method of claim 12, further comprising: A first reflective film is formed between the light-absorbing partition wall and the first color-adjusting pattern; as well as A second reflective film is formed between the light-absorbing partition wall and the second color-adjusting pattern.

14. The method of claim 13, further comprising forming a third reflective film on the upper surface of the light-absorbing partition wall.

15. The method of claim 8, further comprising: An insulating partition wall is formed between the first color adjustment pattern and the second color adjustment pattern; A first reflective film is formed between the insulating partition wall and the first color adjustment pattern; as well as A second reflective film is formed between the insulating partition wall and the second color adjustment pattern. The insulating partition wall is translucent.

16. The method according to claim 15, in, The width of the insulating partition wall decreases in a second direction perpendicular to the upper surface of the supporting substrate, and Wherein, the width of the insulating partition is the dimension of the insulating partition along the first direction.

17. The method according to claim 15, in, The width of the insulating partition wall is constant. Wherein, the width of the insulating partition is the dimension of the insulating partition along the first direction.

18. The method of claim 8, further comprising: A first color filter is formed on the first color adjustment pattern; as well as A second color filter is formed on the second color adjustment pattern. The first color filter allows light of a first color to pass through, and the second color filter allows light of a second color to pass through, wherein the first color light is different from the second color light.

19. A method of manufacturing a display device, the method comprising: A first semiconductor layer is formed on the growth substrate; An active pattern is formed on the first semiconductor layer along a first direction, the first direction being parallel to the upper surface of the first semiconductor layer; A second semiconductor layer is formed on the active pattern respectively; One or more contacts are formed on the second semiconductor layer; The support substrate is bonded to one or more contacts; Remove the growth substrate; One or more initial common electrodes, each corresponding to one or more active patterns, are formed on the side of the active pattern opposite to the second semiconductor layer. as well as Color adjustment patterns are formed on the active pattern by emitting light from the active pattern. The color adjustment pattern includes a first color adjustment pattern and a second color adjustment pattern, and the initial common electrode includes a first initial common electrode and a second initial common electrode. When the first color adjustment pattern is formed, a first voltage is applied to the first initial common electrode, a second voltage is applied to the second initial common electrode, and a ground voltage is applied to the supporting substrate. Where the magnitude of the first voltage is greater than the magnitude of the second voltage, and When the display device is driven, a common voltage is applied to the first initial common electrode and the second initial common electrode.

20. The method of claim 19, further comprising: The thickness of the first semiconductor layer is reduced by performing an etching process on the first semiconductor layer exposed by removing the growth substrate.

21. The method of claim 19, further comprising patterning the first semiconductor layer to form light extraction patterns on the active pattern, respectively.

22. The method of claim 19, further comprising forming openings in the initial common electrode, the openings exposing the first semiconductor layer.

23. The method according to claim 19, The removal of the growth substrate includes performing a polishing process and a dry etching process on the growth substrate. The growth substrate mentioned above includes silicon (Si).

24. The method according to claim 19, The removal of the growth substrate includes performing a peeling process on the growth substrate using a laser. The growth substrate mentioned above includes sapphire.

25. The method according to claim 19, wherein, In the color adjustment pattern, a color adjustment pattern that emits light of different colors is formed at different times.

26. A method of manufacturing a display device, the method comprising: A first contact, a second contact, and a third contact are formed on a substrate along a first direction parallel to the upper surface of the substrate. A first light-emitting pattern is formed on the first contact, a second light-emitting pattern is formed on the second contact, and a third light-emitting pattern is formed on the third contact; A first initial common electrode is formed on the first light-emitting pattern, and a second initial common electrode is formed on the second light-emitting pattern; A first color adjustment pattern is formed on the first luminescent pattern by emitting first light from the first luminescent pattern; as well as A second color-adjusting pattern is formed on the second luminescent pattern by emitting second light from the second luminescent pattern. Each of the first light-emitting pattern, the second light-emitting pattern, and the third light-emitting pattern includes a first semiconductor layer, a second semiconductor layer, and an active layer provided between the first semiconductor layer and the second semiconductor layer. The first contact electrically connects the substrate and the second semiconductor layer of the first light-emitting pattern, and the second contact electrically connects the substrate and the second semiconductor layer of the second light-emitting pattern. The first initial common electrode is electrically connected to the first semiconductor layer of the first light-emitting pattern, and the second initial common electrode is electrically connected to the first semiconductor layer of the second light-emitting pattern. The first semiconductor layer of the first light-emitting pattern and the first semiconductor layer of the second light-emitting pattern are different portions of a single semiconductor layer. When the first color adjustment pattern is formed, a first voltage is applied to the first initial common electrode, a second voltage is applied to the second initial common electrode, and a ground voltage is applied to the substrate. Where the magnitude of the first voltage is greater than the magnitude of the second voltage, and When the display device is driven, a common voltage is applied to the first initial common electrode and the second initial common electrode.

27. The method according to claim 26, wherein, The formation of the first color adjustment pattern and the formation of the second color adjustment pattern occur at different times.

28. The method of claim 26, further comprising: An insulating pattern is formed on the third luminescent pattern; as well as Reflective films are formed between the insulating pattern and the first color adjustment pattern, and between the insulating pattern and the second color adjustment pattern, respectively. The first color adjustment pattern, the second color adjustment pattern, and the insulation pattern are arranged in the first direction.

29. The method of claim 28, further comprising: An insulating film is formed on the first color adjustment pattern, the second color adjustment pattern, the insulating pattern, and the reflective film. The insulating film and the insulating pattern form a single structure.

30. The method of claim 26, further comprising: A dummy initial common electrode is formed on the third light-emitting pattern. The voltage is not applied to the dummy initial common electrode.

31. The method of claim 26, further comprising: A third initial common electrode is formed on the third light-emitting pattern; as well as A third color adjustment pattern is formed on the third luminescent pattern by emitting a third light from the third luminescent pattern.

32. The method of claim 31, further comprising: A conductive pad is formed on the third initial common electrode; as well as This forms a pathway that electrically connects the conductive pad and the third initial common electrode.

33. A display device, comprising: Support substrate; A first light-emitting region and a second light-emitting region on the supporting substrate, wherein the first light-emitting region includes: A second semiconductor layer is provided on the support substrate; An active layer is provided on the second semiconductor layer in the first light-emitting region; A first semiconductor layer is provided on the active layer in the first light-emitting region; Contact, electrically connecting the supporting substrate to the second semiconductor layer of the first light-emitting region; and A first common electrode is provided on the first semiconductor in the first light-emitting region, the first common electrode being configured to be electrically connected to the first semiconductor layer of the first light-emitting region; and A first color adjustment pattern is formed on the first light-emitting area. The second luminescent region includes: A third semiconductor layer is provided on the support substrate; A second active layer is provided on the third semiconductor layer in the second light-emitting region; A fourth semiconductor layer is provided on the second active layer in the second light-emitting region; The second contact electrically connects the supporting substrate to the third semiconductor layer of the second light-emitting region; and A second common electrode is provided on the fourth semiconductor in the second light-emitting region, and the second common electrode is configured to be electrically connected to the fourth semiconductor layer of the second light-emitting region. The first semiconductor layer and the fourth semiconductor layer are different parts of a single semiconductor layer. When the first color adjustment pattern is formed, a first voltage is applied to the first common electrode, a second voltage is applied to the second common electrode, and a ground voltage is applied to the supporting substrate. Where the magnitude of the first voltage is greater than the magnitude of the second voltage, and When the display device is driven, a common voltage is applied to the first common electrode and the second common electrode.

34. The display device according to claim 33, further comprising: A reflective electrode is provided between the first light-emitting region and the contact. The reflective electrode reflects the light generated in the active layer and emitted toward the lower part of the first light-emitting region.

35. The display device of claim 33, further comprising providing a light extraction pattern on the first light-emitting region.

36. The display device according to claim 33, in, The first common electrode extends along a first direction, which is parallel to the upper surface of the supporting substrate. The first light-emitting region and the first common electrode overlap each other along a second direction, which is perpendicular to the upper surface of the supporting substrate.

37. The display device according to claim 33, in, The first common electrode has an opening that exposes the first light-emitting region.

38. The display device according to claim 33, further comprising: A second color adjustment pattern is formed on the second light-emitting area.

39. The display device according to claim 38, further comprising: A third light-emitting region on the supporting substrate, the third light-emitting region comprising: A fifth semiconductor layer is provided on the support substrate; An active layer is provided on the fifth semiconductor layer in the third light-emitting region; A sixth semiconductor layer is provided on the active layer in the third light-emitting region; Contact, electrically connecting the supporting substrate to the fifth semiconductor layer of the third light-emitting region; and A dummy common electrode is provided on the sixth semiconductor in the third light-emitting region, wherein no voltage is applied to the dummy common electrode.

40. The display device according to claim 38, further comprising: A third light-emitting region on the supporting substrate, the third light-emitting region comprising: A fifth semiconductor layer is provided on the support substrate; An active layer is provided on the fifth semiconductor layer in the third light-emitting region; A sixth semiconductor layer is provided on the active layer in the third light-emitting region; The fifth semiconductor layer of the third light-emitting region is contacted and electrically connected to the supporting substrate; A third common electrode is provided on the sixth semiconductor in the third light-emitting region, the third common electrode being configured to be electrically connected to the sixth semiconductor layer of the third light-emitting region; and A third color adjustment pattern is formed on the third luminescent area.

41. The display device according to claim 38, further comprising: The third light-emitting region on the supporting substrate, A first driving transistor is provided between the supporting substrate and the first light-emitting region; A second driving transistor is provided between the supporting substrate and the second light-emitting region; as well as A third driving transistor is provided between the supporting substrate and the third light-emitting region. The first light-emitting region, the second light-emitting region, and the third light-emitting region are provided on a first layer above the first driving transistor and the third driving transistor. The first common electrode and the second common electrode are provided on a second layer above the first light-emitting region and the second light-emitting region, and The first color adjustment pattern and the second color adjustment pattern are provided on a third layer above the first common electrode and the second common electrode.

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