A combined power tube drive circuit, method and power supply device
By using a controlled current source and MOSFET channel current in the combined power transistor drive circuit to achieve slow turn-on and fast turn-off of the high-side power transistor, the latch-up effect caused by non-ideal diodes is solved, improving system reliability and reducing cost.
Patent Information
- Application Number
- CN201911013426.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-10-23
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2039-10-23
AI Technical Summary
In existing combined power transistor drive circuits, non-ideal diodes are prone to false triggering of latch-up effects, which can damage the chip. Furthermore, external diodes increase costs and reduce reliability.
A controlled current source is used to charge the gate capacitor of the high-side power transistor, and the high-side power transistor is rapidly discharged through the MOS transistor channel, so as to achieve slow turn-on and fast turn-off of the high-side power transistor and avoid latch-up effect.
This improved system reliability, prevented chip damage, and reduced costs.
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Figure CN112701885B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and more specifically to a combined power transistor driving circuit and method, as well as a power supply device employing the combined power transistor driving circuit or method. Background Technology
[0002] Figure 1 A current combined power transistor driver circuit includes a combined power transistor module with a high-side power transistor MH and a low-side power transistor ML connected in series. The module has a second terminal electrically coupled to ground, and a first terminal electrically coupled to the control terminal of the high-side power transistor MH via a resistor R1 and a diode D1. A power supply capacitor VCC (for convenience, the second terminal of the capacitor is named the same as the capacitor) is also connected to the control terminal. The control terminal of the low-side power transistor ML is coupled to the output terminal of a cascaded inverter low-side drive circuit. The input terminal of the low-side drive circuit is electrically coupled to a switching control signal PWM. In a typical configuration, the low-side power transistor ML is a low-voltage power transistor, and the high-side power transistor MH is a high-voltage power transistor. The input terminal (Drain) of the high-side power transistor is the external input terminal of the combined power transistor module, coupled to an external inductor or voltage source. The output terminal (Source) of the low-side power transistor is the output terminal of the combined power transistor module, coupled to an external load or inductor. The output terminal of the high-side power transistor MH is connected to the input terminal of the low-side power transistor ML.
[0003] When the switch control signal PWM is low, the control terminal signal of the low-side power transistor ML remains low, and the low-side power transistor ML is turned off. Since no current flows through diode D1 and resistor R1, the control terminal signal of the high-side power transistor MH remains at the voltage VCC on the VCC power supply capacitor. Since the low-side power transistor ML is turned off, the output voltage of the high-side power transistor MH is clamped to the VCC voltage by diode D2, and the high-side power transistor MH also remains turned off.
[0004] When the switching control signal PWM changes from low to high, the control signal of the low-side power transistor ML also changes from low to high, turning on the low-side power transistor ML. The input voltage of the low-side power transistor ML approaches its output voltage, and the VCC power supply capacitor charges the parasitic gate capacitance Cgs of the high-side power transistor MH through resistor R1. Due to the current-limiting effect of resistor R1, the charging current of the VCC capacitor to the gate capacitance Cgs is controlled by resistor R1, so the high-side power transistor MH will slowly turn on, ensuring that the high-side power transistor MH is more stable than the low-side power transistor MH. When the low-side power transistor ML turns on, its input terminal will not be subjected to high voltage, thus preventing damage. Conversely, if the high-side power transistor MH is driven without current limiting resistor R1, it may turn on before the low-side power transistor ML. The low-side power transistor will then be subjected to high voltage at its input terminal, which will cause damage since it is a low-voltage power transistor. During the high-side power transistor's turn-on process, the charge on the VCC power supply capacitor is transferred to the gate parasitic capacitance Cgs of the high-side power transistor through the charging current.
[0005] When the switching control signal PWM changes from high to low, the control signal of the low-side power transistor ML also changes from high to low, turning off ML. The input voltage of ML will rapidly increase and be clamped by diodes D2 and D1 to a potential two diode forward voltages higher than VCC. Simultaneously, the Vgs voltage of the high-side power transistor MH becomes negative, causing MH to quickly turn off. Since the discharge current of the high-side power transistor's Cgs capacitor flows through diode D1 without passing through resistor R1, the discharge speed is very fast, ensuring the rapid turn-off of MH and preventing damage to the low-side power transistor from the high voltage at its input. During the high-side power transistor's turn-off process, the charge of the gate parasitic capacitance Cgs is transferred back to the VCC power supply capacitor through the discharge current. Therefore, in this combined power transistor drive circuit, the charging and discharging of the high-side power transistor's gate capacitance Cgs does not result in any charge loss. This means that in this combined power transistor drive circuit, the high-side power transistor only experiences conduction losses and no switching losses. In practical applications, it can be ensured that the sum of the conduction loss and switching loss of the low-side power transistor ML is less than the switching loss of the high-side power transistor MH. Therefore, this combined power transistor drive circuit has been widely used in practice.
[0006] The drawback of existing combined power transistor drive circuits is that, in practical applications, it is difficult to realize ideal diodes, such as D1, on integrated circuit planar processes. Therefore, parasitic diodes, such as the parasitic drain / substrate diode of a MOSFET, must be used instead. These non-ideal diodes are very prone to falsely triggering the parasitic PNP transistor during forward conduction, causing latch-up and damaging the chip. For applications with higher power transistors, to prevent latch-up during forward conduction of diode D1, it is often placed externally to the chip. This increases the cost of the chip and reduces its reliability. Summary of the Invention
[0007] The present invention provides a combined power transistor driving circuit, a method, and a power supply device employing the combined power transistor driving circuit or method.
[0008] A combined power transistor driving circuit according to an embodiment of the present invention includes a power supply capacitor with a second terminal electrically coupled to ground, used to drive a combined power transistor module having a high-side power transistor and a low-side power transistor connected in series. The circuit includes: a high-side driving module having at least a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is electrically coupled to a switch control signal, the second input terminal is electrically coupled to a first terminal of the power supply capacitor, and the output terminal is electrically coupled to the high-side power transistor control terminal of the combined power transistor module; and a low-side driving module having at least an input terminal and an output terminal, wherein the input terminal is electrically coupled to the switch control signal, and the output terminal is electrically coupled to the low-side power transistor control terminal of the combined power transistor module; the switch control signal controls the combined power transistor module to turn on and off through the combined power transistor driving circuit.
[0009] According to an embodiment of the present invention, a combined power transistor driving circuit drives a combined power transistor module, comprising: a high-side power transistor having an input terminal, an output terminal, and a control terminal, wherein the input terminal is the external drain terminal of the combined power transistor module, and the control terminal is electrically coupled to the output terminal of the high-side driving module; and a low-side power transistor having an input terminal, an output terminal, and a control terminal, wherein the input terminal is electrically coupled to the output terminal of the high-side power transistor, the control terminal is electrically coupled to the output terminal of the low-side driving module, and the output terminal is the external source terminal of the combined power transistor module.
[0010] According to an embodiment of the present invention, a combined power transistor driving circuit, the high-side driving module includes: a turn-on control module having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is electrically coupled to a switch control signal, the second input terminal is electrically coupled to a first terminal of a power supply capacitor, and the output terminal is electrically coupled to a control terminal of the high-side power transistor; the turn-on control module, during the high level of the switch control signal, controls the charging of the parasitic gate capacitance of the high-side power transistor through a controlled current, thereby causing the high-side power transistor to turn on slowly; and a turn-off control module having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is electrically coupled to a switch control signal, the second input terminal is electrically coupled to a first terminal of the power supply capacitor, and the output terminal is electrically coupled to a control terminal of the high-side power transistor of the combined power transistor module; the turn-off control module, during the low level of the switch control signal, rapidly discharges the parasitic gate capacitance of the high-side power transistor through the channel current of a MOS transistor, thereby causing the high-side power transistor to turn off rapidly.
[0011] According to an embodiment of the present invention, a combined power transistor driving circuit includes a turn-on control module comprising: a switch control current source having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is electrically coupled to the switch control signal, the second input terminal is electrically coupled to the first terminal of the power supply capacitor, and the output terminal is electrically coupled to the control terminal of the high-side power transistor. During the high level of the switch control signal, the switch control current source outputs a controlled current to controllably charge the parasitic gate capacitance of the high-side power transistor, thereby causing the high-side power transistor to turn on slowly.
[0012] According to an embodiment of the present invention, a combined power transistor driving circuit includes a switch-controlled current source comprising: a first switch having an input terminal, an output terminal, and a control terminal, wherein the input terminal is electrically coupled to a first terminal of the power supply capacitor, and the control terminal is electrically coupled to a switch control signal; and a current source having an input terminal and an output terminal, wherein the input terminal is electrically coupled to the output terminal of the first switch, and the output terminal is electrically coupled to the control terminal of the high-side power transistor.
[0013] According to an embodiment of the present invention, a combined power transistor driving circuit includes a disconnection control module comprising: a second switch, the second switch being an N-type MOS transistor having an input terminal, an output terminal, and a control terminal, wherein the input terminal is electrically coupled to a first terminal of the power supply capacitor, the output terminal is electrically coupled to a control terminal of the high-side power transistor, the control terminal is electrically coupled to the output terminal of a first inverter, and the input terminal of the inverter is electrically coupled to a switch control signal; the second switch is turned on when the switch control signal is low, and the parasitic gate capacitance of the high-side power transistor is rapidly discharged through the channel of the N-type MOS transistor, thereby rapidly disconnecting the high-side power transistor.
[0014] According to an embodiment of the present invention, a combined power transistor driving circuit includes a disconnection control module comprising: a second switch, the second switch being a P-type MOS transistor having an input terminal, an output terminal, and a control terminal, wherein the input terminal is electrically coupled to a first terminal of the power supply capacitor, the output terminal is electrically coupled to the control terminal of the high-side power transistor, and the control terminal is electrically coupled to the switch control signal; the second switch is turned on when the switch control signal is low, and the parasitic gate capacitance of the high-side power transistor is rapidly discharged through the channel of the P-type MOS transistor, thereby rapidly disconnecting the high-side power transistor.
[0015] A combined power transistor driving method includes: during a high-level switching control signal, the gate capacitor of the high-side power transistor is charged by a controlled current, causing the high-side power transistor to turn on slowly; during a low-level switching control signal, the gate capacitor of the high-side power transistor is rapidly discharged by the channel current of the MOSFET, causing the high-side power transistor to turn off quickly.
[0016] A combined power transistor driving method includes: during a high-level switching control signal, the charge of the power supply capacitor is slowly transferred to the gate capacitor of the high-side power transistor through a controlled charging current, causing the high-side power transistor to turn on slowly; during a low-level control signal, the charge of the gate capacitor of the high-side power transistor is quickly transferred to the power supply capacitor through the channel current of the MOS transistor, realizing charge recovery of the power supply capacitor and simultaneously causing the high-side power transistor to turn off quickly.
[0017] A power supply device according to an embodiment of the present invention includes any of the aforementioned combined power transistor drive circuits or employs the aforementioned combined power transistor drive method.
[0018] The combined power transistor drive circuit proposed in this invention achieves a slow turn-on and fast turn-off control mode for the high-side power transistor by using a controlled current source to charge the gate capacitor of the high-side power transistor and using the channel of the MOS transistor to conduct the discharge current of the gate capacitor of the high-side power transistor. At the same time, it overcomes the influence caused by the forward conduction current of non-ideal diodes easily triggering latc-up, thus improving the reliability of the system. Attached Figure Description
[0019] Figure 1 The diagram shown is a schematic of an existing combined power transistor drive circuit.
[0020] Figure 2A The diagram shown is a schematic of a combined power transistor drive circuit according to an embodiment of the present invention.
[0021] Figure 2B The diagram shown is a schematic of another combined power transistor drive circuit according to an embodiment of the present invention.
[0022] Figure 2CThe diagram shown is a schematic diagram of another combined power transistor drive circuit according to an embodiment of the present invention.
[0023] Figure 3 The figure shown is a typical working waveform diagram of an embodiment of the present invention;
[0024] Figure 4 This is a flowchart of a combined power transistor driving method according to an embodiment of the present invention;
[0025] Figure 5 This is a flowchart of another combined power transistor driving method according to an embodiment of the present invention. Detailed Implementation
[0026] Specific embodiments of the present invention will now be described in detail. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to practice the invention. In other instances, well-known circuits, materials, or methods have not been specifically described to avoid obscuring the invention.
[0027] Throughout this specification, references to “an embodiment,” “an example,” or “an example” mean that a particular feature, structure, or characteristic described in connection with that embodiment or example is included in at least one embodiment of the invention. Therefore, the phrases “in an embodiment,” “in an embodiment,” “an example,” or “an example” appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. Furthermore, specific features, structures, or characteristics can be combined in one or more embodiments or examples in any suitable combination and / or sub-combination. Moreover, those skilled in the art will understand that the accompanying drawings provided herein are for illustrative purposes and are not necessarily drawn to scale. It should be understood that when an element is referred to as “connected to” or “coupled to” another element, it can be a direct connection or coupling to the other element or there may be intermediate elements. Conversely, when an element is referred to as “directly connected to” or “directly coupled to” another element, there are no intermediate elements. The same reference numerals indicate the same elements. The term “and / or” as used herein includes any and all combinations of one or more of the associated listed items.
[0028] Figure 2AThe diagram shows a schematic of a combined power transistor driving circuit 20 according to an embodiment of the present invention. It includes a power supply capacitor 230 with a second terminal electrically coupled to ground, used to drive a combined power transistor module 10 having a high-side power transistor 110 and a low-side power transistor 120 connected in series. The combined power transistor driving circuit 20 includes: a high-side driving module 250, having at least a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is electrically coupled to a switch control signal PWM, the second input terminal is electrically coupled to the first terminal of the power supply capacitor VCC, and the output terminal PWMH is electrically coupled to the control terminal of the high-side power transistor 110 of the combined power transistor module 10; and a low-side driving module 240, having at least an input terminal and an output terminal, wherein the input terminal is electrically coupled to the switch control signal PWM, and the output terminal PWML is electrically coupled to the control terminal of the low-side power transistor 120 of the combined power transistor module 10; the switch control signal PWM controls the combined power transistor module 10 to turn on and off through the combined power transistor driving circuit 20.
[0029] A combined power transistor drive circuit 30 according to an embodiment of the present invention, such as Figure 2B As shown, the high-side drive module 350 includes: a turn-on control module 351, having a first input terminal, a second input terminal, and an output terminal. The first input terminal is electrically coupled to a switch control signal PWM, the second input terminal is electrically coupled to the first terminal of the power supply capacitor VCC, and the output terminal is electrically coupled to the control terminal of the high-side power transistor 110. During the high-level period of the switch control signal PWM, the turn-on control module 351 controls the charging of the parasitic gate capacitance 130 of the high-side power transistor 110 through a controlled current, causing the high-side power transistor 110 to turn on slowly. A disconnection control module 352 is configured with a first input terminal, a second input terminal, and an output terminal. The first input terminal is electrically coupled to a switch control signal PWM, the second input terminal is electrically coupled to the first terminal of the power supply capacitor VCC, and the output terminal is electrically coupled to the control terminal of the high-side power transistor 110 of the combined power transistor module 10. During the low level of the switch control signal PWM, the disconnection control module 352 rapidly discharges the parasitic gate capacitance 130 of the high-side power transistor 110 through the MOS transistor channel current, thereby rapidly disconnecting the high-side power transistor 110.
[0030] According to an embodiment of the present invention, a combined power transistor driving circuit includes a turn-on control module 351 comprising: a switch control current source having a first input terminal, a second input terminal, and an output terminal, wherein the first input terminal is electrically coupled to the switch control signal PWM, the second input terminal is electrically coupled to the first terminal of the power supply capacitor VCC, and the output terminal is electrically coupled to the control terminal of the high-side power transistor 110. During the high level of the switch control signal PWM, the switch control current source outputs a controlled current to controllably charge the parasitic gate capacitance of the high-side power transistor 110, thereby causing the high-side power transistor 110 to turn on slowly.
[0031] A combined power transistor drive circuit 450 according to an embodiment of the present invention, such as Figure 2C As shown, the switch-controlled current source includes: a first switch 452, having an input terminal, an output terminal, and a control terminal, wherein the input terminal is electrically coupled to the first terminal of the power supply capacitor VCC, and the control terminal is electrically coupled to the switch control signal PWM; and a current source 451, having an input terminal and an output terminal, wherein the input terminal is electrically coupled to the output terminal of the first switch 452, and the output terminal is electrically coupled to the control terminal of the high-side power transistor 110.
[0032] A combined power transistor drive circuit 450 according to an embodiment of the present invention, such as Figure 2C As shown, the disconnection control module 352 includes: a second switch 453, which is an N-type MOS transistor (metal-oxide-semiconductor field-effect transistor) with an input terminal, an output terminal, and a control terminal. The input terminal is electrically coupled to the first terminal of the power supply capacitor 230, the output terminal is electrically coupled to the control terminal of the high-side power transistor 110, and the control terminal is electrically coupled to the output terminal of the first inverter 454. The input terminal of the inverter 454 is electrically coupled to the switch control signal PWM. When the switch control signal PWM is low, the second switch 453 is turned on, and the parasitic gate capacitance 130 of the high-side power transistor 110 is rapidly discharged through the channel of the N-type MOS transistor, causing the high-side power transistor 110 to be quickly disconnected.
[0033] A combined power transistor drive circuit 450 according to an embodiment of the present invention, such as Figure 2CAs shown, the disconnection control module 352 includes: a second switch 453, which is a P-type MOS transistor (metal-oxide-semiconductor field-effect transistor) with an input terminal, an output terminal, and a control terminal. The input terminal is electrically coupled to the first terminal of the power supply capacitor 230, the output terminal is electrically coupled to the control terminal of the high-side power transistor 110, and the control terminal is electrically coupled to the switch control signal PWM. When the switch control signal PWM is low, the second switch 453 is turned on, and the parasitic gate capacitance 130 of the high-side power transistor 110 is rapidly discharged through the channel of the P-type MOS transistor, thereby rapidly disconnecting the high-side power transistor 110.
[0034] According to an embodiment of the present invention, a combined power transistor driving circuit is provided, such as... Figure 2A , Figure 2B or Figure 2C As shown, the driven combined power transistor module 10 includes: a high-side power transistor 110 with an input terminal, an output terminal, and a control terminal, wherein the input terminal is the external drain terminal of the combined power transistor module 10, and the control terminal is electrically coupled to the output terminal of the high-side driving module; and a low-side power transistor 120 with an input terminal, an output terminal, and a control terminal, wherein the input terminal is electrically coupled to the output terminal of the high-side power transistor 110, the control terminal is electrically coupled to the low-side driving module, and the output terminal is the external source terminal of the combined power transistor module 10. In one embodiment, the high-side power transistor 110 of the combined power transistor module 10 adopts a high-voltage power transistor structure, which can be implemented using integrated circuit technology and integrated on the same chip along with the control and driving circuits. Alternatively, it can be a separate discrete device, integrated into a single chip through dual-base island packaging. The low-side power transistor 120 can typically adopt a low-voltage power transistor structure and can be directly implemented using integrated circuit technology.
[0035] In one embodiment, the low-side drive module 240 can be implemented using drive circuits disclosed in the art, such as a drive structure consisting of cascaded multi-stage inverters.
[0036] In one embodiment, combined with Figure 2C Circuit diagram and Figure 3As can be seen from the typical operating waveform diagram, after the switch control signal PWM becomes high, the output of the low-side drive module 240 also becomes high, the low-side power transistor 120 is turned on, the input terminal SW of the low-side power transistor 120 decreases, at the same time the first switch K1 is turned on and the second switch K2 is turned off. The controlled current of the controlled current source 451 charges the gate parasitic capacitance 130 of the high-side power transistor 110. This is also a process in which the charge on the power supply capacitor VCC is slowly transferred to the gate parasitic capacitance 130 of the high-side power transistor 110 through the controlled current. When the voltage difference on the parasitic capacitance 130 reaches the turn-on threshold voltage of the high-side power transistor 110, the high-side power transistor 110 enters the turn-on state, and the control terminal signal PWMH of the high-side power transistor 110 slowly becomes high. Therefore, the high-side power transistor 110 turns on slower than the low-side power transistor 120. Finally, the combined power transistor module 10 is fully turned on, and its drain-source voltage difference is low.
[0037] After the switch control signal PWM becomes low, the output of the low-side drive module 240 also becomes low, the low-side power transistor 120 is turned off, the potential of the input terminal SW of the low-side power transistor 120 rises rapidly, at the same time the first switch K1 is turned off and the second switch K2 is turned on, the gate parasitic capacitance 130 of the high-side power transistor 110 will discharge the power supply capacitor VCC rapidly through the MOS channel current after the second switch 453 is turned on.
[0038] In one embodiment, the second switch 453 is an N-type MOSFET, which has an input terminal, an output terminal, and a control terminal. The input terminal is electrically coupled to the first terminal of the power supply capacitor 230, and the output terminal is electrically coupled to the control terminal of the high-side power transistor 110. The control terminal is electrically coupled to the control signal PWMB. After the switch control signal PWM becomes low, the control signal PWMB output by the inverter 454 becomes high, and the second switch 453 is turned on. The gate parasitic capacitance 130 of the high-side power transistor 110 will rapidly discharge the power supply capacitor VCC through the channel current of the N-type MOSFET. This is also the high-side power transistor 110... The process involves the transfer of charge from the gate parasitic capacitance 130 back to the supply capacitor VCC. When the voltage difference across the gate parasitic capacitance 130 falls below the turn-on threshold voltage of the high-side power transistor 110, the high-side power transistor 110 enters the off state. The output signal SW of the high-side power transistor 110 quickly becomes equivalent to its control signal PWMH. In one embodiment, a second diode D2 is connected in parallel with the high-side power transistor 110, wherein the anode of the second diode D2 is coupled to the output terminal of the high-side power transistor, and the cathode is coupled to the control terminal of the high-side power transistor. During the process of the low-side power transistor turning off and SW rapidly increasing, the SW voltage is clamped by the second diode D2. Therefore, the high-side power transistor 110 turns off faster than the low-side power transistor 120. The rapid turn-off of the high-side power transistor 110 isolates the high voltage at the drain terminal of the combined power transistor module 10, ensuring the safety of the low-side power transistor 120. Finally, the combined power transistor module 10 is completely off, and its drain-source voltage difference (Drain-Source) is at a high level.
[0039] In one embodiment, the second switch 453 is a P-type MOSFET, which has an input terminal, an output terminal, and a control terminal. The input terminal is electrically coupled to the first terminal of the power supply capacitor 230, and the output terminal is electrically coupled to the control terminal of the high-side power transistor 110. The control terminal is electrically coupled to the control signal PWM. After the switch control signal PWM goes low, the second switch 453 is turned on, and the gate parasitic capacitance 130 of the high-side power transistor 110 rapidly discharges the power supply capacitor VCC through the channel current of the P-type MOSFET. This is also the high-side power transistor 110... The process involves the transfer of charge from the gate parasitic capacitance back to the power supply capacitor VCC. When the voltage difference across the gate parasitic capacitance 130 is lower than the turn-on threshold voltage of the high-side power transistor 110, the high-side power transistor 110 enters the off state. This achieves faster turn-off of the high-side power transistor 110 than the low-side power transistor 120. The rapid disconnection of the high-side power transistor 110 isolates the high voltage at the drain terminal of the combined power transistor module 10, ensuring the safety of the low-side power transistor 120. Finally, the combined power transistor module 10 is completely disconnected, and its drain-source voltage difference is at a high level.
[0040] Figure 4 This is a flowchart of a combined power transistor driving method according to an embodiment of the present invention, including steps 401 to 402.
[0041] Step 401: During the high-level period of the switch control signal, the gate capacitor of the high-side power transistor is charged by the controlled current, causing...
[0042] The high-side power transistor turns on slowly.
[0043] Step 402: During the low level of the switch control signal, the gate capacitance of the high-side power transistor is controlled by the MOS transistor channel current.
[0044] Rapid discharge causes the high-side power transistor to disconnect quickly.
[0045] Figure 5 This is a flowchart of another combined power transistor driving method according to an embodiment of the present invention, including steps 501 to 502.
[0046] Step 501: During the high level of the switch control signal, the charge of the power supply capacitor is slowly transferred to the high side through the controlled charging current.
[0047] The gate capacitance of the power transistor causes the high-side power transistor to turn on slowly;
[0048] Step 502: During the low level of the control signal, the charge on the gate capacitance of the high-side power transistor is rapidly released through the MOSFET channel current.
[0049] The charge is transferred to the power supply capacitor, enabling charge recovery from the power supply capacitor and simultaneously causing the high-side power transistor to disconnect quickly.
[0050] A power supply device according to an embodiment of the present invention includes any of the combined power transistor driving circuits as described above or employs any of the combined power transistor driving methods described above.
[0051] Although the invention has been described with reference to several exemplary embodiments, it should be understood that the terminology used is descriptive and exemplary, and not restrictive. Because the invention can be embodied in many forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims. Therefore, all variations and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims. For those skilled in the art, several improvements and modifications can be made without departing from the principles of the invention, and these improvements and modifications should also be considered within the scope of protection of the invention.
Claims
1. A combined power tube driving circuit having a power supply capacitor electrically coupled with a second end to ground, applied to drive a combined power tube module having a high side power tube and a low side power tube connected in series, characterized in that, The application relates to a combined power tube driving circuit, which comprises: a high-side driving module, which has at least a first input end, a second input end and an output end, wherein the first input end is electrically coupled with a switch control signal, the second input end is electrically coupled with a first end of a power supply capacitor, and the output end is electrically coupled with a control end of a high-side power tube of a combined power tube module; a low-side driving module, which has at least an input end and an output end, wherein the input end is electrically coupled with the switch control signal, and the output end is electrically coupled with a control end of a low-side power tube of the combined power tube module; the switch control signal controls the combined power tube module to be turned on and turned off through the combined power tube driving circuit; the driven combined power tube module comprises: a high-side power tube, which has an input end, an output end and a control end, wherein the input end is an external drain end of the combined power tube module, and the control end is electrically coupled with the output end of the high-side driving module; a low-side power tube, which has an input end, an output end and a control end, wherein the input end is electrically coupled with the output end of the high-side power tube, the control end is electrically coupled with the output end of the low-side driving module, and the output end is an external source end of the combined power tube module; the high-side driving module comprises: a turn-on control module, which has a first input end, a second input end and an output end, wherein the first input end is electrically coupled with a switch control signal, the second input end is electrically coupled with a first end of a power supply capacitor, and the output end is electrically coupled with a control end of a high-side power tube; the turn-on control module controls the parasitic gate capacitance of the high-side power tube to be charged through a controlled current during a high level period of the switch control signal, so that the high-side power tube is slowly turned on; a turn-off control module, which has a first input end, a second input end and an output end, wherein the first input end is electrically coupled with a switch control signal, the second input end is electrically coupled with a first end of a power supply capacitor, and the output end is electrically coupled with a control end of a high-side power tube of a combined power tube module; the turn-off control module controls the parasitic gate capacitance of the high-side power tube to be discharged through a MOS tube channel current during a low level period of the switch control signal, so that the high-side power tube is quickly turned off.
2. The combined power tube drive circuit of claim 1, wherein, the turn-on control module comprises: a switch control current source, which has a first input end, a second input end and an output end, wherein the first input end is electrically coupled with a switch control signal, the second input end is electrically coupled with a first end of a power supply capacitor, and the output end is electrically coupled with a control end of a high-side power tube; the switch control current source outputs a controlled current to control the parasitic gate capacitance of the high-side power tube to be charged during a high level period of the switch control signal, so that the high-side power tube is slowly turned on.
3. The combined power tube drive circuit of claim 2, wherein, the switch control current source comprises: a first switch, which has an input end, an output end and a control end, wherein the input end is electrically coupled with a first end of a power supply capacitor, and the control end is electrically coupled with a switch control signal; a current source, which has an input end and an output end, wherein the input end is electrically coupled with the output end of the first switch, and the output end is electrically coupled with a control end of a high-side power tube.
4. The combined power tube drive circuit of claim 1, wherein, the turn-off control module comprises: A second switch, which is an N-type MOS tube, has an input end, an output end and a control end, wherein the input end is electrically coupled with the first end of the power supply capacitor, the output end is electrically coupled with the control end of the high-side power tube, and the control end is electrically coupled with the output end of the first inverter, and the input end of the inverter is electrically coupled with the switch control signal; the second switch is turned on when the switch control signal is low, and the parasitic gate capacitor of the high-side power tube is quickly discharged through the channel of the N-type MOS tube, so that the high-side power tube is quickly turned off.
5. The combined power tube drive circuit of claim 1, wherein, The disconnect control module comprises: A second switch, which is a P-type MOS tube, has an input end, an output end and a control end, wherein the input end is electrically coupled with the first end of the power supply capacitor, the output end is electrically coupled with the control end of the high-side power tube, and the control end is electrically coupled with the switch control signal; the second switch is turned on when the switch control signal is low, and the parasitic gate capacitor of the high-side power tube is quickly discharged through the channel of the P-type MOS tube, so that the high-side power tube is quickly turned off.
6. A combined power tube driving method using the combined power tube driving circuit according to any one of claims 1 to 5, the combined power tube driving method comprising: During the high level of the switch control signal, the gate capacitor of the high-side power tube is charged through the controlled current, so that the high-side power tube is slowly turned on; During the low level of the switch control signal, the gate capacitor of the high-side power tube is quickly discharged through the MOS tube channel current, so that the high-side power tube is quickly turned off.
7. A combined power tube driving method using the combined power tube driving circuit according to any one of claims 1 to 5, the combined power tube driving method comprising: During the high level of the switch control signal, the power supply capacitor charge is slowly transferred to the gate capacitor of the high-side power tube through the controlled charging current, so that the high-side power tube is slowly turned on; During the low level of the control signal, the gate capacitor charge of the high-side power tube is quickly transferred to the power supply capacitor through the MOS tube channel current, so that the power supply capacitor charge is recovered, and the high-side power tube is quickly turned off.
8. A power supply device characterized by comprising: The combined power tube driving circuit according to any one of claims 1 to 5 or the combined power tube driving method according to claim 6 or 7.
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