A multi-channel signal synchronization method and system based on power detection

Abstract

A multi-channel signal synchronization method and system based on power detection, relating to the technical field of multi-channel signal synchronization, including sequentially arranging an adjustable digital delay module, a digital-to-analog converter and an adjustable analog delay module on all channels. The adjustable digital delay module is used to scan the sample delay value of the adjustment channel to achieve sample synchronization. The adjustable analog delay module is used to scan the phase delay value of the adjustment channel to achieve phase synchronization after sample synchronization. The standard for sample synchronization and phase synchronization is: the output power after the adjustment channel and the reference channel are combined is the maximum. The present invention does not rely on a DAC chip to provide a synchronization function, and adopts closed-loop measurement control measures to solve the synchronization problem of multi-channel DAC output signals from the two aspects of sample synchronization and phase synchronization.

Description

Technical Field

[0001] The present invention relates to the technical field of multi-channel signal synchronization, and in particular to a multi-channel signal synchronization method and system based on power detection. Background Art

[0002] With the development of modern radio technology, the clock frequency of DAC (Digital to analog converter) continues to increase with the improvement of signal bandwidth. In many application scenarios, multi-channel analog signals require a more strict phase synchronization relationship, so the output signals of multi-channel DACs need to be synchronized. For high-sampling rate DACs, the differences in component characteristics in the signal conversion and transmission paths and the path differences of the transmission lines will seriously affect the phase relationship between multi-channel signals. Therefore, the problem of multi-channel DAC synchronization also arises, and it is imperative to find a solution that can accurately synchronize the output signals of multi-channel DACs at high sampling rates.

[0003] The existing multi-channel synchronization technology currently relies on the inter-chip synchronization function reserved by the DAC chip at the beginning of the design, and most of them can only achieve sample-level synchronization. In scenarios where phase-level synchronization is required, its synchronization accuracy is insufficient. When the DAC chip itself does not provide inter-chip synchronization function, external synchronization measures are required to ensure the synchronization of multi-channel DACs. Moreover, when the external synchronization measures fail to achieve closed-loop measurement control, measures such as equal transmission line length alone are not enough to ensure that the output signals are synchronized.

[0004] Therefore, it is necessary to add closed-loop measurement control to the external synchronization measures. In the closed-loop measurement control process, it is necessary to measure whether the multi-channel DAC signals are synchronized. It is easy to think of using two or more ADCs (Analog to digital converters) with the same or higher sampling rate for sampling measurement, and these ADCs need to be accurately synchronized first. However, due to the high cost of high-speed ADCs, the ADC synchronization process itself is also a relatively complicated problem. Moreover, ADC sampling measurement can only achieve sample point synchronization, so this solution is costly and ineffective.

[0005] In summary, there is an urgent need for a multi-channel DAC signal synchronization method that is different from the traditional solution to solve the synchronization problem of multi-channel DAC output signals. Summary of the invention

[0006] In view of the problems existing in the prior art, the purpose of the present invention is to provide a multi-channel signal synchronization method and system based on power detection, so as to solve the problems of insufficient synchronization accuracy and high synchronization cost in the prior art.

[0007] In order to achieve the above objectives, on the one hand, the technical solutions adopted are:

[0008] A multi-channel signal synchronization method based on power detection, the method comprising:

[0009] An adjustable digital delay module, a digital-to-analog converter and an adjustable analog delay module are sequentially arranged on all channels;

[0010] Set any channel as the reference channel, and set other channels except the reference channel as adjustment channels. Perform sample point synchronization and phase synchronization with the reference channel in turn for each adjustment channel until all channels achieve signal synchronization.

[0011] When performing sample point synchronization, the sample point delay value of the adjustable digital delay module on the adjustment channel is scanned and the output power after the adjustment channel and the reference channel are combined is recorded. When the output power is maximum, the adjustment channel and the reference channel achieve sample point synchronization;

[0012] When performing phase synchronization, the phase delay value of the adjustable analog delay module on the adjustment channel is scanned and the output power after the adjustment channel and the reference channel are combined is recorded. When the output power is maximum, the adjustment channel and the reference channel achieve phase synchronization.

[0013] Preferably, when the adjustable digital delay module is used to perform sample point synchronization on the adjustment channel, the phase delay value of the adjustable analog delay module of all channels and the sample point delay value of the adjustable digital delay module on the reference channel are set to fixed values;

[0014] The sample delay value of the adjustable digital delay module of the adjustment channel is scanned in a preset sample delay range with a step of 1 sample point. During the scanning process, the output power of the adjustment channel and the reference channel after being combined is collected and recorded. The sample delay value when the output power is maximum is the optimal sample delay value of the adjustable digital delay module of the adjustment channel. After the adjustable digital delay module of the adjustment channel is set to the optimal sample delay value, the adjustment channel and the reference channel achieve sample synchronization.

[0015] Preferably, when the adjustable analog delay module is used to perform phase synchronization on the adjustment channel, the sample delay value of the adjustable digital delay module of the reference channel and the phase delay value of the adjustable analog delay module are set to fixed values, and the sample delay values ​​of the adjustable digital delay modules of all adjustment channels are set to the corresponding optimal sample delay values;

[0016] The phase delay value of the adjustable analog delay module of the adjustment channel is scanned within a preset phase delay range with a minimum adjustable phase step. During the scanning process, the output power of the adjustment channel and the reference channel after being combined is collected and recorded. The phase delay value when the output power is maximum is the optimal phase delay value of the adjustable analog delay module of the adjustment channel. After the adjustable analog delay module of the adjustment channel is set to the optimal phase delay value, the adjustment channel and the reference channel achieve phase synchronization.

[0017] Preferably, the multi-channel signal synchronization method based on power detection also includes:

[0018] Preset switch components on all channels;

[0019] When performing sample point synchronization and phase synchronization, the input of the adjustment channel and the reference channel are switched to a pseudo-random code through a switch component, and the output of the adjustment channel and the reference channel are switched to an analog signal corresponding to the pseudo-random code;

[0020] After completing the sample point synchronization and phase synchronization, the input of the adjustment channel and the reference channel are switched to user data through the switch component, and the output of the adjustment channel and the reference channel are switched to analog signals corresponding to the user data.

[0021] Preferably, when performing sample point synchronization and phase synchronization, the adjustable digital delay module performs a sample point delay on the received pseudo-random code and sends it to the digital-to-analog converter. The digital-to-analog converter converts the pseudo-random code after the sample point delay into a corresponding analog signal and transmits it to the adjustable analog delay module. The adjustable analog delay module performs a phase delay on the analog signal and outputs it.

[0022] On the other hand, the technical solutions adopted are:

[0023] A multi-channel signal synchronization system based on power detection includes multiple channels, and all channels are sequentially provided with an adjustable digital delay module, a digital-to-analog converter and an adjustable analog delay module;

[0024] Any one channel is set as the reference channel, and the other channels except the reference channel are set as adjustment channels;

[0025] An adjustable digital delay module is used to scan the sample delay value of the adjustment channel to achieve sample synchronization between the adjustment channel and the reference channel;

[0026] A digital-to-analog converter, used to convert the digital signal after the adjustable digital delay module performs sample point delay into a corresponding analog signal, and send it to the corresponding adjustable analog delay module;

[0027] The adjustable analog delay module is used to scan the phase delay value of the adjustment channel after the sample point synchronization to achieve phase synchronization between the adjustment channel and the reference channel;

[0028] The standard for sample point synchronization and phase synchronization is that the output power of the adjustment channel and the reference channel after being combined is the maximum.

[0029] Preferably, the multi-channel signal synchronization system based on power detection further includes:

[0030] The synchronization algorithm module connects the adjustable digital delay modules and the adjustable analog delay modules on all channels, and is used to control the adjustable digital delay modules to achieve sample point synchronization between the corresponding adjustment channel and the reference channel, and to control the adjustable analog delay modules to achieve phase synchronization between the corresponding adjustment channel and the reference channel.

[0031] Preferably, the multi-channel signal synchronization system based on power detection further includes:

[0032] A plurality of data selection switches, one data selection switch is provided on each channel, and each of the data selection switches is located at the input side of the adjustable digital delay module, and is used to switch the inputs of all the adjustable digital delay modules to pseudo-random codes when performing sample point synchronization and phase synchronization, and to switch the inputs of all the adjustable digital delay modules to user data after completing sample point synchronization and phase synchronization;

[0033] A plurality of signal switches, one signal switch is provided on each channel and is located at the output side of the adjustable analog delay module, and is used to switch the outputs of all adjustable analog delay modules to analog signals corresponding to pseudo-random codes when performing sample point synchronization and phase synchronization, and to switch the outputs of all adjustable analog delay modules to analog signals corresponding to user data after completing sample point synchronization and phase synchronization;

[0034] The synchronization algorithm module is also connected to the data selection switches and signal switches on all channels to control the switching of the data selection switches and the signal switches.

[0035] Preferably, the multi-channel signal synchronization system based on power detection further includes:

[0036] A pseudo-random code generator connected to the input side of all channels, used to input a pseudo-random code signal to the adjustment channel and the reference channel when performing sample point synchronization and phase synchronization on each adjustment channel;

[0037] When performing sample point synchronization and phase synchronization, the adjustable digital delay module performs a sample point delay on the received pseudo-random code and sends it to the digital-to-analog converter. The digital-to-analog converter converts the pseudo-random code after the sample point delay into an analog signal and transmits it to the adjustable analog delay module. The adjustable analog delay module performs a phase delay on the analog signal and outputs it.

[0038] Preferably, the multi-channel signal synchronization system based on power detection further includes:

[0039] A signal combiner connected to the output sides of all channels, used for combining the adjustment channel and the reference channel when performing sample point synchronization and phase synchronization on each adjustment channel;

[0040] A power detector connected to the signal combiner, used for collecting the output power of the adjustment channel and the reference channel after the adjustment channel is combined when performing sample point synchronization and phase synchronization on each adjustment channel;

[0041] An analog-to-digital converter connected to the power detector is used to perform analog-to-digital conversion processing on the output power of the adjustment channel and the reference channel after the adjustment channel is combined when performing sample point synchronization and phase synchronization on each adjustment channel;

[0042] The synchronization algorithm module is also connected to the signal combiner, the power detector and the analog-to-digital converter, and is used to control the signal combiner, the power detector and the analog-to-digital converter to realize output power detection after the adjustment channel and the reference channel are combined.

[0043] A multi-channel signal synchronization method and system based on power detection in the above technical solution has the following beneficial effects:

[0044] Even if the DAC of the synchronization system does not have a synchronization mechanism itself, the synchronization algorithm module can be used to control the adjustable digital delay module and the adjustable analog delay module to complete multi-channel sample point synchronization and phase synchronization, thereby achieving more precise synchronization of the synchronization system.

[0045] In the synchronization system, pseudo-random code is used as the synchronization signal source. The autocorrelation characteristics of the pseudo-random code are utilized. A signal combiner and a power detector are used to perform power summation and power detection on the pseudo-random signals between two channels. This can determine whether the multi-channel DAC signals are synchronized. Since a low-speed general-purpose ADC can be used for power measurement, system costs are saved. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 The flowchart of the method for adjusting the sample synchronization of channels in an embodiment of the present invention is shown in FIG.

[0047] Figure 2 The present invention is a flowchart of a method for adjusting phase synchronization of channels in an embodiment of the present invention.

[0048] Figure 3 This is a structural diagram of a signal synchronization system based on power detection in an embodiment of the present invention.

[0049] Reference numerals:

[0050] 101-digital logic circuit; 102-digital-to-analog converter; 103-adjustable analog delay module; 104-signal switch; 105-signal combiner; 106-power detector; 107-analog-to-digital converter; 108-synchronization algorithm module; 109-pseudo-random code generator; 110-data selection switch; 111-adjustable digital delay module. DETAILED DESCRIPTION

[0051] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0052] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0053] In order to ensure signal synchronization of all channels of a synchronization system when the digital-to-analog converter 102 of the synchronization system has no synchronization mechanism itself, the present invention provides a signal synchronization method and system based on power detection, which is applicable to a multi-channel signal transmission system, wherein a digital-to-analog converter 102 is provided on each channel, and an adjustable digital delay module 111 is respectively provided on the input side of the digital-to-analog converter 102 on all channels, and an adjustable analog delay module 103 is respectively provided on the output side of the digital-to-analog converter 102 on all channels, and an external input signal is sampled and synchronized by the adjustable digital delay module 111 on each channel and then sent to the digital-to-analog converter 102 on the adjustment channel for digital-to-analog conversion to obtain an analog signal, which is then phase-synchronized by the adjustable analog delay module 103 on the adjustment channel and then output.

[0054] Before synchronous transmission of user data, the synchronous system is firstly debugged. The synchronous debugging includes using the adjustable digital delay module 111 to perform sample point delay on each channel to achieve sample point synchronization of all channels, and further using the adjustable analog delay module 103 to perform phase delay on each channel to achieve phase synchronization of all channels. After phase synchronization is performed on the basis of sample point synchronization, the synchronization accuracy of the system is higher.

[0055] During synchronization debugging, any channel is set as reference channel 1, and other channels except the reference channel are set as adjustment channel n (2≤n≤N, N is the total number of channels of the synchronization system, and n and N are both positive integers). For each adjustment channel n, sample point synchronization and phase synchronization with reference channel 1 are performed in turn until the adjustment channel n and reference channel 1 achieve signal synchronization. When all adjustment channels n achieve signal synchronization with reference channel 1, all channels N of the synchronization system achieve signal synchronization.

[0056] When performing sample point synchronization, the sample point delay value of the adjustable digital delay module 111 on the adjustment channel n is scanned and the output power after the adjustment channel n and the reference channel 1 are combined is recorded. When the output power is maximum, the adjustment channel n and the reference channel 1 achieve sample point synchronization. Figure 1 As shown, the sample point synchronization method for any adjustment channel specifically includes the following steps:

[0057] Step a1: Set the phase delay value a of the adjustable analog delay module 103 of the reference channel 1 and the adjustment channel n. n =A norm , where A norm The preset phase delay range A min To A max The median value of .

[0058] Step a2: Set the sample delay value d1 of the adjustable digital delay module 111 of reference channel 1 to D norm , where D norm The preset sample delay range D min To D max The best sample delay value d of reference channel 1 is opt (1) = D norm , and the digital-to-analog converter 102 of reference channel 1 always outputs a waveform signal of a pseudo-random code.

[0059] Step a3: Setting the initial sample delay value d=D of the adjustable digital delay module 111 of the adjustment channel n min , the sample delay value of the adjustable digital delay module 111 of the adjustment channel n is adjusted in a preset sample delay range D by 1 sample step. min To D max Internal scan.

[0060] Step a4: Collect and record the output power P(n, d) of the reference channel 1 and the adjustment channel n after they are combined. For a specific adjustment channel n, P(n, d) is a one-dimensional array. Find the maximum value P in the array. max (n), the maximum power value P max The sample delay value d corresponding to (n) is the optimal sample delay value d opt (n) The adjustable digital delay module 111 of the adjustment channel n is set to the optimal sample point delay value d opt (n), the adjustment channel n and the reference channel 1 achieve sample point synchronization.

[0061] Since the phase delay values ​​of the adjustable analog delay modules 103 of the reference channel 1 and the adjustment channel n need to be set to fixed values ​​and the sample delay value of the adjustable digital delay module 111 of the reference channel 1 needs to be set to fixed values ​​when performing sample synchronization for each adjustment channel n, in order to simplify this step, the phase delay values ​​of the adjustable analog delay modules 103 of all channels and the sample delay value of the adjustable digital delay module 111 on the reference channel 1 can be uniformly set to fixed values ​​before performing sample synchronization for all adjustment channels n. For example, the phase delay value a of the adjustable analog delay modules 103 of all channels is set to n =A norm , where A norm The preset phase delay range A min To A max The median value of A norm is a fixed value; setting the sample delay value d1 of the adjustable digital delay module 111 of the reference channel 1 = D norm , D norm is the fixed value. When the adjustment channel n is sampled and synchronized, the outputs of the DACs 102 of the reference channel 1 and the adjustment channel n are analog signals corresponding to the pseudo-random code, and the outputs of the DACs 102 of the other channels are constant values. When all the adjustment channels n are sampled and synchronized with the reference channel n, all N channels are sampled and synchronized, and the following synchronization algorithm module 108 controls the adjustable digital delay module 111 to maintain the optimal sample delay value d opt After all reference channels n have completed the sample point synchronization step, the phase synchronization step for all reference channels n begins.

[0062] When performing phase synchronization, the sample delay value of the adjustable digital delay module 111 of the reference channel 1 and the phase delay value of the adjustable analog delay module 103 are set to fixed values ​​(the sample delay value is the aforementioned optimal sample delay value d opt (1) = D norm The phase delay value is the aforementioned a n =A norm ), the sample delay values ​​of the adjustable digital delay modules 111 of all adjustment channels n are set to the optimal sample delay values ​​obtained in the sample synchronization step. Figure 2 As shown, the phase synchronization method for any adjustment channel n includes:

[0063] Step b1: Set the phase delay value of the adjustable digital delay module 111 of all channels to the optimal sample delay value d obtained in the sample synchronization step. n =d opt (n).

[0064] Step b2: Set the phase delay value a1 of the adjustable analog delay module 103 of reference channel 1 to A norm, where A norm The preset phase delay range A min To A max The median value of the reference channel 1 is the optimal phase delay value a opt (1) = A norm , and the digital-to-analog converter 102 of reference channel 1 always outputs a waveform signal of a pseudo-random code.

[0065] Step b3: Setting the initial phase delay value a=A of the adjustable analog delay module 103 of the adjustment channel n min , the phase delay value of the adjustable analog delay module 103 of the adjustment channel n is adjusted by the minimum adjustable phase step A step In the preset phase delay range A min To A max Internal scan.

[0066] Step b4: Collect and record the output power P(n, a) of the reference channel 1 and the adjustment channel n after they are combined. For a specific adjustment channel n, P(n, a) is a one-dimensional array. Find the maximum value P in the array. max (n), the maximum power value P max The phase delay value a corresponding to (n) is the optimal phase delay value a opt (n). The adjustable analog delay module 103 of the adjustment channel n is set to the optimal sample point delay value a opt (n), the adjustment channel n and the reference channel 1 achieve phase synchronization.

[0067] When all adjustment channels n (2≤n≤N) are phase synchronized with the reference channel, all N channels are phase synchronized, and the following synchronization algorithm module 108 controls the adjustable analog delay module 103 to maintain the optimal phase delay value a opt (n).

[0068] In a preferred embodiment, the multi-channel signal synchronization method based on power detection also includes:

[0069] The preset synchronization algorithm module 108 controls the adjustable digital delay module 111 to achieve sample point synchronization, and the synchronization algorithm module 108 controls the adjustable analog delay module 103 to achieve phase synchronization.

[0070] In a preferred embodiment, the multi-channel signal synchronization method based on power detection further includes:

[0071] Individually preset switch components on all channels.

[0072] When performing sample point synchronization and phase synchronization, the inputs of adjustment channel n and reference channel 1 are switched to pseudo-random codes through a switch component, and the outputs of adjustment channel n and reference channel 1 are switched to analog signals corresponding to the pseudo-random codes.

[0073] After completing the sample point synchronization and phase synchronization, the input of the adjustment channel n and the reference channel 1 are switched to user data through the switch component, and the output of the adjustment channel n and the reference channel 1 are switched to analog signals corresponding to the user data.

[0074] The switching of the switch components is controlled by the synchronization algorithm module 108 .

[0075] In a preferred embodiment, when performing sample point synchronization and phase synchronization, the adjustable digital delay module 111 performs a sample point delay on the received pseudo-random code and sends it to the digital-to-analog converter 102. The digital-to-analog converter 102 converts the pseudo-random code that has undergone the sample point delay into a corresponding analog signal and transmits it to the adjustable analog delay module 103. The adjustable analog delay module 103 performs a phase delay on the analog signal and outputs it.

[0076] In summary, the multi-channel signal synchronization method based on power detection does not rely on the DAC 102 chip to provide synchronization function, and adopts closed-loop measurement control measures to solve the synchronization problem of the output signal of the multi-channel DAC 102 from the two aspects of sample point synchronization and phase synchronization.

[0077] like Figure 3 As shown, the present invention also provides a multi-channel signal synchronization system based on power detection, including multiple channels, and all channels are sequentially provided with an adjustable digital delay module 111, a digital-to-analog converter 102 and an adjustable analog delay module 103.

[0078] Any channel is set as reference channel 1, and the channels except reference channel 1 are set as adjustment channel n.

[0079] The adjustable digital delay module 111 is used to scan the sample delay value of the adjustment channel n to achieve sample synchronization between the adjustment channel n and the reference channel 1 .

[0080] The digital-to-analog converter 102 is used to convert the digital signal after the sample point delay by the adjustable digital delay module 111 into a corresponding analog signal, and send it to the corresponding adjustable analog delay module 103 .

[0081] The adjustable analog delay module 103 is used to scan the phase delay value of the adjustment channel n after the sample point synchronization, so as to achieve phase synchronization between the adjustment channel n and the reference channel 1.

[0082] The standard of sample point synchronization and phase synchronization is: the output power after the adjustment channel n and the reference channel 1 are combined is the largest.

[0083] The synchronization algorithm module 108 is connected to the adjustable digital delay module 111 and the adjustable analog delay module 103 on all channels, and is used to control the adjustable digital delay module 111 to achieve sample point synchronization between the corresponding adjustment channel n and the reference channel 1, and to control the adjustable analog delay module 103 to achieve phase synchronization between the corresponding adjustment channel n and the reference channel 1.

[0084] In a preferred embodiment, the multi-channel signal synchronization system based on power detection further includes:

[0085] Multiple data selection switches 110 are provided on each channel, and are located at the input side of the adjustable digital delay module 111, and are used to switch the inputs of all adjustable digital delay modules 111 to pseudo-random codes when performing sample point synchronization and phase synchronization, and to switch the inputs of all adjustable digital delay modules 111 to user data after completing sample point synchronization and phase synchronization.

[0086] Multiple signal switches 104 are provided on each channel, and are located at the output side of the adjustable analog delay module 103, and are used to switch the outputs of all adjustable analog delay modules 103 to analog signals corresponding to pseudo-random codes when performing sample point synchronization and phase synchronization, and to switch the inputs of all adjustable analog delay modules 103 to analog signals corresponding to user data (i.e., user signals) after completing sample point synchronization and phase synchronization.

[0087] The synchronization algorithm module 108 is also connected to the data selection switches 110 and the signal switches 104 on all channels, and is used to control the switching of the data selection switches 110 and the signal switches 104. The data selection switches 110 and the signal switches 104 on each channel constitute a set of switch components.

[0088] After the multi-channel signal synchronization system completes the sample point synchronization and phase synchronization, the N channels are precisely synchronized. After achieving precise synchronization, the synchronization algorithm module 108 controls the digital selection switch and the signal switch 104 to switch back to the normal working mode, and can normally receive user data and output user signals.

[0089] In a preferred embodiment, the multi-channel signal synchronization system based on power detection further includes:

[0090] The pseudo-random code generator 109 is connected to the input sides of all channels and is used to input a pseudo-random code signal to the adjustment channel and the reference channel when performing sample point synchronization and phase synchronization on each adjustment channel.

[0091] When performing sample point synchronization and phase synchronization, the adjustable digital delay module 111 performs a sample point delay on the received pseudo-random code and sends it to the digital-to-analog converter 102. The digital-to-analog converter 102 converts the pseudo-random code after the sample point delay into an analog signal and transmits it to the adjustable analog delay module 103. The adjustable analog delay module 103 performs a phase delay on the analog signal and outputs it.

[0092] In a preferred embodiment, the multi-channel signal synchronization system based on power detection further includes:

[0093] The signal combiner 105 is connected to the output sides of all channels and is used to combine the adjustment channel n with the reference channel 1 when performing sample point synchronization and phase synchronization on each adjustment channel n.

[0094] The power detector 106 is connected to the signal combiner 105 and is used to collect the output power of the adjustment channel n and the reference channel 1 after the adjustment channel n and the reference channel 1 are combined when performing sample point synchronization and phase synchronization on each adjustment channel.

[0095] The analog-to-digital converter 107 is connected to the power detector 106 and is used to perform analog-to-digital conversion processing on the output power of the adjustment channel n and the reference channel 1 combined when performing sample point synchronization and phase synchronization on each adjustment channel.

[0096] The synchronization algorithm module 108 is also connected to the signal combiner 105, the power detector 106 and the analog-to-digital converter 107, and is used to control the signal combiner 105, the power detector 106 and the analog-to-digital converter 107 to realize the output power detection after the adjustment channel n and the reference channel 1 are combined. The synchronization algorithm module 108, the pseudo-random code generator 109, the data selection switch 110 and the adjustable digital delay module 111 can be integrated into the same digital logic circuit 101. The output power after the combination is sampled by the analog-to-digital converter 107 and fed back to the digital logic circuit 101 for synchronization effect detection.

[0097] The present invention is not limited to the above-mentioned embodiments. For ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications are also considered to be within the protection scope of the present invention.

Claims

1. A multi-channel signal synchronization method based on power detection, characterized in that: The method comprises: An adjustable digital delay module, a digital-to-analog converter and an adjustable analog delay module are sequentially arranged on all channels; Set any channel as the reference channel, and set other channels except the reference channel as adjustment channels. Perform sample point synchronization and phase synchronization with the reference channel in turn for each adjustment channel until all channels achieve signal synchronization. When performing sample point synchronization, the sample point delay value of the adjustable digital delay module on the adjustment channel is scanned and the output power after the adjustment channel and the reference channel are combined is recorded. When the output power is maximum, the adjustment channel and the reference channel achieve sample point synchronization; when the adjustable digital delay module is used to perform sample point synchronization on the adjustment channel, the phase delay values ​​of the adjustable analog delay modules of all channels and the sample point delay value of the adjustable digital delay module on the reference channel are set to fixed values; The sample delay value of the adjustable digital delay module of the adjustment channel is scanned in a preset sample delay range with a step of 1 sample point. During the scanning process, the output power of the adjustment channel and the reference channel after being combined is collected and recorded. The sample delay value when the output power is maximum is the optimal sample delay value of the adjustable digital delay module of the adjustment channel. After the adjustable digital delay module of the adjustment channel is set to the optimal sample delay value, the adjustment channel and the reference channel achieve sample synchronization; When performing phase synchronization, the phase delay value of the adjustable analog delay module on the adjustment channel is scanned and the output power after the adjustment channel and the reference channel are combined is recorded. When the output power is maximum, the adjustment channel and the reference channel are phase synchronized. When the adjustable analog delay module is used to perform phase synchronization on the adjustment channel, the sample delay value of the adjustable digital delay module of the reference channel and the phase delay value of the adjustable analog delay module are set to fixed values, and the sample delay values ​​of the adjustable digital delay modules of all adjustment channels are set to the corresponding optimal sample delay values. The phase delay value of the adjustable analog delay module of the adjustment channel is scanned within a preset phase delay range with a minimum adjustable phase step. During the scanning process, the output power of the adjustment channel and the reference channel after being combined is collected and recorded. The phase delay value when the output power is maximum is the optimal phase delay value of the adjustable analog delay module of the adjustment channel. After the adjustable analog delay module of the adjustment channel is set to the optimal phase delay value, the adjustment channel and the reference channel achieve phase synchronization.

2. The multi-channel signal synchronization method based on power detection as claimed in claim 1, characterized in that: The multi-channel signal synchronization method based on power detection also includes: Preset switch components on all channels; When performing sample point synchronization and phase synchronization, the input of the adjustment channel and the reference channel are switched to a pseudo-random code through a switch component, and the output of the adjustment channel and the reference channel are switched to an analog signal corresponding to the pseudo-random code; After completing the sample point synchronization and phase synchronization, the input of the adjustment channel and the reference channel are switched to user data through the switch component, and the output of the adjustment channel and the reference channel are switched to analog signals corresponding to the user data.

3. The multi-channel signal synchronization method based on power detection as claimed in claim 2, characterized in that: When performing sample point synchronization and phase synchronization, the adjustable digital delay module performs a sample point delay on the received pseudo-random code and sends it to the digital-to-analog converter. The digital-to-analog converter converts the pseudo-random code after the sample point delay into a corresponding analog signal and transmits it to the adjustable analog delay module. The adjustable analog delay module performs a phase delay on the analog signal and outputs it.

4. A multi-channel signal synchronization system based on power detection, comprising a plurality of channels, characterized in that: An adjustable digital delay module, a digital-to-analog converter and an adjustable analog delay module are sequentially set on all channels; any one channel is set as a reference channel, and the channels other than the reference channel are set as adjustment channels; The adjustable digital delay module is used to scan the sample delay value of the adjustment channel to achieve sample synchronization between the adjustment channel and the reference channel; when the adjustable digital delay module is used to perform sample synchronization on the adjustment channel, the phase delay value of the adjustable analog delay module of all channels and the sample delay value of the adjustable digital delay module on the reference channel are set to fixed values; The sample delay value of the adjustable digital delay module of the adjustment channel is scanned in a preset sample delay range with a step of 1 sample point. During the scanning process, the output power of the adjustment channel and the reference channel after being combined is collected and recorded. The sample delay value when the output power is maximum is the optimal sample delay value of the adjustable digital delay module of the adjustment channel. After the adjustable digital delay module of the adjustment channel is set to the optimal sample delay value, the adjustment channel and the reference channel achieve sample synchronization; A digital-to-analog converter, used to convert the digital signal after the adjustable digital delay module performs sample point delay into a corresponding analog signal, and send it to the corresponding adjustable analog delay module; The adjustable analog delay module is used to scan the phase delay value of the adjustment channel after sample point synchronization to achieve phase synchronization between the adjustment channel and the reference channel; when the adjustable analog delay module is used to perform phase synchronization on the adjustment channel, the sample point delay value of the adjustable digital delay module of the reference channel and the phase delay value of the adjustable analog delay module are set to fixed values, and the sample point delay values ​​of the adjustable digital delay modules of all adjustment channels are set to the corresponding optimal sample point delay values; The phase delay value of the adjustable analog delay module of the adjustment channel is scanned within a preset phase delay range with a minimum adjustable phase step. During the scanning process, the output power of the adjustment channel and the reference channel after being combined is collected and recorded. The phase delay value when the output power is maximum is the optimal phase delay value of the adjustable analog delay module of the adjustment channel. After the adjustable analog delay module of the adjustment channel is set to the optimal phase delay value, the adjustment channel and the reference channel achieve phase synchronization; The standard for sample point synchronization and phase synchronization is that the output power of the adjustment channel and the reference channel after being combined is the maximum.

5. The multi-channel signal synchronization system based on power detection as claimed in claim 4, characterized in that: The multi-channel signal synchronization system based on power detection also includes: The synchronization algorithm module connects the adjustable digital delay modules and the adjustable analog delay modules on all channels, and is used to control the adjustable digital delay modules to achieve sample point synchronization between the corresponding adjustment channel and the reference channel, and to control the adjustable analog delay modules to achieve phase synchronization between the corresponding adjustment channel and the reference channel.

6. The multi-channel signal synchronization system based on power detection as claimed in claim 5, characterized in that: The multi-channel signal synchronization system based on power detection also includes: A plurality of data selection switches, one data selection switch is provided on each channel, each data selection switch is located at the input side of the adjustable digital delay module, and is used to switch the inputs of all adjustable digital delay modules to pseudo-random codes when performing sample point synchronization and phase synchronization, and to switch the inputs of all adjustable digital delay modules to user data after completing sample point synchronization and phase synchronization; A plurality of signal switches, one signal switch is provided on each channel and is located at the output side of the adjustable analog delay module, and is used to switch the outputs of all adjustable analog delay modules to analog signals corresponding to pseudo-random codes when performing sample point synchronization and phase synchronization, and to switch the outputs of all adjustable analog delay modules to analog signals corresponding to user data after completing sample point synchronization and phase synchronization; The synchronization algorithm module is also connected to the data selection switches and signal switches on all channels to control the switching of the data selection switches and the signal switches.

7. The multi-channel signal synchronization system based on power detection as claimed in claim 6, characterized in that: The multi-channel signal synchronization system based on power detection also includes: A pseudo-random code generator connected to the input side of all channels, used to input a pseudo-random code signal to the adjustment channel and the reference channel when performing sample point synchronization and phase synchronization on each adjustment channel; When performing sample point synchronization and phase synchronization, the adjustable digital delay module performs a sample point delay on the received pseudo-random code and sends it to the digital-to-analog converter. The digital-to-analog converter converts the pseudo-random code after the sample point delay into an analog signal and transmits it to the adjustable analog delay module. The adjustable analog delay module performs a phase delay on the analog signal and outputs it.

8. The multi-channel signal synchronization system based on power detection as claimed in claim 5, characterized in that: The multi-channel signal synchronization system based on power detection also includes: A signal combiner connected to the output sides of all channels, used for combining the adjustment channel and the reference channel when performing sample point synchronization and phase synchronization on each adjustment channel; A power detector connected to the signal combiner, used for collecting the output power of the adjustment channel and the reference channel after the adjustment channel is combined when performing sample point synchronization and phase synchronization on each adjustment channel; An analog-to-digital converter connected to the power detector is used to perform analog-to-digital conversion processing on the output power of the adjustment channel and the reference channel after the adjustment channel is combined when performing sample point synchronization and phase synchronization on each adjustment channel; The synchronization algorithm module is also connected to the signal combiner, the power detector and the analog-to-digital converter, and is used to control the signal combiner, the power detector and the analog-to-digital converter to realize output power detection after the adjustment channel and the reference channel are combined.

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