Interface control method, device and electronic device

Abstract

The present application discloses an interface control method, device and electronic device, belonging to the field of electronic devices. The method comprises: monitoring a first level of a first interface; wherein the first interface is a universal input / output interface; when the first interface is connected to a first external device, adjusting the impedance value of the first impedance circuit according to a preset adjustment strategy of the first impedance circuit of the first interface, so that the first level is greater than or equal to a level threshold corresponding to the first external device, thereby avoiding functional failure of the peripheral device.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic equipment, and specifically relates to an interface control method, device and electronic equipment. Background Art

[0002] Many modules in electronic devices need to use the general-purpose input / output (GPIO) interface of the central processing unit (CPU) as input or output ports. When these GPIOs are used as input or output ports, their input and output impedance R1 is fixed, and the pull-up power supply is basically a fixed 1.8V voltage.

[0003] In the related art, as the use time of electronic components of peripherals using GPIO interfaces increases, their equivalent impedance Rgnd to ground will decrease. When this equivalent impedance Rgnd is low to a certain level, the level on the GPIO cannot meet the effective level of the GPIO or the peripheral, thereby causing the function of the peripheral to fail. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide an interface control method, device and electronic device, which can solve the problem that the level on the GPIO cannot meet the effective level of the GPIO or the peripheral, resulting in the failure of the function of the peripheral.

[0005] In order to solve the above technical problems, this application is implemented as follows:

[0006] In a first aspect, an embodiment of the present application provides an interface control method, the method comprising:

[0007] Monitoring a first level of a first interface; wherein the first interface is a general purpose input / output interface;

[0008] When the first interface is connected to a first external device, the impedance value of the first impedance circuit is adjusted according to a preset adjustment strategy of the first impedance circuit of the first interface so that the first level is greater than or equal to a level threshold corresponding to the first external device.

[0009] In a second aspect, an embodiment of the present application provides an interface control device, the device comprising:

[0010] A detection module, used to monitor a first level of a first interface; wherein the first interface is a general input and output interface;

[0011] The adjustment module is used to adjust the impedance value of the first impedance circuit according to a preset adjustment strategy of the first impedance circuit of the first interface when the first interface is connected to the first external device, so that the first level is greater than or equal to the level threshold corresponding to the first external device.

[0012] In a third aspect, an embodiment of the present application provides an electronic device, which includes a processor, a memory, and a program or instruction stored in the memory and executable on the processor, wherein the program or instruction, when executed by the processor, implements the steps of the method described in the first aspect.

[0013] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored, and when the program or instruction is executed by a processor, the steps of the method described in the first aspect are implemented.

[0014] In a fifth aspect, an embodiment of the present application provides a chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run a program or instruction to implement the method described in the first aspect.

[0015] In an embodiment of the present application, by monitoring the first level of the first interface, when the first interface is connected to the first external device, the impedance value of the first impedance circuit is determined according to a preset adjustment strategy of the first impedance circuit of the first interface, so that the first level is greater than or equal to the level threshold corresponding to the first external device, thereby meeting the effective level of the GPIO or the peripheral device and avoiding functional failure of the peripheral device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a flow chart of the interface control method provided in the embodiment of the present application;

[0017] Figure 2 is a structural schematic diagram of an interface control circuit provided in an embodiment of the present application;

[0018] Figure 3 is a structural schematic diagram of an interface control device provided in an embodiment of the present application;

[0019] Figure 4 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0020] Figure 5 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of the present application. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here. In addition, the "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally represents that the objects associated with each other are in an "or" relationship.

[0023] The interface control method provided in the embodiment of the present application is described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0024] like Figure 1 , Figure 2 As shown, an embodiment of the present invention provides an interface control method, the execution subject of the method may be an electronic device, specifically, a central processing unit (CPU) of the electronic device, and the method includes:

[0025] Step S101, a first level of the first interface; wherein the first interface is a general purpose input / output interface.

[0026] like Figure 2 As shown, in the embodiment of the present invention, a detection circuit is added to each general purpose input and output (GPIO) interface to monitor the level of each GPIO. The detection circuit may be an analog-to-digital converter (ADC) detection circuit.

[0027] After detecting that the first interface is enabled, the CPU obtains a first level of the first interface through a detection module provided at the first interface.

[0028] Step S102: when the first interface is connected to a first external device, according to a preset adjustment strategy of the first impedance circuit of the first interface, adjusting the impedance value of the first impedance circuit so that the first level is greater than or equal to a level threshold corresponding to the first external device.

[0029] After detecting that the first interface is enabled, the CPU obtains a level threshold corresponding to the first external device according to the first external device connected to the first interface.

[0030] It should be understood that the level threshold may be set by the manufacturer of the first external device according to actual needs, so as to ensure that the first external device can be used normally after being connected to the first interface.

[0031] In one implementation, the level threshold is the sum of the second level and the third level; wherein the second level is the effective high level Ven of the first external device using the first interface, and the third level is the preset margin level V1 corresponding to the first external device, and the second level and the third level can be set based on the first interface or the first external device. It can be seen that the level threshold = Ven + V1.

[0032] like Figure 2 As shown, in the embodiment of the present invention, an adjustable input-output impedance circuit is set in each GPIO interface, that is, a first impedance circuit is set in the first interface. The CPU can adjust the circuit within the adjustment range of the input-output impedance circuit to obtain a desired impedance value. The circuit structure of the input-output impedance circuit can be set according to actual needs, and can be set to include the following: Figure 2 The circuit shown, which is composed of a plurality of impedances connected in series and parallel, can also be configured to include an adjustable impedance that can vary within a certain impedance value range.

[0033] It should be understood that if Figure 2 As shown, the first level = power level * Rgnd / (Ri + Rgnd), Ri is the impedance value of the first impedance circuit of the first interface, and Rgnd is the impedance value of the equivalent second impedance corresponding to the first external device connected to the first interface. It can be seen that the first level can be adjusted by adjusting the first impedance circuit and changing its impedance value.

[0034] The CPU compares the acquired first level with the level threshold of the first external device to determine whether the first level satisfies normal use of the first external device. If the first level is greater than or equal to the level threshold, it is determined that the first level satisfies normal use of the first external device; if the first level is less than the level threshold, it is determined that the first level cannot satisfy normal use of the first external device, and it is necessary to adjust the first impedance circuit of the first interface, and by adjusting the impedance value of the first impedance circuit, adjust the first level of the first interface so that the adjusted first level satisfies normal use of the first external device.

[0035] It can be seen from the technical solution provided by the above embodiments of the present invention that the embodiments of the present invention monitor the first level of the first interface and determine the impedance value of the first impedance circuit according to a preset adjustment strategy of the first impedance circuit of the first interface, so that the first level is greater than or equal to the level threshold corresponding to the first external device, thereby meeting the effective level of the GPIO or the peripheral device and avoiding functional failure of the peripheral device.

[0036] Based on the above embodiment, further, the impedance value of the first impedance circuit is, when the first level is greater than or equal to the level threshold, the maximum impedance value of the first impedance circuit.

[0037] Under the condition that the first level satisfies the normal use of the first external device on the first interface, an excessively high first level may cause leakage of the GPIO. In order to reduce leakage as much as possible, the first level needs to be controlled to be equal to or slightly higher than the level threshold. It can be seen that when adjusting the first impedance circuit, the impedance value of the first impedance circuit can be maximized as much as possible under the condition that the first level is greater than or equal to the level threshold, thereby minimizing the first level as much as possible.

[0038] There are multiple adjustment strategies for the first impedance circuit. The first impedance circuit can be gradually increased from small to large or gradually decreased from large to small within the adjustment range of the first impedance circuit; or a default impedance circuit can be determined first, and then the adjustment direction of the first impedance circuit is determined based on the comparison result between the monitored first level and the level threshold.

[0039] In one embodiment, when the first interface is enabled, the first impedance circuit is adjusted in sequence in the order of impedance values ​​from small to large within the adjustment range of the first impedance circuit, and when it is monitored that the first level is less than the level threshold corresponding to the first external device, the last adjusted first impedance circuit is used as the initial first impedance circuit.

[0040] If the first impedance circuit adopts Figure 2 In the circuit structure shown, multiple impedances are arranged in parallel. When the CPU detects that the first interface is turned on, it can select an impedance from small to large according to the arrangement order of the multiple impedances from small to large, for example, the arrangement order is {R1, R2, R3...}, and monitor the comparison results of the first level and the level threshold respectively. When the impedance Rn is selected as the first impedance circuit, if it is detected that the first level is less than the level threshold, the impedance Rn-1 selected last time is used as the initial first impedance circuit.

[0041] During the use of the first interface, the CPU continuously monitors the first level through the detection circuit of the first interface. If the CPU detects that the first level is less than the level threshold, the CPU adjusts the first impedance circuit again to reduce the impedance value of the first impedance circuit so that the first level is restored to a level greater than or equal to the level threshold.

[0042] It can be seen from the technical solution provided by the above embodiments of the present invention that the embodiments of the present invention make the impedance value of the first impedance circuit be the maximum impedance value of the first impedance circuit when the first level is greater than or equal to the level threshold; and when the first interface is turned on and used, the first impedance circuit is adjusted from small to large to obtain an initial first impedance circuit, thereby being able to reduce the leakage of the first interface while meeting the effective level of the GPIO or peripherals and avoiding functional failure of the peripherals.

[0043] It should be noted that the interface control method provided in the embodiment of the present application can be executed by an interface control device, or a control module in the interface control device for executing the method for loading interface control. In the embodiment of the present application, the method for loading interface control executed by an interface control device is taken as an example to illustrate the interface control method provided in the embodiment of the present application.

[0044] like Figure 3 As shown, an embodiment of the present application provides an interface control device, which includes: a detection module 301 and an adjustment module 302.

[0045] The detection module 301 is used to monitor the first level of the first interface; wherein the first interface is a general input and output interface; the adjustment module 302 is used to adjust the impedance value of the first impedance circuit according to a preset adjustment strategy of the first impedance circuit of the first interface when the first interface is connected to the first external device, so that the first level is greater than or equal to the level threshold corresponding to the first external device.

[0046] It can be seen from the technical solution provided by the above embodiments of the present invention that the embodiments of the present invention monitor the first level of the first interface, and when the first interface is connected to the first external device, adjust the impedance value of the first impedance circuit according to a preset adjustment strategy of the first impedance circuit of the first interface so that the first level is greater than or equal to the level threshold, thereby meeting the effective level of the GPIO or the peripheral device and avoiding functional failure of the peripheral device.

[0047] Furthermore, the impedance value of the first impedance circuit is, when the first level is greater than or equal to the level threshold, the maximum impedance value of the first impedance circuit.

[0048] Furthermore, the adjustment strategy includes:

[0049] When the first interface is enabled, within the adjustment range of the first impedance circuit, the first impedance circuit is adjusted in order from small to large impedance values, and when it is detected that the first level is less than the level threshold corresponding to the first external device, the last adjusted first impedance circuit is used as the initial first impedance circuit.

[0050] Furthermore, the level threshold is the sum of a second level and a third level; wherein the second level is an effective high level for the first external device to use the first interface, and the third level is a preset margin level corresponding to the first external device.

[0051] It can be seen from the technical solution provided by the above embodiments of the present invention that the embodiments of the present invention make the impedance value of the first impedance circuit be the maximum impedance value of the first impedance circuit when the first level is greater than or equal to the level threshold; and when the first interface is turned on and used, the first impedance circuit is adjusted from small to large to obtain an initial first impedance circuit, thereby being able to reduce the leakage of the first interface while meeting the effective level of the GPIO or peripheral and avoiding functional failure of the peripheral.

[0052] The interface control device in the embodiment of the present application can be a device, or a component, integrated circuit, or chip in a terminal. The device can be a mobile electronic device or a non-mobile electronic device. For example, the mobile electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a wearable device, an ultra-mobile personal computer (UMPC), a netbook, or a personal digital assistant (PDA), etc. The non-mobile electronic device can be a server, a network attached storage (NAS), a personal computer (PC), a television (TV), a teller machine or a self-service machine, etc., which is not specifically limited in the embodiment of the present application.

[0053] The interface control device in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0054] The interface control device provided in the embodiment of the present application can achieve Figure 1 to Figure 2 To avoid repetition, the various processes implemented by the interface control device in the method embodiment are not described here.

[0055] Optional, such as Figure 4 As shown, an embodiment of the present application also provides an electronic device 400, including a processor 410, a memory 409, and a program or instruction stored in the memory 409 and executable on the processor 410. When the program or instruction is executed by the processor 410, each process of the above-mentioned interface control method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0056] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0057] Figure 5 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of the present application.

[0058] The electronic device 500 includes but is not limited to: a radio frequency unit 501, a network module 502, an audio output unit 503, an input unit 504, a sensor 505, a display unit 506, a user input unit 507, an interface unit 508, a memory 509, and a processor 510.

[0059] Those skilled in the art will appreciate that the electronic device 500 may also include a power source (such as a battery) for supplying power to various components, and the power source may be logically connected to the processor 510 through a power management system, thereby implementing functions such as managing charging, discharging, and power consumption management through the power management system. Figure 5 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be described in detail here.

[0060] In which, the processor 510 is used to monitor the first level of the first interface; wherein, the first interface is a general input and output interface; when the first interface is connected to a first external device, the impedance value of the first impedance circuit is adjusted according to the preset adjustment strategy of the first impedance circuit of the first interface so that the first level is greater than or equal to the level threshold corresponding to the first external device.

[0061] It can be seen from the technical solutions provided by the above embodiments of the present invention that the embodiments of the present invention can meet the effective level of GPIO or peripherals and avoid functional failure of peripherals.

[0062] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the various processes of the above-mentioned interface control method embodiment are implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0063] The processor is a processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0064] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned interface control method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0065] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0066] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0067] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0068] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. An interface control method, characterized in that: include: Monitoring a first level of a first interface; wherein the first interface is a general purpose input / output interface; When the first interface is connected to a first external device, adjusting the impedance value of the first impedance circuit according to a preset adjustment strategy of the first impedance circuit of the first interface so that the first level is greater than or equal to a level threshold corresponding to the first external device; The impedance value of the first impedance circuit is, when the first level is greater than or equal to the level threshold, the maximum impedance value of the first impedance circuit; The adjustment strategies include: When the first interface is enabled, within the adjustment range of the first impedance circuit, the first impedance circuit is adjusted in order from small to large impedance values, and when it is detected that the first level is less than the level threshold corresponding to the first external device, the last adjusted first impedance circuit is used as the initial first impedance circuit.

2. The method according to claim 1, characterized in that The level threshold is the sum of the second level and the third level; wherein the second level is an effective high level for the first external device to use the first interface, and the third level is a preset margin level corresponding to the first external device.

3. An interface control device, characterized in that: include: A detection module, used to monitor a first level of a first interface; wherein the first interface is a general input and output interface; an adjustment module, configured to adjust the impedance value of the first impedance circuit according to an adjustment strategy of the first impedance circuit of the first interface when the first interface is connected to a first external device, so that the first level is greater than or equal to a level threshold corresponding to the first external device; The impedance value of the first impedance circuit is, when the first level is greater than or equal to the level threshold, the maximum impedance value of the first impedance circuit; The adjustment strategies include: When the first interface is enabled, within the adjustment range of the first impedance circuit, the first impedance circuit is adjusted in order from small to large impedance values, and when it is detected that the first level is less than the level threshold corresponding to the first external device, the last adjusted first impedance circuit is used as the initial first impedance circuit.

4. The device according to claim 3, characterized in that The level threshold is the sum of the second level and the third level; wherein the second level is an effective high level for the first external device to use the first interface, and the third level is a preset margin level corresponding to the first external device.

5. An electronic device, characterized in that: It comprises a processor, a memory and a program or instruction stored in the memory and executable on the processor, wherein the program or instruction, when executed by the processor, implements the steps of the interface control method as described in any one of claims 1 to 2.

6. A readable storage medium, characterized in that: The readable storage medium stores a program or instruction, and when the program or instruction is executed by the processor, the steps of the interface control method as described in any one of claims 1-2 are implemented.

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