A semiconductor epitaxial structure, a manufacturing method thereof, and an LED chip

Abstract

The present invention provides a semiconductor epitaxial structure, a manufacturing method thereof, and an LED chip. By setting the quantum well layer close to the P-type semiconductor layer to include an Al x Ga y In z N material layer, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1; further, the last quantum well layer along the growth direction includes a P-type doped Al x Ga y In z N material layer; a certain amount of holes can be stored at the edge of the active region, which is beneficial to the subsequent migration of holes to the active region, thereby improving the recombination efficiency of electrons and holes in the active region space.

Description

Technical Field

[0001] The present invention relates to the field of light-emitting diodes, and particularly to a semiconductor epitaxial structure, a manufacturing method thereof, and an LED chip. Background Art

[0002] A light-emitting diode (English: Light Emitting Diode, abbreviation: LED) is a semiconductor electronic component that can emit light. LEDs have the advantages of high efficiency, long lifespan, small size, low power consumption, etc., and can be applied to indoor and outdoor white light illumination, screen display, backlight source and other fields. In the development of the LED industry, gallium nitride (GaN)-based materials are typical representatives of group V-III compound semiconductors, and improving the optoelectronic performance of GaN-based LEDs has become the key to the semiconductor lighting industry.

[0003] The internal quantum efficiency of the LED structure has a decisive influence on its brightness and luminous efficiency. However, due to the bipolar input of carriers, electrons and holes are respectively concentrated in the quantum wells near the N-type doping region and the P-type doping region, resulting in uneven distribution of carriers between the quantum wells. Especially for holes with low mobility and high effective mass, this non-uniformity is more obvious. In addition, due to the inherent polarization effect of GaN-based materials, the transition probability decreases and the radiative recombination probability of carriers decreases.

[0004] At present, the preparation technology of blue and green LEDs has been relatively mature. The output wavelength of an LED using an InGaN-based multi-quantum well can be adjusted by changing the width, composition of the InGaN-based multi-quantum well structure, the number of quantum wells, or the thickness and composition of the barrier layer. For traditional InGaN-based multi-quantum well structure light-emitting diodes, due to the influence of factors such as the built-in polarization electric field, the radiative recombination probability of carriers in the InGaN-based multi-quantum well structure is low, and the internal quantum efficiency of the InGaN-based multi-quantum well structure for light emission is low, resulting in low luminous efficiency of the light-emitting diode based on this InGaN-based multi-quantum well structure.

[0005] In view of this, the inventor of the present invention specifically designed a semiconductor epitaxial structure, a manufacturing method thereof, and an LED chip, and this case was thus generated. Summary of the Invention

[0006] The purpose of the present invention is to provide a semiconductor epitaxial structure, a manufacturing method thereof, and an LED chip to solve the problem of low internal quantum efficiency in the active region.

[0007] In order to achieve the above purpose, the technical solution adopted by the present invention is as follows:

[0008] A semiconductor epitaxial structure includes a substrate, an N-type semiconductor layer, an active region, and a P-type semiconductor layer;

[0009] The active region includes alternately stacked barrier layers and well layers, and the well layer adjacent to the P-type semiconductor layer includes Al with a gradually decreasing In composition along the growth direction x Ga y In z N material layer, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1; the growth direction is perpendicular to the substrate and points from the substrate to the first-type semiconductor layer.

[0010] Preferably, the well layer closest to the P-type semiconductor layer is the last well layer, and the last well layer includes a P-type doped Al with a gradually decreasing In composition along the growth direction x Ga y In z N material layer.

[0011] Preferably, in the well layer, each In composition value corresponds to a sub-Al x Ga y In z N material layer, and the thicknesses of the sub-Al x Ga y In z N material layers gradually increase along the growth direction.

[0012] Preferably, the last well layer includes a first AlGaInN material layer and a second AlGaInN material layer stacked in sequence along the growth direction, and the In composition of the first AlGaInN material layer is greater than that of the second AlGaInN material layer.

[0013] Preferably, the thickness of the second AlGaInN material layer is 5 times or more that of the first AlGaInN material layer.

[0014] Preferably, the barrier layer closest to the P-type semiconductor layer is the last barrier layer, and the last barrier layer includes an undoped Al with a gradually changing Al composition along the growth direction a Ga b N material layer, where 0 ≤ a ≤ 1, 0 ≤ b ≤ 1.

[0015] Preferably, the Al composition value gradually decreases from the center position of the last barrier layer to both ends; further, the Al composition values at both ends of the last barrier layer can approach 0 infinitely.

[0016] Preferably, the last barrier layer includes a first AlGaN material layer, a second AlGaN material layer, and a third AlGaN material layer stacked in sequence along the growth direction, and the Al component of the second AlGaN material layer is higher than that of the first AlGaN material layer and / or the third AlGaN material layer.

[0017] Preferably, in the active region, except for the well layer with a graded In component, the components of the remaining well layers are constant and undoped.

[0018] Preferably, in the active region, except for the last barrier layer, the components of the remaining barrier layers are constant and N-type doped.

[0019] The present invention also provides a method for manufacturing a semiconductor epitaxial structure, and the manufacturing method includes the following steps:

[0020] Step S01: Provide a substrate;

[0021] Step S02: Grow an N-type semiconductor layer, an active region, and a P-type semiconductor layer on the surface of the substrate in sequence;

[0022] The active region includes alternately stacked barrier layers and well layers, and the well layer close to the P-type semiconductor layer includes an Al x Ga y In z N material layer in which the In component gradually decreases along the growth direction, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ z ≤ 1; the growth direction is perpendicular to the substrate and points from the substrate to the first-type semiconductor layer;

[0023] Further, the well layer closest to the P-type semiconductor layer is the last well layer, and the last well layer includes a P-type doped Al x Ga y In z N material layer; each In component value corresponds to a sub-Al x Ga y In z N material layer, and the thicknesses of the sub-Al x Ga y In z N material layers gradually thicken along the growth direction;

[0024] Further, the barrier layer closest to the P-type semiconductor layer is the last barrier layer, and the last barrier layer includes an undoped Al with a graded Al component along the growth direction a Ga bN material layer, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1; the Al component value gradually decreases from the center position of the last barrier layer to both ends.

[0025] Moreover, in the active region, except for the well layer with a gradually changing In component, the components of the other well layers are constant and undoped; except for the last barrier layer, the components of the other barrier layers are constant and N-type doped.

[0026] Preferably, the growth temperature of the well layer with a gradually changing In component is T2, and the growth temperature of the other well layers is T1, where 0 ≤ T2 - T1 ≤ 50 °C.

[0027] Preferably, the growth temperature of the last barrier layer is T3, and the growth temperature of the other barrier layers is T4, where 0 ≤ T4 - T3 ≤ 100 °C.

[0028] The present invention also provides an LED chip, including an epitaxial layer, an N-type electrode, and a P-type electrode, characterized in that the epitaxial layer includes the semiconductor epitaxial structure described in any one of the above.

[0029] Through the above technical solutions, it can be seen that for the semiconductor epitaxial structure provided by the present invention, by setting the well layer close to the P-type semiconductor layer to include an Al x Ga y In z N material layer, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ z ≤ 1; further, the last well layer along the growth direction includes a P-type doped Al x Ga y In z N material layer; a certain amount of holes can be stored at the edge of the active region, which is beneficial to the subsequent migration of holes into the active region, thereby improving the recombination efficiency of electrons and holes in the active region space.

[0030] Secondly, by: setting the well layer close to the P-type semiconductor layer to include an Al x Ga y In z N material layer; and each In component value corresponds to a sub-Al x Ga y In z N material layer, and the thickness of each sub-Al x Ga y In z N material layer gradually thickens along the growth direction; on the one hand, it is beneficial to better retain In in the active region and avoid the phenomenon of a large amount of In desorbing and escaping due to subsequent high-temperature growth; on the other hand, each sub-Alx Ga y In z The thickness of the N material layer gradually increases along the growth direction, which is also beneficial to improving the hole storage capacity of the active region.

[0031] Furthermore, the last barrier layer along the growth direction comprises non-doped Al with a gradient Al composition along the growth direction. a Ga b N material layer, wherein 0≤a≤1, 0≤b≤1; the Al component value gradually decreases from the center position of the last barrier layer to both ends; and except for the last barrier layer, the components of the remaining barrier layers are constant and N-type doped. The phenomenon of electron diffusion to the P-type semiconductor layer caused by N-type doping in the active area can be effectively reduced.

[0032] It can be seen from the above technical solutions that the method for manufacturing a semiconductor epitaxial structure provided by the present invention, while achieving the beneficial effects of the above semiconductor epitaxial structure, has a simple and convenient manufacturing process and is easy to produce.

[0033] It can be seen from the above technical solutions that the LED chip provided by the present invention is obtained on the basis of the above semiconductor epitaxial structure. Therefore, while it has the beneficial effects of the above semiconductor epitaxial structure, its manufacturing process is simple and convenient, and it is easy to produce. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0035] Figure 1 A schematic diagram of the structure of a semiconductor epitaxial structure provided by an embodiment of the present invention;

[0036] Figure 2 A schematic diagram of the structure of the last barrier layer and the last well layer of the active region provided by an embodiment of the present invention;

[0037] Figure 3 A schematic diagram of the growth temperature relationship of each component layer in the active region provided by an embodiment of the present invention;

[0038] Description of symbols in the figure: 1. Substrate, 2. N-type semiconductor layer, 3. Active region, 31. Barrier layer, 31.1. First AlGaN material layer, 31.2. Second AlGaN material layer, 31.3. Third AlGaN material layer, 32. Well layer, 32.1. First AlGaInN material layer, 32.2. Second AlGaInN material layer, 4. P-type semiconductor layer, 5. Buffer layer. Detailed implementation manners

[0039] To make the content of the present invention clearer, the content of the present invention will be further described below with reference to the accompanying drawings. The present invention is not limited to this specific embodiment. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0040] As Figure 1 、 Figure 2 shown, a semiconductor epitaxial structure includes a substrate 1, an N-type semiconductor layer 2, an active region 3, and a P-type semiconductor layer 4;

[0041] The active region 3 includes alternately stacked barrier layers 31 and well layers 32, and the well layer 32 close to the P-type semiconductor layer 4 includes an Al x Ga y In z InN material layer with a gradually decreasing In component along the growth direction, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1; the growth direction is perpendicular to the substrate 1 and points from the substrate 1 to the first-type semiconductor layer.

[0042] It is worth mentioning that the type of the substrate 1 is not limited in the semiconductor epitaxial structure of this embodiment. For example, the substrate 1 can be but is not limited to a sapphire substrate 1, a silicon substrate 1, etc. In addition, the specific material types of the N-type semiconductor layer 2, the active region 3, and the P-type semiconductor layer 4 can also be not limited in the semiconductor epitaxial structure of this embodiment. For example, the N-type semiconductor layer 2 can be but is not limited to a gallium nitride layer, and correspondingly, the P-type semiconductor layer 4 can be but is not limited to a gallium nitride layer.

[0043] In this embodiment, the well layer 32 closest to the P-type semiconductor layer 4 is the last well layer 32, and the last well layer 32 includes a P-type doped Al x Ga y In z InN material layer.

[0044] In this embodiment, in the well layer 32, each In component value corresponds to a sub-Al x Ga y In z InN material layer, and each sub-Al x Gay In z The thickness of the In material layer gradually increases along the growth direction.

[0045] In this embodiment, the last quantum well layer 32 includes a first AlGaInN material layer 32.1 and a second AlGaInN material layer 32.2 stacked in sequence along the growth direction, and the In component of the first AlGaInN material layer 32.1 is greater than that of the second AlGaInN material layer 32.2. It should be noted that this embodiment only exemplifies two sub-Al x Ga y In z N material layers. In other embodiments of the present invention, there may be multiple sub-Al x Ga y In z N material layers with different In components, and no specific limitation is made here. At the same time, this embodiment does not limit the specific indium component values of each sub-Al x Ga y In z N material layer, as long as In can be better retained in the active region according to the specific material and its thickness, and the phenomenon of a large amount of In desorbing and escaping due to subsequent high-temperature growth can be avoided.

[0046] In this embodiment, the thickness of the second AlGaInN material layer 32.2 is 5 times or more that of the first AlGaInN material layer 32.1.

[0047] In this embodiment, the barrier layer 31 closest to the P-type semiconductor layer 4 is the last barrier layer 31, and the last barrier layer 31 includes an undoped Al a Ga b N material layer with a gradually changing Al component along the growth direction, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1.

[0048] In this embodiment, the Al component value gradually decreases from the center position of the last barrier layer 31 to both ends; further, the Al component values at both ends of the last barrier layer 31 can be infinitely close to 0.

[0049] In this embodiment, the last barrier layer 31 includes a first AlGaN material layer 31.1, a second AlGaN material layer 31.2, and a third AlGaN material layer 31.3 stacked in sequence along the growth direction, and the Al component of the second AlGaN material layer 31.2 is higher than that of the first AlGaN material layer 31.1 and / or the third AlGaN material layer 31.3. It should be noted that this embodiment only exemplifies 3 sub-Al a Ga bThe N material layer. In other embodiments of the present invention, it can be multiple sub-Al with a gradually changing Al component x Ga y In z N material layer, which is not specifically limited here.

[0050] In this embodiment, in the active region 3, except for the well layer 32 with a gradually changing In component, the components of the other well layers 32 are constant and undoped.

[0051] In this embodiment, in the active region 3, except for the last barrier layer 31, the components of the other barrier layers 31 are constant and N-type doped.

[0052] In this embodiment, a buffer layer 5 can also be provided between the substrate 1 and the first-type semiconductor layer 2.

[0053] This embodiment also provides a manufacturing method of a semiconductor epitaxial structure. The manufacturing method includes the following steps:

[0054] Step S01: Provide a substrate 1;

[0055] Step S02: Sequentially grow an N-type semiconductor layer 2, an active region 3, and a P-type semiconductor layer 4 on the surface of the substrate 1;

[0056] The active region 3 includes alternately stacked barrier layers 31 and well layers 32, and the well layer 32 close to the P-type semiconductor layer 4 includes Al with a gradually decreasing In component along the growth direction x Ga y In z N material layer, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1; the growth direction is perpendicular to the substrate 1 and points from the substrate 1 to the first-type semiconductor layer;

[0057] Furthermore, the well layer 32 closest to the P-type semiconductor layer 4 is the last well layer 32, and the last well layer 32 includes P-type doping and Al with a gradually decreasing In component along the growth direction x Ga y In z N material layer; each In component value corresponds to a sub-Al x Ga y In z N material layer, and the thicknesses of the sub-Al x Ga y In z N material layers gradually thicken along the growth direction;

[0058] Furthermore, the barrier layer 31 closest to the P-type semiconductor layer 4 is the last barrier layer 31, and the last barrier layer 31 includes undoped and Al with a gradually changing Al component along the growth direction a Gab An N material layer, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1; the Al component value gradually decreases from the center position of the last barrier layer 31 towards both ends.

[0059] Moreover, in the active region 3, except for the well layer 32 with a gradually changing In component, the components of the other well layers are constant and undoped; except for the last barrier layer 31, the components of the other barrier layers are constant and N-type doped.

[0060] As Figure 3 shown, in this embodiment, the growth temperature of the well layer 32 with a gradually changing In component is T2, and the growth temperature of the other well layers 32 is T1, where 0 ≤ T2 - T1 ≤ 50 °C.

[0061] In this embodiment, the growth temperature of the last barrier layer 31 is T3, and the growth temperature of the other barrier layers 31 is T4, where 0 ≤ T4 - T3 ≤ 100 °C.

[0062] It should be noted that Figure 3 shown is a schematic diagram of the growth temperature relationship of each constituent layer in the active region 3 provided in this embodiment. It only exemplarily shows the linear change of the growth temperature of each constituent layer in the active region 3. This embodiment does not limit the specific temperature and its change trend of the barrier layer 31, the first AlGaN material layer 31.1, the second AlGaN material layer 31.2, the third AlGaN material layer 31.3, the well layer 32, the first AlGaInN material layer 32.1, and the second AlGaInN material layer 32.2 during the growth process, which can be linear or non-linear.

[0063] This embodiment also provides an LED chip, including an epitaxial layer, an N-type electrode, and a P-type electrode, characterized in that the epitaxial layer includes the semiconductor epitaxial structure of any one of the above.

[0064] Through the above technical solutions, it can be seen that for the semiconductor epitaxial structure provided by the present invention, by setting the well layer 32 close to the P-type semiconductor layer 4 to include an Al x Ga y In z N material layer, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ z ≤ 1; further, the last well layer 32 along the growth direction includes a P-type doped Al x Ga y In z N material layer; a certain amount of holes can be stored at the edge of the active region 3, which is beneficial to the subsequent migration of holes into the active region 3, thereby improving the recombination efficiency of electrons and holes in the space of the active region 3.

[0065] Secondly, by: setting the potential well layer 32 close to the P-type semiconductor layer 4 to include AlGaInN material layers with gradually decreasing In composition along the growth direction; and each In composition value corresponding to a sub-AlGaInN material layer, and the thickness of each sub-AlGaInN material layer gradually thickening along the growth direction; on the one hand, it is beneficial to better retain In in the active region 3 and avoid the phenomenon of a large amount of In desorbing and escaping due to subsequent high-temperature growth; on the other hand, the thickness of each sub-AlGaInN material layer gradually thickening along the growth direction is also beneficial to improving the hole storage capacity of the active region 3. x Ga y In z N material layer; and each In composition value corresponds to a sub-Al x Ga y In z N material layer, and the thickness of each sub-AlGaInN material layer gradually thickens along the growth direction; on the one hand, it is beneficial to better retain In in the active region 3 and avoid the phenomenon of a large amount of In desorbing and escaping due to subsequent high-temperature growth; on the other hand, the thickness of each sub-AlGaInN material layer gradually thickening along the growth direction is also beneficial to improving the hole storage capacity of the active region 3. x Ga y In z N material layer; on the one hand, it is beneficial to better retain In in the active region 3 and avoid the phenomenon of a large amount of In desorbing and escaping due to subsequent high-temperature growth; on the other hand, the thickness of each sub-AlGaInN material layer gradually thickening along the growth direction is also beneficial to improving the hole storage capacity of the active region 3. x Ga y In z N material layer, and the thickness of each sub-AlGaInN material layer gradually thickens along the growth direction, which is also beneficial to improving the hole storage capacity of the active region 3.

[0066] Furthermore, the last barrier layer 31 along the growth direction includes an undoped AlGaN material layer with a gradually changing Al composition along the growth direction, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1; the Al composition value gradually decreases from the center position of the last barrier layer 31 to both ends; and except for the last barrier layer 31, the compositions of the other barrier layers are constant and N-type doped. This can effectively reduce the phenomenon of electrons diffusing from the active region 3 to the P-type semiconductor layer 4 due to N-type doping. a Ga b N material layer, where 0 ≤ a ≤ 1, 0 ≤ b ≤ 1; the Al composition value gradually decreases from the center position of the last barrier layer 31 to both ends; and except for the last barrier layer 31, the compositions of the other barrier layers are constant and N-type doped. This can effectively reduce the phenomenon of electrons diffusing from the active region 3 to the P-type semiconductor layer 4 due to N-type doping.

[0067] As can be seen from the above technical solutions, the manufacturing method of the semiconductor epitaxial structure provided by the present invention, while achieving the beneficial effects of the above semiconductor epitaxial structure, has a simple and convenient process for manufacturing and is convenient for industrial production.

[0068] As can be seen from the above technical solutions, the LED chip provided by the present invention is obtained on the basis of the above semiconductor epitaxial structure. Therefore, while having the beneficial effects of the above semiconductor epitaxial structure, it has a simple and convenient process for manufacturing and is convenient for industrial production.

[0069] In this specification, the various embodiments are described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other.

[0070] It should also be noted that in this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that an article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the article or device comprising the above elements.

[0071] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A semiconductor epitaxial structure, comprising a substrate, an N-type semiconductor layer, an active region, and a P-type semiconductor layer, characterized in that: The active region includes alternately stacked barrier layers and well layers, and the well layer close to the P-type semiconductor layer includes Al x Ga y In z N material layer in which the In composition gradually decreases along the growth direction, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ z ≤ 1; x Ga y In z N material layer, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ z ≤ 1; Among them, the quantum well layer closest to the P-type semiconductor layer is the last quantum well layer, and the last quantum well layer includes a P-type doped Al x Ga y In z N material layer; in the quantum well layer, each In composition value corresponds to a sub-Al x Ga y In z N material layer, and the thicknesses of the sub-Al x Ga y In z N material layers gradually increase along the growth direction; The barrier layer closest to the P-type semiconductor layer is the last barrier layer, and the last barrier layer includes an undoped AlGaN material layer with a gradually changing Al composition along the growth direction, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1. a Ga b N material layer, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1.

2. The semiconductor epitaxial structure according to claim 1, wherein The last well layer includes a first AlGaInN material layer and a second AlGaInN material layer stacked in sequence along the growth direction, and the In composition of the first AlGaInN material layer is greater than that of the second AlGaInN material layer.

3. The semiconductor epitaxial structure according to claim 2, characterized in that, The thickness of the second AlGaInN material layer is 5 times or more of the thickness of the first AlGaInN material layer.

4. The semiconductor epitaxial structure according to claim 1, characterized in that, The Al composition value gradually decreases from the center position of the last barrier layer towards both ends.

5. The semiconductor epitaxial structure according to claim 1, characterized in that, The last barrier layer includes a first AlGaN material layer, a second AlGaN material layer, and a third AlGaN material layer stacked in sequence along the growth direction, and the Al composition of the second AlGaN material layer is higher than that of the first AlGaN material layer and / or the third AlGaN material layer.

6. The semiconductor epitaxial structure according to claim 1, characterized in that, In the active region, except for the well layer with a gradually changing In composition, the compositions of the remaining well layers are constant and undoped.

7. The semiconductor epitaxial structure according to claim 1, characterized in that In the active region, except for the last barrier layer, the compositions of the remaining barrier layers are constant and N-type doped.

8. A method for fabricating a semiconductor epitaxial structure, characterized in that, The manufacturing method includes the following steps: Step S01: Provide a substrate; Step S02: Grow an N-type semiconductor layer, an active region, and a P-type semiconductor layer on the surface of the substrate in sequence; The active region includes alternately stacked barrier layers and well layers, and the well layer close to the P-type semiconductor layer includes an Al x Ga y In z N material layer, where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ z ≤ 1; Further, the quantum well layer closest to the P-type semiconductor layer is the last quantum well layer, and the last quantum well layer includes a P-type doped Al x Ga y In z N material layer; each In component value corresponds to a sub-Al x Ga y In z N material layer, and the thicknesses of the sub-Al x Ga y In z N material layers gradually increase along the growth direction; Further, the barrier layer closest to the P-type semiconductor layer is the last barrier layer, and the last barrier layer includes an undoped AlGaN material layer with a gradually changing Al composition along the growth direction, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1; the Al composition value gradually decreases from the center position of the last barrier layer towards both ends; a Ga b N material layer, where 0 ≤ a ≤ 1 and 0 ≤ b ≤ 1; the Al composition value gradually decreases from the center position of the last barrier layer towards both ends; Moreover, in the active region, except for the well layer with a gradually changing In composition, the compositions of the remaining well layers are constant and undoped; except for the last barrier layer, the compositions of the remaining barrier layers are constant and N-type doped.

9. The manufacturing method of the semiconductor epitaxial structure according to claim 8, characterized in that, The growth temperature of the well layer with a gradually changing In composition is T2, and the growth temperature of the remaining well layers is T1, where 0 ≤ T2 - T1 ≤ 50 °C.

10. The manufacturing method of the semiconductor epitaxial structure according to claim 8, characterized in that, The growth temperature of the last barrier layer is T3, and the growth temperature of the remaining barrier layers is T4, where 0 ≤ T4 - T3 ≤ 100 °C.

11. An LED chip, comprising an epitaxial layer, an N-type electrode and a P-type electrode, characterized in that, The epitaxial layer includes the semiconductor epitaxial structure according to any one of claims 1-7.

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