image sensor

By setting a polarizer on the surface of the image sensor substrate and using trenches and patterned structures to adjust the polarization state and wavelength of light, the shortcomings of existing image sensors in incident light sensitivity and polarization sensing are solved, and the performance of the image sensor is improved, especially in the absorption rate of infrared light and polarization sensing capability.

CN112786628BActive Publication Date: 2025-11-21SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202010824114.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-11-04
Filing Date
2020-08-17
Publication Date
2025-11-21
Estimated Expiration
2040-08-17

AI Technical Summary

Technical Problem

Existing image sensors are inadequate in terms of incident light sensitivity and polarization sensing, making it difficult to meet the requirements of high-performance image sensors.

Method used

A polarizer, including trenches and an overpattern structure, is set on the substrate surface of an image sensor. By adjusting the width, thickness, and material composition of the trenches and the overpattern, the polarization state and wavelength of light can be controlled, thereby enhancing the light absorption rate and sensitivity.

Benefits of technology

It improves the incident light sensitivity of the image sensor and enables the sensing of polarized light, thereby enhancing the performance of the image sensor, especially in terms of infrared light absorption and polarization sensing capabilities.

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Abstract

An image sensor includes a substrate having a first surface and a second surface opposite to each other, a photoelectric conversion region provided in the substrate, and a polarizer provided on the first surface of the substrate. The polarizer includes a lower structure including at least one trench recessed from the first surface of the substrate toward the photoelectric conversion region, and a plurality of upper patterns provided on the lower structure and spaced apart from each other in a first direction parallel to the first surface.
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Description

[0001] Cross-references to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2019-0139415, filed on November 4, 2019, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Embodiments of this disclosure relate to an image sensor, and more specifically, to a complementary metal-oxide-semiconductor (CMOS) image sensor. Background Technology

[0004] An image sensor is a semiconductor device that converts optical images into electrical signals. With the recent development of computer and electronic device technologies, the demand for high-performance image sensors is growing in various fields such as digital cameras, camcorders, personal communication systems (PCS), game consoles, security cameras, and medical miniature cameras. Recently, image sensors for realizing three-dimensional (3D) images as well as color images have been developed. Summary of the Invention

[0005] Embodiments of this disclosure can provide an image sensor that can improve the sensitivity of incident light and sense polarization.

[0006] According to one aspect of this disclosure, an image sensor is provided, which may include: a substrate having a first surface and a second surface opposite to each other; a photoelectric conversion region disposed in the substrate; and a polarizer disposed on the first surface of the substrate. The polarizer may include: a lower structure including at least one trench recessed from the first surface of the substrate toward the photoelectric conversion region; and a plurality of upper patterns disposed on the lower structure and spaced apart from each other in a first direction parallel to the first surface.

[0007] According to another aspect of this disclosure, an image sensor is provided, which may include: a substrate having a first surface and a second surface opposite to each other; a device isolation pattern disposed in the substrate; a photoelectric conversion region disposed in the substrate and disposed between the device isolation patterns; and a polarizer disposed on the first surface of the substrate. The polarizer may include: a lower structure including a plurality of lower patterns protruding from the substrate and a lower insulating pattern disposed between the lower patterns; and an upper pattern disposed on the lower structure. The lower structure may be disposed between the photoelectric conversion region and the upper pattern, and between the device isolation patterns.

[0008] According to another aspect of this disclosure, an image sensor is provided, comprising: a pixel array including a plurality of unit pixels arranged two-dimensionally in a first direction and a second direction D2 intersecting the first direction, wherein each of the plurality of unit pixels includes: a substrate; a photoelectric conversion region disposed in the substrate; and a polarizer disposed on a surface of the substrate, wherein the polarizer includes: a lower structure including at least one trench recessed from the surface of the substrate toward the photoelectric conversion region; and a plurality of upper patterns disposed on the lower structure and spaced apart from each other in a first direction parallel to the surface, wherein the polarizer of a first unit pixel among the plurality of unit pixels has a different polarization axis than the polarizer of a second unit pixel among the plurality of unit pixels. Attached Figure Description

[0009] This disclosure will become more apparent from the accompanying drawings and detailed description.

[0010] Figure 1 This is a circuit diagram of the pixels of an image sensor according to some embodiments of the present disclosure.

[0011] Figure 2 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0012] Figures 3 to 7 The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2 The cross-sectional view corresponding to line I-I'.

[0013] Figure 8 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0014] Figure 9 It is along Figure 8 The cross-sectional view taken from line I-I'.

[0015] Figure 10 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0016] Figure 11 It is along Figure 10 The cross-sectional view taken from line I-I'.

[0017] Figure 12 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0018] Figure 13 and Figure 14 They are along Figure 12 The cross-sectional views taken from lines I-I' and II-II'.

[0019] Figure 15 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0020] Figure 16 It is along Figure 15 The cross-sectional view taken from line I-I'.

[0021] Figure 17 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0022] Figure 18 It is along Figure 17 The cross-sectional view taken from line II-II'.

[0023] Figure 19A and Figure 19B This is a plan view illustrating some portions of the pixels of an image sensor according to some embodiments of the present disclosure.

[0024] Figure 20 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0025] Figure 21 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0026] Figure 22 It is along Figure 21 The cross-sectional view taken from line II-II'.

[0027] Figure 23 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure.

[0028] Figure 24 It is along Figure 23 The cross-sectional view taken from line II-II'.

[0029] Figure 25 and Figure 26 The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2 The cross-sectional view corresponding to line I-I'.

[0030] Figures 27 to 30 This is a plan view illustrating a pixel array of an image sensor according to some embodiments of the present disclosure.

[0031] Figure 31 This is a schematic block diagram illustrating an image sensor according to some embodiments of the present disclosure. Detailed Implementation

[0032] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0033] Figure 1 This is a circuit diagram of the pixels of an image sensor according to some embodiments of the present disclosure.

[0034] Reference Figure 1 A unit pixel PX of an image sensor may include a photoelectric conversion element PD, a transfer transistor Tx, a source follower transistor Sx, a reset transistor Rx, and a select transistor Ax. The transfer transistor Tx may include a transfer gate TG, the source follower transistor Sx may include a source follower gate SG, the reset transistor Rx may include a reset gate RG, and the select transistor Ax may include a select gate AG.

[0035] The photoelectric conversion element PD can be a photodiode including both P-type and N-type doped regions. The floating diffused region FD can be used as the drain of the transfer transistor Tx. The floating diffused region FD can also be used as the source of the reset transistor Rx. The floating diffused region FD can be electrically connected to the source follower gate SG of the source follower transistor Sx. The source follower transistor Sx can be connected to the select transistor Ax.

[0036] The following text will refer to Figure 1 The operation of an image sensor according to some embodiments of the present disclosure is described. Externally incident light can generate electron-hole pairs in a photoelectric conversion element (PD). Holes can move to and accumulate in a P-type doped region of the PD, and electrons can move to and accumulate in an N-type doped region of the PD. With electrons blocked from moving into a floating diffusion region (FD), a power supply voltage VDD can be applied to the drain of a reset transistor Rx and the drain of a source follower transistor Sx. The reset transistor Rx can be turned on to discharge the charge retained in the floating diffusion region (FD). Subsequently, a transfer transistor Tx can be turned on to transfer charge (e.g., electrons or holes) to the floating diffusion region (FD). The transferred charge can accumulate in the floating diffusion region (FD). The gate bias of the source follower transistor Sx can be changed proportionally to the amount of charge accumulated in the floating diffusion region (FD), resulting in a change in the source potential of the source follower transistor Sx. At this point, the select transistor Ax can be turned on, so the signal generated by the charge (i.e., Vout) can be sensed through the column line.

[0037] A unit pixel PX, comprising a single photoelectric conversion element PD and four transistors Tx, Rx, Ax, and Sx, is shown as Figure 1 Examples are shown in the figures. However, embodiments of this disclosure are not limited thereto. In certain embodiments, pixels PX can be configured as a plurality, and the reset transistor Rx, source follower transistor Sx, and / or select transistor Ax can be shared by adjacent pixels PX. Therefore, the integration density of the image sensor can be improved.

[0038] Figure 2 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Figure 3 It is along Figure 2 The cross-sectional view taken from line I-I'.

[0039] Reference Figure 2 and Figure 3 Device isolation patterns 120 may be disposed in substrate 100 to define pixel regions PXR. Substrate 100 may be a semiconductor substrate (e.g., a silicon substrate, germanium substrate, silicon-germanium substrate, group II-VI compound semiconductor substrate, or group III-V compound semiconductor substrate) or a silicon-on-insulator (SOI) substrate. Substrate 100 may have a first surface 100a and a second surface 100b opposite to each other. Each of the device isolation patterns 120 may penetrate at least a portion of substrate 100. For example, each of the device isolation patterns 120 may extend from the first surface 100a of substrate 100 into substrate 100 and may be spaced apart from the second surface 100b of substrate 100. Each of the device isolation patterns 120 may be disposed between adjacent pixel regions PXR and may prevent crosstalk between adjacent pixel regions PXR. When viewed from a plan view, the device isolation patterns 120 may be configured to surround the pixel regions PXR. Device isolation patterns 120 may include insulating materials (such as silicon oxide, silicon nitride, and / or silicon oxynitride).

[0040] A photodiode (PD) can be disposed within a pixel region (PXR). The PD can be disposed between device isolation patterns 120 in a substrate 100. The substrate 100 can have a first conductivity type, and the PD can be a region doped with a dopant having a second conductivity type different from the first conductivity type. For example, the first conductivity type and the second conductivity type can be P-type and N-type, respectively. In this case, the second conductivity type dopant can include N-type dopants (such as phosphorus, arsenic, bismuth, and / or antimony). A photodiode can be formed by bonding a substrate 100 having the first conductivity type and a PD having the second conductivity type. A floating diffusion region (FD) can be disposed within the pixel region (PXR). The FD can be disposed adjacent to the second surface 100b of the substrate 100 and can be a region doped with a dopant having the second conductivity type.

[0041] A transfer gate TG can be disposed on the pixel region PXR and on the second surface 100b of the substrate 100. The transfer gate TG can be disposed adjacent to the floating diffusion region FD. An interconnect structure 110 can be disposed on the second surface 100b of the substrate 100. The interconnect structure 110 can include a first interlayer insulating layer 110a, a second interlayer insulating layer 110b, and a third interlayer insulating layer 110c sequentially stacked on the second surface 100b of the substrate 100. The first interlayer insulating layer 110a can contact the second surface 100b of the substrate 100 and can cover the transfer gate TG. The interconnect structure 110 can also include a via 112 penetrating the first interlayer insulating layer 110a and interconnect lines 114 disposed in the second interlayer insulating layer 110b and the third interlayer insulating layer 110c. The via 112 can be connected to the floating diffusion region FD and can be connected to a corresponding one of the interconnect lines 114.

[0042] Polarizer 180 may be disposed on pixel region PXR and may be disposed adjacent to first surface 100a of substrate 100. Polarizer 180 may include lower structure 150 and a plurality of upper patterns 160 disposed on lower structure 150. Lower structure 150 may include a plurality of trenches 130T recessed into substrate 100 from first surface 100a. Lower structure 150 may include a plurality of lower patterns 130 defined by the plurality of trenches 130T. Lower patterns 130 may be protrusions of substrate 100 disposed between trenches 130T. The topmost surface of lower pattern 130 may correspond to first surface 100a of substrate 100. Trenches 130T and lower patterns 130 may be disposed between device isolation patterns 120 and on photoelectric conversion region PD.

[0043] In some embodiments, the trenches 130T may be spaced apart from each other in a first direction D1 parallel to the first surface 100a of the substrate 100. Each of the trenches 130T may have a line shape extending in a second direction, which is parallel to the first surface 100a and intersects the first direction D1. Each of the lower patterns 130 may have a line shape extending in a second direction D2 between the trenches 130T in a plan view.

[0044] The lower structure 150 may further include a plurality of lower insulating patterns 140 respectively disposed in the trench 130T. In some embodiments, the lower insulating patterns 140 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the lower insulating patterns 140 may have a line shape extending in the second direction D2. The lower insulating patterns 140 and the lower patterns 130 may be arranged alternately in the first direction D1. The lower insulating patterns 140 may include insulating materials such as silicon oxide, silicon nitride, and / or silicon oxynitride.

[0045] The lower structure 150 may further include a passivation layer 142 disposed between the lower insulating pattern 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130. The passivation layer 142 may cover a first surface 100a of the substrate 100. In some embodiments, the passivation layer 142 may also extend between each of the device isolation patterns 120 and the substrate 100. The passivation layer 142 may conformally cover the inner surface of each of the trenches 130T, and may be disposed between the inner surface of each of the trenches 130T and each of the lower insulating patterns 140. For example, the passivation layer 142 may include an insulating layer (e.g., a silicon oxide layer, a silicon nitride layer, and / or a silicon oxynitride layer) and / or a metal oxide layer (e.g., an aluminum oxide layer, a hafnium oxide layer, and / or a tantalum oxide layer).

[0046] The upper pattern 160 can be disposed on the lower structure 150, and the lower structure 150 can be disposed between the photoelectric conversion region PD and the upper pattern 160. The upper pattern 160 and the lower structure 150 can vertically overlap with the photoelectric conversion region PD. Each of the upper patterns 160 can vertically overlap with at least one of the lower patterns 130 and the lower insulating pattern 140.

[0047] In some embodiments, the upper patterns 160 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the upper patterns 160 may have a line shape extending in the second direction D2. The upper patterns 160 may be aligned on the lower patterns 130 respectively. Each of the upper patterns 160 may include a first upper pattern 162 on the lower structure 150 and a second upper pattern 164 between the lower structure 150 and the first upper pattern 162. The first upper pattern 162 and the second upper pattern 164 may include materials with different refractive indices. The first upper pattern 162 may include at least one of a metal (e.g., aluminum, tungsten, or copper) and a high-k dielectric material (e.g., SiN, TiO2, or AlO), and the second upper pattern 164 may include a low-k dielectric material (e.g., SiO, SiN, SiON, SiC, SICN, or SiCO). The second upper pattern 164 may be in direct contact with a passivation layer 142 disposed on a corresponding one of the lower patterns 130.

[0048] Each of the upper pattern 160, the lower pattern 130, and the groove 130T may have a width in the first direction D1. The first width W1 of each of the upper patterns 160 may be equal to or less than the second width W2 of each of the lower patterns 130 (i.e., W1 ≤ W2), and may be equal to or less than the third width W3 of each of the grooves 130T (i.e., W1 ≤ W3). In some embodiments, the first width W1 may be less than each of the second width W2 and the third width W3.

[0049] The upper patterns 160 can be spaced apart by a first distance d1 in the first direction D1. The pitch PT1 of the upper patterns 160 can be the sum of the first width W1 of each of the upper patterns 160 and the first distance d1 between the upper patterns 160 (i.e., PT1 = W1 + d1), and the pitch PT2 of the lower patterns 130 can be the sum of the second width W2 of each of the lower patterns 130 and the third width W3 of each of the grooves 130T (i.e., PT2 = W2 + W3). The pitch PT1 of the upper patterns 160 can be equal to or less than the pitch PT2 of the lower patterns 130 (i.e., PT1 ≤ PT2).

[0050] Each of the first upper pattern 162, the second upper pattern 164, and the lower pattern 130 may have a thickness in a direction perpendicular to the first surface 100a of the substrate 100. The thickness T3 of each of the lower patterns 130 may be greater than the first thickness T1 of the first upper pattern 162 and may be greater than the second thickness T2 of the second upper pattern 164.

[0051] Light L incident on the first surface 100a of the substrate 100 can be polarized by a polarizer 180, and the polarized light L can be incident on the pixel region PXR. The polarization direction of the polarized light L can be perpendicular to the extension direction of the upper pattern 160 of the polarizer 180 (e.g., the second direction D2). The polarization state and wavelength of the polarized light L can be adjusted by changing the width W1 of the upper pattern 160, the width W2 of the lower pattern 130, the width W3 of the trench 130T, and the thickness T1 of the first upper pattern 162, the thickness T2 of the second upper pattern 164, and the thickness T3 of the lower pattern 130.

[0052] A planarization layer 190 may be disposed on a first surface 100a of the substrate 100 to cover the polarizer 180. The planarization layer 190 may extend between upper patterns 160 to cover the lower structure 150. For some examples, the planarization layer 190 may include Al2O3, CeF3, HfO2, ITO, MgO, Ta2O5, TiO2, ZrO2, Si, Ge, ZnSe, ZnS, and / or PbF2. For other examples, the planarization layer 190 may include organic materials with high refractive indices, such as siloxane resins, benzocyclobutene (BCB), polyimide resins, acrylic resins, parylene C, polymethyl methacrylate (PMMA), and / or polyethylene terephthalate (PET). In other examples, the planarization layer 190 may include strontium titanate (SrTiO3), polycarbonate, glass, bromine, sapphire, cubic zirconium oxide, potassium niobate (KNbO3), silicon carbide (SiC), gallium phosphide (III) (GaP) and / or gallium arsenide (III) (GaAs).

[0053] Microlens 200 can be disposed on planarization layer 190. Microlens 200 can be vertically overlapped with photoelectric conversion region PD. Microlens 200 can change the optical path of light L to provide light L to pixel region PXR.

[0054] The following describes a method for forming pixels PX of an image sensor according to some embodiments of the present disclosure.

[0055] Refer again Figure 2 and Figure 3 A photoelectric conversion region PD can be formed in the substrate 100. A floating diffusion region FD can be formed in the substrate 100, and the floating diffusion region FD can be formed adjacent to the second surface 100b of the substrate 100. A transmission gate TG can be formed on the second surface 100b of the substrate 100, and the transmission gate TG can be formed adjacent to the floating diffusion region FD. An interconnect structure 110 can be formed on the second surface 100b of the substrate 100.

[0056] Device isolation trenches 120T and trenches 130T can be formed in substrate 100. The formation of device isolation trenches 120T and trenches 130T may include recessing a first surface 100a of substrate 100. Device isolation trench 120T may be deeper than trench 130T. Due to the formation of trench 130T, substrate 100 may include a lower pattern 130 between trenches 130T.

[0057] In some embodiments, the passivation layer 142 may be formed to fill a portion of each of the device isolation trenches 120T and 130T. The passivation layer 142 may conformally cover the inner surfaces of the device isolation trenches 120T and 130T, and may cover the first surface 100a of the substrate 100.

[0058] Device isolation pattern 120 and lower insulating pattern 140 can be formed in device isolation trench 120T and trench 130T, respectively. For example, the formation of device isolation pattern 120 and lower insulating pattern 140 may include forming an insulating layer on a first surface 100a of substrate 100 that fills the remaining portion of device isolation trench 120T and trench 130T, and planarizing the insulating layer. Device isolation pattern 120 and lower insulating pattern 140 can be locally formed in device isolation trench 120T and trench 130T by a planarization process. Trench 130T, lower pattern 130, passivation layer 142 and lower insulating pattern 140 can constitute lower structure 150.

[0059] An upper pattern 160 may be formed on the lower structure 150. For example, forming the upper pattern 160 may include forming an upper layer on the lower structure 150 and patterning the upper layer. In some embodiments, the upper layer may include a first upper layer on the lower structure 150 and a second upper layer between the lower structure 150 and the first upper layer. The first upper layer may include at least one of a metal (e.g., tungsten or copper) and a high-k dielectric material (e.g., SiN, TiO2, or AlO), and the second upper layer may include a low-k dielectric material (e.g., SiO, SiN, SiON, SiC, SiCN, or SiCO). The lower structure 150 and the upper pattern 160 may constitute a polarizer 180.

[0060] A planarization layer 190 can be formed on the polarizer 180, and the planarization layer 190 can fill the space between the patterns 160. Then, a microlens 200 can be formed on the planarization layer 190.

[0061] According to embodiments of this disclosure, polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 located on the lower structure 150. The first surface 100a of substrate 100 may have a non-uniform structure through the trench 130T and the lower pattern 130. In this case, light L incident on the first surface 100a of substrate 100 can be scattered by the non-uniform structure, thus increasing the optical path of light L. As a result, the light absorption rate in the pixel region PXR can be improved. Specifically, when light L is infrared light (e.g., near-infrared light), the light absorption rate in the pixel region PXR can be improved, and therefore, the photosensitiveness of the image sensor can be improved.

[0062] Alternatively, the trench 130T and the lower pattern 130 can be formed by recessing the first surface 100a of the substrate 100. Therefore, the process for forming the polarizer 180 can be easily performed. Furthermore, the polarization state and wavelength of the light L can be adjusted by varying the width W1 of the upper pattern 160, the width W2 of the lower pattern 130, the width W3 of the trench 130T, and the thicknesses T1 and T2 of the upper pattern 160 and the thickness T3 of the lower pattern 130.

[0063] As a result, it is possible to easily manufacture an image sensor that can improve the sensitivity of incident light L and sense the polarization of light L.

[0064] Figure 4 The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2 The cross-sectional view corresponding to line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0065] Reference Figure 2 and Figure 4 The anti-reflective pattern 170 can be disposed on the polarizer 180. The anti-reflective pattern 170 can be disposed on the upper pattern 160 of the polarizer 180. The anti-reflective patterns 170 can be spaced apart from each other in a first direction D1 and can extend in a second direction D2. Each of the anti-reflective patterns 170 can have a line shape extending in the second direction D2. For example, the anti-reflective pattern 170 can include SiN, SiON, SiC, SiCN, or SiCO.

[0066] Figure 5 The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2 The cross-sectional view corresponding to line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0067] Reference Figure 2 and Figure 5 The filter 195 can be disposed between the planarization layer 190 and the microlens 200. The filter 195 can be vertically overlapped with the photoelectric conversion region PD. The filter 195 can be configured to filter a specific wavelength of light L incident on the first surface 100a of the substrate 100. For example, the filter 195 can be a color filter for transmitting visible light of a specific color or an infrared filter for transmitting infrared light.

[0068] Figure 6The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2 The cross-sectional view corresponding to line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0069] Reference Figure 2 and Figure 6 The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: a lower insulating pattern 140 disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating pattern 140 and the lower pattern 130. According to an embodiment, each of the upper patterns 160 may be a single-layer pattern comprising at least one of a metal (e.g., tungsten or copper) and a high-k dielectric material (e.g., SiN, TiO2, or AlO). In other words, each of the upper patterns 160 may be associated with a reference... Figure 2 and Figure 3 The first upper pattern 162 described is essentially the same, and the reference can be omitted. Figure 2 and Figure 3 The second upper pattern 164 is described. Each of the upper patterns 160 can be in direct contact with a passivation layer 142 disposed on a corresponding one of the lower patterns 130. According to an embodiment, each of the upper patterns 160 can be formed by a single-layer pattern, thus, the process for forming the upper pattern 160 can be easily performed. As a result, the polarizer 180 can be easily formed on the substrate 100.

[0070] Figure 7 The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2 The cross-sectional view corresponding to line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0071] Reference Figure 2 and Figure 7 The polarizer 180 may include: a lower structure 150, which includes a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include lower insulating patterns 140 disposed in the trench 130T. According to an embodiment, the lower insulating pattern 140 may directly contact the sidewall of the lower pattern 130. In other words, references may be omitted. Figure 2 and Figure 3The passivation layer 142 is described. Each of the upper patterns 160 may include a first upper pattern 162 on the lower structure 150 and a second upper pattern 164 between the lower structure 150 and the first upper pattern 162. The second upper pattern 164 may be in direct contact with a corresponding one of the lower patterns 130.

[0072] Figure 8 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Figure 9 It is along Figure 8 A cross-sectional view taken from line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0073] Reference Figure 8 and Figure 9 The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130.

[0074] According to an embodiment, the upper patterns 160 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the upper patterns 160 may have a line shape extending in the second direction D2. Each of the upper patterns 160 may vertically overlap with a corresponding one of the lower patterns 130 and a corresponding one of the lower insulating patterns 140. Each of the upper patterns 160 may be disposed on the boundary of a corresponding one in the groove 130T and a corresponding lower pattern 130, and may vertically overlap with a portion of the corresponding lower pattern 130 and a portion of the corresponding lower insulating pattern 140.

[0075] Each of the upper patterns 160 may include a first upper pattern 162 on the lower structure 150 and a second upper pattern 164 between the lower structure 150 and the first upper pattern 162. The second upper pattern 164 may be in direct contact with a passivation layer 142 disposed on a corresponding one of the lower patterns 130, and may be in direct contact with a corresponding one of the lower insulating patterns 140.

[0076] Figure 10 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Figure 11 It is along Figure 10A cross-sectional view taken from line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0077] Reference Figure 10 and Figure 11 The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130.

[0078] According to an embodiment, the upper patterns 160 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the upper patterns 160 may have a line shape extending in the second direction D2. The upper patterns 160 may be aligned on the lower insulating patterns 140 respectively. Each of the upper patterns 160 may include: a first upper pattern 162 on the lower structure 150; and a second upper pattern 164 between the lower structure 150 and the first upper pattern 162. The second upper pattern 164 may be in direct contact with a corresponding one of the lower insulating patterns 140.

[0079] Figure 12 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Figure 13 and Figure 14 They are along Figure 12 The cross-sectional views are taken from lines I-I' and II-II'. In the following description, for ease of understanding and explanation, the pixel PX of this embodiment and the reference pixel will be primarily described. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0080] Reference Figure 12 , Figure 13 and Figure 14 The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130.

[0081] According to an embodiment, trenches 130T may extend in a first direction D1 and may be spaced apart from each other in a second direction D2. Each of the trenches 130T may have a linear shape extending in the first direction D1. Each of the lower patterns 130 may have a linear shape extending in the first direction D1 between the trenches 130T. Lower insulating patterns 140 may extend in the first direction D1 and may be spaced apart from each other in the second direction D2. Each of the lower insulating patterns 140 may have a linear shape extending in the first direction D1. The lower insulating patterns 140 and lower patterns 130 may be arranged alternately in the second direction D2.

[0082] The upper pattern 160 may be disposed on the lower structure 150 and may intersect with the trench 130T, the lower pattern 130, and the lower insulating pattern 140. The upper patterns 160 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the upper patterns 160 may have a line shape extending in the second direction D2. Each of the upper patterns 160 may intersect with the trench 130T, the lower pattern 130, and the lower insulating pattern 140. Each of the upper patterns 160 may include a first upper pattern 162 on the lower structure 150 and a second upper pattern 164 between the lower structure 150 and the first upper pattern 162. The second upper pattern 164 may be in direct contact with the passivation layer 142 on the lower pattern 130 and the lower insulating pattern 140.

[0083] Figure 15 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Figure 16 It is along Figure 15 A cross-sectional view taken from line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0084] Reference Figure 15 and Figure 16 The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130.

[0085] According to an embodiment, the upper patterns 160 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the upper patterns 160 may have a line shape extending in the second direction D2. The upper patterns 160 may be aligned respectively on the lower patterns 130 and the lower insulating patterns 140. Each of the upper patterns 160 may vertically overlap a corresponding one of the lower patterns 130 and the lower insulating pattern 140. Each of the upper patterns 160 may include a first upper pattern 162 on the lower structure 150 and a second upper pattern 164 between the lower structure 150 and the first upper pattern 162. The second upper pattern 164 may be in direct contact with a passivation layer 142 provided on a corresponding one of the lower patterns 130, or may be in direct contact with a corresponding one of the lower insulating patterns 140.

[0086] Each of the upper patterns 160, the lower patterns 130, and the trenches 130T may have a width in the first direction D1. A first width W1 of each of the upper patterns 160 may be less than a second width W2 of each of the lower patterns 130 and may be less than a third width W3 of each of the trenches 130T. The upper patterns 160 may be spaced apart from each other in the first direction D1 by a first distance d1. A pitch PT1 of the upper patterns 160 may be a sum of the first width W1 of each of the upper patterns 160 and the first distance d1 between the upper patterns 160 (i.e., PT1 = W1 + d1), and a pitch PT2 of the lower patterns 130 may be a sum of the second width W2 of each of the lower patterns 130 and the third width W3 of each of the trenches 130T (i.e., PT2 = W2 + W3). The pitch PT1 of the upper patterns 160 may be less than the pitch PT2 of the lower patterns 130 (i.e., PT1 < PT2).

[0087] Figure 17 is a plan view of a pixel of an image sensor according to some embodiments of the present disclosure, Figure 18 is a cross-sectional view taken along line Figure 17 II-II'. Figure 18 The cross-sectional view taken along line Figure 17 I-I' shown in Figure 13 is substantially the same as

[0088] Referring to Figure 17 , Figure 18 and Figure 13 , in an embodiment, the pitch PT1 of the upper patterns 160 may be less than the pitch PT2 of the lower patterns 130 (i.e., PT1 < PT2). In addition to these features, other features and components of the pixel PX of the image sensor according to an embodiment may be substantially the same as the corresponding features and corresponding components of the pixel PX of the image sensor described with reference to Figure 12 , Figure 13 and Figure 14 .

[0089] Figure 19A and Figure 19B This is a plan view illustrating a portion of the pixels of an image sensor according to some embodiments of the present disclosure.

[0090] Reference Figure 19A and Figure 19B The polarizer 180 may include: a lower structure 150 including a plurality of trenches 130T recessed from a first surface 100a of the substrate 100 into the substrate 100; and a plurality of upper patterns 160 disposed on the lower structure 150. For ease of explanation and illustration, Figure 19A and Figure 19B The upper pattern 160 is omitted. In some embodiments, refer to... Figure 19A The trench 130T may include a first trench 130T1 and a second trench 130T2 intersecting the first trench 130T1. The first trenches 130T1 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. The second trenches 130T2 may be spaced apart from each other in the second direction D2 and may extend in the first direction D1. The first trench 130T1 may be connected to the second trench 130T2. The trench 130T may have a grid structure through the first trench 130T1 and the second trench 130T2. In a particular embodiment, reference is made to... Figure 19B The grooves 130T can be spaced apart from each other in the first direction D1 and the second direction D2, so the grooves 130T can have a dot array structure.

[0091] Figure 20 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Along Figure 20 The cross-sectional views taken from lines I-I' and II-II' are respectively compared with... Figure 16 and Figure 13 They are essentially the same. In the following text, for ease of explanation, the pixel PX of this embodiment will be primarily described in relation to the reference pixel. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0092] Reference Figure 20 , Figure 13 and Figure 16The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130. In an embodiment, the trench 130T may include a reference... Figure 19A The first groove 130T1 and the second groove 130T2 are described. The groove 130T can have a grid structure through the first groove 130T1 and the second groove 130T2.

[0093] The upper patterns 160 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the upper patterns 160 may have a line shape extending in the second direction D2. In some embodiments, the pitch PT1 of the upper patterns 160 may be smaller than the pitch PT2 of the lower patterns 130 disposed in the first groove 130T1.

[0094] Figure 21 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Figure 22 It is along Figure 21 A cross-sectional view taken along line II-II'. Figure 21 The cross-sectional view of line I-I' and Figure 11 They are essentially the same. In the following text, for ease of explanation, the pixel PX of this embodiment will be primarily described in relation to the reference pixel. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0095] Reference Figure 21 , Figure 22 and Figure 11 The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130. In an embodiment, the trench 130T may have a reference... Figure 19B The described dot array structure. In this case, the lower insulating pattern 140 can be arranged in two dimensions in the first direction D1 and the second direction D2.

[0096] The upper patterns 160 may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. Each of the upper patterns 160 may have a line shape extending in the second direction D2. In some embodiments, the upper patterns 160 may be aligned on lower insulating patterns 140 spaced apart from each other in the first direction D1. Each of the upper patterns 160 may overlap the lower insulating patterns 140 spaced apart from each other in the second direction D2.

[0097] Figure 23 This is a plan view illustrating the pixels of an image sensor according to some embodiments of the present disclosure. Figure 24 It is along Figure 23 A cross-sectional view taken along line II-II'. Figure 23 The cross-sectional view of line I-I' and Figure 11 They are essentially the same. In the following text, for ease of explanation, the pixel PX of this embodiment will be primarily described in relation to the reference pixel. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0098] Reference Figure 23 , Figure 24 and Figure 11 The polarizer 180 may include: a lower structure 150 including a trench 130T and a lower pattern 130; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and the substrate 100, and may extend to the top surface of the lower pattern 130. In an embodiment, the trench 130T may have a reference... Figure 19B The described dot array structure. In this case, the lower insulating pattern 140 can be arranged in two dimensions in the first direction D1 and the second direction D2.

[0099] In some embodiments, the upper patterns 160 may be arranged two-dimensionally in a first direction D1 and a second direction D2. The upper patterns 160 may be aligned on the lower insulating patterns 140 respectively. Each of the upper patterns 160 may have a strip shape extending in the second direction D2. For example, each of the upper patterns 160 may have a width W1 in the first direction D1 and a width W4 in the second direction D2, wherein the width W4 in the second direction D2 may be greater than the width W1 in the first direction D1.

[0100] Figure 25 The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2The cross-sectional view corresponding to line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0101] Reference Figure 2 and Figure 25 Each of the device isolation patterns 120 may penetrate the substrate 100. For example, each of the device isolation patterns 120 may extend from the second surface 100b of the substrate 100 into the substrate 100, and the first surface 100a of the substrate 100 may expose one surface of each of the device isolation patterns 120.

[0102] Polarizer 180 may include: a lower structure 150 including a trench 130T recessed from a first surface 100a of substrate 100 into substrate 100; and an upper pattern 160 disposed on the lower structure 150. The lower structure 150 may further include: a lower pattern 130 defined by the trench 130T; lower insulating patterns 140 respectively disposed in the trench 130T; and a passivation layer 142 disposed between the lower insulating patterns 140 and the lower pattern 130. The passivation layer 142 may extend between each of the lower insulating patterns 140 and substrate 100, and may extend to the top surface of the lower pattern 130. In an embodiment, the passivation layer 142 may cover the first surface 100a of substrate 100 and may extend to the exposed surface of each of the device isolation patterns 120.

[0103] Figure 26 The illustration shows the pixels of an image sensor according to some embodiments of this disclosure. Figure 2 The cross-sectional view corresponding to line I-I'. In the following text, for ease of explanation, the pixel PX of this embodiment and the reference will be described primarily. Figure 2 and Figure 3 The differences between the pixel PX mentioned.

[0104] Reference Figure 2 and Figure 26 The floating diffusion region FD can be disposed in the pixel region PXR. The floating diffusion region FD can be disposed adjacent to the first surface 100a of the substrate 100. The transfer gate TG can be disposed on the first surface 100a of the substrate 100. The transfer gate TG can be disposed on the pixel region PXR and can be disposed adjacent to the floating diffusion region FD.

[0105] Polarizer 180 may be disposed on pixel region PXR and may be disposed adjacent to first surface 100a of substrate 100. Polarizer 180 may include: lower structure 150 including trench 130T recessed from first surface 100a of substrate 100 into substrate 100; and upper pattern 160 disposed on lower structure 150. Lower structure 150 may further include: lower pattern 130 defined by trench 130T; lower insulating patterns 140 respectively disposed in trench 130T; and passivation layer 142 disposed between lower insulating pattern 140 and lower pattern 130. Passivation layer 142 may extend between each of lower insulating patterns 140 and substrate 100 and may extend to top surface of lower pattern 130. Passivation layer 142 may also extend between each of device isolation patterns 120 and substrate 100. In an embodiment, the passivation layer 142 may expose a portion of the first surface 100a of the substrate 100 on which the transfer gate TG and the floating diffusion region FD are formed.

[0106] Interconnect structure 110 may be disposed on a first surface 100a of substrate 100. Interconnect structure 110 may include a first interlayer insulating layer 110a, a second interlayer insulating layer 110b, and a third interlayer insulating layer 110c sequentially stacked on the first surface 100a of substrate 100. The first interlayer insulating layer 110a may be disposed on the first surface 100a of substrate 100 and may cover polarizer 180 and transmission gate TG. The first interlayer insulating layer 110a may extend between upper patterns 160 of polarizer 180 to cover lower structure 150. Interconnect structure 110 may further include: a via 112 passing through the first interlayer insulating layer 110a; and interconnect lines 114 disposed in the second interlayer insulating layer 110b and the third interlayer insulating layer 110c. The via 112 may be connected to a floating diffusion region FD and may be connected to a corresponding one of the interconnect lines 114.

[0107] The microlens 200 can be disposed on the interconnect structure 110. The interconnect structure 110 can be disposed between the first surface 100a of the substrate 100 and the microlens 200.

[0108] Figure 27 This is a plan view illustrating a pixel array of an image sensor according to some embodiments of the present disclosure.

[0109] Reference Figure 27The pixel array PXA may include a plurality of unit pixels PX1, PX2, PX3, and PX4 arranged in two dimensions on a first direction D1 and a second direction D2 intersecting the first direction D1. For example, the plurality of unit pixels PX1, PX2, PX3, and PX4 may include a first pixel PX1, a second pixel PX2, a third pixel PX3, and a fourth pixel PX4, and the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 may be arranged sequentially in a clockwise direction.

[0110] The first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 may each include a first polarizer 180a, a second polarizer 180b, a third polarizer 180c, and a fourth polarizer 180d, respectively. The first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d may have different polarization axes from each other.

[0111] For example, each of the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d may include an upper pattern 160. The upper pattern 160 of the first polarizer 180a may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. The polarization axis of the first polarizer 180a may be perpendicular to the extension direction of the upper pattern 160 of the first polarizer 180a (e.g., the second direction D2). For example, the polarization axis of the first polarizer 180a may be parallel to the first direction D1. The upper pattern 160 of the second polarizer 180b may be spaced apart from each other in a third direction D3 that intersects the first direction D1 and the second direction D2, and may extend in a fourth direction D4 that intersects the first direction D1, the second direction D2, and the third direction D3. The polarization axis of the second polarizer 180b may be perpendicular to the extension direction of the upper pattern 160 of the second polarizer 180b (e.g., the fourth direction D4). For example, the polarization axis of the second polarizer 180b can be parallel to a third direction D3. The upper patterns 160 of the third polarizer 180c can be spaced apart in a second direction D2 and can extend in a first direction D1. The polarization axis of the third polarizer 180c can be perpendicular to the extension direction of the upper pattern 160 (e.g., the first direction D1). For example, the polarization axis of the third polarizer 180c can be parallel to the second direction D2. The upper patterns 160 of the fourth polarizer 180d can be spaced apart in a fourth direction D4 and can extend in a third direction D3. The polarization axis of the fourth polarizer 180d can be perpendicular to the extension direction of the upper pattern 160 (e.g., the third direction D3). For example, the polarization axis of the fourth polarizer 180d can be parallel to the fourth direction D4.

[0112] In addition to the arrangement of pattern 160 above, other features and components of each of the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d can be compared with those of the referenced pattern. Figures 2 to 26 The corresponding features and components of one of the described polarizers 180 are substantially the same. Light incident on each of the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 can be polarized by each of the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d. Each of the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d can selectively transmit only the component of light parallel to the polarization axis. Since the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d are configured to have different polarization axes, the polarization directions of the light incident on the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 can be different from each other. In this case, the polarization state of light incident on the pixel array PXA can be sensed based on the relationship between the signals detected from the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4.

[0113] Microlenses 200 can be respectively disposed on the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4. Besides the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 respectively including a first polarizer 180a, a second polarizer 180b, a third polarizer 180c, and a fourth polarizer 180d, other features and components of each of the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 can be referenced. Figures 2 to 26 The corresponding features and corresponding components of one of the described pixels PX are substantially the same.

[0114] Figure 28 This is a plan view illustrating a pixel array of an image sensor according to some embodiments of the present disclosure. Hereinafter, for ease of understanding and explanation, this embodiment will be primarily described in conjunction with... Figure 27 The differences between the embodiments.

[0115] Reference Figure 28The first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 can each include a first polarizer 180a, a second polarizer 180b, a third polarizer 180c, and a fourth polarizer 180d, respectively. Some of the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d can have different polarization axes, while the other polarizers in the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d can have the same polarization axis.

[0116] For example, each of the first polarizer 180a, the second polarizer 180b, the third polarizer 180c, and the fourth polarizer 180d may include an upper pattern 160. The upper patterns 160 of the first polarizer 180a may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. The polarization axis of the first polarizer 180a may be perpendicular to the extension direction of the upper pattern 160 of the first polarizer 180a (e.g., the second direction D2). For example, the polarization axis of the first polarizer 180a may be parallel to the first direction D1. The upper patterns 160 of the second polarizer 180b may be spaced apart from each other in the second direction D2 and may extend in the first direction D1. The polarization axis of the second polarizer 180b may be perpendicular to the extension direction of the upper pattern 160 of the second polarizer 180b (e.g., the first direction D1). For example, the polarization axis of the second polarizer 180b may be parallel to the second direction D2. In some embodiments, the third polarizer 180c may be substantially the same as the first polarizer 180a, and the fourth polarizer 180d may be substantially the same as the second polarizer 180b. The polarization axes of the first polarizer 180a and the third polarizer 180c may be parallel to the first direction D1, and the polarization axes of the second polarizer 180b and the fourth polarizer 180d may be parallel to the second direction D2.

[0117] Figure 29 This is a plan view illustrating a pixel array of an image sensor according to some embodiments of the present disclosure. Hereinafter, for ease of understanding and explanation, this embodiment will be primarily described in conjunction with... Figure 27 Differences between the embodiments.

[0118] Reference Figure 29Some pixels among the first pixel PX1, second pixel PX2, third pixel PX3, and fourth pixel PX4 may include polarizers 180a and 180c, while other pixels among the first pixel PX1, second pixel PX2, third pixel PX3, and fourth pixel PX4 may not include polarizers. For example, the first pixel PX1 and the third pixel PX3 may each include a first polarizer 180a and a third polarizer 180c, while the second pixel PX2 and the fourth pixel PX4 may not include polarizers. The first polarizer 180a and the third polarizer 180c may have different polarization axes.

[0119] For example, each of the first polarizer 180a and the third polarizer 180c may include an upper pattern 160. The upper patterns 160 of the first polarizer 180a may be spaced apart from each other in a first direction D1 and may extend in a second direction D2. The polarization axis of the first polarizer 180a may be perpendicular to the extension direction of the upper pattern 160 of the first polarizer 180a (e.g., the second direction D2). For example, the polarization axis of the first polarizer 180a may be parallel to the first direction D1. The upper patterns 160 of the third polarizer 180c may be spaced apart from each other in a fourth direction D4 and may extend in a third direction D3. The polarization axis of the third polarizer 180c may be perpendicular to the extension direction of the upper pattern 160 of the third polarizer 180c (e.g., the third direction D3). For example, the polarization axis of the third polarizer 180c may be parallel to the fourth direction D4.

[0120] Figure 30 This is a plan view illustrating a pixel array of an image sensor according to some embodiments of the present disclosure.

[0121] Reference Figure 30 In an embodiment, the shapes of the upper patterns 160 of the first polarizer 180a and the third polarizer 180c may be substantially the same as the shapes of the upper patterns 160 of the second polarizer 180b and the fourth polarizer 180d. Besides these features, other features and components of the pixel array PXA according to this embodiment may be similar to those of the referenced [reference]. Figure 27 The corresponding features and components of the pixel array PXA of the image sensor described are substantially the same.

[0122] Figure 31 This is a schematic block diagram illustrating an image sensor according to some embodiments of the present disclosure.

[0123] Reference Figure 31 The image sensor may include an active pixel sensor (APS) array 10, a row decoder 20, a row driver 30, a column decoder 40, a controller 50, an associated dual sampler (CDS) 60, an analog-to-digital converter (ADC) 70, and an input / output (I / O) buffer 80.

[0124] The active pixel sensor array 10 may include a plurality of unit pixels arranged in a two-dimensional manner and may convert optical signals into electrical signals. The active pixel sensor array 10 may include pixels PX according to embodiments of the present disclosure, and may include, for example, reference... Figures 27 to 30 At least one of the pixel arrays PXA described. The active pixel sensor array 10 can be driven by a plurality of drive signals (e.g., pixel selection signal, reset signal, and charge transfer signal) provided from the row driver 30. The electrical signals converted in the active pixel sensor array 10 can be provided to the associated dual sampler 60.

[0125] The row driver 30 can provide multiple drive signals for driving multiple unit pixels to the active pixel sensor array 10 in response to signals decoded in the row decoder 20. When the unit pixels are arranged in a matrix, the drive signals can be provided row by row. The controller 50 can control the operation of the image sensor and can provide control signals to the row decoder 20 and the column decoder 40.

[0126] The correlated dual sampler 60 can receive electrical signals generated from the active pixel sensor array 10, retain the received electrical signals, and sample the received signals. The correlated dual sampler 60 can double sample a specific noise level and the signal level of the electrical signal, and can output the difference level corresponding to the difference between the noise level and the signal level.

[0127] The analog-to-digital converter 70 can convert the analog signal corresponding to the difference level output from the associated dual sampler 60 into a digital signal, and can output the digital signal. The I / O buffer 80 can sequentially output digital signals in response to the signals decoded in the column decoder 40.

[0128] According to embodiments of this disclosure, an image sensor capable of improving the sensitivity of incident light and sensing the polarization of light can be easily manufactured.

[0129] According to an exemplary embodiment, in Figure 31At least one of the components, elements, modules, or units (collectively referred to as "components" in this section) represented by boxes in the figures can be implemented as various numbers of hardware, software, and / or firmware structures to perform the corresponding functions described above. For example, at least one of these components can use a direct circuit structure (such as a memory, processor, logic circuit, lookup table, etc.) that can perform the corresponding function under the control of one or more microprocessors or other control devices. Additionally, at least one of these components can be implemented as a module, program, or a portion of code containing one or more executable instructions for performing a specific logical function and executed by one or more microprocessors or other control devices. Furthermore, at least one of these components can include or be implemented by a processor, such as a central processing unit (CPU), microprocessor, etc., that performs the corresponding function. Two or more of these components can be combined into a single component that performs all the operations or functions of the combined two or more components. Additionally, at least a portion of the function of at least one of these components can be performed by the other components. Furthermore, although a bus is not shown in the above block diagrams, communication between these components can be performed via a bus. The functional aspects of the above exemplary embodiments can be implemented using algorithms executed on one or more processors. In addition, the components or processing steps represented by the block diagram can employ many related technologies for electronic configuration, signal processing and / or control, data processing, etc.

[0130] Although this disclosure has been described with reference to exemplary embodiments, it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of this disclosure. Therefore, it should be understood that the above embodiments are not restrictive but illustrative. Consequently, the scope of this disclosure will be determined by the broadest permissible interpretation of the appended claims and their equivalents, and should not be limited or constrained by the above description.

Claims

1. An image sensor, comprising: A substrate having a first surface and a second surface opposite to each other; A photoelectric conversion region is disposed in the substrate; as well as A polarizer disposed on the first surface of the substrate. The polarizer includes: The lower structure includes at least one trench recessed from the first surface of the substrate toward the photoelectric conversion region; and Multiple upper patterns are disposed on the lower structure and spaced apart from each other in a first direction parallel to the first surface. The substrate is a single-layer structure.

2. The image sensor according to claim 1, further comprising: Device isolation patterns are disposed in the substrate. The photoelectric conversion region and the at least one trench are disposed between the device isolation pattern.

3. The image sensor according to claim 2, wherein, The lower structure further includes at least one lower pattern, which includes the at least one groove, and Wherein, the at least one lower pattern is a protruding portion of the first surface of the substrate.

4. The image sensor according to claim 3, wherein, The lower structure further includes a lower insulating pattern disposed in the at least one trench.

5. The image sensor according to claim 4, wherein, Each of the above patterns includes: A first upper pattern is disposed on the lower structure; and The second upper pattern is located between the lower structure and the first upper pattern. The first upper pattern includes at least one of a metal and a high-k dielectric material, and the second upper pattern includes a low-k dielectric material.

6. The image sensor according to claim 4, wherein, The lower structure further includes a passivation layer disposed between the inner surface of the at least one trench and the lower insulating pattern, and The passivation layer extends to the top surface of the at least one lower pattern.

7. The image sensor according to claim 6, wherein, Each of the above patterns includes: A first upper pattern is disposed on the lower structure; and The second upper pattern is disposed between the lower structure and the first upper pattern. Wherein, the first upper pattern comprises at least one of a metal and a high-k dielectric material, and the second upper pattern comprises a low-k dielectric material, and The second upper pattern is in direct contact with at least one of the passivation layer and the lower insulating pattern of the lower structure.

8. The image sensor according to claim 6, wherein, Each of the above patterns is a single-layer pattern comprising at least one of a metal and a high-k dielectric material, and Each of the upper patterns is in direct contact with at least one of the passivation layer and the lower insulating pattern of the lower structure.

9. The image sensor according to claim 1, further comprising: Device isolation patterns are disposed in the substrate. The lower structure includes: Multiple trenches recessed from the first surface of the substrate toward the photoelectric conversion region; and Multiple lower patterns are disposed between the multiple grooves. The photoelectric conversion region, the plurality of trenches, and the plurality of lower patterns are disposed between the device isolation patterns.

10. The image sensor according to claim 9, wherein, The lower structure also includes a plurality of lower insulating patterns, which are respectively disposed in the plurality of trenches.

11. The image sensor according to claim 10, wherein, Each of the plurality of upper patterns vertically overlaps with at least one of the plurality of lower patterns and the plurality of lower insulating patterns.

12. The image sensor according to claim 10, wherein, The plurality of upper patterns are respectively aligned on the plurality of lower patterns.

13. The image sensor according to claim 10, wherein, The plurality of upper patterns are respectively aligned on the plurality of lower insulating patterns.

14. The image sensor according to claim 10, wherein, Each of the plurality of upper patterns vertically overlaps with a corresponding one of the plurality of lower patterns and a corresponding one of the plurality of lower insulating patterns.

15. The image sensor according to claim 9, in, The first width of each of the plurality of upper patterns in the first direction is less than the second width of each of the plurality of lower patterns in the first direction and the third width of each of the plurality of grooves in the first direction.

16. The image sensor according to claim 9, wherein, Each of the plurality of upper patterns includes: A first upper pattern, which is located on the lower structure; and The second upper pattern is located between the lower structure and the first upper pattern. Wherein, the first thickness of each of the plurality of lower patterns in the second direction is greater than the second thickness of the first upper pattern in the second direction and the third thickness of the second upper pattern in the second direction, and the second direction is perpendicular to the first surface.

17. An image sensor, comprising: A substrate having a first surface and a second surface opposite to each other; Device isolation patterns are disposed in the substrate; A photoelectric conversion region is disposed in the substrate and between the device isolation patterns; as well as A polarizer disposed on the first surface of the substrate. The polarizer includes: The lower structure includes: a plurality of lower patterns protruding from the substrate; and a lower insulating pattern disposed between the lower patterns; and The upper pattern is set on the lower structure. The lower structure is disposed between the photoelectric conversion region and the upper pattern and between the device isolation pattern, and the substrate is a single-layer structure.

18. The image sensor according to claim 17, wherein, The patterns are spaced apart from each other in a first direction parallel to the first surface of the substrate, and extend in a second direction parallel to the first surface of the substrate and intersecting the first direction. The lower pattern and the lower insulating pattern are arranged alternately in the first direction and extend in the second direction.

19. The image sensor according to claim 18, wherein, Each of the upper patterns vertically overlaps with at least one of the lower pattern and the lower insulating pattern.

20. The image sensor according to claim 18, wherein, The lower structure further includes a passivation layer disposed between the lower pattern and the lower insulating pattern. The passivation layer extends onto the top surface of the lower pattern, and Each of the upper patterns is in direct contact with at least one of the passivation layer and the lower insulating pattern.

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