A device and method for realizing dual BIOS measurement of SOC card

Abstract

The present invention particularly relates to an implementation device and method for measuring dual BIOS using a SOC card. The implementation device and method for measuring dual BIOS using a SOC card include a SOC card and a CPLD chip, wherein both the SOC card and the CPLD chip are connected to an electronic switch 1, and the CPLD chip is also connected to an electronic switch 2 and an electronic switch 3; a dual-channel CPU is connected to its respective BIOS via the electronic switch 2 and the electronic switch 3, and the electronic switch 1 is connected to the BIOS 1 and the BIOS 2 via the electronic switch 2 and the electronic switch 3, respectively. The implementation device and method for measuring dual BIOS using a SOC card can measure dual BIOS, prevent BIOS information from being tampered with, and ensure that a dual-channel CPU computer starts normally.

Description

Technical Field

[0001] The present invention relates to the technical field of data security, and in particular to a device and method for realizing dual BIOS measurement of a SOC card. Background Art

[0002] With the rise and development of the information industry, data security has become more and more the focus of people's attention. To a certain extent, data security is the core of computer security.

[0003] Previously, SOC cards could not connect two BIOSes on one SPI channel and select which BIOS to measure. Therefore, only one BIOS could be connected and measured once. However, on a computer with a dual-core CPU, both BIOSes are at risk of being tampered with and need to be measured before powering on.

[0004] However, in the current technical solution, the SOC card can only measure one BIOS, and cannot switch the BIOS reading path on one path. Based on this situation, the present invention proposes a device and method for measuring dual BIOS on a SOC card. Summary of the invention

[0005] In order to make up for the defects of the prior art, the present invention provides a simple and efficient device and method for realizing dual BIOS measurement of SOC card.

[0006] The present invention is achieved through the following technical solutions:

[0007] A device for implementing dual BIOS measurement using a SOC card, characterized in that it comprises a SOC card and a CPLD chip, wherein both the SOC card and the CPLD chip are connected to an electronic switch 1, and the CPLD chip is also connected to an electronic switch 2 and an electronic switch 3; a dual-path CPU is connected to its own BIOS via the electronic switch 2 and the electronic switch 3, respectively, and the electronic switch 1 is connected to the BIOS 1 and the BIOS 2 via the electronic switch 2 and the electronic switch 3, respectively.

[0008] The electronic switches 1, 2 and 3 have the same structure, including an S pin, an A pin, a B1 pin and a B2 pin; wherein the S pin is used to connect the CPLD chip selection path, when the level signal received by the S pin is 0, the A pin is connected to the B1 pin, and when the level signal received by the A pin is 1, the A pin is connected to the B2 pin.

[0009] The CPLD chip is connected to the S pins of the electronic switch 1, the electronic switch 2 and the electronic switch 3 respectively through the CPLD signal bus.

[0010] The A pin, B1 pin and B2 pin of the electronic switch 1, the electronic switch 2 and the electronic switch 3 are all connected to the SPI signal bus, and connected to the target chip through the SPI signal bus;

[0011] The SPI signal bus includes SDO (data output) pin, SDI (data input) pin, CS (chip select signal) pin and CLK (SPI clock) pin.

[0012] The electronic switch 1 is used to select whether the SOC card is connected to BIOS1 or BIOS2, the A pin of the electronic switch 1 is connected to the 4 pins of the SOC card SPI, the B1 pin is connected to the 4 pins of the SPI of BIOS1, and the B2 pin is connected to the 4 pins of the SPI of BIOS2;

[0013] The electronic switch 2 is used to select whether BIOS1 is connected to CPU1 or SOC card, the A pin of the electronic switch 2 is connected to the 4 pins of SPI of BIOS1, the B1 pin is connected to the 4 pins of SPI of CPU1, and the B2 pin is connected to the 4 pins of SPI of SOC card;

[0014] The electronic switch 3 is used to select whether BIOS2 is connected to CPU2 or SOC card. The A pin of the electronic switch 3 is connected to the 4 pins of SPI of BIOS2, the B1 pin is connected to the 4 pins of SPI of CPU2, and the B2 pin is connected to the 4 pins of SPI of SOC card.

[0015] The method for realizing the measurement of dual BIOS by the SOC card of the present invention switches the paths of the electronic switch 1, the electronic switch 2 and the electronic switch 3 through the CPLD control level signal, controls the SOC card to start measuring BIOS1 when powered on for the first time, compares the BIOS1 measurement value stored in the SOC card with the actual BIOS1 measurement value; if the BIOS1 measurement result is normal, starts measuring BIOS2, compares the BIOS2 measurement value stored in the SOC card with the actual BIOS2 measurement value; if the BIOS2 measurement result is normal, sends a reset signal, makes BIOS1 select to connect to CPU1, makes BIOS2 select to connect to CPU2, the CPU reads the BIOS, and the machine is powered on normally.

[0016] When powered on for the first time, the SOC card is connected to the BIOS1 path first. The specific process is as follows:

[0017] S1. The SOC card keeps sending a reset signal of 0 to prevent the machine from starting, and the measurement state is 1;

[0018] S2. The CPLD chip sends level signals to the electronic switch 1, electronic switch 2 and electronic switch 3 respectively, so that the state of the S pin S1 of the electronic switch 1 is 0, and the SOC card switch selects to connect to the BIOS1 direction path; the state of the S pin S2 of the electronic switch 2 is 1, and the BIOS1 selects to connect to the SOC card path; the state of the S pin S3 of the electronic switch 3 is 1, and the BIOS2 selects to connect to the SOC card path;

[0019] S3. The SOC card starts measuring BIOS1 and compares the BIOS1 measurement value stored in the SOC card with the actual BIOS1 measurement value;

[0020] If the measurement is normal, the measurement status is 0;

[0021] If the measurement fails, the SOC card loses power, the machine loses power, and the startup fails.

[0022] When measuring BIOS2, the SOC card is connected to the BIOS2 channel, and the received measurement status is 0.

[0023] The level signal received by the S pin S1 of the electronic switch 1 is 1, and the SOC card switch selects the BIOS2 direction path;

[0024] The level signal received by the S pin S2 of the electronic switch 2 is 1, and BIOS1 selects the SOC card circuit;

[0025] The level signal received by the S pin S3 of the electronic switch 3 is 1, and BIOS2 selects the SOC card circuit;

[0026] The SOC card starts measuring BIOS2, and compares the BIOS2 measurement value stored in the SOC card with the actual BIOS2 measurement value;

[0027] If the measurement is normal, the measurement state is 0 and the reset signal is 1;

[0028] If the measurement fails, the SOC card loses power, the machine loses power, and the startup fails.

[0029] When the reset signal is 1, reset starts.

[0030] The state of the S pin S1 of the electronic switch 1 is not restricted.

[0031] The level signal received by the S pin S2 of the electronic switch 2 is 0, and BIOS1 selects to connect to CPU1, thus realizing the path from CPU1 to BIOS1;

[0032] The level signal received by the S pin S3 of the electronic switch 3 is 0, and BIOS2 selects to connect to CPU2, thus realizing the path between CPU2 and BIOS2;

[0033] The CPU reads the BIOS and the machine is powered on normally.

[0034] The beneficial effects of the present invention are as follows: the device and method for realizing dual BIOS measurement by the SOC card can realize dual BIOS measurement, prevent BIOS information from being tampered with, and ensure the normal startup of a dual-channel CPU computer. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0036] Attached Figure 1 The present invention is a schematic diagram of a method for implementing dual BIOS measurement in a SOC card.

[0037] Attached Figure 2 This is a schematic diagram of the pin structure of the electronic switch of the present invention. DETAILED DESCRIPTION

[0038] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the following will be combined with the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0039] The SOC card measurement dual BIOS implementation device comprises a SOC card and a CPLD chip, wherein the SOC card and the CPLD chip are both connected to an electronic switch 1, and the CPLD chip is also connected to an electronic switch 2 and an electronic switch 3; a dual-channel CPU is respectively connected to the respective BIOS via the electronic switch 2 and the electronic switch 3, and the electronic switch 1 is respectively connected to the BIOS 1 and the BIOS 2 via the electronic switch 2 and the electronic switch 3.

[0040] The electronic switches 1, 2 and 3 have the same structure, including an S pin, an A pin, a B1 pin and a B2 pin; wherein the S pin is used to connect the CPLD chip selection path, when the level signal received by the S pin is 0, the A pin is connected to the B1 pin, and when the level signal received by the A pin is 1, the A pin is connected to the B2 pin.

[0041] The CPLD chip is connected to the S pins of the electronic switch 1, the electronic switch 2 and the electronic switch 3 respectively through the CPLD signal bus.

[0042] The A pin, B1 pin and B2 pin of the electronic switch 1, the electronic switch 2 and the electronic switch 3 are all connected to the SPI signal bus, and connected to the target chip through the SPI signal bus;

[0043] The SPI signal bus includes SDO (data output) pin, SDI (data input) pin, CS (chip select signal) pin and CLK (SPI clock) pin.

[0044] The electronic switch 1 is used to select whether the SOC card is connected to BIOS1 or BIOS2, the A pin of the electronic switch 1 is connected to the 4 pins of the SOC card SPI, the B1 pin is connected to the 4 pins of the SPI of BIOS1, and the B2 pin is connected to the 4 pins of the SPI of BIOS2;

[0045] The electronic switch 2 is used to select whether BIOS1 is connected to CPU1 or SOC card, the A pin of the electronic switch 2 is connected to the 4 pins of SPI of BIOS1, the B1 pin is connected to the 4 pins of SPI of CPU1, and the B2 pin is connected to the 4 pins of SPI of SOC card;

[0046] The electronic switch 3 is used to select whether BIOS2 is connected to CPU2 or SOC card. The A pin of the electronic switch 3 is connected to the 4 pins of SPI of BIOS2, the B1 pin is connected to the 4 pins of SPI of CPU2, and the B2 pin is connected to the 4 pins of SPI of SOC card.

[0047] The implementation method of the SOC card measuring dual BIOS is to switch the paths of electronic switch 1, electronic switch 2 and electronic switch 3 through CPLD control level signal, control the SOC card to start measuring BIOS1 when powered on for the first time, and compare the BIOS1 measurement value stored in the SOC card with the actual BIOS1 measurement value; if the BIOS1 measurement result is normal, start measuring BIOS2, and compare the BIOS2 measurement value stored in the SOC card with the actual BIOS2 measurement value; if the BIOS2 measurement result is normal, send a reset signal, so that BIOS1 selects to connect to CPU1, BIOS2 selects to connect to CPU2, the CPU reads the BIOS, and the machine is powered on normally.

[0048] When powered on for the first time, the SOC card is connected to the BIOS1 path first. The specific process is as follows:

[0049] S1. The SOC card keeps sending a reset signal of 0 to prevent the machine from starting, and the measurement state is 1;

[0050] S2. The CPLD chip sends level signals to the electronic switch 1, electronic switch 2 and electronic switch 3 respectively, so that the state of the S pin S1 of the electronic switch 1 is 0, and the SOC card switch selects to connect to the BIOS1 direction path; the state of the S pin S2 of the electronic switch 2 is 1, and the BIOS1 selects to connect to the SOC card path; the state of the S pin S3 of the electronic switch 3 is 1, and the BIOS2 selects to connect to the SOC card path;

[0051] S3. The SOC card starts measuring BIOS1 and compares the BIOS1 measurement value stored in the SOC card with the actual BIOS1 measurement value;

[0052] If the measurement is normal, the measurement status is 0;

[0053] If the measurement fails, the SOC card loses power, the machine loses power, and the startup fails.

[0054] When measuring BIOS2, the SOC card is connected to the BIOS2 channel, and the received measurement status is 0.

[0055] The level signal received by the S pin S1 of the electronic switch 1 is 1, and the SOC card switch selects the BIOS2 direction path;

[0056] The level signal received by the S pin S2 of the electronic switch 2 is 1, and BIOS1 selects the SOC card circuit;

[0057] The level signal received by the S pin S3 of the electronic switch 3 is 1, and BIOS2 selects the SOC card circuit;

[0058] The SOC card starts measuring BIOS2, and compares the BIOS2 measurement value stored in the SOC card with the actual BIOS2 measurement value;

[0059] If the measurement is normal, the measurement state is 0 and the reset signal is 1;

[0060] If the measurement fails, the SOC card loses power, the machine loses power, and the startup fails.

[0061] When the reset signal is 1, reset starts.

[0062] The state of the S pin S1 of the electronic switch 1 is not restricted.

[0063] The level signal received by the S pin S2 of the electronic switch 2 is 0, and BIOS1 selects to connect to CPU1, thus realizing the path from CPU1 to BIOS1;

[0064] The level signal received by the S pin S3 of the electronic switch 3 is 0, and BIOS2 selects to connect to CPU2, thus realizing the path between CPU2 and BIOS2;

[0065] The CPU reads the BIOS and the machine is powered on normally.

[0066] The above is a detailed introduction to a device and method for implementing dual BIOS of a SOC card measurement in an example of the present invention. This section uses specific examples to illustrate the principles and implementation methods of the invention. The above examples are only used to help understand the core idea of ​​the present invention. Without departing from the principles of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

Claims

1. A device for implementing dual BIOS measurement of SOC card, characterized by: It includes a SOC card and a CPLD chip, both of which are connected to an electronic switch 1, and the CPLD chip is also connected to an electronic switch 2 and an electronic switch 3; the dual-channel CPUs are connected to their respective BIOSes through the electronic switch 2 and the electronic switch 3, and the electronic switch 1 is connected to the BIOS 1 and the BIOS 2 through the electronic switch 2 and the electronic switch 3; The electronic switch 1, the electronic switch 2 and the electronic switch 3 have the same structure, including an S pin, an A pin, a B1 pin and a B2 pin; wherein the S pin is used to connect the CPLD chip selection path, when the level signal received by the S pin is 0, the A pin is connected to the B1 pin, and when the level signal received by the S pin is 1, the A pin is connected to the B2 pin; The CPLD chip is respectively connected to the S pins of the electronic switch 1, the electronic switch 2 and the electronic switch 3 through the CPLD signal bus; The A pin, B1 pin and B2 pin of the electronic switch 1, the electronic switch 2 and the electronic switch 3 are all connected to the SPI signal bus, and connected to the target chip through the SPI signal bus; The SPI signal bus includes SDO pin, SDI pin, CS pin and CLK pin; The electronic switch 1 is used to select whether the SOC card is connected to BIOS1 or BIOS2, the A pin of the electronic switch 1 is connected to the 4 pins of the SPI signal bus of the SOC card, the B1 pin is connected to the 4 pins of the SPI signal bus of BIOS1 through the electronic switch 2, and the B2 pin is connected to the 4 pins of the SPI signal bus of BIOS2 through the electronic switch 3; The electronic switch 2 is used to select whether BIOS1 is connected to CPU1 or SOC card, the A pin of the electronic switch 2 is connected to 4 pins of the SPI signal bus of BIOS1, the B1 pin is connected to 4 pins of the SPI signal bus of CPU1, and the B2 pin is connected to 4 pins of the SPI signal bus of SOC card through the electronic switch 1; The electronic switch 3 is used to select whether BIOS2 is connected to CPU2 or SOC card. The A pin of the electronic switch 3 is connected to the 4 pins of SPI of BIOS2, the B1 pin is connected to the 4 pins of SPI of CPU2, and the B2 pin is connected to the 4 pins of SPI of SOC card through the electronic switch 1.

2. A method for implementing the dual BIOS measurement device of the SOC card according to claim 1, characterized in that: The paths of electronic switch 1, electronic switch 2 and electronic switch 3 are switched by controlling the level signal through CPLD; When powered on for the first time, the SOC card is controlled to start measuring BIOS1, and the BIOS1 measurement value stored in the SOC card is compared with the actual BIOS1 measurement value; if the BIOS1 measurement result is normal, BIOS2 is measured, and the BIOS2 measurement value stored in the SOC card is compared with the actual BIOS2 measurement value; if the BIOS2 measurement result is normal, a reset signal 1 is issued, so that CPU1 accesses and reads BIOS1, CPU2 accesses and reads BIOS2, and the machine is powered on normally.

3. The method for implementing the dual BIOS implementation device based on SOC card measurement according to claim 2 is characterized in that: When powered on for the first time, the SOC card is connected to the BIOS1 path first. The specific process is as follows: S1. The SOC card keeps sending a reset signal of 0 to prevent the machine from starting, and the measurement state is 1; S2. The CPLD chip sends level signals to the electronic switch 1, the electronic switch 2 and the electronic switch 3 respectively, so that the state of the S pin S1 of the electronic switch 1 is 0, and the SOC card is connected to the BIOS1 direction path through the electronic switch 1; The state of the S pin S2 of the electronic switch 2 is 1, and the SOC card is connected to the BIOS1 direction path through the electronic switch 2; The state of the S pin S3 of the electronic switch 3 is 1, and the SOC card is connected to the BIOS2 direction path through the electronic switch 3; S3. The SOC card starts measuring BIOS1 and compares the BIOS1 measurement value stored in the SOC card with the actual BIOS1 measurement value; If the measurement is normal, the measurement status is 0; If the measurement fails, the SOC card loses power, the machine loses power, and the startup fails.

4. The method for implementing the dual BIOS implementation device based on SOC card measurement according to claim 2 or 3, characterized in that: When measuring BIOS2, the SOC card is connected to the BIOS2 path, and the received measurement state is 0. At this time, the level signal received by the S pin S1 of the electronic switch 1 is 1, and the SOC card is connected to the BIOS2 direction path through the electronic switch 1; The level signal received by the S pin S2 of the electronic switch 2 is 1, and the SOC card is connected to the BIOS1 direction path through the electronic switch 2; The level signal received by the S pin S3 of the electronic switch 3 is 1, and the SOC card is connected to the BIOS2 direction path through the electronic switch 3; The SOC card starts measuring BIOS2, and compares the BIOS2 measurement value stored in the SOC card with the actual BIOS2 measurement value; If the measurement is normal, the measurement state is 0 and the reset signal is 1; If the measurement fails, the SOC card loses power, the machine loses power, and the startup fails.

5. The method for implementing the dual BIOS implementation device based on SOC card measurement according to claim 2 is characterized in that: When the reset signal is 1, reset starts. At this time, the state of the S pin S1 of the electronic switch 1 is not restricted, and the level signal received by the S pin S2 of the electronic switch 2 is 0. The BIOS1 is connected to the CPU1 direction path through the electronic switch 2, and the CPU1 accesses and reads the BIOS1; The level signal received by the S pin S3 of the electronic switch 3 is 0, BIOS2 is connected to the CPU2 direction path through the electronic switch 3, and CPU2 accesses and reads BIOS2; The machine is powered on normally.

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