Semiconductor device

Abstract

A semiconductor device of a novel structure is provided. The semiconductor device includes a sensor, an amplifier circuit to which a sensor signal of the sensor is input, a sample-and-hold circuit to which an output signal of the amplifier is input and which holds a voltage corresponding to the output signal, an analog-digital conversion circuit to which an output signal of the sample-and-hold circuit corresponding to the voltage is input, and an interface circuit. The interface circuit has a function of controlling switching during a first control period in which the sensor signal is input to the amplifier circuit and an output signal of the amplifier circuit is held in the sample-and-hold circuit, and a second control period in which a digital signal obtained by outputting the voltage held in the sample-and-hold circuit to the analog-digital conversion circuit is output to the interface circuit. The analog-digital conversion circuit is switched to stop the output of the digital signal during the first control period. The first control period is longer than the second control period.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device.

[0002] Note that in this specification and other documents, a semiconductor device refers to any device capable of operating by utilizing the properties of semiconductors. Display devices (liquid crystal displays, light-emitting displays, etc.), projection devices, lighting devices, electro-optical devices, energy storage devices, storage devices, semiconductor circuits, imaging devices, signal processing devices, transceivers, wireless sensors, and sensor devices sometimes include semiconductor devices. Background Technology

[0003] Research and development on low-power semiconductor devices is gaining momentum. For example, Patent Document 1 discloses a semiconductor device that is used as a signal processing device with a sensor, including a sensor, an amplifier circuit, a sample-and-hold circuit, and an analog-to-digital (A / D) conversion circuit with a comparator.

[0004] Patent document 1 discloses a semiconductor device having a structure that suppresses a momentary increase in power consumption by causing the operation of a sample-and-hold circuit and the operation of a comparator to occur at different times during the period when power is supplied by a wireless signal.

[0005] [Preliminary Technology Documents]

[0006] [Patent Literature]

[0007] [Patent Document 1] U.S. Patent Application Publication No. 2016 / 0094236 Summary of the Invention

[0008] The technical problem that the invention aims to solve

[0009] In semiconductor devices, the current consumption of the A / D conversion circuit accounts for a large proportion. To achieve low power consumption in semiconductor devices, it is effective to make the A / D conversion circuit operate intermittently. However, the analog signal output by the sensor is sampled at regular intervals, making it difficult to keep the A / D conversion circuit in a non-operating period for extended periods.

[0010] To improve the accuracy of values ​​obtained as analog signals, it is effective in semiconductor devices used as signal processing devices equipped with sensors to employ a structure that calculates an average value through multiple samplings. However, the A / D conversion circuit must be activated for each sampling, making it difficult to keep the A / D conversion circuit inactive for extended periods.

[0011] One objective of this invention is to provide a semiconductor device with a novel structure that achieves low power consumption, which is used as a signal processing device incorporating a sensor. Another objective of this invention is to provide a semiconductor device with a novel structure capable of long-term operation, which is used as a signal processing device incorporating a sensor. Furthermore, one objective of this invention is to provide a semiconductor device with a novel structure that can maintain the sensor signal as an analog voltage even in environments with large external temperature variations. Another objective of this invention is to provide a semiconductor device with a novel structure that is low-power and capable of high-precision sampling, which is used as a signal processing device incorporating a sensor. Finally, one objective of this invention is to provide a novel semiconductor device, etc.

[0012] Note that the description of the above objectives does not preclude the existence of other objectives. Furthermore, one embodiment of the invention does not necessarily require achieving all of the above objectives. Objectives other than those described above are obvious from the description in the specification, drawings, claims, etc., and can be extracted from said description.

[0013] means of solving technical problems

[0014] One aspect of the present invention is a semiconductor device comprising a sensor, an amplifier circuit for receiving a sensor signal input to the sensor, a sample-and-hold circuit for receiving an output signal from the amplifier circuit and holding a voltage corresponding to the output signal, an analog-to-digital converter circuit for receiving an output signal corresponding to the voltage from the sample-and-hold circuit, and an interface circuit. The interface circuit has the function of controlling a first control period for switching between receiving a sensor signal into the amplifier circuit and holding the output signal of the amplifier circuit in the sample-and-hold circuit and a second control period for outputting a digital signal obtained by outputting the voltage held in the sample-and-hold circuit to the analog-to-digital converter circuit. The analog-to-digital converter circuit is switched to stop outputting the digital signal during the first control period, and the first control period is longer than the second control period.

[0015] One aspect of the present invention is a semiconductor device comprising a sensor, an amplifier circuit for receiving a sensor signal input to the sensor, a sample-and-hold circuit for receiving an output signal from the amplifier circuit and holding a voltage corresponding to the output signal, an analog-to-digital converter circuit for receiving an output signal corresponding to the voltage from the sample-and-hold circuit, and an interface circuit. The interface circuit has the function of controlling a first control period for switching between receiving a sensor signal into the amplifier circuit and holding the output signal of the amplifier circuit in the sample-and-hold circuit and a second control period for outputting a digital signal obtained by outputting the voltage held in the sample-and-hold circuit to the analog-to-digital converter circuit. The analog-to-digital converter circuit is switched to stop outputting the digital signal during the first control period. The sample-and-hold circuit has the function of holding a voltage obtained by adding together multiple output signals of the amplifier. The first control period is longer than the second control period.

[0016] In one aspect of the semiconductor device of the present invention, it is preferred that the sample-and-hold circuit includes a plurality of capacitors electrically connected to each electrode, and that a plurality of output signals of an amplifier in the sample-and-hold circuit are added by causing one electrode to be in an electrically floating state while supplying any one of the plurality of output signals of the amplifier to the other electrode of the capacitor.

[0017] In one aspect of the semiconductor device of the present invention, preferably, the sample-and-hold circuit includes a first transistor, a second transistor, and a third transistor, and the first transistor to the third transistor include a semiconductor layer comprising an oxide semiconductor in the channel forming region.

[0018] In one aspect of the semiconductor device of the present invention, it is preferred that the gate of the second transistor is electrically connected to one of the source and drain of the first transistor, and the semiconductor device preferably has the function of maintaining a voltage corresponding to the output signal of the amplifier by turning off the first transistor.

[0019] In one aspect of the semiconductor device of the present invention, it is preferred that the second transistor and the third transistor are used as source follower circuits.

[0020] Note that other aspects of the present invention are described in the following description and accompanying drawings of the embodiments.

[0021] Invention Effects

[0022] One aspect of the present invention provides a semiconductor device with a novel structure that achieves low power consumption, which is used as a signal processing device incorporating a sensor. Another aspect of the present invention provides a semiconductor device with a novel structure capable of long-term operation, which is used as a signal processing device incorporating a sensor. Furthermore, another aspect of the present invention provides a semiconductor device with a novel structure that can maintain the sensor signal as an analog voltage even in environments with large external temperature variations. Another aspect of the present invention provides a semiconductor device with a novel structure that is low-power and capable of high-precision sampling, which is used as a signal processing device incorporating a sensor. Additionally, another aspect of the present invention provides a novel semiconductor device, etc.

[0023] Note that the description of these effects does not preclude the existence of other effects. One aspect of the invention does not necessarily require all of the aforementioned effects. Furthermore, effects other than these are obvious from the description, drawings, claims, etc., and can be extracted from said description. Attached Figure Description

[0024] Figure 1A and Figure 1B These are block diagrams and circuit diagrams illustrating the structure of semiconductor devices.

[0025] Figure 2A and Figure 2B It is a block diagram illustrating the structure of a semiconductor device.

[0026] Figure 3A and Figure 3B These are block diagrams and circuit diagrams illustrating the structure of semiconductor devices.

[0027] Figure 4 It is a timing diagram illustrating the operation of a semiconductor device.

[0028] Figure 5A , Figure 5B and Figure 5C These are block diagrams and circuit diagrams illustrating the structure of semiconductor devices.

[0029] Figure 6 It is a circuit diagram illustrating the structure of a semiconductor device.

[0030] Figure 7 It is a timing diagram illustrating the operation of a semiconductor device.

[0031] Figure 8A , Figure 8B and Figure 8C It is a diagram illustrating the structure of a semiconductor device.

[0032] Figure 9A , Figure 9B and Figure 9C It is a diagram illustrating the structure of a semiconductor device.

[0033] Figure 10A and Figure 10B It is a block diagram illustrating the structure of a semiconductor device.

[0034] Figure 11A and Figure 11B It is a circuit diagram illustrating the structure of a semiconductor device.

[0035] Figure 12 It is a circuit diagram illustrating the structure of a semiconductor device.

[0036] Figure 13 This is a cross-sectional schematic diagram illustrating the operation of a semiconductor device.

[0037] Figure 14 This is a cross-sectional schematic diagram illustrating the structure of a semiconductor device.

[0038] Figure 15A , Figure 15B and Figure 15C This is a cross-sectional schematic diagram illustrating the structure of a semiconductor device.

[0039] Figure 16A , Figure 16B , Figure 16C , Figure 16D and Figure 16E It is a flowchart illustrating the manufacturing method of electronic components and a diagram illustrating the structure of electronic components.

[0040] Figure 17A , Figure 17B and Figure 17C This is a diagram illustrating an example of the application of a semiconductor device.

[0041] Figure 18A and Figure 18B This is a diagram illustrating an example of the application of a semiconductor device.

[0042] Figure 19A , Figure 19B This is a diagram illustrating an example of the application of a semiconductor device.

[0043] Figure 20A , Figure 20B This is a diagram illustrating an example of the application of a semiconductor device.

[0044] Figure 21A , Figure 21B This is a diagram illustrating an example of the application of a semiconductor device. Detailed Implementation

[0045] The embodiments will now be described with reference to the accompanying drawings. However, the embodiments can be implemented in many different ways, and those skilled in the art will readily understand that the methods and details can be varied in many ways without departing from the spirit and scope of the invention. Therefore, the invention should not be construed as being limited to the contents described in the embodiments shown below.

[0046] Note that in this specification, ordinal numbers such as "first," "second," and "third" are added to avoid confusion regarding the constituent elements. Therefore, these ordinal numbers do not limit the number of constituent elements. Furthermore, these ordinal numbers do not limit the order of the constituent elements. Additionally, for example, in this specification, a constituent element referred to by "first" in one embodiment may be designated as a constituent element referred to by "second" in other embodiments or within the scope of the claims. Furthermore, for example, in this specification, a constituent element referred to by "first" in one embodiment may be omitted in other embodiments or within the scope of the claims.

[0047] Note that in the accompanying drawings, the same reference numerals are sometimes used to denote the same constituent element, constituent elements with the same function, constituent elements made of the same material, or constituent elements formed at the same time, and sometimes repeated descriptions are omitted.

[0048] (Implementation Method 1)

[0049] The structure and operation of a semiconductor device according to one aspect of the present invention are illustrated with reference to Figures 1 to 11.

[0050] One aspect of the present invention includes a semiconductor device comprising an interface circuit, an amplifier circuit, a sample-and-hold circuit, an analog-to-digital (A / D) converter circuit, and a sensor. The semiconductor device includes a battery and is driven by power supplied by the battery. The semiconductor device includes wireless or wired communication circuitry such as RF (Radio Frequency) signals and has the function of transmitting signals acquired in the sensor according to external requests. The semiconductor device intermittently drives high-power circuitry such as the A / D converter circuit, and uses battery power to drive the sensor and the sample-and-hold circuit. During periods when the A / D converter circuit is not driven, the sample-and-hold circuit uses battery power to periodically acquire signals obtainable in the sensor and holds them as analog voltages. Furthermore, the signal is held in the sample-and-hold circuit, which is composed of an oxide semiconductor (OS) transistor (OS transistor) comprising an oxide semiconductor (OS) transistor in the channel formation region.

[0051] OS transistors have very low off-state currents and exhibit less temperature-dependent characteristic variations compared to transistors containing silicon in the semiconductor layer (Si transistors). Therefore, they can maintain the sensor signal obtained by periodic sensing as an analog voltage even in environments with large temperature variations.

[0052] The power consumption of A / D conversion circuits used to generate digital signals is high. Therefore, the power consumption of the semiconductor device is suppressed by intermittently driving the A / D conversion circuit. During the period when the A / D conversion circuit is not driven, the sensor and sample-and-hold circuit are driven. Even during the period when the A / D conversion circuit is not driven, the signal obtained by the sensor is periodically sampled in the sample-and-hold circuit. During the timing of driving the A / D conversion circuit, multiple analog voltage signals obtained by sampling are simultaneously converted by A / D and output to external high-end devices.

[0053] By switching between sampling the sensor signal when the A / D conversion circuit is stopped and converting the held analog voltage when the A / D conversion circuit is active, it is possible to simultaneously acquire sensor data for each time interval and reduce power consumption. By minimizing the driving of the A / D conversion circuit, it is possible to manufacture semiconductor devices capable of being driven for extended periods using battery power.

[0054] Figure 1A A semiconductor device 100 is shown to illustrate one aspect of the present invention. The semiconductor device 100 includes, for example, a sensor 11, an amplifier circuit 12, a sample-and-hold circuit 13, an A / D conversion circuit 14, and an interface circuit 15. The semiconductor device 100 has the function of transmitting and receiving signals between itself and a host controller 110. Although not shown in the diagram, the semiconductor device 100 also includes a battery or the like that supplying power to the various circuits of the semiconductor device 100.

[0055] Sensor 11 has the function of converting input signals such as light, sound, strain, acceleration, pressure, humidity, electric field, magnetic field, or chemical substance quantity into an output signal of electrical signal. The output signal of electrical signal is a signal S with an analog voltage value (analog voltage). SNS The sensor 11 can be used to monitor various environmental sensors (light sensors, heat sensors, humidity sensors, gas sensors, odor sensors, vibration sensors, acceleration sensors, strain sensors, etc.) and various biosensors. Figure 1A The semiconductor device with sensors shown can wirelessly transmit the results of measurements taken at each interval by a chip embedded in a building or human body. Therefore, sensor 11 preferably uses one or more sensors corresponding to the purpose.

[0056] Amplifier circuit 12 is used to amplify the current or voltage of the signal obtained from sensor 11. Amplifier circuit 12 has the function of amplifying the input signal S. SNS As signal S BUF Output function. Signal S BUF Equivalent to signal S SNS The signal is amplified by the current or voltage. Amplifier circuit 12 can be constructed using operational amplifiers or buffers, etc.

[0057] Sample-and-hold circuit 13 has the following function: holding the signal S corresponding to the output signal S of amplifier circuit 12. BUF The analog voltage; the output signal S has a voltage corresponding to the analog voltage. SH At a specified time, the switch included in the sample-and-hold circuit 13 is turned on to control the signal S. BUF Sampling is performed, thereby corresponding to the signal S output by sensor 11. SNS The analog voltage is written into the sample-and-hold circuit 13 at a specified time.

[0058] The A / D conversion circuit 14 is used to convert the signal S output by the sample-and-hold circuit 13 into a digital signal. SH The signal S converted to a digital value ADC The circuit is as follows. As the A / D conversion circuit 14, any one of the following can be selected: parallel comparison type A / D conversion circuit, pipeline type A / D conversion circuit, successive approximation type A / D conversion circuit, Delta-Sigma (∑-△) type A / D conversion circuit, and double integral type A / D conversion circuit.

[0059] Interface circuit 15 has the function of transmitting and receiving signals between itself and the host controller 110, which is equivalent to an external device. Interface circuit 15 is configured to receive signals S from the A / D conversion circuit 14. ADC The system generates signals to be transmitted to the host controller 110. Signal transmission and reception are preferably performed wirelessly. As a structure for wireless communication, the interface circuit 15 preferably includes an antenna and transceiver circuitry. The transceiver circuitry may include, for example, a rectifier circuit, a modulation circuit, a demodulation circuit, an oscillation circuit, a constant voltage circuit (regulator), etc. The system may have a structure where a chip is embedded in a building or human body, and measurements are taken at regular intervals using sensors, with the information obtained via wireless communication collected in the host controller 110.

[0060] Interface circuit 15 outputs signals S based on signals received from host controller 110 to control sensor 11, amplifier circuit 12, sample-and-hold circuit 13, and A / D conversion circuit 14. ENE The function of signal S. ENEThese are equivalent to signals used to control the driving or stopping of the A / D conversion circuit 14, signals used to control the driving of the sample-and-hold circuit 13, and signals used to control the driving or stopping of the sensor 11 and amplifier circuit 12.

[0061] Figure 1B The structure of the sample-and-hold circuit 13 is shown. The sample-and-hold circuit 13 includes transistors 21 to 23. Transistors 21 to 23 are n-channel transistors. Signal S W It is used to control the switching on or off of transistor 21 and to control the signal S at a specified timing. BUF The signal being sampled.

[0062] Note that when it is not necessary to specify one of the sample-and-hold circuits 13, the symbol for sample-and-hold circuit 13 is used for explanation, and when any sample-and-hold circuit 13 is represented, the symbols for signal holding circuit 13_1, sample-and-hold circuit 13_2, etc. are used for explanation. The same applies to other components, and symbols such as "_2" or "[1]" are added to the symbols to distinguish multiple components.

[0063] Figure 1B The node FN that holds the sampled analog voltage is shown. Additionally, Figure 1B The diagram shows the structure where node FN is connected to the gate of transistor 22, which serves as the input terminal of the source follower circuit. The bias voltage V of the source follower circuit is also shown. B The structure to which the gate of transistor 23 is applied. Note that the structure where node FN is connected to a capacitor is shown, but by employing a structure that makes the gate capacitance of transistor 22 sufficiently large, the capacitor can be omitted. By providing a source follower circuit, the ability to supply charge to subsequent circuits can be improved. Furthermore, in an OS transistor, the electrical characteristics of the transistor change little due to variations in ambient temperature. Therefore, by using an OS transistor to construct a source follower circuit, leakage current flowing through it in environments with large variations in ambient temperature can be reduced.

[0064] Transistors 21 to 23 are composed of OS transistors. By using OS transistors as transistors in the sample-and-hold circuit 13, the leakage current flowing between the source and drain (hereinafter, off-state current) in the off-state is very low, thus enabling the signal S to be processed efficiently. BUF The analog voltage obtained through sampling is held at node FN. Therefore, even if the analog voltage is not immediately converted into an analog voltage after being obtained and then read out later, a high-precision output signal can be obtained, thereby enabling low power consumption of the semiconductor device 100.

[0065] Furthermore, the sample-and-hold circuit 13 using an OS transistor can rewrite and read the analog voltage by charging or discharging the charge, thus enabling the acquisition and reading of virtually unlimited analog voltages. Because the signal-and-hold circuit using an OS transistor does not involve atomic-level structural changes as seen in magnetic or resistive recurrent memories, it exhibits excellent write tolerance. Moreover, unlike flash memory, even during repeated write operations, no instability caused by the increase in electron trapping centers is observed in the signal-and-hold circuit using an OS transistor.

[0066] Furthermore, the signal holding circuit using OS transistors can be freely configured on circuits using Si transistors, thus allowing for easy integration even when multiple delay circuits are included. Additionally, OS transistors can be manufactured using the same fabrication equipment as Si transistors, enabling low-cost manufacturing.

[0067] Furthermore, when an OS transistor has a back gate electrode in addition to the gate, source, and drain electrodes, it can become a 4-terminal semiconductor device. It can be configured into a circuit network where the input and output of the signal flowing between the source and drain can be independently controlled based on the voltage applied to the gate or back gate electrode. Therefore, circuit design can be performed in the same manner as LSI. Moreover, OS transistors exhibit superior electrical characteristics compared to Si transistors at high temperatures. Specifically, even at temperatures above 125°C and below 150°C, the ratio of on-state current to off-state current is high, thus enabling excellent switching operation.

[0068] Notice, Figure 1B The circuit structure shown is that of the sample-and-hold circuit 13, which has a node FN for holding the analog voltage, but as Figure 2A The semiconductor device 100A shown can be illustrated as a plurality of sample-and-hold circuits 13_1 to 13_N (where N is a natural number of 2 or more). Alternatively, as... Figure 2B The semiconductor device 100B shown can be illustrated as a plurality of signal holding circuits 31_1 to 31_N within a sample and hold circuit 13A.

[0069] Reference Figure 3A and Figure 3B This section describes examples of the structure of the sample-and-hold circuits 13_1 to 13_N included in the semiconductor device 100A. (Refer to...) Figure 4 illustrate Figure 3A and Figure 3B The following are examples of the operation of the sample-and-hold circuits 13_1 to 13_N. Also refer to... Figures 5A to 5C This section describes an example of the structure of a sample-and-hold circuit 13A, including signal holding circuits 31_1 to 31_N, included in the semiconductor device 100B. (Refer to...) Figure 7 illustrate Figures 5A to 5CThe following is an example of the operation of the sample-and-hold circuit 13A.

[0070] Figure 3A The sample-and-hold circuits 13_1 to 13_N shown include a selection circuit 41, multiple signal holding circuits 42, and a selection circuit 43. The selection circuit 41 is used to select the signal S... BUF The circuit that assigns samples to multiple signal holding circuits 42. The selection circuit 41 is used as a demultiplexer. The multiple signal holding circuits 42 are equivalent to... Figure 1B The circuit described consists of transistors connected to node FN, which holds the sampled analog voltage. Selection circuit 43 is used to select the analog voltage held in multiple signal holding circuits 42 as signal S. SH The circuit selects and outputs sequentially. Selection circuit 41 is used as a multiplexer. Signal S w This is the signal used to control the selection circuit 41, which is used as a demultiplexer. Signal S R It is a signal used to control the selection circuit 43, which is used as a multiplexer.

[0071] Figure 3B It is shown Figure 3A The circuit diagrams show specific structural examples of sample-and-hold circuits 13_1 to 13_N. Figure 3B Transistors 21_1 to 21_N, which are used as selection circuit 41, are shown. Figure 3B Nodes FN_1 to FN_N are shown connected to one of the source and drain terminals of transistors 21_1 to 21_N constituting the signal holding circuit 42, and to the gate terminals of transistors 22_1 to 22_N. Additionally, transistors 24_1 to 24_N, which are used as the selection circuit 43, are also shown.

[0072] Each transistor included in the sample-and-hold circuits 13_1 to 13_N is composed of an OS transistor. By using OS transistors in the transistors included in the sample-and-hold circuits 13_1 to 13_N, the leakage current flowing between the source and drain (hereinafter, off-state current) in the off-state state is very low, thus allowing for better control of the signal S. BUF The analog voltage obtained through sampling is held at node FN. Therefore, even if the analog voltage is not immediately converted to an analog voltage after being obtained and then read out later, a high-precision output signal can be obtained, thereby enabling low power consumption of the semiconductor device 100A.

[0073] exist Figure 3B In the middle, it will be used to control signal S BUF The sampled signal S W Let it be signal S W _1 to signal S W _N. In Figure 3B In this process, multiple analog voltages held at a time will be read out sequentially as signals S. SH signal S R Let it be signal S R _1 to signal S R _N. Figure 3A and Figure 3B The sample-and-hold circuits 13_1 to 13_N shown are used to pair the signal S at different Nth timings. BUF Sampling is performed to hold the analog voltage at each of nodes FN_1 to FN_N, which are used as signal holding circuit 42. Additionally, Figure 3A and Figure 3B The sample-and-hold circuits 13_1 to 13_N shown will be used at different N timings to hold the analog voltages held by nodes FN_1 to FN_N of the signal holding circuit 42 as the signal S. SH Output.

[0074] Figure 4 This means that in Figure 3A and Figure 3B The sample-and-hold circuits 13_1 to 13_N shown in the diagram handle the signal S. BUF A timing diagram of the sampling process. Figure 4 In addition to signal S BUF In addition to the waveform, signal S is also shown. W _1 to signal S W _3 and signal S W _N, nodes FN_1 to FN_3 and F_N. In Figure 4 The diagram illustrates the operation from time T1 to TN. Note that in the accompanying diagram, the periods marked with shaded lines represent periods of uncertainty. Figure 4 During the period described, signal S R _1 to signal S R _N (not shown) is at the L level.

[0075] At time T1, make signal S W _1 is at level H and the signal S BUF The voltage V1 is written to node FN_1 to generate signal S. BUF Sampling.

[0076] During the interval T W At time T2, signal S W _2 is at level H and the signal S BUF The voltage V2 is written to node FN_2 to generate signal S. BUF Sampling.

[0077] Similarly, during the interval T W At time T3, signal SW _3 is at level H and the signal S BUF The voltage V3 is written to node FN_3 to generate signal S. BUF Sampling. Additionally, at time TN, signal S... W _N is at H level and the signal S BUF The voltage VN is written to node FN_N to generate signal S. BUF The sampling. The voltages V1 to VN maintained between nodes FN_1 and FN_N can be maintained by making signal S... W _1 to S W _N remains at the L level.

[0078] Figure 5A The sample-and-hold circuit 13A shown includes a selection circuit 44, multiple signal holding circuits 31_1 to 31_N, and an adder circuit 45. The selection circuit 44 is used to select the signal S... BUF The circuit is used to sample signals distributed to multiple signal holding circuits 31_1 to 31_N. The selection circuit 44 is used as a demultiplexer. The multiple signal holding circuits 42 are equivalent to circuits consisting of transistors and capacitors connected to node FN. The adder circuit 45 is equivalent to a circuit that adds potentials together by supplying a potential that varies through sampling via the selection circuit 44 to one electrode of a capacitor, and by capacitively coupling this potential to the other electrode of node FN. Signal S w It is a signal used to control the selection circuit 44, which is used as a demultiplexer.

[0079] Figure 5B It is shown Figure 5A The circuit diagram shows a specific example of the sample-and-hold circuit 13A. Figure 5B Transistors 51_1 to 51_N, which are used as selection circuit 44, are shown. Figure 5B Transistors 51_1 to 51_N constituting signal holding circuits 31_1 to 31_N are shown, as well as capacitors 52_1 to 52_N connected to one of the source and drain terminals of transistors 51_1 to 51_N. Figure 5B The node FN is shown, which is connected to capacitors 52_1 to 52_N, one of the source and drain of transistor 53, and the gate of transistor 54, which is the input terminal of the source follower circuit. Figure 5B The bias voltage V of the source follower circuit is shown. B The structure supplied to the gate of transistor 55. The gate of transistor 53 is supplied with signal S. INI Signal S INI It is a signal used to initialize the potential of node FN.

[0080] exist Figure 5BIn the middle, it will be used to control signal S BUF The sampled signal S W Let it be signal S W _1 to signal S W _N. In Figure 5A and Figure 5B The sample-and-hold circuit 13A shown adds voltages together by using capacitors 52_1 to 52_N, which are used as adder circuit 45, through capacitive coupling. This voltage is obtained by applying the signal S at different N timing intervals. BUF The voltage obtained through sampling is equivalent to the sum of the voltages obtained by addition, which is held at node FN. The analog voltage held at node FN is transmitted as signal S through transistors 54 and 55, which are used as source follower circuits. SH The output is then processed. Furthermore, a capacitor is provided at the node between any one of transistors 51_1 to 51_N and any one of capacitors 52_1 to 52_N to retain the charge obtained through sampling. By making the electrostatic capacitance (referred to as capacitance) of this capacitor greater than the capacitance of node FN, fluctuations in the electrostatic capacitance of this capacitor that occur with changes in the potential of node FN can be suppressed.

[0081] The transistors included in the sample-and-hold circuit 13A are all composed of OS transistors. By using OS transistors as the transistors included in the sample-and-hold circuit 13A, the leakage current flowing between the source and drain (hereinafter, off-state current) in the off-state state is very low, thus allowing the signal S to be processed more efficiently. BUF The analog voltage obtained through sampling is held at node FN. Therefore, even if the analog voltage is not immediately converted to an analog voltage after being obtained and then read out later, a high-precision output signal can be obtained, thereby enabling low power consumption of the semiconductor device 100B.

[0082] Note that, although in Figure 5B The signal sampled by transistors 51_1 to 51_N is denoted as signal S. BUF However, other structures can also be used. For example, such as Figure 5C As shown, signals S output from different amplifier circuits can also be used. BUF _1 to S BUF The structure is designed to sample transistors 51_1 through 51_N respectively.

[0083] Although Figure 5B , Figure 5C The diagram illustrates how capacitive coupling can affect the signal S at different N time intervals. BUF This structure combines the sampled voltages, but other structures can also be used. For example, it can use... Figure 6 The structure shown. Figure 6The diagram shows a structure in which capacitors 52_1 to 52_N are replaced with transistor 56. Figure 6 In this structure, during sampling, transistors 51_1 to 51_N are sequentially turned on, and transistor 56 is turned off via the control signal EN. The voltage obtained through sampling is held in a capacitor at any of the transistors 51_1 to 51_N connected to transistor 56. During addition, transistors 56 are simultaneously turned on via the control signal EN, thereby distributing the charge corresponding to the voltage held during sampling to node FN, resulting in a voltage equivalent to the sum of the voltages obtained from addition at node FN.

[0084] Figure 7 This means that in Figure 5A and Figure 5B The sample-and-hold circuit 13A shown here stores the signal S BUF A timing diagram of the sampling process. Figure 7 In addition to signal S BUF In addition to the waveform, signal S is also shown. INI Signal S W _1 to signal S W _4 and node FN. In Figure 7 The diagram illustrates the operation from time T1 to T4. Note that in the accompanying diagram illustrating the timing diagram, the periods marked with shaded lines represent periods of indeterminate states.

[0085] At time T0, make signal S INI The signal is set to H level, thereby initializing node FN (e.g., to 0V). Then, signal S... INI When at level L, node FN becomes electrically floating.

[0086] At time T1, make signal S W _1 is at level H, thus turning signal S BUF A voltage V1 is supplied to one electrode of capacitor 52_1. The node FN, corresponding to the potential of the other electrode of capacitor 52_1, is in an electrically floating state, thus rising according to the potential variation caused by the sampling of voltage V1. Note that, for ease of explanation, in Figure 7 The parasitic capacitance of node FN is much lower than that of capacitors 52_1 to 52_N, as described in the description. Therefore, the potential rise of node FN is represented as V1. Then, signal S... W _1 is at the L level, so the voltage V1 is maintained at node FN.

[0087] At time T2, make signal S W _2 is at level H, thus turning signal S BUFA voltage V2 is supplied to one electrode of capacitor 52_2. Node FN, corresponding to the potential of the other electrode of capacitor 52_2, is in an electrically floating state, thus rising according to the potential variation caused by the sampling of voltage V2. The potential rise of node FN can be expressed as a rise from V1 to V2 by V1 + V2. Then, signal S... W _2 is at the L level, so the voltage V1+V2 is maintained at node FN.

[0088] At time T3, signal S is made W _3 is at level H, thus signal S BUF A voltage V3 is supplied to one electrode of capacitor 52_3. Node FN, corresponding to the potential of the other electrode of capacitor 52_3, is in an electrically floating state, thus rising according to the potential variation caused by the sampling of voltage V3. The potential rise of node FN can be expressed as a rise from V1+V2 to V3 by V1+V2+V3. Then, signal S... W _3 is at L level, so the voltage V1+V2+V3 is maintained at node FN.

[0089] At time T4, make signal S W _4 is at level H, thus signal S BUF A voltage V4 is supplied to one electrode of capacitor 52_4. Node FN, corresponding to the potential of the other electrode of capacitor 52_4, is in an electrically floating state, thus rising according to the potential variation caused by the sampling of voltage V4. The potential rise of node FN can be expressed as a rise from V1+V2+V3 to V4. Then, signal S... W _4 is at L level, so the voltage V1+V2+V3+V4 is maintained at node FN.

[0090] To better illustrate the potential variation at node FN, in Figure 7 The description states that the voltage obtained from sampling is directly added, but in actual circuit structures, parasitic capacitance exists between wirings and in components such as transistors. Therefore, node FN obtains the voltage corresponding to the addition operation, for example, (V1+V2+V3+V4) / a (a: constant).

[0091] By performing the above operations, node FN can maintain a voltage that is the sum of the voltages obtained through sampling. The maintained voltage can be output to the A / D conversion circuit 14 at a specified timing via a source follower circuit.

[0092] Because it is possible to perform Figure 3 to Figure 7The described work, therefore, provides a semiconductor device 100A, 100B according to one aspect of the present invention, which is a semiconductor device with a novel structure that achieves low power consumption and is used as a signal processing device with a sensor. One aspect of the present invention provides a semiconductor device with a novel structure that can achieve long-term operation and is used as a signal processing device with a sensor. Furthermore, one aspect of the present invention provides a semiconductor device with a novel structure that can maintain the sensor signal as an analog voltage even in environments with large external temperature variations. One aspect of the present invention provides a semiconductor device with a novel structure that is low-power and capable of high-precision sampling and is used as a signal processing device with a sensor.

[0093] Reference Figures 8A to 8C The explanation includes Figure 3 above and Figure 4 The operation of the semiconductor device 100A of the signal holding circuits 31_1 to 31_N described herein.

[0094] exist Figure 8A In this context, the two operations of the semiconductor device 100A are divided into separate periods. Figure 8A This illustrates the case where period 61 and period 62 are switched alternately.

[0095] Period 61 corresponds to the period during which the A / D conversion circuit 14 is in a non-operating state and the signal of the sensor 11 is sampled periodically. The sampling of the signal of the sensor 11 during period 61 is represented as time T1 to TN. When switching from period 61 to period 62, it is preferable to adopt the following structure: when the host controller 110 controls or the number of samples taken from the sensor 11 reaches the number that can be held in the sample-and-hold circuits 13_1 to 13_N, specifically the number of sample-and-hold circuits 13_1 to 13_N, the switch from period 61 to period 62 is automatic.

[0096] It can be used Figure 8B The block diagram shown illustrates the state of semiconductor device 100A during period 61. Figure 8B In the block diagram, dashed lines represent structures in a stopped or inactive state, while solid lines represent structures in an active state. During the sampling of the signal from sensor 11, the sensor 11, amplifier circuit 12, sample-and-hold circuits 13_1 to 13_N, and control interface circuit 15 can be activated, while the A / D conversion circuit 14 and the host controller 110 are inactive. That is, during the control period 61, interface circuit 15 inputs the signal from sensor 11 to amplifier circuit 12 and holds the output signal of amplifier circuit 12 in sample-and-hold circuit 13.

[0097] Period 62 corresponds to the period during which the A / D conversion circuit 14 is activated, thereby performing A / D conversion on the multiple analog voltages sampled during period 61 and outputting the voltages to the host controller 110. In other words, during the control period 62, the interface circuit 15 outputs a digital signal obtained by outputting the voltage held in the sample-and-hold circuit 13 to the A / D conversion circuit 14. During period 62, sampling of the signal from the sensor 11 is preferably stopped.

[0098] When switching from period 62 to period 61, the following structure is preferred: the system automatically switches from period 62 to period 61 when the control of the host controller 110 or the data transmission from the semiconductor device 100A to the host controller 110 ends.

[0099] It can be used Figure 8C The block diagram shown illustrates the state of semiconductor device 100A during period 62. Figure 8C In the block diagram, dashed lines represent structures that are in a stopped or inactive state, and solid lines represent structures that are in an active state. During the transmission of data acquired in sensor 11 corresponding to the analog voltage held in sample-and-hold circuits 13_1 to 13_N to host controller 110, A / D conversion circuit 14, interface circuit 15, and host controller 110 can be activated while sensor 11 and amplifier circuit 12 are deactivated.

[0100] like Figure 8A As shown, this is equivalent to period 61. Figure 8B The work is longer than the equivalent of 62 hours. Figure 8C The semiconductor device of one aspect of the present invention can hold multiple analog voltages. Therefore, the period 61 during which the A / D conversion circuit stops sampling the sensor signal and the period 62 during which the A / D conversion circuit operates to perform A / D conversion on the held analog voltages can be switched, thus simultaneously achieving the acquisition of sensor data for each period and minimizing power consumption. By minimizing the driving of the A / D conversion circuit, a semiconductor device capable of long-term operation powered by battery power can be manufactured.

[0101] Reference Figures 9A to 9C The explanation includes Figure 5 above and Figure 7 The operation of the semiconductor device 100B of the signal holding circuit 31A described herein.

[0102] exist Figure 9A In this context, the two operations of the semiconductor device 100B are divided into different periods. Figure 9A This illustrates the case where period 61 and period 62 are switched alternately. Figure 9A The content described is consistent with Figure 8A same.

[0103] It can be used Figure 9B The block diagram shown illustrates the state of semiconductor device 100B during period 61. Figure 9B In the block diagram, dashed lines represent structures that are in a stopped or inactive state, while solid lines represent structures that are in an active state. During the sampling of the signal from sensor 11, sensor 11, amplifier circuit 12, sample-and-hold circuit 13A, and interface circuit 15 used for control can be activated, while A / D conversion circuit 14 and host controller 110 are deactivated.

[0104] It can be used Figure 9C The block diagram shown illustrates the state of semiconductor device 100B during period 62. Figure 9C In the block diagram, dashed lines represent structures that are in a stopped or inactive state, and solid lines represent structures that are in an active state. During the transmission of data acquired in sensor 11 corresponding to the analog voltage held in sample-and-hold circuits 13_1 to 13_N to host controller 110, A / D conversion circuit 14, interface circuit 15, and host controller 110 can be activated while sensor 11 and amplifier circuit 12 are deactivated.

[0105] exist Figures 8A to 8C and Figures 9A to 9C During operation, power supply to high-power circuits such as the A / D conversion circuit 14 can be stopped during the period (power gating). As a result, battery power consumption can be suppressed, thereby enabling the semiconductor device to operate autonomously for extended periods.

[0106] Figure 10A This is a block diagram illustrating an example of the structure of multiple semiconductor devices 100_1 to 100_n (n being a natural number greater than 1) and a host controller 110. Figure 10A The host controller 110 shown includes, for example, a control block 200, a main CPU 201, peripheral circuitry 202, and a communication circuitry block 203. Additionally, Figure 10A The cloud 299 is shown as the aforementioned device that transmits data collected by the host controller 110.

[0107] Control block 200 is a circuit block that has the function of intermittently driving the internal circuits in sync with semiconductor devices 100_1 to 100_n. Control block 200 has the following functions: sending control signals that collect data corresponding to the analog voltages collected in the sample-and-hold circuits 13 of semiconductor devices 100_1 to 100_n; and receiving signals sent by semiconductor devices 100_1 to 100_n.

[0108] The main CPU 201 and peripheral circuits 202 are circuit blocks including a processor for controlling the host controller 110, a memory for storing data, and an oscillator.

[0109] The communication circuit block 203 has the function of sending various data collected by the host controller 110 from the semiconductor devices 100_1 to 100_n to the cloud 299, and the function of the host controller 110 obtaining the required data from the cloud 299.

[0110] Note that in Figure 10A In this context, a host controller may have multiple semiconductor devices, but a host controller can also have only one semiconductor device. Additionally, as... Figure 10B As shown, a structure can also be used to collect the required data from multiple semiconductor devices 100_1 and 100_2 using multiple host controllers 110_1, 110_2 and cloud 299.

[0111] By reducing the power consumption of semiconductor devices, multiple sensors capable of autonomous operation for extended periods can be used to acquire data. This allows for the creation of highly convenient sensor systems.

[0112] Figure 11A and Figure 11B A modified example of the circuit structure that can be applied to each transistor in the sample-and-hold circuit 13 described above is shown.

[0113] exist Figure 1B In the examples, transistors 21 to 23 are transistors having a top-gate structure or a bottom-gate structure that does not include a back-gate electrode, but the structure of transistors 21 to 23 is not limited to this. For example, as... Figure 11A The sample-and-hold circuit 13B shown can also employ transistors 21A to 23A, which include a back gate electrode connected to the back gate electrode line BGL. By employing... Figure 11A The structure allows for easy external control of the states of transistors 21A to 23A.

[0114] Or, such as Figure 11B As shown in the sample-and-hold circuit 13C, transistors 21B to 23B, including a back gate electrode connected to the gate electrode, can also be used. By employing... Figure 11B The structure can increase the amount of current flowing through transistors 21B to 23B.

[0115] Alternatively, it can also be used Figure 12 The sample-and-hold circuit 13D shown is structurally sound. Figure 12 In addition to Figure 1BIn addition to the structure shown, it also includes a switch 27, multiple capacitors 28, and a comparator 29. The switch 27 and multiple capacitors 28 have the function of adjusting the threshold voltage of transistor 22C by adjusting the voltage supplied to the back gate electrode line BGL. The threshold voltage is adjusted as follows: the comparator 29 monitors the signal S with reference to the reference voltage VREF. SH The voltage, and according to the output of comparator 29, the signal D supplied to one electrode of capacitor 28. A1 To D AN The change occurs. By adopting this structure, the threshold voltages of transistors 22C and 23 can be made equal.

[0116] As described above, one aspect of the semiconductor device of the present invention can have a structure that holds multiple analog voltages. Therefore, sampling of sensor signals when the A / D conversion circuit is stopped and A / D conversion of the held analog voltages when the A / D conversion circuit is active can be performed alternately, simultaneously achieving both data acquisition for each time interval and low power consumption. By minimizing the driving of the A / D conversion circuit, a semiconductor device capable of long-term operation powered by battery power can be manufactured.

[0117] (Implementation Method 2)

[0118] This embodiment describes a transistor structure applicable to the semiconductor device structure described in the above embodiments. Specifically, it describes a structure in which transistors with different electrical characteristics are stacked. In particular, this embodiment describes the structure of each transistor included in the delay circuit constituting the semiconductor device. By adopting the above structure, the design freedom of the semiconductor device can be increased. Furthermore, by stacking transistors with different electrical characteristics, the integration density of the semiconductor device can be increased.

[0119] Figure 13 The semiconductor device shown includes transistor 300, transistor 500, and capacitor 600. Figure 15A This is a cross-sectional view of the channel length of transistor 500. Figure 15B This is a cross-sectional view of the channel width of transistor 500. Figure 15C This is a cross-sectional view of the channel width of transistor 300.

[0120] Transistor 500 is a metal-oxide-semiconductor (OS transistor) containing a metal-oxide-semiconductor in the channel formation region. Because transistor 500 has a low off-state current, by using this transistor in the OS transistors included in a semiconductor device, written data can be retained for extended periods. In other words, the refresh frequency is low or no refresh operation is required, thus reducing the power consumption of the semiconductor device.

[0121] The semiconductor device described in this embodiment is as follows: Figure 13 As shown, it includes transistor 300, transistor 500, and capacitor 600. Transistor 500 is positioned above transistor 300, and capacitor 600 is positioned above both transistor 300 and transistor 500.

[0122] The transistor 300 is disposed on the substrate 311 and includes: a conductor 316, an insulator 315, a semiconductor region 313 formed by a portion of the substrate 311; and low-resistance regions 314a and 314b used as source or drain regions. Furthermore, the transistor 300 can be, for example, applied to the transistors included in the A / D conversion circuit 14 of the above embodiment.

[0123] like Figure 15C As shown, in transistor 300, conductor 316 covers the top surface of semiconductor region 313 and the side surface in the channel width direction via insulator 315. Thus, by giving transistor 300 a Fin-type structure, the effective channel width is increased, thereby improving the on-state characteristics of transistor 300. Furthermore, since the influence of the electric field at the gate electrode can be increased, the off-state characteristics of transistor 300 can be improved.

[0124] In addition, transistor 300 can be a p-channel transistor or an n-channel transistor.

[0125] The channel formation region of semiconductor region 313, the region theren, the low-resistance region 314a and low-resistance region 314b used as source or drain regions, preferably contain semiconductors such as silicon-based semiconductors, and more preferably contain single-crystal silicon. Alternatively, materials containing Ge (germanium), SiGe (silicon-germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), etc., can also be used. Silicon, by applying stress to the crystal lattice and changing the interplanar spacing to control the effective quality, can be used. Furthermore, transistor 300 can also be a HEMT (High Electron Mobility Transistor) using GaAs and GaAlAs, etc.

[0126] In the low resistance regions 314a and 314b, in addition to the semiconductor material applied to the semiconductor region 313, elements such as arsenic and phosphorus that impart n-type conductivity or elements such as boron that impart p-type conductivity are also included.

[0127] The conductor 316 used as the gate electrode can be a conductive material such as silicon, a semiconductor material, a metal material, an alloy material, or a metal oxide material, which contains elements that impart n-type conductivity, such as arsenic or phosphorus, or elements that impart p-type conductivity, such as boron.

[0128] Furthermore, since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, materials such as titanium nitride or tantalum nitride are preferably used as conductors. In order to combine conductivity and embeddability, a stack of metal materials such as tungsten or aluminum is preferably used as the conductor, especially tungsten in terms of heat resistance.

[0129] Notice, Figure 13 The structure of transistor 300 shown is merely an example and is not limited to the structure described above. Appropriate transistors can be used depending on the circuit structure or driving method. For example, when using a unipolar circuit with only OS transistors (referring to transistors of the same polarity as those with only n-channel transistors) in a semiconductor device, such as... Figure 14 As shown, the structure of transistor 300 can be the same as that of transistor 500 using oxide semiconductor. Details of transistor 500 will be explained later.

[0130] Insulators 320, 322, 324 and 326 are stacked sequentially in a manner that covers transistor 300.

[0131] Insulators 320, 322, 324 and 326 may be made of materials such as silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum oxynitride and aluminum nitride.

[0132] Note that in this specification, "silicon oxynitride" refers to a material in which the oxygen content is greater than the nitrogen content, while "silicon oxynitride" refers to a material in which the nitrogen content is greater than the oxygen content. Also note that in this specification, "aluminum oxynitride" refers to a material in which the oxygen content is greater than the nitrogen content, while "aluminum oxynitride" refers to a material in which the nitrogen content is greater than the oxygen content.

[0133] The insulator 322 can also be used as a planarization film to flatten the steps caused by the transistor 300 and the like disposed below it. For example, in order to improve the flatness of the top surface of the insulator 322, its top surface can also be planarized by a planarization process using chemical mechanical polishing (CMP) or the like.

[0134] As the insulator 324, it is preferable to use a barrier film that can prevent hydrogen or impurities from diffusing from the substrate 311 or transistor 300 into the area where transistor 500 is disposed.

[0135] As an example of a hydrogen-blocking film, silicon nitride formed by CVD can be used. Here, hydrogen sometimes diffuses into semiconductor devices with oxide semiconductors, such as transistor 500, causing a deterioration in the characteristics of the semiconductor device. Therefore, it is preferable to provide a film that suppresses hydrogen diffusion between transistor 500 and transistor 300. Specifically, a film that suppresses hydrogen diffusion refers to a film with a low amount of hydrogen detachment.

[0136] The amount of hydrogen removed can be measured, for example, using thermal desorption spectroscopy (TDS). For instance, in TDS analysis within a membrane surface temperature range of 50°C to 500°C, when the amount of hydrogen removed (converted to hydrogen atoms) is expressed per unit area of ​​insulator 324, the amount of hydrogen removed from insulator 324 is 10 × 10⁻⁶. 15 atoms / cm 2 The following is preferred: 5×10 15 atoms / cm 2 That's all.

[0137] Note that the dielectric constant of insulator 326 is preferably lower than that of insulator 324. For example, the relative dielectric constant of insulator 326 is preferably less than 4, more preferably less than 3. For example, the relative dielectric constant of insulator 326 is preferably less than 0.7 times that of insulator 324, more preferably less than 0.6 times. By using a material with a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced.

[0138] Furthermore, conductors 328 and 330, which are connected to capacitor 600 or transistor 500, are embedded in insulators 320, 322, 324, and 326. In addition, conductors 328 and 330 function as plugs or wiring. Note that sometimes the same reference numeral is used to indicate multiple conductors that function as plugs or wiring. Furthermore, in this specification, wiring and plugs connected to wiring can also be a component. That is, a portion of a conductor is sometimes used as wiring, and a portion of a conductor is sometimes used as a plug.

[0139] As materials for the plugs and wiring (conductors 328 and 330, etc.), single layers or stacks of conductive materials such as metals, alloys, metal nitrides, or metal oxides can be used. High-melting-point materials such as tungsten or molybdenum, which combine heat resistance and conductivity, are preferred, with tungsten being particularly preferred. Alternatively, low-resistance conductive materials such as aluminum or copper are preferred. Using low-resistance conductive materials reduces wiring resistance.

[0140] Furthermore, a wiring layer can also be formed on the insulator 326 and the conductor 330. For example, in Figure 13In the transistor 300, insulator 350, insulator 352, and insulator 354 are stacked sequentially. Furthermore, conductor 356 is formed within insulators 350, 352, and 354. Conductor 356 functions as a connector or wiring for connection to transistor 300. Moreover, conductor 356 can be formed using the same material as conductors 328 and 330.

[0141] Furthermore, similar to insulator 324, insulator 350 preferably uses an insulator that blocks hydrogen. Additionally, conductor 356 preferably includes a conductor that blocks hydrogen. In particular, a hydrogen-blocking conductor is formed in the openings of the hydrogen-blocking insulator 350. By employing this structure, a barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0142] Note that tantalum nitride, for example, is preferably used as a conductor that blocks hydrogen. Furthermore, by layering tantalum nitride and highly conductive tungsten, not only can the conductivity of the wiring be maintained, but hydrogen diffusion from the transistor 300 can also be suppressed. In this case, the tantalum nitride layer that blocks hydrogen is preferably in contact with the hydrogen-blocking insulator 350.

[0143] Furthermore, a wiring layer can also be formed on the insulator 354 and the conductor 356. For example, in Figure 13 In the structure, insulators 360, 362, and 364 are stacked sequentially. Furthermore, a conductor 366 is formed within insulators 360, 362, and 364. The conductor 366 functions as a plug or wiring. Moreover, the conductor 366 can be formed using the same material as conductors 328 and 330.

[0144] Furthermore, similar to insulator 324, insulator 360 preferably uses an insulator that blocks hydrogen. Additionally, conductor 366 preferably includes a conductor that blocks hydrogen. In particular, a hydrogen-blocking conductor is formed in the openings of the hydrogen-blocking insulator 360. By employing this structure, a barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0145] Furthermore, a wiring layer can also be formed on the insulator 364 and the conductor 366. For example, in Figure 13In the structure, insulators 370, 372, and 374 are stacked sequentially. Furthermore, a conductor 376 is formed within insulators 370, 372, and 374. The conductor 376 functions as a plug or wiring. Moreover, the conductor 376 can be formed using the same material as conductors 328 and 330.

[0146] Furthermore, similar to insulator 324, insulator 370 preferably uses an insulator that blocks hydrogen. Additionally, conductor 376 preferably includes a conductor that blocks hydrogen. In particular, a hydrogen-blocking conductor is formed in the openings of the hydrogen-blocking insulator 370. By employing this structure, a barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0147] Furthermore, a wiring layer can also be formed on the insulator 374 and the conductor 376. For example, in Figure 13 In the structure, insulators 380, 382, ​​and 384 are stacked sequentially. Furthermore, a conductor 386 is formed within insulators 380, 382, ​​and 384. The conductor 386 functions as a plug or wiring. Moreover, the conductor 386 can be formed using the same material as conductors 328 and 330.

[0148] Furthermore, similar to insulator 324, insulator 380 preferably uses an insulator that blocks hydrogen. Additionally, conductor 386 preferably includes a conductor that blocks hydrogen. In particular, a hydrogen-blocking conductor is formed in the opening of the hydrogen-blocking insulator 380. By employing this structure, a barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0149] The wiring layers including conductor 356, conductor 366, conductor 376, and conductor 386 have been described above, but the semiconductor device of this embodiment is not limited thereto. The wiring layers similar to the wiring layer including conductor 356 may be three or fewer, or five or more.

[0150] Insulators 510, 512, 514 and 516 are sequentially stacked on insulator 384. Preferably, one of insulators 510, 512, 514 and 516 is a material that is resistant to oxygen or hydrogen.

[0151] For example, as insulators 510 and 514, it is preferable to use barrier films that can prevent hydrogen or impurities from diffusing from the substrate 311 or the region where the transistor 300 is disposed into the region where the transistor 500 is disposed. Therefore, insulators 510 and 514 can be made of the same material as insulator 324.

[0152] As an example of a hydrogen-blocking film, silicon nitride formed by CVD can be used. Here, hydrogen sometimes diffuses into semiconductor devices with oxide semiconductors, such as transistor 500, causing a deterioration in the characteristics of the semiconductor device. Therefore, it is preferable to provide a film that suppresses hydrogen diffusion between transistor 500 and transistor 300. Specifically, a film that suppresses hydrogen diffusion refers to a film with a low amount of hydrogen detachment.

[0153] For example, as a membrane that blocks hydrogen, insulators 510 and 514 are preferably made of metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide.

[0154] In particular, aluminum oxide has a high barrier effect against the permeation of oxygen and impurities such as hydrogen and moisture that cause changes in the electrical characteristics of transistors. Therefore, during and after the transistor manufacturing process, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500. Furthermore, aluminum oxide can suppress the release of oxygen from the oxides constituting the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0155] For example, the same materials as insulator 320 can be used as insulators 512 and 516. Furthermore, by using materials with lower dielectric constants as the aforementioned insulators, parasitic capacitances generated between wirings can be reduced. For example, silicon oxide films and silicon oxynitride films can be used as insulators 512 and 516.

[0156] Furthermore, conductors such as conductor 518 and conductors constituting transistor 500 (e.g., conductor 503) are embedded in insulators 510, 512, 514, and 516. The conductor 518 is used as a plug or wiring for connection to capacitor 600 or transistor 300. The conductor 518 can be formed using the same material as conductors 328 and 330.

[0157] In particular, the conductor 518 in the region in contact with insulators 510 and 514 is preferably a conductor that is resistant to oxygen, hydrogen, and water. By employing this structure, transistor 300 and transistor 500 can be separated by a layer that is resistant to oxygen, hydrogen, and water, thereby suppressing the diffusion of hydrogen from transistor 300 into transistor 500.

[0158] A transistor 500 is disposed above the insulator 516.

[0159] like Figure 15A and Figure 15B As shown, transistor 500 includes: a conductor 503 embedded in insulator 514 and insulator 516; an insulator 520 disposed on insulator 516 and conductor 503; an insulator 522 disposed on insulator 520; an insulator 524 disposed on insulator 522; an oxide 530a disposed on insulator 524; an oxide 530b disposed on oxide 530a; conductors 542a and 542b disposed on oxide 530b and spaced apart from each other; an insulator 580 disposed on conductors 542a and 542b and having an opening overlapping between conductors 542a and 542b; an oxide 530c disposed on the bottom and side surfaces of the opening; an insulator 550 disposed on the forming surface of oxide 530c; and a conductor 560 disposed on the forming surface of insulator 550.

[0160] In addition, such as Figure 15A and Figure 15B As shown, preferably, an insulator 544 is disposed between oxide 530a, oxide 530b, conductor 542a and conductor 542b and insulator 580. Furthermore, as... Figure 15A and Figure 15B As shown, the conductor 560 preferably includes a conductor 560a disposed inside the insulator 550 and a conductor 560b embedded inside the conductor 560a. Furthermore, as... Figure 15A and Figure 15B As shown, an insulator 574 is preferably disposed on the insulator 580, the conductor 560 and the insulator 550.

[0161] Note that oxides 530a, 530b, and 530c are sometimes collectively referred to as oxide 530.

[0162] In transistor 500, three layers of oxide 530a, oxide 530b, and oxide 530c are stacked in the region forming the channel and its vicinity, but the present invention is not limited to this. For example, a single layer of oxide 530b, a two-layer structure of oxide 530b and oxide 530a, a two-layer structure of oxide 530b and oxide 530c, or a stacked structure of four or more layers can be provided. Furthermore, in transistor 500, conductor 560 has a two-layer structure, but the present invention is not limited to this. For example, conductor 560 can also have a single-layer structure or a stacked structure of three or more layers. Note that... Figure 13 , Figure 15A The structure of transistor 500 shown is only an example and is not limited to the structure described above. Appropriate transistors can be used depending on the circuit structure or driving method.

[0163] Here, conductor 560 is used as the gate electrode of the transistor, and conductors 542a and 542b are used as source or drain electrodes. As described above, conductor 560 is embedded in the opening of insulator 580 and in the region between conductors 542a and 542b. The arrangement of conductors 560, 542a, and 542b relative to the opening of insulator 580 is self-aligned. In other words, in transistor 500, the gate electrode can be self-aligned between the source and drain electrodes. Therefore, conductor 560 can be formed without providing space for alignment, thus reducing the occupied area of ​​transistor 500. This enables miniaturization and high integration of semiconductor devices.

[0164] Furthermore, conductor 560 is self-aligned and formed in the region between conductors 542a and 542b, so conductor 560 does not include the region overlapping with conductors 542a and 542b. This reduces the parasitic capacitance formed between conductor 560 and conductors 542a and 542b. Therefore, the switching speed of transistor 500 can be increased, allowing transistor 500 to have high-frequency characteristics.

[0165] Conductor 560 is sometimes used as the first gate (also called the top gate) electrode. Conductor 503 is sometimes used as the second gate (also called the bottom gate) electrode. In this case, the threshold voltage of transistor 500 can be controlled by independently changing the potential supplied to conductor 503 without linking it to the potential supplied to conductor 560. In particular, by supplying a negative potential to conductor 503, the threshold voltage of transistor 500 can be made greater than 0V and the off-state current can be reduced. Therefore, compared with not applying a negative potential to conductor 503, applying a negative potential to conductor 503 can reduce the drain current when the potential supplied to conductor 560 is 0V.

[0166] Conductor 503 is arranged to overlap with oxide 530 and conductor 560. Therefore, when a potential is supplied to conductor 560 and conductor 503, the electric field generated from conductor 560 and the electric field generated from conductor 503 are connected, and can cover the channel formation region formed in oxide 530. In this specification, the structure of a transistor in which the electric field of the first gate electrode and the electric field of the second gate electrode surround the channel formation region is referred to as a surround channel (S-channel) structure.

[0167] Furthermore, conductor 503 has the same structure as conductor 518, with conductor 503a formed in contact with the inner walls of the openings of insulator 514 and insulator 516, and conductor 503b formed on its inner side. In transistor 500, conductors 503a and 503b are stacked, but the present invention is not limited thereto. For example, conductor 503 may have a single-layer structure or a stacked structure of three or more layers.

[0168] Here, the conductive material 503a is preferably a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (making it difficult for such impurities to permeate). Additionally, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (making it difficult for such oxygen to permeate). In this specification, "the function of suppressing the diffusion of impurities or oxygen" refers to the function of suppressing the diffusion of any one or all of the aforementioned impurities and oxygen.

[0169] For example, by giving conductor 503a the function of inhibiting oxygen diffusion, the decrease in conductivity caused by the oxidation of conductor 503b can be suppressed.

[0170] Furthermore, when conductor 503 also functions as a wiring element, it is preferable to use a highly conductive material with tungsten, copper, or aluminum as the main components of conductor 503b. In this case, conductor 505 is not necessarily required. In the accompanying drawings, conductor 503b has a single-layer structure, but it can also have a multilayer structure, for example, a multilayer structure of titanium or titanium nitride and the aforementioned conductive material.

[0171] Insulators 520, 522 and 524 are used as the second gate insulating film.

[0172] Here, the insulator 524 in contact with the oxide 530 is preferably an insulator containing oxygen in excess of its stoichiometric composition. In other words, it is preferable to form an excess oxygen region in the insulator 524. By providing the aforementioned insulator containing excess oxygen in a manner that allows it to contact the oxide 530, oxygen vacancies in the oxide 530 can be reduced, thereby improving the reliability of the transistor 500.

[0173] Specifically, as an insulator with an excess oxygen region, an oxide material in which a portion of the oxygen is removed by heating is preferred. An oxide in which oxygen is removed by heating is defined as one in which the amount of oxygen removed, converted to oxygen atoms, in TDS (Thermal Desorption Spectroscopy) analysis is 1.0 × 10⁻⁶. 18 atoms / cm 3 The preferred value is 1.0 × 10⁴. 19 atoms / cm3 The above is further preferred to be 2.0×10 19 atoms / cm 3 The above, or 3.0×10 20 atoms / cm 3 The above-mentioned oxide film. Furthermore, the surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0174] Alternatively, the insulator having the aforementioned excess oxygen region can be contacted with oxide 530 and subjected to one or more of the following treatments: heat treatment, microwave treatment, and RF treatment. This treatment can remove water or hydrogen from oxide 530. For example, in oxide 530, V2 occurs... O The reaction that cleaves the H bond, in other words, the "V" reaction occurs. O H→V O Dehydrogenation can be achieved through the reaction of +H. Some of the hydrogen produced here is sometimes bonded to oxygen and removed as H2O from the oxide 530 or the insulator near the oxide 530. In addition, some of the hydrogen sometimes diffuses into the conductor 542 or is captured by the conductor 542 (also known as gettering).

[0175] Furthermore, the aforementioned microwave processing preferably utilizes a device with power capable of generating high-density plasma or a device that applies RF power to one side of the substrate. For example, by using an oxygen-containing gas and employing high-density plasma, a high density of oxygen free radicals can be generated, and by applying RF to one side of the substrate, the oxygen free radicals generated by the high-density plasma can be effectively introduced into oxide 530 or an insulator near oxide 530. Additionally, in the aforementioned microwave processing, a pressure of 133 Pa or more is preferred, preferably 200 Pa or more, and more preferably 400 Pa or more is acceptable. Furthermore, oxygen and argon are used as gases introduced into the microwave processing apparatus, and the microwave processing is performed under conditions where the oxygen flow ratio (O2 / (O2+Ar)) is 50% or less, preferably 10% or more and 30% or less.

[0176] Furthermore, in the manufacturing process of transistor 500, it is preferable to perform heat treatment with the surface of oxide 530 exposed. This heat treatment is preferably performed at a temperature of 100°C or higher and 450°C or lower, more preferably at 350°C or higher and 400°C or lower. The heat treatment is performed in a nitrogen or inert gas atmosphere, or in an atmosphere containing 10 ppm or higher, 1% or higher, or 10% or higher of an oxidizing gas. Therefore, oxygen can be supplied to oxide 530, thereby reducing oxygen vacancies (V0). OAlternatively, the heat treatment can be performed under reduced pressure. For example, the heat treatment is preferably performed in an oxygen atmosphere. Alternatively, the heat treatment can be performed in a nitrogen or inert gas atmosphere, and then, in order to replenish the removed oxygen, in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. Alternatively, the heat treatment can be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas, followed by continuous heat treatment in a nitrogen or inert gas atmosphere.

[0177] Furthermore, by subjecting oxide 530 to oxidation treatment, the reaction that fills the oxygen vacancies in oxide 530 with supplied oxygen can be promoted; in other words, "V O The reaction "+O→null" can occur. Furthermore, the hydrogen remaining in oxide 530 reacts with the supplied oxygen, allowing it to be removed as H2O (through dehydration). This prevents the hydrogen remaining in oxide 530 from re-bonding to oxygen vacancies to form V. O H.

[0178] When the insulator 524 has an excess oxygen region, the insulator 522 preferably has the function of inhibiting the diffusion of oxygen (e.g., oxygen atoms, oxygen molecules, etc.) (making it difficult for the aforementioned oxygen to pass through).

[0179] When the insulator 522 has the function of suppressing the diffusion of oxygen or impurities, the oxygen contained in the oxide 530 does not diffuse to the side of the insulator 520, which is preferred. In addition, the reaction between the conductor 503 and the oxygen contained in the insulator 524 or the oxide 530 can be suppressed.

[0180] As the insulator 522, a single layer or stack of insulators comprising so-called high-k materials such as aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST) is preferably used. When miniaturizing and highly integrating transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulating film. By using a high-k material as the insulator used as the gate insulating film, the gate potential during transistor operation can be reduced while maintaining the physical thickness.

[0181] In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium, which serves as an insulating material that inhibits the diffusion of impurities and oxygen (making it difficult for the aforementioned oxygen to permeate). As an insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) are preferred. When this material is used to form the insulator 522, the insulator 522 serves as a layer that inhibits the release of oxygen from the oxide 530 or the entry of impurities such as hydrogen from the periphery of the transistor 500 into the oxide 530.

[0182] Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide can be added to the insulator. Furthermore, the insulator can be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride can also be laminated onto the insulator.

[0183] Insulator 520 preferably has thermal stability. For example, silicon oxide and silicon oxynitride are preferred because they have thermal stability. In addition, by combining a high-k material insulator with silicon oxide or silicon oxynitride, insulators 520 and 526 with a multilayer structure that has thermal stability and a high relative permittivity can be formed.

[0184] exist Figure 15A and Figure 15B In the transistor 500, insulators 520, 522, and 524 are used as the second gate insulating film, which is composed of a three-layer stacked structure. However, the second gate insulating film may also have a single-layer, two-layer, or four-layer stacked structure. In this case, it is not limited to a stacked structure made of the same material, but may also be a stacked structure formed of different materials.

[0185] In transistor 500, a metal oxide, preferably used as an oxide semiconductor, is used in oxide 530, which includes the channel formation region. For example, In-M-Zn oxide (where element M is selected from one or more of aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) is preferably used as oxide 530. In particular, CAAC-OS or CAC-OS is preferred as the In-M-Zn oxide that can be used in oxide 530. Furthermore, In-Ga oxide and In-Zn oxide can also be used as oxide 530.

[0186] Furthermore, a metal oxide with a low carrier density is preferably used as the transistor 500. To reduce the carrier density of the metal oxide, the impurity concentration in the metal oxide can be reduced, thereby reducing the defect state density. In this specification, the state of low impurity concentration and low defect state density is referred to as "high-purity intrinsic" or "substantially high-purity intrinsic". Examples of impurities in the metal oxide include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0187] In particular, hydrogen contained in metal oxides reacts with oxygen bonded to metal atoms to form water, thus sometimes creating oxygen vacancies in metal oxides. Additionally, when hydrogen enters an oxygen vacancy in oxide 530, the oxygen vacancy sometimes bonds with hydrogen to form V0. O H. V O H is sometimes used as a donor and generates electrons as charge carriers. Additionally, sometimes a portion of the hydrogen bonds with oxygen atoms bonded to metal atoms, generating electrons as charge carriers. Therefore, transistors using metal oxides containing a higher hydrogen content tend to have always-on characteristics. Furthermore, hydrogen in metal oxides is easily moved by heat, electric fields, etc., so the reliability of the transistor may decrease when the metal oxide contains a higher hydrogen content. In one aspect of the present invention, it is preferable to minimize V in the oxide 530. O H thus becomes a high-purity intrinsic or substantially high-purity intrinsic. In order to obtain V in various ways... O For metal oxides with significantly reduced H content, it is important to: remove impurities such as water and hydrogen from the metal oxide (sometimes referred to as dehydration or dehydrogenation treatment); and supply oxygen to the metal oxide to fill oxygen vacancies (sometimes referred to as oxidation treatment). This is achieved by... O Metal oxides with significantly reduced impurities such as hydrogen can be used in the channel formation region of transistors to impart stable electrical characteristics.

[0188] Defects where hydrogen enters oxygen vacancies can serve as donors in metal oxides. However, it is difficult to quantitatively evaluate these defects. Therefore, in metal oxides, carrier concentration is sometimes used instead of donor concentration for evaluation. Consequently, in this specification and the like, the carrier concentration under conditions assuming no applied electric field is sometimes used instead of donor concentration as a parameter for metal oxides. In other words, the "carrier concentration" described in this specification and the like can sometimes also be referred to as "donor concentration".

[0189] Therefore, when using metal oxides for oxide 530, it is preferable to minimize the amount of hydrogen in the metal oxide. Specifically, the hydrogen concentration in the metal oxide, as measured by secondary ion mass spectrometry (SIMS), should be less than 1 × 10⁻⁶. 20 atoms / cm 3 Preferably less than 1×1019 atoms / cm 3 More preferably, less than 5×10 18 atoms / cm 3 Further optimization of less than 1×10 18 atoms / cm 3 By using metal oxides with sufficiently reduced impurities such as hydrogen in the channel formation region of a transistor, the transistor can have stable electrical characteristics.

[0190] Furthermore, when using a metal oxide as oxide 530, the carrier concentration of the metal oxide in the channel forming region is preferably 1×10⁻⁶. 18 cm -3 Below, less than 1×10 is preferred. 17 cm -3 Further optimization of less than 1×10 16 cm -3 Furthermore, a value less than 1×10 is preferred. 13 cm -3 Furthermore, it is preferred to select those smaller than 1×10 12 cm -3 Note that there is no specific limit to the lower limit of the carrier concentration of the metal oxide in the channel formation region; for example, it can be set to 1 × 10⁻⁶. -9 cm -3 .

[0191] Furthermore, when a metal oxide is used as oxide 530, when conductors 542 (conductors 542a and 542b) come into contact with oxide 530, oxygen in oxide 530 may diffuse into conductor 542, causing conductor 542 to be oxidized. When conductor 542 is oxidized, the conductivity of conductor 542 is likely to decrease. Alternatively, the phenomenon of "oxygen in oxide 530 diffusing into conductor 542" can also be referred to as "conductor 542 absorbing oxygen in oxide 530".

[0192] Furthermore, when oxygen diffuses from oxide 530 to conductors 542 (conductors 542a and 542b), another layer sometimes forms between conductor 542a and oxide 530b, and between conductor 542b and oxide 530b. This layer contains more oxygen than conductor 542, thus it can be inferred that this layer has insulating properties. In this case, the three-layer structure of conductor 542, this other layer, and oxide 530b can be regarded as a three-layer structure composed of metal, insulator, and semiconductor, sometimes called a MIS (Metal-Insulator-Semiconductor) structure or a diode junction structure with MIS structure as the main structure.

[0193] Note that the insulating region described above is not limited to being formed between conductor 542 and oxide 530b. For example, sometimes the insulating region is formed between conductor 542 and oxide 530c, conductor 542 and oxide 530b, or conductor 542 and oxide 530c.

[0194] Furthermore, the metal oxide used as the channel formation region in oxide 530 is preferably a metal oxide with a band gap of 2 eV or more, and more preferably 2.5 eV or more. Thus, by using a metal oxide with a wider band gap, the off-state current of the transistor can be reduced.

[0195] In oxide 530, when oxide 530a is disposed below oxide 530b, impurities can be prevented from diffusing from the structure formed below oxide 530a to oxide 530b. When oxide 530c is disposed above oxide 530b, impurities can be prevented from diffusing from the structure formed above oxide 530c to oxide 530b.

[0196] Furthermore, oxide 530 preferably has a stacked structure of oxides having different atomic ratios of each metal atom. Specifically, the atomic ratio of element M in the constituent elements of the metal oxide used for oxide 530a is preferably greater than that in the metal oxide used for oxide 530b. Additionally, the atomic ratio of element M relative to In in the metal oxide used for oxide 530a is preferably greater than that in the metal oxide used for oxide 530b. Furthermore, the atomic ratio of In relative to element M in the metal oxide used for oxide 530b is preferably greater than that in the metal oxide used for oxide 530a. Additionally, oxide 530c can use a metal oxide that can be used for oxide 530a or oxide 530b.

[0197] Preferably, the conduction band bottom energies of oxides 530a and 530c are higher than those of oxide 530b. In other words, the electron affinity of oxides 530a and 530c is preferably less than that of oxide 530b.

[0198] Here, at the junction of oxides 530a, 530b, and 530c, the energy level at the conduction band bottom changes gradually. In other words, the above situation can also be expressed as the energy level at the conduction band bottom of the junction of oxides 530a, 530b, and 530c changing continuously or continuously joining. For this purpose, it is preferable to reduce the defect state density of the mixed layer formed at the interface between oxides 530a and 530b, and at the interface between oxides 530b and 530c.

[0199] Specifically, by including oxides 530a and 530b, and oxides 530b and 530c, in addition to oxygen, a mixed layer with low defect state density can be formed. For example, when oxide 530b is an In-Ga-Zn oxide, In-Ga-Zn oxide, Ga-Zn oxide, and gallium oxide are preferably used as oxides 530a and 530c.

[0200] At this point, the primary pathway for charge carriers is oxide 530b. By equipping oxides 530a and 530c with the aforementioned structure, the defect state density at the interfaces between oxides 530a and 530b, and between oxides 530b and 530c, can be reduced. Therefore, the influence of interface scattering on charge carrier conduction is reduced, thereby increasing the on-state current of transistor 500.

[0201] Conductors 542a and 542b, serving as source and drain electrodes, are disposed on oxide 530b. Preferably, conductors 542a and 542b are selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, alloys containing the aforementioned metals, or alloys combining the aforementioned metals. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred materials as they are conductive materials that are not easily oxidized or maintain conductivity even when absorbing oxygen. Moreover, metal nitride films such as tantalum nitride have barrier properties against hydrogen or oxygen, making them preferred as well.

[0202] Furthermore, although single-layer conductors 542a and 542b are shown in Figure 15, stacked structures of two or more layers can also be used. For example, a tantalum nitride film and a tungsten film are preferably stacked. Alternatively, a titanium film and an aluminum film can also be stacked. Additionally, two-layer structures can be used, such as a tungsten film stacked with an aluminum film, a copper-magnesium-aluminum alloy film stacked with a copper film, a titanium film stacked with a copper film, or a tungsten film stacked with a copper film.

[0203] Alternatively, a three-layer structure can be used, in which an aluminum or copper film is laminated on a titanium or titanium nitride film and a titanium or titanium nitride film is formed thereon; or a three-layer structure can be used, in which an aluminum or copper film is laminated on a molybdenum or molybdenum nitride film and a molybdenum or molybdenum nitride film is formed thereon. Additionally, transparent conductive materials containing indium oxide, tin oxide, or zinc oxide can also be used.

[0204] In addition, such as Figure 15A As shown, regions 543a and 543b are sometimes formed as low-resistance regions at and near the interface between oxide 530 and conductor 542a (conductor 542b). In this case, region 543a is used as one of the source and drain regions, and region 543b is used as the other of the source and drain regions. Furthermore, a channel forming region is formed in the region sandwiched between region 543a and region 543b.

[0205] By forming the aforementioned conductor 542a (conductor 542b) in contact with oxide 530, the oxygen concentration in region 543a (region 543b) sometimes decreases. Furthermore, a metal compound layer comprising the metal contained in conductor 542a (conductor 542b) and the oxide 530 is sometimes formed in region 543a (region 543b). In this case, the carrier concentration in region 543a (region 543b) increases, and region 543a (region 543b) becomes a low-resistance region.

[0206] The insulator 544 is provided to cover the conductors 542a and 542b to suppress the oxidation of the conductors 542a and 542b. Alternatively, the insulator 544 can be provided to cover the side surface of the oxide 530 and be in contact with the insulator 524.

[0207] As the insulator 544, one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, and magnesium can be used. Alternatively, silicon oxynitride or silicon nitride can also be used as the insulator 544.

[0208] In particular, as the insulator 544, it is preferable to use alumina, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate), which are oxides containing one or both of aluminum and hafnium. Hafnium aluminate, in particular, has higher heat resistance than hafnium oxide film. Therefore, it is less prone to crystallization during subsequent heat treatment processes, making it preferred. Furthermore, if the conductors 542a and 542b are oxidation-resistant materials or their conductivity does not significantly decrease upon oxygen absorption, it is not necessary to provide the insulator 544. It can be appropriately designed according to the desired transistor characteristics.

[0209] By including insulator 544, impurities such as water and hydrogen contained in insulator 580 can be suppressed from diffusing through oxide 530c and insulator 550 to oxide 530b. Furthermore, excess oxygen contained in insulator 580 can be suppressed from oxidizing conductor 560.

[0210] Additionally, insulator 550 is used as the first gate insulating film. Insulator 550 is preferably configured to contact the inner side (top and side surfaces) of oxide 530c. Similar to insulator 524 described above, insulator 550 is preferably formed using an insulator containing excess oxygen and releasing oxygen upon heating.

[0211] Specifically, silicon oxide containing excess oxygen, silicon oxynitride, silicon oxynitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, and porous silicon oxide can be used. In particular, silicon oxide and silicon oxynitride are preferred because they have thermal stability.

[0212] By providing an insulator 550 that releases oxygen upon heating in contact with the top surface of oxide 530c, oxygen can be effectively supplied from the insulator 550 to the channel formation region of oxide 530b through oxide 530c. Furthermore, similar to insulator 524, it is preferable to reduce the concentration of impurities such as water or hydrogen in insulator 550. The thickness of insulator 550 is preferably 1 nm or more and 20 nm or less.

[0213] Furthermore, in order to efficiently supply the excess oxygen contained in the insulator 550 to the oxide 530, a metal oxide may be disposed between the insulator 550 and the conductor 560. This metal oxide preferably suppresses oxygen diffusion from the insulator 550 to the conductor 560. By disposing of a metal oxide that suppresses oxygen diffusion, the diffusion of excess oxygen from the insulator 550 to the conductor 560 is suppressed. In other words, the reduction of excess oxygen supplied to the oxide 530 can be suppressed. Additionally, oxidation of the conductor 560 due to excess oxygen can be suppressed. As this metal oxide, a material suitable for the insulator 544 can be used.

[0214] Furthermore, similar to the second gate insulating film, the insulator 550 can also have a stacked structure. When miniaturizing and highly integrating transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulating film. Therefore, by using a stacked structure of a high-k material and a thermally stable material in the insulator used as the gate insulating film, the gate potential during transistor operation can be reduced while maintaining the physical thickness. Moreover, a stacked structure with thermal stability and a high relative permittivity can be achieved.

[0215] exist Figure 15A and Figure 15B In this process, the conductor 560 used as the first gate electrode has a two-layer structure, but it can also have a single-layer structure or a stacked structure of three or more layers.

[0216] As the conductor 560a, a conductive material with the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms is preferably used. Furthermore, a conductive material with the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) is preferably used. By giving the conductor 560a the function of suppressing oxygen diffusion, the decrease in conductivity caused by the oxidation of the conductor 560b due to oxygen contained in the insulator 550 can be suppressed. For example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide are preferably used as the conductive material with the function of suppressing oxygen diffusion. Additionally, an oxide semiconductor that can be applied to the oxide 530 can be used as the conductor 560a. In this case, by forming the conductor 560b by sputtering, the resistance value of the conductor 560a can be reduced, making it a conductor. This conductor can be referred to as an OC (Oxide Conductor) electrode.

[0217] As the conductor 560b, a conductive material with tungsten, copper, or aluminum as its main components is preferably used. Since the conductor 560b is also used for wiring, a conductor with high conductivity is preferred. For example, a conductive material with tungsten, copper, or aluminum as its main components can be used. The conductor 560b may also have a multilayer structure, for example, a multilayer structure of titanium or titanium nitride and the aforementioned conductive material can be used.

[0218] Insulator 580 is preferably disposed on conductors 542a and 542b, separated by insulator 544. Insulator 580 preferably has excess oxygen regions. For example, insulator 580 preferably comprises silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, porous silicon oxide, or resin, etc. In particular, silicon oxide and silicon oxynitride are preferred due to their thermal stability. In particular, silicon oxide and porous silicon oxide are preferred because they readily form excess oxygen regions in subsequent processes.

[0219] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580, which releases oxygen upon heating, in contact with the oxide 530c, the oxygen in the insulator 580 can be efficiently supplied to the oxide 530c. Furthermore, it is preferable to reduce the concentration of impurities such as water or hydrogen in the insulator 580.

[0220] The opening of the insulator 580 is formed in such a way that it overlaps with the area between the conductors 542a and 542b. Thus, the conductor 560 is embedded in the opening of the insulator 580 and in the area sandwiched between the conductors 542a and 542b.

[0221] When miniaturizing semiconductor devices, it is necessary to shorten the gate length, but it is also necessary to prevent a decrease in the conductivity of the conductor 560. Therefore, by increasing the thickness of the conductor 560, it is possible for the conductor 560 to have a high aspect ratio. In this embodiment, since the conductor 560 is embedded in the opening of the insulator 580, even if the conductor 560 has a high aspect ratio, it will not collapse during the process.

[0222] The insulator 574 is preferably disposed on the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 550. By forming the insulator 574 using a sputtering method, excess oxygen regions can be formed in the insulator 550 and the insulator 580. Oxygen can then be supplied from these excess oxygen regions to the oxide 530.

[0223] For example, as insulator 574, one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium and magnesium may be used.

[0224] In particular, alumina has high barrier properties, and even thin films with a diameter of 0.5 nm to 3.0 nm can suppress the diffusion of hydrogen and nitrogen. Therefore, alumina formed by sputtering can function as both an oxygen supply source and a barrier film against impurities such as hydrogen.

[0225] Furthermore, it is preferable to provide an insulator 581, which serves as an interlayer film, on the insulator 574. Similar to the insulator 524, it is preferable to reduce the concentration of impurities such as water or hydrogen in the insulator 581.

[0226] Furthermore, conductors 540a and 540b are disposed in openings formed in insulators 581, 574, 580, and 544. Conductors 540a and 540b are disposed opposite to each other with a gap between them and conductor 560. Conductors 540a and 540b have the same structure as conductors 546 and 548, which will be described later.

[0227] An insulator 582 is provided on insulator 581. Insulator 582 is preferably made of a material that blocks oxygen or hydrogen. Therefore, the same material as insulator 514 can be used as insulator 582. For example, metal oxides such as alumina, hafnium oxide, and tantalum oxide are preferably used as insulator 582.

[0228] In particular, aluminum oxide has a high barrier effect against the permeation of oxygen and impurities such as hydrogen and moisture that cause changes in the electrical characteristics of transistors. Therefore, during and after the transistor manufacturing process, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500. Furthermore, aluminum oxide can suppress the release of oxygen from the oxides constituting the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0229] Furthermore, an insulator 586 is provided on insulator 582. The same material as insulator 320 can be used as insulator 586. Moreover, by using a material with a low dielectric constant for the aforementioned insulator, parasitic capacitance generated between the wirings can be reduced. For example, silicon oxide film and silicon oxynitride film can be used as insulator 586.

[0230] In addition, conductors 546 and 548 are embedded in insulators 520, 522, 524, 544, 580, 574, 581, 582 and 586.

[0231] Conductors 546 and 548 are used as plugs or wiring for connection to capacitor 600, transistor 500, or transistor 300. Conductors 546 and 548 can be formed from the same material as conductors 328 and 330.

[0232] Alternatively, an opening can be formed around the transistor 500 after the transistor 500 is formed, and an insulator with high barrier properties against hydrogen or water can be formed around the opening. By surrounding the transistor 500 with the aforementioned highly barrier insulator, water and hydrogen can be prevented from entering from the outside. Alternatively, multiple transistors 500 can be combined into one and surrounded by an insulator with high barrier properties against hydrogen or water. When forming the opening around the transistor 500, since it can also be part of the manufacturing process of the transistor 500, it is preferable, for example, to form an opening that reaches the insulator 514 or the insulator 522 and to form the aforementioned highly barrier insulator in contact with the insulator 514 or the insulator 522. As the insulator with high barrier properties against hydrogen or water, for example, the same material as the insulator 522 can be used.

[0233] Next, a capacitor 600 is disposed above the transistor 500. The capacitor 600 includes a conductor 610, a conductor 620, and an insulator 630.

[0234] Alternatively, conductor 612 may be provided on conductors 546 and 548. Conductor 612 is used as a plug or wiring for connection to transistor 500. Conductor 610 is used as an electrode of capacitor 600. Furthermore, conductors 612 and 610 may be formed simultaneously.

[0235] Conductors 612 and 610 can be metal films containing elements selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or metal nitride films (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the aforementioned elements. Alternatively, conductive materials such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide with added silicon oxide can also be used.

[0236] exist Figure 13 In this embodiment, conductors 612 and 610 have a single-layer structure, but are not limited to this; they may also have a stacked structure of two or more layers. For example, a conductor with high density to both the barrier conductor and the highly conductive conductor may be formed between the barrier conductor and the highly conductive conductor.

[0237] The conductor 620 is disposed such that it overlaps the conductor 610 with an insulator 630 in between. Conductive materials such as metals, alloys, and metal oxides can be used as the conductor 620. High-melting-point materials such as tungsten or molybdenum, which combine heat resistance and conductivity, are preferred, with tungsten being particularly preferred. When the conductor 620 is formed simultaneously with other components such as conductors, low-resistance metal materials such as Cu (copper) or Al (aluminum) can be used.

[0238] An insulator 640 is provided on the conductor 620 and the insulator 630. The insulator 640 can be formed using the same material as the insulator 320. In addition, the insulator 640 can be used as a planarization film covering the uneven shape underneath.

[0239] By adopting this structure, miniaturization or high integration of semiconductor devices using transistors containing oxide semiconductors can be achieved.

[0240] (Implementation Method 3)

[0241] In this embodiment, an application example of a semiconductor device is described.

[0242] <Examples of manufacturing methods for electronic components>

[0243] Figure 16A This is a flowchart illustrating an example of a manufacturing method for an electronic component. The electronic component is also referred to as a semiconductor package or an IC package, etc. The electronic component described below is equivalent to an electronic component having the individual transistors included in a semiconductor device.

[0244] Through assembly processes (post-processing), multiple removable components are combined on a printed circuit board to form a semiconductor device composed of transistors. Post-processing can be achieved by performing... Figure 16A Each of the shown processes is completed. Specifically, after the component substrate obtained from the previous process is completed (step ST71), the back side of the substrate is polished. By thinning the substrate at this stage, warpage and other defects caused in the previous process are reduced, thereby miniaturizing the component. Next, a "dicing" process (step ST72) is performed to divide the substrate into multiple chips.

[0245] Figure 16B This is a top view of the semiconductor wafer 7100 before the dicing process. Figure 16C yes Figure 16B A partially enlarged view. The semiconductor wafer 7100 is provided with multiple circuit regions 7102. The circuit regions 7102 are provided with a semiconductor device according to an embodiment of the present invention.

[0246] Each of the plurality of circuit regions 7102 is surrounded by a separation region 7104. A separation line (also called a “cutting line”) 7106 is located at a position overlapping with the separation region 7104. In a dicing process (ST72), a chip 7110 including the circuit regions 7102 is cut from the semiconductor wafer 7100 by cutting along the separation line 7106. Figure 16D This is an enlarged view of chip 7110.

[0247] Alternatively, a conductive layer or a semiconductor layer can be provided in the separation region 7104. By providing a conductive layer or a semiconductor layer in the separation region 7104, ESD (Electro Static Discharge) that may occur during the cutting process can be mitigated, thus preventing a decrease in yield caused by the cutting process. Furthermore, generally, in order to cool the substrate, remove shavings, and prevent charging, pure water containing dissolved carbon dioxide or the like to reduce its resistivity is supplied to the cutting section during the cutting process. By providing a conductive layer or a semiconductor layer in the separation region 7104, the amount of pure water used can be reduced. Therefore, the production cost of the semiconductor device can be reduced. Additionally, the productivity of the semiconductor device can be increased.

[0248] After step ST72, the separated chip is picked up and mounted and bonded to the lead frame, i.e., the die bonding process (step ST73) is performed. The bonding method between the chip and the lead frame in the die bonding process can be selected appropriately according to the product. For example, resin or tape can be used for bonding. The die bonding process can be performed by mounting the chip on an interposer. In the wire bonding process, the leads of the lead frame are electrically connected to the electrodes on the chip via metal wires (step ST74). Silver or gold wires can be used as the metal wires. Wire bonding can use ball bonding or wedge bonding.

[0249] A molding process (step ST75) is performed on the chip, which is sealed with epoxy resin or similar materials and wire-bonded. This molding process fills the interior of the electronic component with resin, reducing damage to the internal circuitry and metal wires caused by mechanical forces, and also minimizing performance degradation due to moisture or dust. Next, the leads of the leadframe are electroplated. Then, the leads are cut and shaped (step ST76). This electroplating process prevents the leads from rusting and allows for more reliable soldering when the leads are subsequently mounted on a printed circuit board. Then, marking is performed on the package surface (step ST77). Finally, the electronic component is completed through an inspection process (step ST78) (step ST79).

[0250] Figure 16E A perspective view of the completed electronic components is shown. Figure 16E The image shows a three-dimensional schematic diagram of a QFP (Quad Flat Package) as an example of an electronic component. Figure 16E As shown, electronic component 7000 includes lead wire 7001 and chip 7110.

[0251] Electronic component 7000 is mounted, for example, on printed circuit board 7002. By combining multiple such electronic components 7000 and electrically connecting them to each other on printed circuit board 7002, electronic components 7000 can be mounted in electronic devices. The completed circuit board 7004 is disposed inside electronic devices, etc.

[0252] Electronic component 7000 can be combined with components such as sensors to form a semiconductor device. Examples of ways in which sensors can be applied include: in electronic components such as electronic devices or batteries that require periodic monitoring; and embedded in structures or living organisms.

[0253] <Application Examples of Semiconductor Devices>

[0254] Figure 17A This is a perspective view of the semiconductor device described in the above embodiments. Figure 17A As shown, the semiconductor device 800 includes an antenna 801, an integrated circuit unit 802, a sensor 805, and a battery 806.

[0255] Antenna 801 may be of a size and shape suitable for its purpose within the limits specified by radio regulations.

[0256] The integrated circuit section 802 includes a circuit 803 composed of Si transistors and OS transistors, and a terminal section 804 connected to an antenna. The circuit 803 is formed through a pre-process of forming Si transistors and OS transistors. The terminal section 804 is formed through a post-process of chip formation using a dicing process or a bonding process. The integrated circuit section 802 corresponds to the aforementioned electronic component.

[0257] Sensor 805 is a circuit that can output various data, such as thermal data or electromagnetic data, as analog data.

[0258] Figure 17B yes Figure 17A A schematic diagram of a semiconductor device 800 receiving a wireless signal 811. As an application of the aforementioned semiconductor device, it can be used... Figure 17C The perspective view shown is used for illustration. For example, a semiconductor device 800 is attached to an article 821 or disposed inside an article, and a wireless signal 811 is transmitted from an external interrogator 822. The semiconductor device 800, which receives the wireless signal 811, can obtain data such as temperature sequentially from a sensor using power from a battery 806 as an analog voltage, and can perform A / D conversion and transmit the data in the sequence of receiving the wireless signal 811 from the interrogator 822.

[0259] Figure 18A and Figure 18B This is a perspective view illustrating other applications of the semiconductor device 800, one embodiment of the present invention. The semiconductor device 900 includes a circuit board 901, a battery 902, and a sensor 903. A label 904 is attached to the battery 902. Additionally, as... Figure 18B As shown, the semiconductor device 900 includes a terminal 906, a terminal 907, an antenna 908, and an antenna 909.

[0260] Circuit board 901 includes terminals 905 and integrated circuit 910. Terminals 905 are connected to sensor 903 via wires 913. Note that the number of terminals 905 is not limited to two; the required number can be set.

[0261] In addition, the circuit board 901 may also have semiconductor elements such as transistors or diodes, resistors, or wiring.

[0262] Antennas 908 and 909 are not limited to coil shape; for example, they can be wire or plate shape.

[0263] Integrated circuit 910 has a circuit composed of Si transistors or OS transistors.

[0264] Sensor 903 is a circuit that can output various data such as thermal data, mechanical data or electromagnetic data as analog data.

[0265] The semiconductor device 900 includes a layer 912 between the antennas 908 and 909 and the battery 902. Layer 912, for example, functions to shield the magnetic field generated by the battery 902. A magnetic material can be used as layer 912, for example.

[0266] It can be used Figure 19A , Figure 19B The schematic diagram illustrates an example of applying the semiconductor device 900 to other devices. Figure 19A It is a 3D model of car 951. Figure 19B yes Figure 19A The image shows a perspective view of a vehicle 951. The vehicle 951 is driven by supplying control signals to a power unit 953. The vehicle 951 includes a battery 955 for supplying power to the power unit 953 to provide control signals, and a control unit 957.

[0267] For example, a semiconductor device 900 is installed in the battery 955 inside the car 951. When the user gets into the car 951, a control unit 957 is activated, and analog data related to the detection of abnormalities in the battery 955 is collected in the control unit 957. The semiconductor device 900 can obtain data such as the temperature around the battery 955 without activating an A / D converter or similar device. As described above, power consumption when driving the A / D conversion circuit can be suppressed, thus reducing battery consumption when the car is not in use.

[0268] It can be used Figure 20A The schematic diagram illustrates other applications of the semiconductor device. For example, the semiconductor device 800 is embedded in the tunnel wall to transmit a wireless signal 911 from the outside. The semiconductor device 800, which receives the wireless signal 911, can acquire data about the tunnel wall using a sensor and transmit that data. By using the semiconductor device shown in Embodiment 1 as the semiconductor device 800, the damage condition of the tunnel wall can be investigated efficiently.

[0269] It can be used Figure 20BThe schematic diagram illustrates other applications of wireless sensors. For example, a semiconductor device 800 is embedded in the wall of a bridge pier, transmitting a wireless signal 911 from the outside. The semiconductor device 800, receiving the wireless signal 911, can acquire data from within the bridge pier and transmit that data. By using the semiconductor device described in Embodiment 1 as the semiconductor device 800, the condition of damage within the bridge pier can be investigated efficiently.

[0270] Alternatively, you can use Figure 21A The schematic diagram illustrates other applications of wireless sensors. For example, a semiconductor device 800 is attached to the human body using an adhesive pad or similar material, and a wireless signal 911 is transmitted from a reader 922. The semiconductor device 800, which receives the wireless signal 911, can obtain biological data and other data by supplying signals to electrodes 931 attached to the human body via wiring 932, and then transmit the data. The obtained data can be viewed on the display 933 of the reader 922. By using the semiconductor device shown in Embodiment 1 as the semiconductor device 800, biological data of the human body can be obtained efficiently.

[0271] Alternatively, you can use Figure 21B The schematic diagram illustrates other applications of wireless sensors. For example, a semiconductor device 800, installed in a housing 941, is implanted inside the human body, and a reader 922 located outside the body transmits a wireless signal 911. The semiconductor device 800, receiving the wireless signal 911, can acquire data such as biological data and transmit that data. The acquired data can be viewed on the display 933 of the reader 922. By using the semiconductor device shown in Embodiment 1 as the semiconductor device 800, biological data of the human body can be investigated efficiently.

[0272] (Additional notes regarding the contents of this instruction manual, etc.)

[0273] The following is an additional explanation of the above embodiments and the structures in the embodiments.

[0274] The structures shown in each embodiment can be appropriately combined with the structures shown in other embodiments to constitute one aspect of the present invention. Furthermore, when multiple structural examples are shown in one embodiment, these structural examples can be appropriately combined.

[0275] In addition, the content (or a portion thereof) described in one embodiment may be applied / combined / replaced with other content (or a portion thereof) described in that embodiment and / or content (or a portion thereof) described in one or more other embodiments.

[0276] Note that the content described in the embodiments refers to the content illustrated using various accompanying drawings or the content described using the text in the specification.

[0277] Furthermore, more figures can be formed by combining the figures (or portions thereof) shown in one embodiment with other portions of the figures, other figures (or portions thereof) shown in that embodiment, and / or figures (or portions thereof) shown in one or more other embodiments.

[0278] In this specification, components are categorized according to function and represented by independent boxes in block diagrams. However, in actual circuits, it is difficult to categorize components according to function; sometimes a circuit involves multiple functions or multiple circuits involve a single function. Therefore, the division of boxes in block diagrams is not limited to the components described in the specification and may vary appropriately depending on the circumstances.

[0279] Furthermore, for ease of explanation, dimensions, layer thicknesses, or regions are arbitrarily shown in the accompanying drawings. Therefore, the invention is not limited to the dimensions shown in the drawings. The drawings are schematic for clarity and are not limited to the shapes or values ​​shown. For example, they may include non-uniformity of signals, voltages, or currents caused by noise, or non-uniformity of signals, voltages, or currents caused by time deviations.

[0280] In this specification and other materials, when describing the connection relationship of a transistor, it is referred to as "one of the source and drain" (or the first electrode or the first terminal) or "the other of the source and drain" (or the second electrode or the second terminal). This is because the source and drain of a transistor vary depending on the transistor's structure or operating conditions. Furthermore, depending on the circumstances, the source and drain of a transistor may be appropriately referred to as source (drain) terminals or source (drain) electrodes, etc.

[0281] Furthermore, in this specification and the like, "electrode" or "wiring" does not functionally limit its constituent elements. For example, sometimes an "electrode" is used as part of a "wiring," and vice versa. Moreover, "electrode" or "wiring" also includes cases where multiple "electrodes" or "wiring" are formed as a single unit.

[0282] Additionally, in this instruction manual and other documents, the terms voltage and potential may be used interchangeably as appropriate. Voltage refers to the potential difference from a reference potential; for example, when the reference potential is ground voltage (grounding voltage), voltage can also be referred to as potential. Grounding potential does not necessarily mean 0V. Note that potential is relative, and the potential supplied for wiring, etc., sometimes varies depending on the reference potential.

[0283] Furthermore, in this specification and other materials, the terms "film" and "layer" may be interchanged depending on the circumstances or situation. For example, "conductive layer" may sometimes be changed to "conductor." Additionally, "insulating film" may sometimes be changed to "insulating layer."

[0284] In this specification and the like, a switch refers to a component that controls whether current flows by changing to a conducting state (on state) or a non-conducting state (off state). Alternatively, a switch refers to a component that selects and switches current paths.

[0285] In this specification, for example, the channel length refers to the distance between the source and drain in the region where the semiconductor (or the portion of the semiconductor through which current flows when the transistor is turned on) and the gate overlap or in the region forming the channel, in a top view of the transistor.

[0286] In this specification, for example, the channel width refers to the length of the region where the semiconductor (or the portion of the semiconductor through which current flows when the transistor is in the on state) and the gate electrode overlap, or the length of the portion of the region in which the source and drain electrodes are opposite each other in forming the channel.

[0287] In this specification, "A and B connection" includes not only the case where A and B are directly connected, but also the case where A and B are electrically connected. Here, "A and B electrical connection" means that there are objects between A and B that have some electrical interaction, enabling the transmission and reception of electrical signals between A and B.

[0288] [Symbol Explanation]

[0289] FN_N: Node, FN_1: Node, FN_2: Node, FN_3: Node, SR_1: Signal, ST72: Cutting process, SW_1: Signal, SW_2: Signal, SW_3: Signal, SW_4: Signal, T0: Time, T1: Time, T2: Time, T3: Time, T4: Time, TN: Time, 11: Sensor, 12: Amplifier circuit, 13: Sample and hold circuit, 13_N: Sample and hold circuit, 13_1: Sample and hold circuit, 13_2: Sample and hold circuit, 13A: Sample and hold circuit, 13B: Sample and hold circuit, 13C: Sample and hold circuit, 13D: Sample and hold circuit, 14: A / D conversion circuit, 15: Interface circuit, 21: Transistor 21_N: Transistor, 21_1: Transistor, 21A: Transistor, 21B: Transistor, 22: Transistor, 22_N: Transistor, 22_1: Transistor, 22C: Transistor, 23: Transistor, 23A: Transistor, 23B: Transistor, 24_N: Transistor, 24_1: Transistor, 27: Switch, 28: Capacitor, 29: Comparator, 31_N: Signal Holding Circuit, 31_1: Signal Holding Circuit, 41: Select Circuit, 42: Signal Holding Circuit, 43: Select Circuit, 44: Select Circuit, 45: Adder Circuit, 51_N: Transistor, 51_1: Transistor, 52_N: Capacitor, 52_1: Capacitor, 52_2: Capacitor, 52_3: Capacitor, 5 2_4: Capacitor, 53: Transistor, 54: Transistor, 55: Transistor, 56: Transistor, 61: Period, 62: Period, 100: Semiconductor device, 100_n: Semiconductor device, 100_1: Semiconductor device, 100_2: Semiconductor device, 100A: Semiconductor device, 100B: Semiconductor device, 110: Host controller, 110_1: Host controller, 110_2: Host controller, 200: Control block, 201: Main CPU, 202: Peripheral circuit, 203: Communication circuit block, 299: Cloud, 300: Transistor, 311: Substrate, 313: Semiconductor region, 314a: Low resistance region, 314b: Low resistance region, 315: Insulator 316: Conductor; 320: Insulator; 322: Insulator; 324: Insulator; 326: Insulator; 328: Conductor; 330: Conductor; 350: Insulator; 352: Insulator; 354: Insulator; 356: Conductor; 360: Insulator; 362: Insulator; 364: Insulator; 366: Conductor; 370: Insulator; 372: Insulator; 374: Insulator; 376: Conductor; 380: Insulator; 382: Insulator; 384: Insulator; 386: Conductor; 500: Transistor; 503: Conductor; 503a: Conductor; 503b: Conductor; 505: Conductor; 510: Insulator; 512: Insulator; 514: Insulator.516: Insulator, 518: Conductor, 520: Insulator, 522: Insulator, 524: Insulator, 526: Insulator, 530: Oxide, 530a: Oxide, 530b: Oxide, 530c: Oxide, 540a: Conductor, 540b: Conductor, 542: Conductor, 542a: Conductor, 542b: Conductor, 543a: Region, 543b: Region, 544: Insulator, 546: Conductor 548: Conductor; 550: Insulator; 560: Conductor; 560a: Conductor; 560b: Conductor; 574: Insulator; 580: Insulator; 581: Insulator; 582: Insulator; 586: Insulator; 600: Capacitor; 610: Conductor; 612: Conductor; 620: Conductor; 630: Insulator; 640: Insulator; 800: Semiconductor device; 801: Antenna; 802: Integrated circuit section; 8 03: Circuit, 804: Terminal, 805: Sensor, 806: Battery, 811: Wireless Signal, 812: Layer, 821: Item, 822: Interrogator, 900: Semiconductor Device, 901: Circuit Board, 902: Battery, 903: Sensor, 904: Label, 905: Terminal, 906: Terminal, 907: Terminal, 908: Antenna, 909: Antenna, 910: Integrated Circuit, 911: Wireless Signal, 912: Layer, 9 13: Wire; 922: Reader; 931: Electrode; 932: Wiring; 933: Display Unit; 941: Frame; 951: Automobile; 953: Power Unit; 955: Battery; 957: Control Unit; 7000: Electronic Component; 7001: Lead Wire; 7002: Printed Circuit Board; 7004: Circuit Board; 7100: Semiconductor Wafer; 7102: Circuit Area; 7104: Separation Area; 7106: Separation Line; 7110: Chip.

Claims

1. A semiconductor device, comprising: The sensor is configured to output a sensor signal; An amplifier circuit configured to amplify the sensor signal; The sample-and-hold circuit includes multiple signal holding circuits and an adder circuit; and The analog-to-digital converter circuit is electrically connected to the adder circuit. Each of the plurality of signal holding circuits is configured to hold the output signal of the amplifier circuit. Each of the plurality of signal holding circuits includes a capacitor and a first transistor, the first transistor comprising an oxide semiconductor in a channel forming region. The adder circuit is configured to add the output signals of the amplifier circuit that are held by the plurality of signal holding circuits. The sample-and-hold circuit includes a second transistor and a third transistor. The gate of the second transistor is electrically connected to the adder circuit. Furthermore, one of the source and drain of the second transistor is electrically connected to one of the source and drain of the third transistor in the analog-to-digital conversion circuit.

2. The semiconductor device according to claim 1, The adder circuit mentioned above includes multiple capacitors. Furthermore, each of the plurality of capacitors has one electrode electrically connected to the other.

3. The semiconductor device according to claim 1, further comprising: An interface circuit, configured to switch between a first control period and a second control period, During the first control period, the sensor signal is input to the amplifier circuit, and the output signal of the amplifier circuit is held in the sample-and-hold circuit. During the second control period, the digital signal from the analog-to-digital conversion circuit is output to the interface circuit. Furthermore, the first control period is longer than the second control period.

4. The semiconductor device according to claim 1, One of the source and drain terminals of the first transistor is electrically connected to the amplifier circuit. Furthermore, the other of the source and drain of the first transistor is electrically connected to one electrode of the capacitor.

5. The semiconductor device of claim 1, wherein the first transistor includes a back gate electrode.

6. A semiconductor device, comprising: The sensor is configured to output a sensor signal; An amplifier circuit configured to amplify the sensor signal; The sample-and-hold circuit includes multiple signal holding circuits and an adder circuit; and The analog-to-digital converter circuit is electrically connected to the adder circuit. Each of the plurality of signal holding circuits is configured to hold the output signal of the amplifier circuit. Each of the plurality of signal holding circuits includes a capacitor and a first transistor, the first transistor comprising an oxide semiconductor in a channel forming region. The adder circuit is configured to add the output signals of the amplifier circuit that are held by the plurality of signal holding circuits. The sample-and-hold circuit includes a second transistor and a third transistor. Furthermore, the second transistor and the third transistor serve as source follower circuits.

7. The semiconductor device according to claim 6, The adder circuit mentioned above includes multiple capacitors. Furthermore, each of the plurality of capacitors has one electrode electrically connected to the other.

8. The semiconductor device according to claim 6, further comprising: An interface circuit, configured to switch between a first control period and a second control period, During the first control period, the sensor signal is input to the amplifier circuit, and the output signal of the amplifier circuit is held in the sample-and-hold circuit. During the second control period, the digital signal from the analog-to-digital conversion circuit is output to the interface circuit. Furthermore, the first control period is longer than the second control period.

9. The semiconductor device according to claim 6, One of the source and drain terminals of the first transistor is electrically connected to the amplifier circuit. Furthermore, the other of the source and drain of the first transistor is electrically connected to one electrode of the capacitor.

10. The semiconductor device of claim 6, wherein the first transistor includes a back gate electrode.

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