Display device

Abstract

Embodiments of the present specification relate to a display device in which a front camera is not exposed to the outside and is disposed below a display panel. Even with such a front camera structure, the display device can acquire a high-resolution front image through the front camera.

Description

[0001] Cross - reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10 - 2019 - 0158908, filed in Korea on December 3, 2019, the entire contents of which are hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] With the development of the information society, the demand for display devices for displaying images is continuously increasing, and various types of display devices such as liquid crystal display devices, organic light - emitting display devices, or quantum dot display devices are being used.

[0005] In addition, display devices provide input methods using touch sensors, etc., and optical devices such as cameras and proximity sensors to provide various application functions to users. Therefore, there is a problem that the design of the display device becomes difficult. In particular, since the camera and proximity sensor are forced to be exposed to the outside for the incidence and emission of light, there is a problem that the display area of the display panel must be reduced.

[0006] Therefore, in the related art, the front design of the display device is designed to have a large bezel for mounting and exposing the optical device, a design in which the display panel is cut into a notch shape, or a design for displaying the optical device. There are problems with designs that expose in the form of holes in a part of the panel. Summary of the Invention

[0007] Embodiments of the present disclosure may provide a display device in which a camera for photographing the front is disposed below the display panel so that the camera is not exposed to the front.

[0008] Embodiments of the present disclosure may provide a display device that can obtain a high - quality front image even when a camera for photographing the front is disposed below the display panel so that the camera is not exposed to the front.

[0009] Embodiments of the present disclosure may provide a display device that obtains a high - resolution image by preventing external light from being repeatedly reflected between the wiring in the display panel and the camera. The external light is the light required for photographing the front by the camera disposed below the display panel and is the light that enters the inside of the display panel.

[0010] According to an aspect of the present disclosure, a display device may be provided, which includes: a display panel including a display area on which an image is displayed, a substrate, and a first wiring located above the substrate and disposed in the display area; and a camera that captures the front of the display panel without being exposed to the front surface of the display panel, is disposed below the display area of the display panel, and overlaps a first area in the display area.

[0011] In the display device according to an embodiment of the present disclosure, all or a part of the first wiring may overlap with the first area. The first part overlapping with the first area in the first wiring may include: a first semi-transmissive layer located above the substrate; a first optical path compensation layer located on the first semi-transmissive layer; and a first metal layer located on the first optical path compensation layer and including a first metal.

[0012] In the display device according to an embodiment of the present disclosure, the thickness of the first semi-transmissive layer may be thinner than the thickness of the first optical path compensation layer.

[0013] In the display device according to an embodiment of the present disclosure, among the first semi-transmissive layer, the first optical path compensation layer, and the first metal layer, the thickness of the first semi-transmissive layer closest to the camera is the thinnest, and the thickness of the first metal layer closest to the part where external light is incident is the thickest.

[0014] In the display device according to an embodiment of the present disclosure, the first semi-transmissive layer may have a thickness of 1 to 5 nm, and the first optical path compensation layer may have a thickness of 30 to 120 nm.

[0015] In the display device according to an embodiment of the present disclosure, external light is incident on the side opening of the first wiring and is reflected from the front surface of the camera. A part of the external light reflected from the front surface of the camera may be reflected from the rear surface of the first semi-transmissive layer. Another part of the external light reflected from the front surface of the camera may pass through the first semi-transmissive layer and the first optical path compensation layer, and may be reflected from the rear surface of the first metal layer.

[0016] In the display device according to an embodiment of the present disclosure, the external light reflected from the rear surface of the first semi-transmissive layer and the external light reflected from the rear surface of the first metal layer may have a phase difference that is an odd multiple of 180 degrees.

[0017] In the display device according to an embodiment of the present disclosure, the first optical path compensation layer may include a conductive transparent material.

[0018] In a display device according to an embodiment of the present disclosure, a display area may include a first area and a second area other than the first area. A first wiring may include a first portion overlapping with the first area and a second portion overlapping with a second area different from the first area. The second portion of the first wiring may include a first metal layer and may not include a first semi-transmissive layer and a first optical path compensation layer.

[0019] According to an aspect of the present disclosure, a display device may be provided, which includes: a display panel including a display area on which an image is displayed, a substrate, and an electrode located above the substrate and disposed in the display area; and a camera that captures the front of the display panel without being exposed to the front surface of the display panel, is disposed below the display area of the display panel, and overlaps with a first area in the display area.

[0020] In a display device according to an embodiment of the present disclosure, the electrode may overlap with the first area, and the electrode may include a semi-transmissive layer located above the substrate, an optical path compensation layer located on the semi-transmissive layer, and a metal layer located on the optical path compensation layer.

[0021] In a display device according to an embodiment of the present disclosure, the thickness of the semi-transmissive layer may be thinner than the thickness of the optical path compensation layer.

[0022] In a display device according to an embodiment of the present disclosure, the electrode may be an electrode of a transistor in a sub-pixel overlapping with the first area, or may be a plate of a capacitor overlapping with the first area.

[0023] According to an embodiment of the present disclosure, a display device may be provided in which a camera for capturing the front is disposed below the display panel so that the camera is not exposed to the front.

[0024] According to an embodiment of the present disclosure, a display device may be provided that can obtain a high-quality front image even when a camera for capturing the front is disposed below the display panel so that the camera is not exposed to the front.

[0025] According to an embodiment of the present disclosure, a display device may be provided that obtains a high-resolution image by preventing external light from being repeatedly reflected between wirings in the display panel and the camera. The external light is the light required for photographing the front of a camera disposed below the display panel and is the light that enters the interior of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The drawings may be included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, are used to explain various principles of the present disclosure.

[0027] Figure 1 is a view showing a display device according to an embodiment of the present disclosure;

[0028] Figure 2 is a view showing a screen configuration of a display device according to an embodiment of the present disclosure;

[0029] Figure 3 is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure;

[0030] Figure 4 is a structural diagram of a display portion of a display device according to an embodiment of the present disclosure;

[0031] Figure 5 is a structural diagram of a touch sensing portion and a fingerprint sensing portion of a display device according to an embodiment of the present disclosure;

[0032] Figure 6 is an exemplary view showing a structure of a touch sensor in a display panel of a display device according to an embodiment of the present disclosure;

[0033] Figure 7 is another exemplary view showing a structure of a touch sensor in a display panel of a display device according to an embodiment of the present disclosure;

[0034] Figure 8 is another exemplary view showing a structure of a touch sensor in a display panel of a display device according to an embodiment of the present disclosure;

[0035] Figure 9 is a cross-sectional view of a display panel of a display device according to an embodiment of the present disclosure;

[0036] Figure 10 is an exemplary view showing a touch electrode in a display panel of a display device according to an embodiment of the present disclosure;

[0037] Figure 11 is a view showing a polarizing plate in a display panel of a display device according to an embodiment of the present disclosure;

[0038] Figure 12 and Figure 13 is a view for explaining a position of a light generating device for a proximity sensor in a display panel of a display device according to an embodiment of the present disclosure;

[0039] Figure 14 is a view showing a heterogeneous cathode electrode layer of a display device according to an embodiment of the present disclosure;

[0040] Figure 15 is a diagram showing a wiring structure in a first area where a camera is disposed in a display area of a display device according to an embodiment of the present disclosure;

[0041] Figure 16 is a view showing a low-reflection structure in a first area in which a camera is provided in a display area of ​​a display device according to an embodiment of the present disclosure;

[0042] Figure 17 is a view showing in detail a low-reflection structure in a first area in which a camera is disposed in a display area of ​​a display device according to an embodiment of the present disclosure;

[0043] Figure 18A , Figure 18B and Figure 18C is a diagram showing a low reflection structure in a first region in which a camera is provided and a wiring structure in a second region in which a camera is not provided in a display region of a display device according to an embodiment of the present disclosure;

[0044] Figure 19 and Figure 20 is a graph showing a low reflection effect when a low reflection structure is applied in a first area in which a camera is disposed in a display area of ​​a display device according to an embodiment of the present disclosure;

[0045] Figure 21 is a diagram showing a data line and a gate line to which a low-reflection structure is applied in a first area of ​​a display area of ​​a display device according to an embodiment of the present disclosure;

[0046] Figure 22 is a diagram showing a camera and sub-pixels disposed in a first area within a display area of ​​a display device according to an embodiment of the present disclosure;

[0047] Figure 23 is a cross-sectional view of a first region and a second region within a display region of a display device according to an embodiment of the present disclosure;

[0048] Figure 24 is another cross-sectional view of a first region and a second region within a display region of a display device according to an embodiment of the present disclosure; and

[0049] Figure 25 is a diagram illustrating a case in which a camera is located at the center of a display area in a display device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0050] Advantages and features of the present disclosure, and methods for achieving the advantages or features, will be apparent from the embodiments described in detail below with reference to the accompanying drawings. However, the present disclosure is not limited to the embodiments, but may be modified in various forms. These embodiments are provided only to complete the disclosure of the present invention and to fully inform those skilled in the art of the scope of the present disclosure. The scope of the present disclosure is defined only by the appended claims.

[0051] The shapes, sizes, ratios, angles, numbers of parts, etc. shown in the drawings and provided for the purpose of explaining the embodiments of the present disclosure are exemplary, and thus, the present disclosure is not limited to the details shown. In the following description, the same elements are denoted by the same reference numerals. When a detailed description of related known functions or configurations involved in the present disclosure makes the gist of the present disclosure unclear, its detailed description will not be given.

[0052] When referring to "including", "having", "composed of", etc. in the specification, another element may be added unless "only" is used. The singular expression of an element includes two or more elements unless otherwise stated differently.

[0053] Among the constituent elements, an error range is included even if not explicitly stated.

[0054] For example, when describing the positional relationship between two parts using "above", "on top of", "below", "next to", etc., one or more other parts may be provided between the two parts unless "only" or "directly" is used.

[0055] When describing the time relationship, for example, when describing the time sequence using "after", "subsequently", "next", and "before", a discontinuous case may be included unless "only" or "directly" is used.

[0056] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present disclosure, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element.

[0057] It should be understood that the term "at least one" may include all possible combinations from one or more related items. For example, "at least one of the first item, the second item, and the third item" may be not only the first item, the second item, or the third item, but also a combination of two or more of the first item, the second item, and the third item.

[0058] Each feature of each example in this specification can be partially or fully combined with each other. Various interlocks and drives in technology are possible, and each example can be implemented independently of each other or can be implemented together in an associated relationship.

[0059] Hereinafter, examples of a display device according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings. When adding reference numerals to components of each figure, even if the same components are shown in different figures, they may have the same reference numerals. In addition, for ease of description, the scale of the components shown in the drawings has a scale different from the actual scale and is not limited to the scale shown in the figures.

[0060] Figure 1 is a view showing a display device 10 according to an embodiment of the present disclosure.

[0061] The display device 10 according to an embodiment of the present disclosure can provide a function of displaying an image, a function of sensing a touch using a finger or a pen, and a function of sensing a fingerprint.

[0062] Refer to Figure 1 , the display device 10 according to an embodiment of the present disclosure may include a display panel 100 for displaying an image and a housing 200 for protecting the display panel 100. Refer to Figure 1 , when a user views the front surface of the display device 10, a part of the housing 200 may be shown. In some cases, when the display device 10 is implemented in a full-display type, when the user gazes at the front of the display device 10, the housing 200 may be invisible or almost invisible, and only the display panel 100 may be visible. When the user gazes at the front of the display device 10, only the display area of the display panel 100 may be visible. In some cases, both the display area and the non-display area (also referred to as a bezel) outside the display area may be seen.

[0063] Refer to Figure 1 , the display device 10 according to an embodiment of the present disclosure can sense a touch of a finger or a pen, etc. over the entire display area of the display panel 100, and can sense a fingerprint over the entire display area of the display panel 100. That is, the display device 10 according to an embodiment of the present disclosure can provide touch sensing and fingerprint sensing for all areas.

[0064] The display device 10 according to an embodiment of the present disclosure includes an optical device. For example, the optical device may include one or more of a camera 110 for taking pictures and a proximity sensor 120 for detecting the approach of a human body or an object around. The camera 110 in this specification may be a front camera that takes pictures of the front surface of the display device 10.

[0065] When viewing the display device 10 according to an embodiment of the present disclosure from the front, one or more optical devices of the camera 110 and the proximity sensor 120 are not visible. For this reason, the display device 10 according to an embodiment of the present disclosure has a structure in which one or more optical devices of the camera 110 and the proximity sensor 120 can be located below the display panel 100.

[0066] In this specification, the camera 110 that is not exposed to the outside and is located below the display panel 100 is also referred to as an under-display camera (UDC). The display device 10 including the camera 110 is referred to as a camera-integrated display.

[0067] As described above, although the optical device is located below the display panel 100, the display device 10 according to an embodiment of the present disclosure can normally perform the photographing function of the camera 110 and / or the proximity sensing function of the proximity sensor 120 through a unique structure. This will be described in detail below.

[0068] Figure 2 It is a view showing the screen configuration of the display device 10 according to an embodiment of the present disclosure.

[0069] Reference Figure 2 , the display panel 100 may include a display area AA in which an image is displayed and a non-display area NA that may be an external area of the display area AA and does not display an image.

[0070] Reference Figure 2 , the display area AA may include a first area A1 and a second area A2. The first area A1 may be a camera area, or may overlap all or part of the camera area, or may include the camera area. Here, the camera area may be an area where the lens of the camera 110 is located, and may also be referred to as a camera lens area or a photographing area. In this specification, the camera 110 overlapping with the first area A1 may refer to the camera lens. The first area A1 may be a proximity sensing area, or may overlap all or part of the proximity sensing area, or may include the proximity sensing area. Here, the proximity sensing area may be an area capable of detecting the proximity of an object or a human body through the proximity sensor 120.

[0071] For example, when the user grasps the display device 10 and takes a picture of himself, the user can take a picture while looking at the first area A1. When the user covers the first area A1 with his face or finger, the display device 10 detects the proximity of the user's face or finger through the proximity sensor 120 and performs a predetermined operation (for example, screen off, etc.) according to the detection result.

[0072] The first region A1 in the display region AA can be a path through which light enters the optical device (light incident portion). Here, the light can be in electromagnetic form, such as visible light, infrared light, or ultraviolet light.

[0073] Reference Figure 2 , one or more optical devices of the camera 110 and the proximity sensor 120 can be located below the first region A1. That is, one or more optical devices of the camera 110 and the proximity sensor 120 can overlap with the first region A1.

[0074] Figure 3 is a schematic cross-sectional view of the display device 10 according to an embodiment of the present disclosure.

[0075] Reference Figure 3 , the display device 10 according to an embodiment of the present disclosure includes optical devices (e.g., the camera 110, the proximity sensor 120, etc.) located below the display panel 100 and overlapping with the display region AA. However, the display device 10 according to an embodiment of the present disclosure can normally perform the inherent functions of the optical devices (e.g., the photographing function, the light receiving function of the proximity sensor 120, etc.), and can also normally perform the display function. The display device 10 according to an embodiment of the present disclosure has a structure (especially the structure in the first region A1) that enables the original functions of the optical devices to be normally performed and the display function to be normally performed.

[0076] Reference Figure 3 , the display device 10 according to an embodiment of the present disclosure has a unique structure in the light incident portion IA, which refers to the space in the panel through which light enters for the functions of the optical devices. The light incident portion IA can be located in the display region AA, and can overlap with all or part of the first region A1, or can include the first region A1.

[0077] Reference Figure 3 , the display device 10 according to an embodiment of the present disclosure can include a transparent substrate 320, a sub-pixel forming unit 330, a heterogenous cathode electrode layer 340, an encapsulation layer 350, and a touch sensor layer 360. The sub-pixel forming unit 330 can be located above the transparent substrate 320, and can include sub-pixel patterns formed to form a plurality of sub-pixels SP. The heterogenous cathode electrode layer 340 can be located on the sub-pixel forming unit 330, and a cathode voltage corresponding to a common voltage is applied. The encapsulation layer 350 can be provided on the heterogenous cathode electrode layer 340 and has an inclined surface on the outside. The touch sensor layer 360 can be provided on the encapsulation layer 350 and can include a plurality of touch electrodes.

[0078] The sub-pixel forming unit 330 may include a transistor array 331, an anode electrode layer 332, a light-emitting layer 333, etc. The transistor array 331 may be located on the transparent substrate 320 and may be located in the display area AA. The transistor array 331 may include one or more transistors provided in each of the plurality of sub-pixels. The anode electrode layer 332 may be provided on the transistor array 331 and may be provided on each of the plurality of sub-pixels, and may include anode electrodes electrically connected to the source nodes or drain nodes of the corresponding transistors. The light-emitting layer 333 may be located on the anode electrode layer 332 and may be located on the corresponding anode electrodes in each of the plurality of sub-pixels.

[0079] The heterogenous cathode electrode layer 340 may be located on the light-emitting layer 333. The anode electrode layer 332, the light-emitting layer 333, and the heterogenous cathode electrode layer 340 form a plurality of light-emitting elements (e.g., OLED (organic light-emitting diode), etc.) for each sub-pixel.

[0080] The touch sensor layer 360 may include a plurality of touch electrodes and may also include a plurality of touch lines electrically connected to all or a part of the plurality of touch electrodes.

[0081] For example, the plurality of touch electrodes may be provided on one layer, or may be divided and provided on two or more layers separated by an insulating layer. The plurality of touch lines may be located on a layer different from the plurality of touch electrodes, or may be located on the same layer as some of the plurality of touch electrodes.

[0082] The plurality of touch electrodes may be provided in the display area AA. Each of the plurality of touch lines may electrically connect the corresponding touch electrode located in the display area AA to a pad portion located in the non-display area NA. Therefore, the plurality of touch lines pass through the non-display area NA. The plurality of touch lines may descend along the inclined surface of the encapsulation layer 350 and be electrically connected to the pad portion.

[0083] Reference Figure 3 According to an embodiment of the present disclosure, the display device 10 may further include a polarizing plate 370 provided on the touch sensor layer 360, an optically transparent adhesive 380 provided on the polarizing plate 370, and a cover glass 390 provided on the optically transparent adhesive 380.

[0084] Reference Figure 3 The display panel 100 may include a transparent substrate 320, a sub-pixel forming unit 330, a heterogenous cathode electrode layer 340, an encapsulation layer 350, a touch sensor layer 360, a polarizing plate 370, an optically transparent adhesive 380, a cover glass 390, etc.

[0085] Reference Figure 3, the display device 10 according to an embodiment of the present disclosure may further include a fingerprint sensor panel 300 located below the display panel 100. That is, the fingerprint sensor panel 300 may be located below the transparent substrate 320.

[0086] Reference Figure 3 , when in the air layer between the display panel 100 and the fingerprint sensor panel 300, the fingerprint sensing performance through the fingerprint sensor panel 300 may deteriorate or fingerprint sensing itself may be impossible. Therefore, the display panel 100 and the fingerprint sensor panel 300 may be joined with a joining material so that there is no air layer between the display panel 100 and the fingerprint sensor panel 300. For example, the joining material may include resin, optical clear adhesive (OCA), pressure sensitive adhesive (PSA), etc.

[0087] Reference Figure 3 , the display device 10 according to an embodiment of the present disclosure may further include a backplane 310 located between the display panel 100 and the fingerprint sensor panel 300. The display panel 100 may be joined to the top surface of the backplane 310, and the fingerprint sensor panel 300 may be joined to the bottom surface of the backplane 310. Here, the backplane 310 may not be an essential structure.

[0088] Reference Figure 3 , the display device 10 according to an embodiment of the present disclosure may further include a buffer plate 306 located below the fingerprint sensor panel 300 and protecting the lower part of the fingerprint sensor panel 300. The buffer plate 306 may include a foam pad 302 and a metal plate 304 made of copper (Cu) or the like.

[0089] Reference Figure 3 , the display device 10 according to an embodiment of the present disclosure includes an optical device located in the display area AA and disposed below the transparent substrate 320. For example, the optical device may include one or more of a camera 110 and a proximity sensor 120.

[0090] Reference Figure 3 , the camera 110 and the proximity sensor 120 may be located in a first area A1 in the display area AA. That is, the camera 110 and the proximity sensor 120 may overlap with the first area A1 in the display area AA.

[0091] Reference Figure 3, the light incident portion IA may be an optical path. More specifically, the light incident portion IA may be a path through which light (e.g., visible light) for photographing by the camera 110 enters and exits, and light (e.g., infrared) for sensing by the proximity sensor 120 enters and exits. On a plane, the light incident portion IA may correspond to or be included in the first region A1. When viewed vertically, the light incident portion IA may be a region from the cover glass 390 corresponding to the front surface of the display device 10 to the optical device.

[0092] The first region A1 may be a camera region (camera lens region) where the lens of the camera 110 for photographing is located, and may be a proximity sensing region capable of sensing the approach of an object or a human body.

[0093] Since the first region A1 may be the light incident portion IA, light must transmit well through the first region A1.

[0094] To this end, each of the layers 390, 380, 370, 360, 350, 340, 330, and 310 located in the light incident portion IA that may be the light incident path may have a transmittance greater than a predetermined threshold transmittance. All or part of each of the layers 390, 380, 370, 360, 350, 340, 330, and 310 (corresponding to the first region A1) located in the light incident portion IA may have a transmittance equal to or greater than the predetermined threshold transmittance. The predetermined threshold transmittance may be the minimum transmittance value that enables each function of the camera 110 and the proximity sensor 120 to be achieved. In this specification, the term "transmittance" is also referred to as "transparency". This will be described in more detail below.

[0095] Meanwhile, as Figure 2 shown, the first region A1 may be located in the display area AA and may be located outside the display area AA. Alternatively, the first region A1 may be located in the display area AA and may be located at the center of the display area AA. When viewed from above, the first region A1 may have a predetermined shape (e.g., a polygon such as a square, hexagon, circle, ellipse, etc.).

[0096] Figure 4 is a configuration diagram of the display portion of the display device 10 according to an embodiment of the present disclosure.

[0097] Refer to Figure 4, the display portion of the display device 10 according to an embodiment of the present disclosure may include: a display panel 100 in which a plurality of data lines DL, a plurality of gate lines GL, and a plurality of sub-pixels SP may be provided, a data driving circuit 420 for driving the plurality of data lines DL, a gate driving circuit 430 for driving the plurality of gate lines GL, and a display controller 440 for controlling the operations of the data driving circuit 420 and the gate driving circuit 430.

[0098] The data driving circuit 420 may supply an image data voltage Vdata to the plurality of data lines DL according to the timing control of the display controller 440. The gate driving circuit 430 may sequentially supply a scan signal SCAN to the plurality of gate lines GL according to the timing control of the display controller 440.

[0099] The plurality of data lines DL provided in the display area AA of the display panel 100 are electrically connected to a display pad unit 421 located in the non-display area NA of the display panel 100. The data driving circuit 420 is electrically connected to the display pad unit 421.

[0100] The data driving circuit 420 may be implemented in a chip-on-film (COF) type and may be mounted on a circuit film bonded to the display pad unit 421 of the display panel 100. Alternatively, the data driving circuit 420 may be implemented in a chip-on-glass (COG) type or a chip-on-panel (COP) type and may be directly mounted on the display pad unit 421 of the display panel 100.

[0101] The gate driving circuit 430 may be implemented in a chip-on-film (COF) type and may be mounted on a circuit film electrically connected to the display panel 100. Alternatively, the gate driving circuit 430 may be implemented in a chip-on-glass (COG) type or a chip-on-panel (COP) type and may be mounted on the non-display area NA of the display panel 100. Alternatively, the gate driving circuit 430 may be implemented in a gate-in-panel (GIP) type to be formed in the non-display area NA of the display panel 100.

[0102] The display device 10 according to an embodiment of the present disclosure may be a liquid crystal display (LCD) including a backlight unit. Alternatively, the display device 10 according to an embodiment of the present disclosure may be a self-emitting display, such as an organic light emitting diode (OLED) display, a quantum dot display, or a micro light emitting diode (μLED) display.

[0103] When the display device 10 according to an embodiment of the present disclosure can be an OLED display, each sub-pixel SP may include an organic light-emitting diode (OLED) that emits light as a light-emitting device. When the display device 10 according to this exemplary embodiment can be a quantum dot display, each sub-pixel SP may include a light-emitting device made of quantum dots, which can be a semiconductor crystal that emits light by itself. When the display device 10 according to this embodiment can be a micro-LED display, each sub-pixel SP emits light by itself and may include a micro-LED (micro light-emitting diode) made of an inorganic material as a light-emitting device.

[0104] In the display device 10 according to an embodiment of the present disclosure, each sub-pixel SP may include a light-emitting element ED, a driving transistor DRT for controlling the current flowing through the light-emitting element ED, a scanning transistor SCT for transmitting an image data voltage Vdata to the driving transistor DRT, and a storage capacitor Cst for maintaining the voltage for a specific time, etc.

[0105] The light-emitting device ED may include an anode electrode AE and a cathode electrode CE, and a light-emitting layer EL located between the anode electrode AE and the cathode electrode EC. For example, the light-emitting device ED may be an organic light-emitting diode (OLED), a light-emitting diode (LED), a quantum dot light-emitting device, etc.

[0106] The cathode electrode CE of the light-emitting element ED may be a common electrode. In this case, a base voltage EVSS may be applied to the cathode electrode CE of the light-emitting element ED. Here, for example, the ground voltage EVSS may be a ground voltage or a voltage similar to the ground voltage.

[0107] The driving transistor DRT is a transistor for driving the light-emitting element ED, and may include a first node N1, a second node N2, and a third node N3.

[0108] The first node N1 of the driving transistor DRT may be the gate node of the driving transistor DRT and may be electrically connected to the source node or the drain node of the scanning transistor SCT. The second node N2 of the driving transistor DRT may be electrically connected to the anode electrode AE of the light-emitting element ED and may be the source node or the drain node of the driving transistor DRT. The third node N3 of the driving transistor DRT may be electrically connected to a driving voltage line DVL that provides a driving voltage EVDD and may be the drain node or the source node of the driving transistor DRT.

[0109] The scanning transistor SCT may control the connection between the first node N1 of the driving transistor DRT and the corresponding data line DL in response to a scanning signal SCAN provided from a gate line GL.

[0110] The drain node or the source node of the scan transistor SCT can be electrically connected to the corresponding data line DL. The source node or the drain node of the scan transistor SCT can be electrically connected to the first node N1 of the driving transistor DRT. The gate node of the scan transistor SCT can be electrically connected to the gate line GL to receive the scan signal SCAN through the gate line GL.

[0111] When the scan transistor SCT is turned on by the scan signal SCAN with an on-level voltage, the scan transistor SCT can transfer the image data voltage Vdata provided from the corresponding data line DL to the first node N1 of the driving transistor DRT.

[0112] The scan transistor SCT is turned on by the scan signal SCAN with an on-level voltage and turned off by the scan signal SCAN with an off-level voltage. Here, when the scan transistor SCT is an n-type, the on-level voltage can be a high-level voltage, and the off-level voltage can be a low-level voltage. When the scan transistor SCT is a p-type, the on-level voltage can be a low-level voltage, and the off-level voltage can be a high-level voltage.

[0113] The storage capacitor Cst can be electrically connected between the first node N1 and the second node N2 of the driving transistor DRT. The storage capacitor Cst can maintain the image data voltage Vdata corresponding to the image signal voltage or its corresponding voltage for one frame time.

[0114] The storage capacitor Cst is an intentionally designed external capacitor rather than a parasitic capacitor, which is an internal capacitor (e.g., Cgs, Cgd) existing between the first node N1 and the second node N2 of the driving transistor DRT.

[0115] Each of the driving transistor DRT and the scan transistor SCT can be an n-type transistor or a p-type transistor. Both the driving transistor DRT and the scan transistor SCT can be n-type transistors or p-type transistors. At least one of the driving transistor DRT and the scan transistor SCT can be an n-type transistor (or a p-type transistor), and the other can be a p-type transistor (or an n-type transistor).

[0116] Figure 4 Each sub-pixel structure shown is only an example for description. Each sub-pixel may further include one or more transistors and / or one or more capacitors. Each of the multiple sub-pixels may have the same structure, or some of the multiple sub-pixels may have different structures.

[0117] Figure 5 is a configuration diagram of the touch sensing part and the fingerprint sensing part of the display device 10 according to an embodiment of the present disclosure.

[0118] ReferenceFigure 5 According to an embodiment of the present disclosure, the display device 10 may include a touch sensing part that senses a touch caused by a touch indicator or senses a touch position where the touch indicator touches the display panel 100. Here, the touch indicator may be a finger or a pen. When the touch indicator touches the display panel 110, the touch indicator may touch the display panel 110 in a contact manner, or the touch indicator may touch the display panel 110 in a non-contact manner (also referred to as a hover mode method). The touch sensing part may include the display panel 100 having touch sensors, a touch driving circuit 510 that drives and senses the touch sensors to output touch sensing data, and a processor 530 that uses the touch sensing data to identify a touch event or obtain a touch position.

[0119] The touch sensors embedded in the display panel 100 may include a plurality of touch electrodes TE provided in a touch sensing area TSA of the display panel 100. Here, the touch sensing area TSA may correspond to the display area AA.

[0120] The display panel 100 may include a plurality of touch electrodes TE and a plurality of touch lines TL. The display panel 100 may further include a touch pad unit 511 provided in a non-display area NA and electrically connected to the touch driving circuit 510. Each of the plurality of touch lines TL may electrically connect a corresponding touch electrode TE among the plurality of touch electrodes TE to the touch pad unit 511.

[0121] The touch pad unit 511 may be located on the transparent substrate 320 and may be located in the non-display area NA, and the non-display area NA may be an outer area of the display area AA. The plurality of touch lines TL may be electrically connected to all or part of the plurality of touch electrodes TE. The plurality of touch lines TL may descend along an inclined surface of the encapsulation layer 350 and be electrically connected to the touch pad unit 511.

[0122] The touch driving circuit 510 may drive all or part of the plurality of touch electrodes TE and sense all or part of the plurality of touch electrodes TE to generate touch sensing data. The touch driving circuit 510 may provide the generated touch sensing data to the processor 530.

[0123] The processor 530 may identify the occurrence of a touch or determine a touch position based on the touch sensing data. The processor 530 may perform a predetermined function (such as input processing, object selection processing, writing processing, etc.) based on the identified occurrence of a touch or the determined touch position.

[0124] The touch driving circuit 510 and the data driving circuit 420 may be implemented as separate integrated circuits. Alternatively, the touch driving circuit 510 and the data driving circuit 420 may be integrated into one integrated circuit.

[0125] Reference Figure 5 According to an embodiment of the present disclosure, the fingerprint sensing part of the display device 10 is a part for sensing a user's fingerprint. The fingerprint sensing part may include: a fingerprint sensor panel 300 in which a plurality of fingerprint sensing pixels FP-PXL may be arranged; a fingerprint driving circuit 520 that drives and senses the fingerprint sensor panel 300 to output fingerprint sensing data; and a processor 530 that uses the fingerprint sensing data to identify a fingerprint and perform a predetermined function (e.g., user authentication) according to the fingerprint recognition result.

[0126] The fingerprint sensing part of the display device 10 according to an embodiment of the present disclosure may sense a fingerprint by an optical method, an ultrasonic method, or the like. Hereinafter, the fingerprint sensing part of the display device 10 may be an example of sensing a fingerprint by an ultrasonic method.

[0127] The fingerprint sensing pixels FP-PXL included in the fingerprint sensor panel 300 may be provided in the fingerprint sensing area FSA. Here, the fingerprint sensing area FSA may correspond to the display area AA.

[0128] Each of the plurality of fingerprint sensing pixels FP-PXL may include a piezoelectric element, a driving unit (transmitting unit), and a sensing unit (receiving unit). The piezoelectric element may include a driving electrode, a piezoelectric material layer, and a common electrode. The driving unit drives the piezoelectric element to generate ultrasonic waves in the piezoelectric element. The ultrasonic waves generated by the piezoelectric element may be reflected from the fingerprint part (ridges, valleys) of the finger. The ultrasonic reflection characteristics at the ridges and the ultrasonic reflection characteristics at the valleys may be different. The sensing unit generates a signal according to the ultrasonic waves reflected from the fingerprint part of the finger and senses the generated signal. Here, each of the driving unit (transmitting unit) and the sensing unit (receiving unit) may include one or more switching elements (transistors).

[0129] A signal (AC signal) having a variable voltage level may be applied to one of the driving electrode and the common electrode, and a signal (DC signal) having a constant voltage level may be applied to the other of the driving electrode and the common electrode.

[0130] A fingerprint pad unit 521 to which the fingerprint driving circuit 520 may be electrically connected may exist outside the fingerprint sensing area FSA of the fingerprint sensor panel 300.

[0131] The fingerprint sensor panel 300 may include a plurality of readout lines RL that electrically connect each sensing unit (receiving unit) of the plurality of fingerprint sensing pixels FP-PXL to the fingerprint pad unit 521.

[0132] The fingerprint driving circuit 520 may drive all or part of a plurality of fingerprint sensing pixels FP-PXL, and sense all or part of the plurality of fingerprint sensing pixels FP-PXL. The fingerprint driving circuit 520 may generate fingerprint sensing data based on the sensing result, and provide the generated fingerprint sensing data to the processor 530.

[0133] The processor 530 may identify a fingerprint based on the fingerprint sensing data, and perform a predetermined function (e.g., user authentication, etc.) according to the fingerprint identification result.

[0134] Meanwhile, referring to Figure 5 , the fingerprint sensor panel 300 may have a hole or a cutout groove 500 in a portion corresponding to the first region A1.

[0135] Hereinafter, the structure of the touch sensor in the display panel 100 will be described with reference to Figures 6 to 10 . The display device 10 according to an embodiment of the present disclosure may sense a touch by a capacitive method.

[0136] Figure 6 is an exemplary view showing the structure of the touch sensor in the display panel 100 of the display device 10 according to an embodiment of the present disclosure.

[0137] Referring to Figure 6 , each of the plurality of touch electrodes TE provided in the touch sensing area TSA of the display panel 100 may be separated from each other and may be a blocking electrode. Each of the plurality of touch electrodes TE may not overlap with each other.

[0138] Each of the plurality of touch electrodes TE may be electrically connected to the touch driving circuit 510 through one or more touch lines TL.

[0139] The touch line TL may be provided in parallel with the data line DL or in the same direction as the data line DL.

[0140] The plurality of touch electrodes TE may include a first touch electrode and a second touch electrode arranged in the same column. The first touch electrode may be located at a position farther from the touch driving circuit 510 than the second touch electrode. The plurality of touch lines TL may include a first touch line connected to the first touch electrode and a second touch line connected to the second touch electrode.

[0141] The first touch line connected to the first touch electrode may overlap with the second touch electrode, but may not be electrically connected to the second touch electrode.

[0142] The first touch electrode and the second touch electrode can be separated in the display panel 100 and can be physically separated. The first touch line and the second touch line can be separated within the display panel 100 and can be physically separated. The first touch electrode and the second touch electrode can be separated in the display panel 100, but can be electrically connected through a switching circuit in the touch driving circuit 510 according to driving conditions.

[0143] Figure 6 The touch sensor structure shown in can be suitable for a self-capacitance-based touch sensing method that senses touch using the capacitance between a touch electrode TE and a touch indicator (e.g., a finger, a pen, etc.).

[0144] Accordingly, the touch driving circuit 510 provides a touch driving signal to one or more of the plurality of touch electrodes TE, and detects a touch sensing signal from the touch electrode TE to which the touch driving signal can be applied. The touch driving circuit 510 can obtain a sensing value for each touch electrode TE based on the detection of the touch sensing signal, and generate touch sensing data including the obtained sensing values.

[0145] Figure 7 is another exemplary view of the structure of a touch sensor in the display panel 100 of the display device 10 according to an embodiment of the present disclosure.

[0146] Figure 7 The touch sensor structure shown in can be suitable for a mutual-capacitance-based touch sensing method that senses touch using the capacitance between two touch electrodes TE.

[0147] Reference Figure 7 , for a mutual-capacitance-based touch sensing method, the plurality of touch electrodes TE disposed in the touch sensing area TSA of the display panel 100 can include a plurality of first touch electrodes X-TE and a plurality of second touch electrodes Y-TE. The plurality of first touch electrodes X-TE and the plurality of second touch electrodes Y-TE can be disposed in different directions. A mutual capacitance can be formed between the first touch electrode X-TE and the second touch electrode Y-TE.

[0148] The plurality of first touch electrodes X-TE and the plurality of second touch electrodes Y-TE can cross each other. The point (area) where the first touch electrode X-TE and the second touch electrode Y-TE intersect can be referred to as a touch node.

[0149] The plurality of first touch electrodes X-TE can be driving electrodes (or transmitting electrodes) to which the touch driving circuit 510 provides a touch driving signal, and the plurality of second touch electrodes Y-TE can be sensing electrodes (or receiving electrodes) sensed by the touch driving circuit 510.

[0150] Conversely, multiple first touch electrodes X-TE can be sensing electrodes (or receiving electrodes) sensed by the touch driving circuit 510, and multiple second touch electrodes Y-TE can be driving electrodes (or transmitting electrodes) to which the touch driving circuit 510 supplies touch driving signals.

[0151] Figure 8 is another exemplary view of the structure of the touch sensor in the display panel 100 of the display device 10 according to an embodiment of the present disclosure.

[0152] Figure 8 is a touch sensor structure for touch sensing based on mutual capacitance, and is different from Figure 7 However, Figure 8 the touch sensor structure of Figure 7 is an electrical structure equivalent to the touch sensor structure of

[0153] Referring to Figure 8 , multiple touch electrodes TE provided in the touch sensing area TSA of the display panel 100 may include multiple first touch electrodes X-TE and multiple second touch electrodes Y-TE. The first touch electrodes X-TE arranged in the same row among the multiple first touch electrodes X-TE may be electrically connected through a first bridge pattern X-CL. The second touch electrodes Y-TE arranged in the same column among the multiple second touch electrodes Y-TE may be electrically connected through a second bridge pattern Y-CL.

[0154] The first touch electrodes X-TE arranged in the same row and located on the same layer, as well as the first bridge pattern X-CL connecting them, may be integrally formed and located on the same layer.

[0155] The second touch electrodes Y-TE arranged in the same column and located on the same layer, as well as the second bridge pattern Y-CL connecting them, may be located on different layers and may be electrically connected through contact holes.

[0156] The first touch electrodes X-TE arranged in the same row and electrically connected through the first bridge pattern X-CL form a first touch electrode line X-TEL. The first touch electrode line X-TEL formed in this way may be electrically the same as the first touch electrodes X-TE in Figure 7 . The second touch electrodes Y-TE arranged in the same column and electrically connected through the second bridge pattern Y-CL form a second touch electrode line Y-TEL. The second touch electrode line Y-TEL formed as described above may be electrically the same as the second touch electrodes Y-TE in Figure 7 .

[0157] Each of the plurality of first touch electrode lines X-TEL may be electrically connected to one or more first touch lines X-TL. Each of the plurality of second touch electrode lines Y-TEL may be electrically connected to one or more second touch lines Y-TL.

[0158] Each of the plurality of first touch electrode lines X-TEL may be electrically connected to a first touch pad X-TP included in the touch pad unit 510 through one or more first touch lines X-TL. Each of the plurality of second touch electrode lines Y-TEL may be electrically connected to a second touch pad Y-TP included in the touch pad unit 510 through one or more second touch lines Y-TL.

[0159] Figure 9 is a cross-sectional view of a display panel 100 of a display device 10 according to an embodiment of the present disclosure.

[0160] A driving transistor DRT in each sub-pixel SP in the display area AA may be disposed above the transparent substrate 320.

[0161] The driving transistor DRT may include a first node electrode NE1 corresponding to a gate electrode, a second node electrode NE2 corresponding to a source electrode or a drain electrode, and a third node electrode NE3 corresponding to a drain electrode or a source electrode. The driving transistor DRT may further include a semiconductor layer SEMI, etc.

[0162] The gate insulating layer GI may be located between the first node electrode NE1 and the semiconductor layer SEMI. The first node electrode NE1 and the semiconductor layer SEMI may overlap each other. The second node electrode NE2 may be formed on the insulating layer INS and may be connected to one side of the semiconductor layer SEMI through a contact hole. The third node electrode NE3 may be formed on the insulating layer INS and may be connected to the other side of the semiconductor layer SEMI through a contact hole.

[0163] The light-emitting element ED may include an anode electrode AE corresponding to a pixel electrode, a light-emitting layer EL formed on the anode electrode AE, and a cathode electrode CE formed on the light-emitting layer EL and corresponding to a common electrode.

[0164] The anode electrode AE may be electrically connected to the second node electrode NE2 of the driving transistor DRT exposed through a pixel contact hole passing through the planarization layer PLN.

[0165] The light-emitting layer EL may be formed on the anode electrode AE in an emission area provided (exposed) by a bank BANK. The light-emitting layer EL may have a stacked structure including a hole-related layer, a light-emitting layer, and an electron-related layer. The cathode electrode CE may be formed to face the anode electrode AE, and the light-emitting layer EL may be interposed between the anode electrode AE and the anode electrode AE.

[0166] The light-emitting element ED may be vulnerable to moisture or oxygen. The encapsulation layer 350 can prevent the light-emitting device ED from being exposed to moisture or oxygen. That is, the encapsulation layer 350 can prevent the penetration of moisture or oxygen. The encapsulation layer 350 can be a single layer, but can be composed of multiple layers (PAS1, PCL, and PAS2), as Figure 9 shown.

[0167] For example, when the encapsulation layer 350 is composed of multiple layers (PAS1, PCL, PAS2), the encapsulation layer 350 can include at least one inorganic encapsulation layer (PAS1, PAS2) and at least one organic encapsulation layer PCL. As a specific example, the encapsulation layer 350 can have a structure in which the first inorganic encapsulation layer PAS1, the organic encapsulation layer PCL, and the second inorganic encapsulation layer PAS2 can be sequentially stacked.

[0168] Here, the organic encapsulation layer PCL can also include at least one organic encapsulation layer or at least one inorganic encapsulation layer.

[0169] The first inorganic encapsulation layer PAS1 can be disposed on the cathode electrode CE and can be disposed closest to the light-emitting element ED. The first inorganic encapsulation layer PAS1 can be formed of an inorganic insulating material capable of low-temperature deposition. For example, the first inorganic encapsulation layer PAS1 can be silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3). Since the first inorganic encapsulation layer PAS1 can be deposited in a low-temperature atmosphere, during the deposition process, the first inorganic encapsulation layer PAS1 can prevent the light-emitting layer EL including organic materials vulnerable to a high-temperature atmosphere from being damaged.

[0170] The organic encapsulation layer PCL can be formed to have an area smaller than that of the first inorganic encapsulation layer PAS1. In this case, the organic encapsulation layer PCL can be formed to expose both ends of the first inorganic encapsulation layer PAS1. The organic encapsulation layer PCL can be used as a buffer layer to relieve the stress between layers due to the bending of the touch display device as an organic light-emitting display device, and can also be used to enhance the planarization performance. For example, the organic encapsulation layer PCL can be an acrylic resin, an epoxy resin, a polyimide, a polyethylene, or silicon oxycarbide (SiOC), and can be formed of an organic insulating material. For example, the organic encapsulation layer PCL can be formed by an inkjet method.

[0171] The display panel 100 can also include one or more dams (DAM1, DAM2) formed to prevent the encapsulation layer 350 from collapsing.

[0172] One or more dams DAM1 and DAM2 may be present at or near the boundary between the display area AA and the non-display area NA. For example, one or more dams DAM1 and DAM2 may be located at or near the end points of the slope 900 of the encapsulation layer 350.

[0173] One or more dams DAM1 and DAM2 may be provided between the touch pad unit 511 including the touch pad Y-TP and the display area AA. One or more dams DAM1 and DAM2 may be formed by a dam formation pattern DFP or the like. For example, the dam formation pattern DFP may include the same material as the bank BANK.

[0174] One or more dams DAM1 and DAM2 may be located only in the non-display area NA. Alternatively, most of one or more dams DAM1 and DAM2 are present in the non-display area NA, but a part of one or more dams DAM1 and DAM2 may straddle the display area AA.

[0175] When the display panel 100 is formed with two or more dams (DAM1, DAM2) to prevent the collapse of the encapsulation layer 350, the dam located closest to the display area AA may be referred to as the main dam DAM1. After the main dam, the dam located close to the display area AA may be referred to as the secondary dam DAM2. The main dam DAM1 may be positioned relatively closer to the display area AA than the secondary dam DAM2. The secondary dam DAM2 may be positioned relatively closer to the touch pad unit 511 than the main dam DAM1.

[0176] When the liquid organic encapsulation layer PCL is dropped on the display area AA, the liquid organic encapsulation layer PCL may collapse in the direction of the non-display area NA. The collapsed organic encapsulation layer PCL may invade the pad area and cover the touch pad unit 511 and the like. The collapse of the organic encapsulation layer PCL can be prevented by one or more dams (DAM1, DAM2). When two or more dams DAM1 and DAM2 can be formed, this prevention may be stronger, as Figure 9 shown.

[0177] The main dam DAM1 and / or the secondary dam DAM2 may be formed as a single-layer or multi-layer structure.

[0178] The main dam DAM1 and / or the secondary dam DAM2 may be substantially made of the dam formation pattern DFP. The dam formation pattern DFP may have a higher height than the touch pad Y-TP provided on the touch pad unit 511.

[0179] The dam-forming pattern DFP can be formed of the same material as the bank BANK used to separate the sub-pixels SP from each other, or can be formed of the same material as the spacer used to maintain the interlayer spacing. In this case, the dam-forming pattern DFP can be formed simultaneously with the bank BANK or the spacer. Therefore, a dam structure can be formed without additional masks and cost increases.

[0180] Reference Figure 9 , the main dam DAM1 and / or the secondary dam DAM2 have a multi-layer structure, where the first inorganic encapsulation layer PAS1 and / or the second inorganic encapsulation layer PAS2 can be stacked on the dam-forming pattern DFP.

[0181] The organic encapsulation layer PCL containing an organic material can be located only on the inner side of the innermost main dam DAM1. That is, the organic encapsulation layer PCL may not be present on all dams DAM1 and DAM2. Alternatively, the organic encapsulation layer PCL including an organic material can be positioned on at least the main dam DAM1 among the main dam DAM1 and the secondary dam DAM2. That is, the organic encapsulation layer PCL can be located at a position extending only to the upper part of the main dam DAM1. Alternatively, the organic encapsulation layer PCL can be positioned to extend beyond the upper part of the main dam DAM1 to the upper part of the secondary dam DAM2.

[0182] The second inorganic encapsulation layer PAS2 can be formed to cover the top surface and the side surfaces of the organic encapsulation layer PCL and the first inorganic encapsulation layer PAS1 on the transparent substrate 320 on which the organic encapsulation layer PCL can be formed. The second inorganic encapsulation layer PAS2 can minimize or prevent external moisture or oxygen from penetrating into the first inorganic encapsulation layer PAS1 and the organic encapsulation layer PCL. For example, the second inorganic encapsulation layer PAS2 can be formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0183] The touch buffer layer T-BUF can be provided on the encapsulation layer 350.

[0184] The first touch electrode X-TE and the second touch electrode Y-TE, and the first bridge pattern X-CL and the second bridge pattern Y-CL can be located on the touch buffer layer T-BUF.

[0185] All or part of each of the first touch line X-TL and the second touch line Y-TL can also be located on the touch buffer layer T-BUF.

[0186] The touch buffer layer T-BUF may be located between the touch electrodes X-TE and Y-TE and the cathode electrode CE. Through the touch buffer film T-BUF, the separation distance between the touch electrodes X-TE and Y-TE and the cathode electrode CE of the light-emitting element ED may be equal to or greater than a predetermined minimum separation distance (e.g., 5 μm) or be a predetermined optimal separation distance. Therefore, the parasitic capacitance between the touch electrodes X-TE and Y-TE and the cathode electrode CE can be reduced or prevented. Therefore, a decrease in touch sensitivity due to the parasitic capacitance can be prevented.

[0187] The touch buffer layer T-BUF may not be present on the encapsulation layer 350. That is, the touch buffer layer T-BUF may not be provided between the encapsulation layer 350 and the touch sensor metal layer. Here, the touch sensor metal layer may include a first touch electrode X-TE, a second touch electrode Y-TE, a first bridge pattern X-CL, a second bridge pattern Y-CL, etc.

[0188] During the manufacturing process of the touch sensor metal, chemical agents (such as developers or etchants) used during the process or moisture from the outside may appear. By disposing the touch buffer film T-BUF and setting the touch sensor metal thereon, it is possible to prevent chemical liquids or moisture from penetrating into the light-emitting layer EL containing organic materials during the manufacturing process of the touch sensor metal. Therefore, the touch buffer layer T-BUF can prevent damage to the light-emitting layer EL that may be vulnerable to chemical agents or moisture.

[0189] The touch buffer film T-BUF may be formed of an organic insulating material having a low dielectric constant (e.g., a dielectric constant of 1 to 3) and may be formed at a low temperature below a specific temperature (e.g., 100 degrees (°C)) to prevent damage to the light-emitting layer EL containing organic materials that are vulnerable to high temperatures. For example, the touch buffer film T-BUF may be formed of an acrylic-based, epoxy-based, or silicone-based material. When the organic light-emitting display device is bent, each of the encapsulation layers (PAS1, PCL, PAS2) in the encapsulation layer 350 may be damaged, and the touch sensor metal located on the touch buffer film T-BUF may be broken. Even when the organic light-emitting display device is bent, the touch buffer film T-BUF having a planarization property of the organic insulating material can prevent damage to the encapsulation layer 350 and / or breakage in the touch sensor metal.

[0190] According to the mutual capacitance-based touch sensor structure, a first touch electrode line X-TEL and a second touch electrode line Y-TEL may be provided on the touch buffer layer T-BUF, and the first touch electrode line X-TEL and the second touch electrode line Y-TEL may be arranged to cross.

[0191] The second touch electrode line Y-TEL may include a plurality of second touch electrodes Y-TE. The second touch electrode line Y-TEL may further include a plurality of second bridge patterns Y-CL that electrically connect the plurality of second touch electrodes Y-TE. As Figure 8 shown, the plurality of second touch electrodes Y-TE and the plurality of second bridge patterns Y-CL may be located on different layers and have a touch insulating layer ILD therebetween.

[0192] Referring together Figure 8 and Figure 9 , the plurality of second touch electrodes Y-TE arranged in the same column may be spaced apart at regular intervals in the y-axis direction (column direction). Each of the plurality of second touch electrodes Y-TE may be electrically connected to another second touch electrode Y-TE adjacent in the y-axis direction through the second bridge pattern Y-CL.

[0193] The second bridge pattern Y-CL may be formed on the touch buffer layer T-BUF. The second bridge pattern Y-CL may be exposed through a touch contact hole that passes through the touch insulating layer ILD and electrically connects two second touch electrodes Y-TE adjacent in the y-axis direction.

[0194] The second bridge pattern Y-CL may be arranged to overlap with the bank BANK. Therefore, the aperture ratio can be prevented from being reduced due to the second bridge pattern Y-CL.

[0195] Referring together Figure 8 and Figure 9 , the first touch electrode line X-TEL may include a plurality of first touch electrodes X-TE. The first touch electrode line X-TEL may further include a plurality of first bridge patterns X-CL that electrically connect the plurality of first touch electrodes X-TE. The plurality of first touch electrodes X-TE and the plurality of first bridge patterns X-CL may be located on different layers and have a touch insulating layer ILD therebetween. Alternatively, the plurality of first bridge patterns X-CL and the plurality of first touch electrodes X-TE may be integrally formed and may be located on the same layer.

[0196] Referring together Figure 8 and Figure 9 , the plurality of first touch electrodes X-TE arranged in the same row may be spaced apart at regular intervals along the x-axis direction (row direction) on the touch insulating layer ILD. Each of the plurality of first touch electrodes X-TE may be electrically connected to another first touch electrode X-TE adjacent in the x-axis direction through the first bridge pattern X-CL.

[0197] The first bridge pattern X-CL can be disposed on the same plane as the first touch electrode X-TE and can be electrically connected to two adjacent first touch electrodes X-TE in the x-axis direction without a separate contact hole. Alternatively, the first bridge pattern X-CL can be integral with two adjacent first touch electrodes X-TE in the x-axis direction.

[0198] The first bridge pattern X-CL can be set to overlap with the bank BANK. Therefore, the aperture ratio can be prevented from being reduced due to the first bridge pattern X-CL.

[0199] Reference Figure 9 , the second touch electrode line Y-TEL can be electrically connected to the second touch pad Y-TP included in the touch pad unit 511 in the first non-display area NA1 through the second touch line Y-TL. The second touch pad Y-TP can be electrically connected to the touch drive circuit 510.

[0200] Similar to this structure, the first touch electrode line X-TEL can be electrically connected to the first touch pad X-TP included in the touch pad unit 511 in the first non-display area NA1 through the first touch line X-TL. The first touch pad X-TP can be electrically connected to the touch drive circuit 510.

[0201] The touch pad unit 511 may further include a pad covering electrode covering the first touch pad X-TP and the second touch pad Y-TP.

[0202] The first touch pad X-TP can be formed separately from the first touch line X-TL or can be formed by extending the first touch line X-TL. The second touch pad Y-TP can be formed separately from the second touch line Y-TL or can be formed by extending the second touch line Y-TL.

[0203] When the first touch pad X-TP is formed by extending the first touch line X-TL and the second touch pad Y-TP is formed by extending the second touch line Y-TL, the first touch pad X-TP, the first touch line X-TL, the second touch pad Y-TP, and the second touch line Y-TL can include the same one or more first conductive materials and can be formed as a single-layer or multi-layer structure. For example, the first conductive material can include Al, Ti, Cu, Mo, etc., and can be a metal with strong corrosion resistance, strong acid resistance, and good conductivity.

[0204] For example, each of the first touch pad X-TP, the first touch line X-TL, the second touch pad Y-TP, and the second touch line Y-TL can include the first conductive material and can be formed of a three-layer stacked structure such as Ti / Al / Ti or Mo / Al / Mo.

[0205] The pad covering electrode capable of covering the first touch pad X-TP and the second touch pad Y-TP may include one or more second conductive materials. The second conductive material may include a transparent conductive material with strong corrosion resistance and strong acid resistance (e.g., ITO, IZO, etc.). The pad covering electrode may be formed to be exposed by the touch buffer layer T-BUF to be joined to the touch driving circuit 510 or to a circuit film on which the touch driving circuit 510 may be mounted. The second conductive material may also be included in the first touch electrode X-TE and the second touch electrode Y-TE.

[0206] The touch buffer layer T-BUF may be formed to cover the touch sensor metal, thereby preventing the touch sensor metal from being corroded by moisture or the like. For example, the touch buffer film T-BUF may be formed of an organic insulating material, or may be formed of a circularly polarized light sheet or a film of an epoxy resin or acrylic material. The touch buffer layer T-BUF may not be on the encapsulation layer 350. That is, the touch buffer film T-BUF may not be an essential structure.

[0207] The second touch line Y-TL may be electrically connected to the second touch electrode Y-TE through a contact hole, or may be integrally formed with the second touch electrode Y-TE.

[0208] The second touch line Y-TL electrically connects the second touch electrode Y-TE in the display area AA and the second touch pad Y-TP in the first non-display area NA1. The line portion of the second touch line Y-TL extending to the first non-display area NA1 may include a first line portion provided along the inclined surface 900 of the encapsulation layer 350, a second line portion provided on one or more dams DAM1 and DAM2, and a third line portion electrically connected to the second touch pad Y-TP in the touch pad portion 511. The third line portion may be electrically connected to the touch driving circuit 510 through the second touch pad Y-TP. The first line portion may be closest to the display area AA, and the third line portion may be farthest from the display area AA.

[0209] The second touch line Y-TL may transmit a touch sensing signal from the second touch electrode Y-TE to the touch driving circuit 510, or may transmit a touch driving signal received from the touch driving circuit 510 to the second touch electrode Y-TE.

[0210] The first touch line X-TL may be electrically connected to the first touch electrode X-TE through a contact hole, or may be integrally formed with the first touch electrode X-TE.

[0211] The first touch line X-TL electrically connects the first touch electrode X-TE in the display area AA and the first touch pad X-TP in the first non-display area NA1. The line portion of the first touch line X-TL extending into the first non-display area NA1 may include a first line portion disposed along the inclined surface 900 of the encapsulation layer 350, a second line portion disposed on one or more dams DAM1 and DAM2, and a third line portion electrically connected to the first touch pad X-TP in the touch pad portion 511. The third line portion may be electrically connected to the touch driving circuit 510 through the first touch pad X-TP. The first line portion may be closest to the display area AA, and the third line portion may be farthest from the display area AA.

[0212] The first touch line X-TL may transmit the touch driving signal received from the touch driving circuit 510 to the first touch electrode X-TE, or may transmit the touch sensing signal from the first touch electrode X-TE to the touch driving circuit 510.

[0213] The arrangement of the first touch line X-TL and the second touch line Y-TL may be variably changed according to the panel design.

[0214] The touch protection layer PAC may be disposed on the first touch electrode X-TE and the second touch electrode Y-TE. The touch protection layer PAC may extend before or after one or more dams DAM1 and DAM2, and may be disposed on the first touch line X-TL and the second touch line Y-TL.

[0215] Meanwhile, Figure 9 The cross-sectional view conceptually shows the structure. Depending on the viewing direction or position, the position, thickness, or width of each pattern (various layers or various electrodes) may be changed, and the connection structure of various patterns may also be changed. In addition to the individual layers shown, there may be additional layers, and some of the various layers shown may be omitted or integrated. For example, compared with the width represented in Figure 9 , the width of the bank may be narrower, and the height of the dams DAM1 and DAM2 may be lower or higher than the height shown in Figure 9 .

[0216] Figure 10 is an exemplary view showing the touch electrode TE in the display panel 100 of the display device 10 according to an embodiment of the present disclosure.

[0217] Referring to Figure 10 , each touch electrode TE located in the first area A1 among the touch electrodes TE provided inside the display panel 100 may be a grid-type electrode having one or more openings. Each touch electrode TE located in the first area A1 among the touch electrodes TE may be a transparent electrode or may include a transparent electrode.

[0218] As described above, since the touch electrode TE located in the first region A1 can be of a grid type or formed of a transparent electrode, the transmittance of the first region A1 can be increased. Accordingly, the photographing function of the camera 110 passing through the first region A1 and the sensing function of the proximity sensor 120 passing through the first region A1 can be enabled.

[0219] A touch electrode TE can be a transparent electrode without an opening (opening region).

[0220] Alternatively, a touch electrode TE can be of a grid type having a plurality of opening regions OA. That is, a touch electrode TE can be an electrode metal EM patterned into a grid type to have a plurality of opening regions OA. Here, the electrode metal EM can be one of the touch sensor metals.

[0221] Each of the plurality of opening regions OA existing on a touch electrode TE can correspond to the emission region of one or more sub-pixels SP. That is, the plurality of opening regions OA serve as paths through which light emitted from the plurality of sub-pixels SP provided below the touch electrode TE passes upward. The plurality of opening regions OA existing in each touch electrode TE provided in the first region A1 can further increase the transmittance in the first region A1.

[0222] In the touch electrode TE, the actual electrode portion (i.e., the electrode metal EM) other than the plurality of opening regions OA can be located on the bank BANK.

[0223] A method of forming the plurality of touch electrodes TE is as follows. After the electrode metal EM is widely formed in a grid type in the region for forming the plurality of touch electrodes TE, the electrode metal EM is cut along a predetermined cutting line. Here, the predetermined cutting line corresponds to the boundaries of the plurality of touch electrodes TE to be formed. After the cutting process, the plurality of separated electrode metals EM can be formed into the plurality of touch electrodes TE.

[0224] For example, the outer shape of the touch electrode TE can be a diamond shape, a rhombus shape, or a square shape, or can be various shapes such as a triangle, a pentagon, or a hexagon. The outer shape of the touch electrode TE is not limited to these examples and can be various shapes.

[0225] Reference Figure 10 , in the region occupied by the grid type touch electrode TE, one or more dummy metals DM can exist in a form separated from the grid type electrode metal EM.

[0226] The electrode metal EM can be an electrode portion corresponding to the actual touch electrode TE, and can be an electrode to which a touch driving signal can be applied or a touch sensing signal can be sensed. However, although the dummy metal DM can exist in the region of the touch electrode TE, the dummy metal DM can be a floating metal portion to which a touch driving signal cannot be applied and a touch sensing signal cannot be detected. That is, the dummy metal DM can be an electrically floating and isolated metal.

[0227] Therefore, the electrode metal EM can be electrically connected to the touch driving circuit 510, but the dummy metal DM can not be electrically connected to the touch driving circuit 510.

[0228] In each region of all the touch electrodes TE, one or more dummy metals DM can exist in a state disconnected from the electrode metal EM. Alternatively, one or more dummy metals DM can exist only in the regions of some of the touch electrodes TE among all the touch electrodes TE, and can not exist in the regions of other touch electrodes TE.

[0229] Meanwhile, regarding the function of the dummy metal DM, when one or more dummy metals DM do not exist in the region of the touch electrode TE and only the electrode metal EM exists in a grid type, a visibility problem of the outline of the electrode metal EM may appear on the screen.

[0230] In contrast, when one or more dummy metals DM exist in the region of the touch electrode TE, a visibility problem of the outline of the electrode metal EM that may appear on the screen can be prevented.

[0231] In addition, for each touch electrode TE, by controlling the presence or quantity (dummy metal ratio) of the dummy metal DM, the effective electrode area that affects the magnitude of the mutual capacitance of each touch electrode TE can be adjusted. Thus, the magnitude of the mutual capacitance between the first touch electrode X-TE and the second touch electrode Y-TE can be adjusted to improve touch sensitivity.

[0232] On the other hand, by cutting some points from the electrode metal EM formed in the region of one touch electrode TE, the electrode metal portion dropped from the original electrode metal EM can form the dummy metal DM. Therefore, the electrode metal EM and the dummy metal DM can be the same material formed on the same layer.

[0233] Figure 11 It is a view showing the polarizing plate 370 in the display panel 100 of the display device 10 according to an embodiment of the present disclosure.

[0234] Reference Figure 11, the polarizing plate 370 in the display panel 100 of the display device 10 according to an embodiment of the present disclosure may include a first portion POL1 corresponding to the first region A1 and a second portion POL2 corresponding to the second region A2.

[0235] In the polarizing sheet 370, the first portion POL1 may have a higher transmittance than the second portion POL2. The first portion POL1 may have a transmittance equal to or greater than a predetermined threshold transmittance. The second portion POL2 may have a transmittance less than the predetermined threshold transmittance. Here, the predetermined threshold transmittance may be the minimum transmittance that allows each of the functions of the camera 110 and the proximity sensor 120 to be normally performed.

[0236] As described above, since the first portion POL1 of the polarizing plate 370 can be formed with a high transmittance, the transmittance of the first region A1 corresponding to the first portion POL1 of the polarizing plate 370 can be increased. Accordingly, the photographing function of the camera 110 passing through the first region A1 and the sensing function of the proximity sensor 120 passing through the first region A1 can be normally performed.

[0237] Each of the optically transparent adhesive 380 and the cover glass 390 located on the polarizing plate 370 may have a transmittance equal to or greater than a predetermined threshold transmittance. Here, the predetermined threshold transmittance may be the minimum transmittance that allows each of the functions of the camera 110 and the proximity sensor 120 to be normally performed.

[0238] Figure 12 and Figure 13 are views for explaining the position of the light generating device 1200 for the proximity sensor 120 in the display panel 100 of the display device 10 according to an embodiment of the present disclosure.

[0239] Reference Figure 12 and Figure 13 , the display device 10 according to an embodiment of the present disclosure may include a proximity sensor 120 that detects whether a nearby human body or object is approaching. The proximity sensor 120 may detect whether a human body or an object is approaching by receiving light (e.g., infrared light) flowing into the light incident portion IA.

[0240] The display device 10 according to an embodiment of the present disclosure may further include a light generating device 1200 that generates light (e.g., infrared light). The proximity sensor 120 may use the light emitted from the light generating device 1200 to detect a nearby human body or object.

[0241] When the light generating device 1200 generates light, the light generated by the light generating device 1200 and emitted to the outside is reflected by a human body or an object approaching the display device 10. The reflected light flows into the light incident portion IA corresponding to the first region A1 of the display device 10.

[0242] Since the proximity sensor 120 is located below the display panel 100 but in the first region A1 within the display area AA, the proximity sensor 120 can receive light flowing into the light incident portion IA corresponding to the first region A1. The proximity sensor 120 can detect whether a human body or an object is approaching based on the light received through the light incident portion IA. The proximity sensor 120 can be regarded as including a light generating device 1200.

[0243] Reference Figure 12 and Figure 13 As shown in FIGS. 9 and 10, the light generating device 1200 can be located on the encapsulation layer 350 and can be located on the side of the touch sensor layer 360. For example, the light generating device 1200 can be located on any one of the upper left side, upper right side, lower left side, or lower right side of the touch sensor layer 360. The light generating device 1200 can be located at a corner of the display panel 100.

[0244] Reference Figure 13 As shown in FIGS. 10 and 11, the region between the point where the display area AA ends and the point where the inclined surface 900 of the encapsulation layer 350 starts can be referred to as the viewing area VA. The light generating device 1200 can be located on the encapsulation layer 350 but in the viewing area VA between the inclined surface 900 of the encapsulation layer 350 and the display area AA.

[0245] Regarding the placement structure of the light generating device 1200, one or more pads 1311 can be provided at one or more points on the planarized surface of the encapsulation layer 350 in the viewing area VA. One or more buffers 1313 can be bonded to the one or more pads 1311 through an adhesive 1312. The light generating device 1200 can be mounted on the one or more buffers 1313.

[0246] The highest point of the light generating device 1200 can be lower than the highest point of the polarizing plate 370 formed on the touch sensor layer 360. Therefore, there can be an upper space 1314 above the light generating device 1200. The touch sensor layer 360 includes touch sensor metal, which includes a first touch electrode X-TE, a second touch electrode Y-TE, a first bridge pattern X-CL, and a second bridge pattern Y-CL. Some of the touch sensor metal (e.g., the second bridge pattern Y-CL) is provided on the first touch sensor metal layer, and the remaining touch sensor metal (e.g., the first touch electrode X-TE, the second touch electrode Y-TE, the first bridge pattern X-CL) can be provided on a second touch sensor metal layer located above the first touch sensor metal layer. The touch sensor layer 360 can also include an interlayer insulating layer ILD located between the first touch sensor metal layer and the second touch sensor metal layer, and a touch protection layer PAC located on the second touch sensor metal layer.

[0247] Since the light generating device 1200 is lower than the polarizing plate 370 formed on the touch sensor layer 360, the upper space 1314 of the light generating device 1200 corresponds to the hole of the polarizing plate 370.

[0248] Figure 14 It is a view showing the heterogeneous cathode electrode layer 340 of the display device 10 according to an embodiment of the present disclosure.

[0249] Reference Figure 14 , the heterogeneous cathode electrode layer 340 includes a first cathode electrode CE1 and a second cathode electrode CE2.

[0250] The first cathode electrode CE1 may be disposed in the first region A1 and may have a first transmittance equal to or greater than a predetermined threshold transmittance. Here, the first region A1 may overlap with an optical device (e.g., the camera 110, the proximity sensor 120, etc.) and may be a part of the display area AA. The predetermined threshold transmittance may be the minimum transmittance value that allows the functions of the camera 110 and the proximity sensor 120 to be normally performed.

[0251] The second cathode electrode CE2 may be disposed in a second region A2 different from the first region A1 in the display area AA and may have a second transmittance different from the first transmittance of the first cathode electrode CE1. Here, the second transmittance may be lower than the first transmittance and may be less than the predetermined threshold transmittance.

[0252] The first cathode electrode CE1 may be a transparent electrode having a first transmittance higher than the second transmittance. For example, the first cathode electrode CE1 may include one or more of IZO (indium zinc oxide), ITO (indium tin oxide), ZnO (zinc oxide), Ba / Ag, Ca / Ag, graphene, silver nanowires, and carbon nanotubes, etc.

[0253] The second cathode electrode CE2 may be a semi-transparent electrode having a second transmittance lower than the first transmittance. For example, the second cathode electrode CE2 may include one or more of Mg, Ag, etc.

[0254] Figure 15 It is a view showing a wiring structure in the first region A1 where the camera 110 is disposed in the display area AA of the display device 10 according to an embodiment of the present disclosure.

[0255] Reference Figure 15 , external light must be incident for the front shooting function of the camera 110 disposed to overlap with the first region A1 in the display area AA of the display panel 100.

[0256] The first region A1 in which the camera 110 is provided is included in the display region AA where an image is displayed. Accordingly, the wiring SL for display can be provided in the first region A1. The wiring SL in the present specification can be a signal line or an electrode, or can be various structures formed of a metal pattern. That the camera 110 is provided in the first region A1 can have the same meaning as that the camera 110 overlaps with the first region A1.

[0257] Since the first region A1 in which the camera 110 is provided is included in the display region AA where an image is displayed, external light enters through the side opening LOA between the metal wirings SL to reach the front of the camera 110.

[0258] The external light reaching the front surface of the camera 110 can be reflected from the front surface of the camera 110. The external light reflected from the front surface of the camera 110 can be reflected back from the rear surface of the wiring SL, the external light reflected from the rear surface of the wiring SL is reflected again from the front surface of the camera 110, and the external light reflected back from the front surface of the camera 110 can be reflected back from the rear surface of the wiring SL. This reflection process can be continuously repeated.

[0259] The repeated reflection process between the camera 110 and the wiring SL causes light scattering and interference, and makes it impossible to capture a normal image or obtain a high-resolution image through the camera 110.

[0260] Figure 16 FIG. is a view showing a low-reflection structure in the first region A1 in which the camera 110 is provided in the display region AA of the display device 10 according to an embodiment of the present disclosure.

[0261] Reference Figure 16 , the display device 10 according to an embodiment of the present disclosure can provide a low-reflection structure to prevent the repeated reflection process between the camera 110 and the wiring SL.

[0262] Reference Figure 16 , the external light incident through the side opening LOA between the wirings SL having a low-reflection structure can be reflected from the front surface of the camera 110. The external light reflected from the front surface of the camera 110 may not be reflected from the rear surface of the wiring SL having a low-reflection structure, or the reflectance may be significantly reduced. Accordingly, the repeated reflection process between the camera 110 and the wiring SL can be prevented.

[0263] Accordingly, by using the low-reflection structure according to an embodiment of the present disclosure, even if the camera 110 is provided below the display region AA of the display panel 100 and not exposed to the front surface, a high-resolution image can be obtained through the camera 110.

[0264] Next, the low-reflection structure will be described in more detail. However, the low-reflection structure will be described from the perspective of wiring below, but the low-reflection structure can be applied to various types of metal patterns such as electrodes.

[0265] Figure 17 It is a view showing in detail the low-reflection structure in the first region A1 where the camera 110 is provided in the display area AA of the display device 10 according to an embodiment of the present disclosure. Figures 18A to 18C It is a diagram showing the low-reflection structure in the first region A1 where the camera 110 is provided and the wiring structure in the second region A2 where the camera 110 is not provided in the display area AA of the display device 10 according to an embodiment of the present disclosure. Figure 18B It is along Figure 18A The cross-sectional view taken along the line X-X' in. Figure 18C It is along Figure 18A The cross-sectional view taken along the line Y-Y' in.

[0266] Referring to Figure 17 And Figures 18A to 18C , the display device 10 according to an embodiment of the present disclosure may include: a display panel 100 including a display area AA where an image is displayed; a camera 110 for photographing the front of the display panel 100; and so on. The camera 110 may be provided below the display area AA of the display panel 100, and thus, the camera 110 is not exposed to the outside. The camera 110 referred to in this specification may be a camera lens.

[0267] The display panel 100 may include a substrate 320 and a first wiring SL1 located on the substrate 320 and provided in the display area AA.

[0268] The camera 110 may be provided below the display area AA of the display panel 100 so as not to be exposed to the outside and may be positioned to overlap with the first region A1 in the display area AA.

[0269] Referring to Figure 17 , Figure 18A And Figure 18B , all or part of the first wiring SL1 may overlap with the first region A1. Therefore, all or part of the first wiring SL1 may overlap with the camera 110 overlapping with the first region A1.

[0270] The display area AA of the display image on the display panel 100 may include a first region A1 where an optical device such as the camera 110 is provided and a second region A2 different from the first region A1.

[0271] Referring to Figure 17 , Figure 18A And Figure 18B, the first wiring SL1 may include a first part SL1_PART1 overlapping with the first region A1 and a second part SL1_PART2 overlapping with a second region A2 different from the first region A1.

[0272] Reference Figure 17 , Figure 18A and Figure 18B , the first part SL1_PART1 of the first wiring SL1 overlapping with the first region A1 may include: a first semi-transmissive layer L1a located above the substrate 320; a first optical path compensation layer L1b located on the first semi-transmissive layer L1a; and a first metal layer L1c located on the first optical path compensation layer L1b and including a first metal.

[0273] The thickness of the first semi-transmissive layer L1a may be thinner than the thickness of the first optical path compensation layer L1b. For example, the first semi-transmissive layer L1a may have a thickness of 1 nm to 5 nm. The first optical path compensation layer L1b may have a thickness of 30 nm to 120 nm.

[0274] The relationship between the thicknesses of the three layers L1a, L1b, and L1c constituting the first wiring SL1 may be as follows. For example, among the first semi-transmissive layer L1a, the first optical path compensation layer L1b, and the first metal layer L1c, the thickness of the first semi-transmissive layer L1a closest to the camera 110 may be the thinnest. Among the first semi-transmissive layer L1a, the first optical path compensation layer L1b, and the first metal layer L1c, the thickness of the first metal layer L1c closest to the part where external light is incident may be the thickest.

[0275] The first optical path compensation layer L1b may include a conductive transparent material.

[0276] For example, the first optical path compensation layer L1b may include one or more conductive transparent materials such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium zinc tin oxide (IZTO), SiO2, SiNx, etc.

[0277] Reference Figure 17 , external light may enter the side opening LOA of the first wiring SL1 and may be reflected from the front surface (upper surface) of the camera 110 located below the first wiring SL1.

[0278] Reference Figure 17 , a part RL1a of the external light reflected from the front surface of the camera 110 may be reflected from the rear surface of the first semi-transmissive layer L1a. Another part RL1b of the external light reflected from the front surface of the camera 110 may pass through the first semi-transmissive layer L1a and the first optical path compensation layer L1b, and may be reflected from the rear surface of the first metal layer L1c.

[0279] Reference Figure 17, the external light RL1a reflected from the rear surface of the first semi-transmissive layer L1a and the external light RL1b reflected from the rear surface of the first metal layer L1c may have a phase difference that is an odd multiple of 180 degrees.

[0280] Reference Figure 17 , the difference in the optical path lengths between the external light RL1a reflected from the rear surface of the first semi-transmissive layer L1a and the external light RL1b reflected from the rear surface of the first metal layer L1c may be an odd multiple of a half wavelength.

[0281] Therefore, when the external light RL1a reflected from the rear surface of the first semi-transmissive layer L1a and the external light RL1b reflected from the rear surface of the first metal layer L1c meet, destructive interference occurs.

[0282] Therefore, the repeated reflection process between the first wiring SL1 and the camera 110 can be prevented. Thus, light scattering between the first wiring SL1 and the camera 110 can also be prevented.

[0283] Meanwhile, when the vertical positional relationship between the first semi-transmissive layer L1a and the first optical path compensation layer L1b changes or the thickness relationship between the first semi-transmissive layer L1a and the first optical path compensation layer L1b changes, a low-reflection structure may not be formed, and light scattering between the first wiring SL1 and the camera 110 may not be prevented.

[0284] Reference Figure 17 、 Figure 18A and Figure 18B , the second part SL1_PART2 of the first wiring SL1 that overlaps with the second region A2 may include a first metal layer L1c including the first metal, but may not include the first semi-transmissive layer L1a and the first optical path compensation layer L1b. That is, the second part SL1_PART2 of the first wiring SL1 that overlaps with the second region A2 may be a single layer. The second region A2 may be located in the display area AA and may be a region different from the first region A1 that overlaps with the camera 110.

[0285] Reference Figure 17 , the display panel 100 of the display device 10 may further include a second wiring SL2 located above the substrate 320 and disposed in the display area AA. All or part of the second wiring SL2 may overlap with the first region A1 in the display area AA.

[0286] Reference Figure 17 、 Figure 18A and Figure 18C , the second wiring SL2 may include a first part SL2_PART1 that overlaps with the first region A1 and a second part SL2_PART2 that overlaps with the second region A2.

[0287] Reference Figure 17 、 Figure 18A and Figure 18C In reference to Figure 17 , Figure 18A , and Figure 18C , a first portion SL2_PART1 of the second wiring SL2 that overlaps with the first region A1 may include: a second semi-transmissive layer L2a located above the substrate 320; a second optical path compensation layer L2b located on the second semi-transmissive layer L2a; and a second metal layer L2c located on the second optical path compensation layer L2b and including a second metal different from the first metal.

[0288] The first semi-transmissive layer L1a of the first wiring SL1 and the second semi-transmissive layer L2a of the second wiring SL2 may include the same material. The first semi-transmissive layer L1a of the first wiring SL1 and the second semi-transmissive layer L2a of the second wiring SL2 may have corresponding thicknesses.

[0289] The first optical path compensation layer L1b of the first wiring SL1 and the second optical path compensation layer L2b of the second wiring SL2 may include the same material. The first optical path compensation layer L1b of the first wiring SL1 and the second optical path compensation layer L2b of the second wiring SL2 may have corresponding thicknesses.

[0290] Reference Figure 17 、 Figure 18A and Figure 18C In reference to Figure 17 , Figure 18A , and Figure 18C , a second portion SL2_PART2 of the second wiring SL2 that overlaps with the second region A2 may include the second metal layer L2c including the second metal, but may not include the second semi-transmissive layer L2a and the second optical path compensation layer L2b. That is, the second portion SL2_PART2 of the second wiring SL2 that overlaps with the second region A2 may be a single layer. The second region A2 may be located in the display area AA and may be a region different from the first region A1 that overlaps with the camera 110.

[0291] For example, the first metal included in the first metal layer L1c of the first wiring SL1 may include source-drain metal, and the second metal included in the second metal layer L2c of the second wiring SL2 may include gate metal. Conversely, the first metal included in the first metal layer L1c of the first wiring SL1 may include gate metal, and the second metal included in the second metal layer L2c of the second wiring SL2 may include source-drain metal.

[0292] For example, the source-drain metal may be the metal included in the source electrode and the drain electrode of a transistor (e.g., DRT, SCT, etc.) or the metal included in a wiring such as a data line DL. The gate metal may be the metal included in the gate electrode of a transistor (e.g., DRT, SCT, etc.) or the metal included in a wiring such as a gate line GL.

[0293] Reference Figure 17, External light enters the opening LOA between the first wiring SL1 and the second wiring SL2 from the upper part of the substrate 320 and is guided toward the front surface of the camera 110. All or part of the external light may be reflected from the front surface of the camera 110.

[0294] In the region where the first wiring SL1 including three layers Lla, Llb, and Ll c is formed, a part RL1a of the external light reflected from the front surface of the camera 110 may be reflected again from the rear surface of the first semi-transmissive layer L1a. Another part RL1b of the external light reflected from the front surface of the camera 110 may pass through the first semi-transmissive layer L1a and the first optical path compensation layer L1b and may be reflected again from the rear surface of the first metal layer L1c.

[0295] In the region where the first wiring SL1 is formed, the external light RL1a reflected from the rear surface of the first semi-transmissive layer L1a and the external light RL1b reflected from the rear surface of the first metal layer L1c may have a phase difference that is an odd multiple of 180 degrees.

[0296] In the region where the first wiring SL1 is formed, the optical path length difference between the external light RL1a reflected from the rear surface of the first semi-transmissive layer L1a and the external light RL1b reflected from the rear surface of the first metal layer L1c may be an odd multiple of a half wavelength.

[0297] In the region where the first wiring SL1 is formed, when the external light RL1a reflected from the rear surface of the first semi-transmissive layer L1a and the external light RL1b reflected from the rear surface of the first metal layer L1c meet, destructive interference may occur.

[0298] Therefore, in the region where the first wiring SL1 is formed, the repeated reflection process between the first wiring SL1 and the camera 110 can be prevented. Therefore, light scattering between the first wiring SL1 and the camera 110 can also be prevented.

[0299] In addition, in the region where the second wiring SL2 including three layers L2a, L2b, and L2c is formed, a part RL2a of the external light reflected from the front surface of the camera 110 may be reflected again from the rear surface of the second semi-transmissive layer L2a. Another part RL2b of the external light reflected from the front surface of the camera 110 may pass through the second semi-transmissive layer L2a and the second optical path compensation layer L2b and may be reflected again from the rear surface of the second metal layer L2c.

[0300] In the region where the second wiring SL2 is formed, the external light RL2a reflected from the rear surface of the second semi-transmissive layer L2a and the external light RL2b reflected from the rear surface of the second metal layer L2c may have a phase difference that is an odd multiple of 180 degrees.

[0301] In the region where the second wiring SL2 is formed, the optical path length difference between the external light RL2a reflected from the rear surface of the second semi-transmissive layer L2a and the external light RL2b reflected from the rear surface of the second metal layer L2c can be an odd multiple of a half wavelength.

[0302] In the region where the second wiring SL2 is formed, when the external light RL2a reflected from the rear surface of the second semi-transmissive layer L2a and the external light RL2b reflected from the rear surface of the second metal layer L2c meet, destructive interference may occur.

[0303] Therefore, in the region where the second wiring SL2 is formed, the repeated reflection process between the second wiring SL2 and the camera 110 can be prevented, and thus, light scattering between the second wiring SL2 and the camera 110 can also be prevented.

[0304] Figure 19 and Figure 20 is a graph showing the low reflection effect when a low reflection structure is applied in the first region A1 where the camera 110 is provided in the display area AA of the display device 10 according to an embodiment of the present disclosure.

[0305] Figure 19 is a graph showing the results of measuring the reflectance of each of the first wiring SL1 to which the low reflection structure is applied and the first wiring SL1 to which the low reflection structure is not applied.

[0306] The first wiring SL1 to which the low reflection structure is applied may have a multilayer structure. The first wiring SL1 to which the low reflection structure is applied may include a first semi-transmissive layer L1a formed of a thin film, a first optical path compensation layer L1b configured to generate an optical path length difference, and a first metal layer L1c configured to serve as a main wiring. The first wiring SL1 to which the low reflection structure is not applied may have a single-layer structure. That is, the first wiring SL1 without the low reflection structure may include only the first metal layer L1c serving as the main wiring.

[0307] Figure 20 is a graph showing the results of measuring the reflectance of each of the second wiring SL2 to which the low reflection structure is applied and the second wiring SL2 to which the low reflection structure is not applied.

[0308] The second wiring SL2 to which the low reflection structure is applied may have a multilayer structure. The second wiring SL2 to which the low reflection structure is applied may include a second semi-transmissive layer L2a formed of a thin film, a second optical path compensation layer L2b configured to generate an optical path length difference, and a second metal layer L2c configured to serve as a main wiring. The second wiring SL2 to which the low reflection structure is not applied may have a single-layer structure. That is, the second wiring SL2 without the low reflection structure may include only the second metal layer L2c serving as the main wiring.

[0309] Reference Figure 19 In the case of the first wiring SL1 based on the first metal, compared with the first wiring SL1 not provided with the low-reflection structure, the first wiring SL1 provided with the low-reflection structure can have a significantly reduced reflectance in the visible light wavelength band (for example, in the range from about 380 nm to about 800 nm).

[0310] Reference Figure 20 In the case of the second wiring SL2 based on the second metal, compared with the second wiring SL2 not provided with the low-reflection structure, the second wiring SL2 provided with the low-reflection structure can have a significantly reduced reflectance in the visible light wavelength band (for example, in the range from about 380 nm to about 800 nm).

[0311] Figure 21 FIG. is a diagram showing data lines DL and gate lines GL provided with the low-reflection structure in the first region A1 in the display region AA of the display device 10 according to an embodiment of the present disclosure.

[0312] Figure 21 FIG. is a diagram briefly showing a sub-pixel formation region overlapping with the first region A1 and a peripheral region of the sub-pixel formation region. Figure 22 FIG. is a diagram showing a camera 110 and sub-pixels SP provided in the first region A1 within the display region AA of the display device 10 according to an embodiment of the present disclosure.

[0313] Reference Figure 21 The sub-pixel SP can be connected to the data line DL and the gate line GL.

[0314] For example Figures 17 to 20 One of the first wiring SL1 and the second wiring SL2 in can be a row-direction display wiring for display driving, and the other of them can be a column-direction display wiring for display driving. For example, the row-direction display wiring can be a gate line GL or the like, and the column-direction display wiring can be a data line DL or the like.

[0315] As an example, as Figure 21 shown, when the data line DL is a column-direction display wiring and the gate line GL is a row-direction display wiring, the first wiring SL1 can be the data line DL. The second wiring SL2 can be the gate line GL.

[0316] Reference Figure 21 When the sub-pixel SP overlaps with the first region A1, the periphery of the sub-pixel SP can have a transmission region TA through which external light is transmitted.

[0317] Reference Figure 21, all or part of each of the data line DL and the gate line GL connected to the sub-pixel SP may overlap with the first region A1 in which the camera 110 is disposed. Accordingly, all or part of each of the data line DL and the gate line GL may have a low reflection structure.

[0318] As described above, Figure 21 the sub-pixel SP overlaps with the first region A1 in which the camera 110 is disposed.

[0319] Accordingly, transistors (such as DRT, SCT, etc.) and storage capacitors Cst provided in the sub-pixel SP overlapping with the first region A1 may have the above-described low reflection structure. The above-described low reflection structure is a multi-layer structure further including an additional layer under a main metal (for example, a first metal, a second metal, etc.). Here, the additional layer may include an optical path compensation layer configured to generate an optical path length difference and a semi-transmissive layer formed of a thin film.

[0320] The first region A1 overlapping with the camera 110 may have the same resolution as the second region A2. That is, the number of sub-pixels SP provided per unit area in the first region A1 may be the same as the number of sub-pixels SP provided per unit area in the second region A2.

[0321] In order to improve the photographing performance of the camera 110 in the first region A1, it is necessary to increase the transmittance of the first region A1 rather than the transmittance of the second region A2. To this end, the first region A1 overlapping with the camera 110 may have a lower resolution than the second region A2. That is, the number of sub-pixels SP provided per unit area in the first region A1 may be less than the number of sub-pixels SP provided per unit area in the second region A2.

[0322] Figure 23 is a cross-sectional view of the first region A1 and the second region A2 in the display area AA of the display device 10 according to an embodiment of the present disclosure, and Figure 24 is another cross-sectional view of the first region A1 and the second region A2 in the display area AA of the display device 10 according to an embodiment of the present disclosure.

[0323] Referring to Figure 23 and Figure 24 , as described above, the first transistor TR1 and the first capacitor Cst1 in the sub-pixel SP provided in the first region A1 overlapping with the camera 110 may have a low reflection structure.

[0324] That is, the first transistor TR1 and the first capacitor Cst1 in the sub-pixel SP provided in the first region A1 overlapping with the camera 110 may be formed of three layers.

[0325] Referring to Figure 23 andFigure 24 The second transistor TR2 and the second capacitor Cst2 in the sub-pixel SP disposed in the second region A2 that does not overlap with the camera 110 may not have a low-reflection structure. That is, the second transistor TR2 and the second capacitor Cst2 in the sub-pixel SP disposed in the second region A2 that does not overlap with the camera 110 may be formed of a single layer.

[0326] Thereafter, the structures of the first transistor TR1 and the first capacitor Cst1 in the sub-pixel SP disposed in the first region A1 will be described. The structures of the second transistor TR2 and the second capacitor Cst2 in the sub-pixel SP disposed in the second region A2 will be described.

[0327] However, in Figure 23 and Figure 24 it is assumed that the first and second transistors TR1 and TR2 have a top-gate structure. However, as Figure 9 shown, the first transistor TR1 and the second transistor TR2 may have a bottom-gate structure.

[0328] Referring to Figure 23 and Figure 24 the stacked structure of the first region A1 will be described.

[0329] The first transistor TR1 may be located above the substrate 320, may not overlap with the second region A2, and may overlap with the first region A1.

[0330] A buffer layer BUF may be disposed on the substrate 320.

[0331] The active layer ACT1 of the first transistor TR1 may be disposed on the buffer layer BUF.

[0332] A gate insulating layer GI may be disposed on the active layer ACT1 of the first transistor TR1.

[0333] The gate electrode G1 of the first transistor TR1 may be disposed on the gate insulating layer GI.

[0334] A passivation layer PAS may be disposed on the gate insulating layer GI while covering the gate electrode G1.

[0335] The source electrode S1 and the drain electrode D1 of the first transistor TR1 may be disposed on the passivation layer PAS.

[0336] The source electrode S1 of the first transistor TR1 may be connected to the first portion of the active layer ACT1 through a double contact hole of the passivation layer PAS and the gate insulating layer GI. The drain electrode D1 of the first transistor TR1 may be connected to the other second portion of the active layer ACT1 through a double contact hole of the passivation layer PAS and the gate insulating layer GI.

[0337] In the active layer ACT1 of the first transistor TR1, a first portion connected to the source electrode S1 of the first transistor TR1 and a second portion connected to the drain electrode D1 of the first transistor TR1 may be conductor portions. In the active layer ACT1 of the first transistor TR1, a channel of the first transistor TR1 may be formed between the first portion and the second portion.

[0338] The first transistor TR1 may be a driving transistor DRT or a scanning transistor SCT in the sub-pixel SP. As an example, Figure 23 and Figure 24 the first transistor TR1 of may be the driving transistor DRT in the sub-pixel SP. In this case, the source electrode S1 (or the drain electrode D1) of the first transistor TR1 may be electrically connected to the anode electrode AE of the light-emitting element ED.

[0339] An insulating layer PAC may be provided on the passivation layer PAS while covering the source electrode S1 and the drain electrode D1 of the first transistor TR1. The anode electrode AE may be provided on the insulating layer PAC. The anode electrode AE may be connected to the source electrode S1 (or the drain electrode D1) of the first transistor TR1 through a contact hole in the insulating layer PAC.

[0340] A bank BANK defining the emission region of the sub-pixel SP may be provided on the insulating layer PAC.

[0341] Reference Figure 23 and Figure 24 , the first capacitor Cst1 provided in the first region A1 may include two plates PLT1A and PLT1B spaced apart from each other. The first plate PLT1A of the two plates PLT1A and PLT1B may be an electrode in which the same material (semiconductor material) as the active layer ACT1 is in a conductor state. The second plate PLT1B of the two plates PLT1A and PLT1B may be the same gate metal as the gate electrode G1.

[0342] Reference Figure 23 and Figure 24 , a stacked structure for the second region A2 will be described.

[0343] The second transistor TR2 may be located above the substrate 320, may not overlap with the first region A1, and may overlap with the second region A2.

[0344] A buffer layer BUF may be provided on the substrate 320.

[0345] The active layer ACT2 of the second transistor TR2 may be provided on the buffer layer BUF.

[0346] The gate insulating layer GI can be disposed on the active layer ACT2 of the second transistor TR2.

[0347] The gate electrode G2 of the second transistor TR2 can be disposed on the gate insulating layer GI.

[0348] The passivation layer PAS can be disposed on the gate insulating layer GI while covering the gate electrode G2.

[0349] The source electrode S2 and the drain electrode D2 of the second transistor TR2 can be disposed on the passivation layer PAS.

[0350] The source electrode S2 of the second transistor TR2 can be connected to the first portion of the active layer ACT2 through the double contact holes of the passivation layer PAS and the gate insulating layer GI. The drain electrode D2 of the second transistor TR2 can be connected to the other second portion of the active layer ACT2 through the double contact holes of the passivation layer PAS and the gate insulating layer GI.

[0351] In the active layer ACT2 of the second transistor TR2, the first portion connected to the source electrode S2 of the second transistor TR2 and the second portion connected to the drain electrode D2 of the second transistor TR2 can be conductor portions. In the active layer ACT2 of the second transistor TR2, the channel of the second transistor TR2 can be formed between the first portion and the second portion.

[0352] The second transistor TR2 can be the driving transistor DRT or the scanning transistor SCT in the sub-pixel SP. As an example, Figure 23 and Figure 24 the second transistor TR2 of can be the driving transistor DRT in the sub-pixel SP. In this case, the source electrode S2 (or the drain electrode D2) of the second transistor TR2 can be electrically connected to the anode electrode AE of the light-emitting element ED.

[0353] The insulating layer PAC can be disposed on the passivation layer PAS while covering the source electrode S2 and the drain electrode D2 of the second transistor TR2. The anode electrode AE can be disposed on the insulating layer PAC. The anode electrode AE can be connected to the source electrode S2 (or the drain electrode D2) of the second transistor TR2 through the contact hole of the insulating layer PAC.

[0354] The bank BANK defining the emission region of the sub-pixel SP can be disposed on the insulating layer PAC.

[0355] Reference Figure 23, the second capacitor Cst2 disposed in the second region A2 may include two plates PLT2A and PLT2B spaced apart from each other. The first plate PLT2A of the two plates PLT2A and PLT2B may be an electrode in which the same material (semiconductor material) as the active layer ACT2 is in a conductor state. The second plate PLT2B of the two plates PLT2A and PLT2B may be the same gate metal as the gate electrode G2.

[0356] Reference Figure 23 , the first transistor TR1 overlapping all or a part of the camera 110 may have a low reflection structure.

[0357] Reference Figure 23 , the source electrode S1 of the first transistor TR1 may include a first source electrode layer 2331, a second source electrode layer 2332, and a third source electrode layer 2333.

[0358] The first source electrode layer 2331 may have a material and thickness corresponding to the first semi-transmissive layer L1a. The second source electrode layer 2332 may have a material and thickness corresponding to the first optical path compensation layer L1b. The third source electrode layer 2333 may include a first metal as the source-drain metal.

[0359] The drain electrode D1 of the first transistor TR1 may include a first drain electrode layer 2321, a second drain electrode layer 2322, and a third drain electrode layer 2323.

[0360] The first drain electrode layer 2321 may have a material and thickness corresponding to the first semi-transmissive layer L1a. The second drain electrode layer 2322 may have a material and thickness corresponding to the first optical path compensation layer L1b. The third drain electrode layer 2323 may include a first metal as the source-drain metal.

[0361] The gate electrode G1 of the first transistor TR1 may include a first gate electrode layer 2311, a second gate electrode layer 2312, and a third gate electrode layer 2313.

[0362] The first gate electrode layer 2311 may have a material and thickness corresponding to the second semi-transmissive layer L2a. The second gate electrode layer 2312 may have a material and thickness corresponding to the second optical path compensation layer L2b. The third gate electrode layer 2313 may include a second metal as the gate metal.

[0363] Reference Figure 23, the second transistor TR2 that does not overlap with the camera 110 may not have a low-reflection structure (three-layer structure) and may have a general structure (single-layer structure). In some cases, the second transistor TR2 that does not overlap with the camera 110 may also have a low-reflection structure (three-layer structure) similar to that of the first transistor TR1.

[0364] Reference Figure 23 , the source electrode S2 of the second transistor TR2 may include a third source electrode layer 2333 including a main metal, but may not include the first source electrode layer 2331 and the second source electrode layer 2332. The drain electrode D2 of the second transistor TR2 may include a third drain electrode layer 2323 including a main metal, but may not include the first drain electrode layer 2321 and the second drain electrode layer 2322.

[0365] The gate electrode G2 of the second transistor TR2 may include a third gate electrode layer 2313 including a main metal, but may not include the first gate electrode layer 2311 and the second gate electrode layer 2312.

[0366] Reference Figure 23 , the display panel 100 may further include a first capacitor Cst1, which is located above the substrate 320, does not overlap with the second region A2, and overlaps with the first region A1.

[0367] The first capacitor Cst1 may include two plates PLT1A and PLT1B spaced apart from each other. At least one of the two plates PLT1A and PLT1B (e.g., PLT1B) may include a first plate layer 2341, a second plate layer 2342, and a third plate layer 2343. That is, at least one of the two plates PLT1A and PLT1B of the first capacitor Cst1 disposed in the first region A1 overlapping with the camera 110 (e.g., PLT1B) may have a low-reflection structure.

[0368] The first plate layer 2341 may have a material and thickness corresponding to the first semi-transmissive layer L1a. The second plate layer 2342 may have a material and thickness corresponding to the first optical path compensation layer L1b. The third plate layer 2343 may include a first metal as source-drain metal or a second metal as gate metal.

[0369] The display panel 100 may further include a second capacitor Cst2, and the second capacitor Cst2 is located above the substrate 320, does not overlap with the first region A1, and overlaps with the second region A2.

[0370] The second capacitor Cst2 may include two plates PLT2A and PLT2B spaced apart from each other. Each of the two plates PLT2A and PLT2B may be formed as a single layer. The first plate PLT2A of the second capacitor Cst2 may include the same material as the third plate layer 2343 of the first capacitor Cst1, or may be disposed on the same layer as the third plate layer 2343 of the first capacitor Cst1.

[0371] Reference Figure 24 , the display panel 100 may further include a first light-shielding member LS1 disposed under the active layer ACT1 of the first transistor TR1. The first light-shielding member LS1 overlapping the camera 110 in the first region A1 may be a pattern for protecting the channel of the first transistor TR1.

[0372] The first light-shielding member LS1 in the first region A1 overlapping the camera 110 may have a low-reflection structure. That is, the first light-shielding member LS1 in the first region A1 overlapping the camera 110 may include a first light-shielding layer 2401 located above the substrate 320, a second light-shielding layer 2402 located on the first light-shielding layer 2401, and a third light-shielding layer 2403 located on the second light-shielding layer 2402.

[0373] In the first light-shielding member LS1, the first light-shielding layer 2401 may be thinner than the second light-shielding layer 2402. The first light-shielding layer 2401 may have a material corresponding to the first semi-transmissive layer L1a, while the second light-shielding layer 2402 may have a material corresponding to the first optical path compensation layer L1b.

[0374] Reference Figure 24 , the display panel 100 may further include a second light-shielding member LS2 disposed under the active layer ACT2 of the second transistor TR2 and disposed in a second region A2 that does not overlap with the camera 110. The second light-shielding member LS2 that does not overlap with the camera 110 may be a pattern for protecting the channel of the second transistor TR2.

[0375] The second light-shielding member LS2 disposed in the second region A2 that does not overlap with the camera 110 may include the third light-shielding layer 2403, and may not include the first light-shielding layer 2401 and the second light-shielding layer 2402.

[0376] In other words, the second light-shielding member LS2 disposed in the second region A2 that does not overlap with the camera 110 may have a single-layer structure.

[0377] Figure 25 is a diagram showing a case where the camera 110 is located at the center of the display area AA in the display device 10 according to an embodiment of the present disclosure.

[0378] ReferenceFigure 25 , the display area AA of the display panel 100 may include a first area A1 that overlaps with the camera 110 and a second area A2 that is different from the first area A1.

[0379] The first area A1 may be located in the display area AA, but may be located in a boundary area adjacent to the non-display area NA, which is an external area of the display area AA. In this case, only a part of the first area A1 may be surrounded by the second area A2. The first area A1 may exist in the upper part of the display device 10.

[0380] Alternatively, as Figure 25 shown, the first area A1 may be located at the center of the display area AA. In this case, the first area A1 may be surrounded by the second area A2 in all directions.

[0381] The embodiments of the present disclosure described above may provide a display device including a display panel and a camera. The display panel may include: a display area on which an image is displayed; a substrate; and a first wiring located above the substrate and disposed in the display area. The camera may capture the front of the display panel without being exposed to the front surface of the display panel, be disposed below the display area of the display panel, and overlap with the first area in the display area.

[0382] In the display device according to an embodiment of the present disclosure, all or part of the first wiring may overlap with the first area. The first part of the first wiring that overlaps with the first area may include: a first semi-transmissive layer located above the substrate; a first optical path compensation layer located on the first semi-transmissive layer; and a first metal layer located on the first optical path compensation layer and including a first metal.

[0383] In the display device according to an embodiment of the present disclosure, the thickness of the first semi-transmissive layer may be thinner than the thickness of the first optical path compensation layer.

[0384] In the display device according to an embodiment of the present disclosure, among the first semi-transmissive layer, the first optical path compensation layer, and the first metal layer, the thickness of the first semi-transmissive layer closest to the camera may be the thinnest, and the thickness of the first metal layer closest to the part where external light is incident may be the thickest.

[0385] In the display device according to an embodiment of the present disclosure, the first semi-transmissive layer may have a thickness of 1 to 5 nm, and the first optical path compensation layer may have a thickness of 30 to 120 nm.

[0386] In a display device according to an embodiment of the present disclosure, external light may be incident on a side opening of a first wiring and reflected from a front surface of a camera. A part of the external light reflected from the front surface of the camera may be reflected from a rear surface of a first semi-transmissive layer. Another part of the external light reflected from the front surface of the camera may pass through the first semi-transmissive layer and a first optical path compensation layer, and may be reflected from a rear surface of a first metal layer.

[0387] In a display device according to an embodiment of the present disclosure, the external light reflected from the rear surface of the first semi-transmissive layer and the external light reflected from the rear surface of the first metal layer may have a phase difference that is an odd multiple of 180 degrees.

[0388] In a display device according to an embodiment of the present disclosure, the first optical path compensation layer may include a conductive transparent material.

[0389] In a display device according to an embodiment of the present disclosure, a display area may include a first area and a second area other than the first area. The first wiring may include a first part overlapping with the first area and a second part overlapping with a second area different from the first area. The second part of the first wiring may include a first metal layer, and may not include a first semi-transmissive layer and a first optical path compensation layer.

[0390] A display device according to an embodiment of the present disclosure may further include a second wiring located above a substrate and disposed in the display area, wherein all or part of the second wiring may overlap with the first area.

[0391] In a display device according to an embodiment of the present disclosure, a part of the second wiring overlapping with the first area may include: a second semi-transmissive layer located above the substrate; a second optical path compensation layer located on the second semi-transmissive layer; and a second metal layer located on the second optical path compensation layer and including a second metal different from the first metal.

[0392] In a display device according to an embodiment of the present disclosure, the first semi-transmissive layer and the second semi-transmissive layer may include the same material. The first optical path compensation layer and the second optical path compensation layer may include the same material.

[0393] In a display device according to an embodiment of the present disclosure, external light may enter an opening between the first wiring and the second wiring from an upper part of the substrate, and may be directed toward the front of the camera.

[0394] In a display device according to an embodiment of the present disclosure, one of the first wiring and the second wiring may be a row-direction display wiring for display driving, and the other may be a column-direction display wiring for display driving.

[0395] The display device according to an embodiment of the present disclosure may further include a first transistor located above the substrate and overlapping with the first region.

[0396] In the display device according to an embodiment of the present disclosure, the source electrode of the first transistor may include a first source electrode layer, a second source electrode layer, and a third source electrode layer. The first source electrode layer may have a material and a thickness corresponding to those of the first semi-transmissive layer, the second source electrode layer may have a material and a thickness corresponding to those of the first optical path compensation layer, and the third source electrode layer may include a first metal.

[0397] In the display device according to an embodiment of the present disclosure, the drain electrode of the first transistor may include a first drain electrode layer, a second drain electrode layer, and a third drain electrode layer. The first drain electrode layer may have a material and a thickness corresponding to those of the first semi-transmissive layer, the second drain electrode layer may have a material and a thickness corresponding to those of the first optical path compensation layer, and the third drain electrode layer may include a first metal.

[0398] In the display device according to an embodiment of the present disclosure, the gate electrode of the first transistor may include a first gate electrode layer, a second gate electrode layer, and a third gate electrode layer. The first gate electrode layer may have a material and a thickness corresponding to those of the second semi-transmissive layer, the second gate electrode layer may have a material and a thickness corresponding to those of the second optical path compensation layer, and the third gate electrode layer may include a second metal.

[0399] The display device according to an embodiment of the present disclosure may further include a light-shielding member disposed below the active layer of the first transistor.

[0400] In the display device according to an embodiment of the present disclosure, the light-shielding member may include a first light-shielding layer located above the substrate, a second light-shielding layer located on the first light-shielding layer, and a third light-shielding layer located on the second light-shielding layer.

[0401] In the display device according to an embodiment of the present disclosure, the first light-shielding layer may be thinner than the second light-shielding layer, the first light-shielding layer may have a material corresponding to the first semi-transmissive layer, and the second light-shielding layer may have a material corresponding to the first optical path compensation layer.

[0402] The display device according to an embodiment of the present disclosure may further include a second transistor located above the substrate and overlapping with a second region different from the first region in the display area.

[0403] In a display device according to an embodiment of the present disclosure, the source electrode of the second transistor may include a third source electrode layer and may not include a first source electrode layer and a second source electrode layer. The drain electrode of the second transistor may include a third drain electrode layer and may not include a first drain electrode layer and a second drain electrode layer. The gate electrode of the second transistor may include a third gate electrode layer and may not include a first gate electrode layer and a second gate electrode layer.

[0404] A display device according to an embodiment of the present disclosure may further include a first capacitor located above the substrate and overlapping with the first region. The first storage capacitor may include two plates spaced apart from each other. At least one of the two plates may include a first plate layer, a second plate layer, and a third plate layer.

[0405] In a display device according to an embodiment of the present disclosure, the first plate layer may have a material and thickness corresponding to the first semi-transmissive layer. The second plate layer may have a material and thickness corresponding to the first optical path compensation layer. And the third plate layer may include a first metal or a second metal.

[0406] A display device according to an embodiment of the present disclosure may further include a second capacitor located above the substrate and overlapping with a second region different from the first region in the display area. The second storage capacitor may include two plates spaced apart from each other, and each of the two plates of the second storage capacitor may be a single layer.

[0407] A display device according to an embodiment of the present disclosure may further include: a transistor array located in the display area and disposed above the substrate; an anode electrode layer located on the transistor array; a light-emitting layer located on the anode electrode layer; a cathode electrode layer located on the light-emitting layer; and an encapsulation layer located on the cathode electrode layer.

[0408] In a display device according to an embodiment of the present disclosure, the display area may include a first region and a second region. The cathode electrode layer may include a first cathode electrode overlapping with the first region and a second cathode electrode overlapping with a second region different from the first region.

[0409] In a display device according to an embodiment of the present disclosure, the first cathode electrode may be a transparent cathode electrode having a first transmittance equal to or greater than a predetermined threshold transmittance.

[0410] In a display device according to an embodiment of the present disclosure, the first cathode electrode and the second cathode electrode may be separated from each other, and the second cathode electrode may have a second transmittance less than the first transmittance.

[0411] The display device according to an embodiment of the present disclosure may further include: a touch sensor layer disposed on the encapsulation layer and including a plurality of touch electrodes; a touch pad unit located on the substrate and in a non-display area outside the display area; and a plurality of touch lines electrically connected to all or some of the touch electrodes and descending along an inclined surface of the encapsulation layer to be electrically connected to the touch pad unit located in the non-display area.

[0412] The display device according to an embodiment of the present disclosure may further include: a light generating device; and a proximity sensor that uses light emitted from the light generating device to detect a surrounding human body or object, wherein the light generating device may be located on the encapsulation layer and may be located on a side surface of the touch sensor layer, and wherein the proximity sensor may be located under the substrate and overlap with a first area.

[0413] In the display device according to an embodiment of the present disclosure, each touch electrode among the plurality of touch electrodes located in the first area may include a transparent electrode or a mesh-type electrode having one or more openings.

[0414] In the display device according to an embodiment of the present disclosure, the display area may include a first area overlapping with a camera and a second area different from the first area.

[0415] In the display device according to an embodiment of the present disclosure, for example, the first area may be located in the display area and may be located in a boundary area adjacent to a non-display area outside the display area, and only a part of the first area may be surrounded by the second area.

[0416] In the display device according to an embodiment of the present disclosure, as another example, the first area may be located at the center of the display area, and wherein the first area may be surrounded by the second area in all directions.

[0417] The above embodiment of the present disclosure may provide a display device including: a display panel including a display area on which an image is displayed, a substrate, and electrodes located on the substrate and disposed in the display area; and a camera that captures the front of the display panel without being exposed to the front surface of the display panel, is disposed under the display area of the display panel, and overlaps with a first area in the display area.

[0418] In the display device according to an embodiment of the present disclosure, the electrodes may overlap with the first area, and wherein the electrodes may include a semi-transmissive layer located on the substrate, an optical path compensation layer located on the semi-transmissive layer, and a metal layer located on the optical path compensation layer.

[0419] In the display device according to an embodiment of the present disclosure, the thickness of the semi-transmissive layer may be thinner than the thickness of the optical path compensation layer.

[0420] In a display device according to an embodiment of the present disclosure, the electrode may be an electrode of a transistor in a sub-pixel overlapping with a first region, or may be a plate of a capacitor overlapping with the first region.

[0421] According to an embodiment of the present disclosure, a display device may be provided, in which a camera for photographing the front part is disposed under a display panel so that the camera is not exposed to the front part.

[0422] According to an embodiment of the present disclosure, a display device may be provided, which can obtain a high-quality front image even when a camera for photographing the front part is disposed under a display panel so that the camera is not exposed to the front part.

[0423] According to an embodiment of the present disclosure, a display device may be provided, which obtains a high-resolution image by preventing external light from being repeatedly reflected between wirings in a display panel and a camera. The external light is light required for photographing the front part by a camera disposed under the display panel and is light entering the interior of the display panel.

[0424] The above description and the accompanying drawings illustrate the technical idea of the present disclosure, and those skilled in the art can make various modifications and changes, such as combinations, separations, replacements, and changes of configurations, without departing from the essential features of the present disclosure. Therefore, the embodiments disclosed in the present disclosure are not used to limit the technical idea of the present disclosure, but to explain the technical idea of the present disclosure. The technical idea of the present disclosure is not limited to the embodiments. The scope of the present disclosure is defined by the appended claims, and all technical ideas within the scope equivalent thereto should be construed as belonging to the scope of the present disclosure.

Claims

1. A display device, comprising: A display panel, the display panel including a display area on which an image is displayed, a substrate, and a first wiring located above the substrate and disposed in the display area; And A camera, the camera photographing the front portion of the display panel without being exposed to the front surface of the display panel, being disposed below the substrate in the display area of the display panel, and overlapping with a first area disposed in the display area, wherein the first wiring overlaps with the first area, A first portion of the first wiring that overlaps with the first area includes a first semi-transmissive layer located above the substrate, a first optical path compensation layer located on the first semi-transmissive layer, and a first metal layer located on the first optical path compensation layer and including a first metal, Wherein the display area includes the first area and a second area, Wherein the first wiring includes the first portion overlapping with the first area and a second portion overlapping with the second area, and Wherein the second portion of the first wiring includes the first metal layer and does not include the first semi-transmissive layer and the first optical path compensation layer.

2. The display device according to claim 1, wherein, The first semi-transmissive layer has a thickness less than the thickness of the first optical path compensation layer, and Wherein the first optical path compensation layer includes a conductive transparent material.

3. The display device according to claim 2, wherein, Among the first semi-transmissive layer, the first optical path compensation layer, and the first metal layer, the thickness of the first semi-transmissive layer closest to the camera is the thinnest, and the thickness of the first metal layer closest to the portion where external light is incident is the thickest.

4. The display device according to claim 1, wherein, External light is incident on a side opening of the first wiring and is reflected from the front surface of the camera, Wherein a part of the external light reflected from the front surface of the camera is reflected from the rear surface of the first semi-transmissive layer, Wherein another part of the external light reflected from the front surface of the camera passes through the first semi-transmissive layer and the first optical path compensation layer and is reflected from the rear surface of the first metal layer, and Wherein the external light reflected from the rear surface of the first semi-transmissive layer and the external light reflected from the rear surface of the first metal layer have a phase difference that is an odd multiple of 180 degrees.

5. The display device according to claim 1, further comprising a second wiring, the second wiring being located above the substrate and disposed in the display area, Among them, The second wiring overlapping with the first area, Wherein a portion of the second wiring that overlaps with the first area includes a second semi-transmissive layer located above the substrate, a second optical path compensation layer located on the second semi-transmissive layer, and a second metal layer located on the second optical path compensation layer and including a second metal, and Wherein the first semi-transmissive layer and the second semi-transmissive layer include the same material, the first optical path compensation layer and the second optical path compensation layer include the same material, and Wherein external light enters an opening between the first wiring and the second wiring from an upper portion of the substrate and is directed toward the front portion of the camera.

6. The display device according to claim 5, wherein, One of the first wiring and the second wiring is a row-direction display wiring for display driving, and the other is a column-direction display wiring for display driving.

7. The display device according to claim 5, further comprising a first transistor having a source electrode, a drain electrode, and a gate electrode, located above the substrate and overlapping with the first region. Among them, The source electrode includes a first source electrode layer, a second source electrode layer, and a third source electrode layer. The first source electrode layer has a material and a thickness corresponding to those of the first semi-transmissive layer. The second source electrode layer has a material and a thickness corresponding to those of the first optical path compensation layer. The third source electrode layer includes the first metal. Wherein, the drain electrode includes a first drain electrode layer, a second drain electrode layer, and a third drain electrode layer. The first drain electrode layer has a material and a thickness corresponding to those of the first semi-transmissive layer. The second drain electrode layer has a material and a thickness corresponding to those of the first optical path compensation layer. The third drain electrode layer includes the first metal, and Wherein, the gate electrode includes a first gate electrode layer, a second gate electrode layer, and a third gate electrode layer. The first gate electrode layer has a material and a thickness corresponding to those of the second semi-transmissive layer. The second gate electrode layer has a material and a thickness corresponding to those of the second optical path compensation layer. The third gate electrode layer includes the second metal.

8. The display device according to claim 7, further comprising a light-shielding member disposed below the active layer of the first transistor. Among them, The light-shielding member includes a first light-shielding layer located above the substrate, a second light-shielding layer located on the first light-shielding layer, and a third light-shielding layer located on the second light-shielding layer. Wherein, the first light-shielding layer is thinner than the second light-shielding layer, and Wherein, the first light-shielding layer has a material corresponding to that of the first semi-transmissive layer, and the second light-shielding layer has a material corresponding to that of the first optical path compensation layer.

9. The display device according to claim 7, further comprising a second transistor having a source electrode, a drain electrode, and a gate electrode, located above the substrate and overlapping with a second region in the display region different from the first region. Among them, The source electrode includes the third source electrode layer and does not include the first source electrode layer and the second source electrode layer. Wherein, the drain electrode includes the third drain electrode layer and does not include the first drain electrode layer and the second drain electrode layer, and Wherein, the gate electrode includes the third gate electrode layer and does not include the first gate electrode layer and the second gate electrode layer.

10. The display device according to claim 5, further comprising a first capacitor located above the substrate and overlapping with the first region. Among them, The first capacitor includes two plates spaced apart from each other. At least one of the two plates includes a first plate layer, a second plate layer, and a third plate layer, and wherein the first plate layer has a material and a thickness corresponding to the first semi-transmissive layer, the second plate layer has a material and a thickness corresponding to the first optical path compensation layer, and the third plate layer includes the first metal or the second metal.

11. The display device according to claim 10, further comprising a second capacitor, the second capacitor being located above the substrate and overlapping with the second region in the display region, Among them, the second capacitor includes two plates spaced apart from each other, and each of the two plates of the second capacitor is a single layer.

12. The display device according to claim 1, further comprising: a transistor array located in the display region and disposed above the substrate; an anode electrode layer located on the transistor array; a light-emitting layer located on the anode electrode layer; a cathode electrode layer located on the light-emitting layer; and an encapsulation layer located on the cathode electrode layer, wherein the cathode electrode layer includes a first cathode electrode overlapping with the first region and a second cathode electrode overlapping with the second region, wherein the first region and the second region constitute the display region.

13. The display device according to claim 12, wherein, The first cathode electrode is a transparent cathode electrode having a first transmittance equal to or greater than a predetermined threshold transmittance, and wherein the second cathode electrode has a second transmittance less than the first transmittance.

14. The display device according to claim 12, further comprising: a touch sensor layer disposed on the encapsulation layer and including a plurality of touch electrodes; a touch pad unit located on the substrate and in a non-display region outside the display region; and a plurality of touch lines, the plurality of touch lines being electrically connected to all or part of the touch electrodes and descending along an inclined surface of the encapsulation layer to be electrically connected to the touch pad unit located in the non-display region.

15. The display device according to claim 14, further comprising: a light generating device; and a proximity sensor, the proximity sensor using light emitted from the light generating device to detect a surrounding human body or object, wherein the light generating device is located on the encapsulation layer and on a side surface of the touch sensor layer, and wherein the proximity sensor is located below the substrate and overlaps with the first region.

16. The display device according to claim 1, wherein, The display region includes the first region and the second region overlapping with the camera, wherein the first region is located at the center of the display region, and wherein the first region is surrounded by the second region.

17. A display device, comprising: a display panel, the display panel including a display region on which an image is displayed, a substrate, and electrodes located above the substrate and disposed in the display region; and a camera, the camera photographing the front of the display panel without being exposed to the front surface of the display panel, being disposed below the substrate in the display region of the display panel, and overlapping with a first region in the display region Wherein, the electrode overlaps with the first region, and Wherein, a first portion of the electrode that overlaps with the first region includes a semi-transmissive layer located above the substrate, an optical path compensation layer located on the semi-transmissive layer, and a metal layer located on the optical path compensation layer, Wherein, the electrode further includes a second portion that overlaps with a second region in the display region, and Wherein, the second portion includes the metal layer and does not include the semi-transmissive layer and the optical path compensation layer.

18. The display device according to claim 17, wherein, The semi-transmissive layer has a thickness thinner than that of the optical path compensation layer.

19. The display device according to claim 17, wherein, The electrode is an electrode of a transistor in a sub-pixel that overlaps with the first region, or a plate of a capacitor that overlaps with the first region.

Images