Semiconductor bare die and method for manufacturing semiconductor device using different connection methods

By placing bonded wires on the semiconductor die and allowing large clips to be placed, the problem of reducing the cooling area of ​​semiconductor devices is solved, and an efficient double-sided cooling effect is achieved.

CN112928033BActive Publication Date: 2025-04-25INFINEON TECH AUSTRIA AG
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Patent Information

Application Number
CN202011408187.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-12-05
Filing Date
2020-12-04
Publication Date
2025-04-25
Estimated Expiration
2040-12-04

AI Technical Summary

Technical Problem

During the manufacturing process of semiconductor transistor devices, the reduction in the size of the semiconductor die leads to a decrease in the size of the clip, thereby reducing the area available for cooling on the top side of the package.

Method used

By placing bond wires on the semiconductor die and allowing large clips to be placed on the die, especially on the source or emitter of the semiconductor MOSFET die. The bonding wire is at least partially disposed under the clip for efficient double-sided cooling.

Benefits of technology

It realizes that the solder wire is placed and allows efficient double-sided cooling while keeping the size of the clip unchanged, solving the problem of reducing the cooling area of ​​semiconductor devices.

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Abstract

A semiconductor device (10) comprises: a carrier (11); a first external electrical contact (12) and a second external electrical contact (13); a semiconductor die (14), comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad (14.1) arranged on the first main surface, a second contact pad (14.2) arranged on the second main surface, and a third contact pad (14.3) arranged on the second main surface, wherein the semiconductor die (14) comprises a vertical transistor and is arranged on the carrier (11) with its first main surface; a clip (15) connecting the second contact pad (14.2) to the second external electrical contact (13); and a first welding wire (16) connected to the first external electrical contact (12), wherein the first welding wire (16) is connected between the third contact pad (14.3) and the first external electrical contact (12), and the first welding wire (16) is at least partially arranged below the clip (15).
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Description

Technical Field

[0001] The present disclosure relates to a method for manufacturing a semiconductor device and a semiconductor device. The present disclosure particularly relates to a semiconductor device comprising: a semiconductor die having contact pads on both main surfaces, a clip connected to one of the contact pads, and a bonding wire, wherein the bonding wire is at least partially arranged under the clip. Background Art

[0002] In the field of manufacturing semiconductor transistor devices, improvements in semiconductor die technology have resulted in a reduction in the size of the semiconductor die. This leaves less room on top of the die for soldering or sintering the clip to the source electrode. In order to accommodate gate wire bonds or current sense wire bonds, the size of the clip must generally be reduced. This reduces the area available for top-side cooling of the package. Summary of the invention

[0003] A first aspect of the present disclosure relates to a method for manufacturing a semiconductor device, comprising: providing a carrier; providing first and second external electrical contacts; providing a semiconductor die, which comprises a first main surface, a second main surface opposite to the first main surface, a first contact pad arranged on the first main surface, a second contact pad arranged on the second main surface, and a third contact pad arranged on the second main surface, wherein the semiconductor die comprises a vertical transistor; connecting the semiconductor die with its first main surface to the carrier; providing a first bonding wire; connecting one end of the first bonding wire to the third contact pad and the other end to the first external electrical contact; providing a clip; connecting the first end of the clip to the second contact pad and the second end to the second external electrical contact; wherein connecting the semiconductor die to the carrier and connecting the clip between the second contact pad and the second external electrical contact are performed by different connection methods.

[0004] A second aspect of the present disclosure relates to a method for manufacturing a semiconductor device, comprising: providing a carrier; providing first and second external electrical contacts; providing a semiconductor die, comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad arranged on the first main surface, a second contact pad arranged on the second main surface, and a third contact pad arranged on the second main surface, wherein the semiconductor die comprises a vertical transistor; connecting the semiconductor die with its first main surface to the carrier; providing a first bonding wire; connecting one end of the first bonding wire to the third contact pad and the other end to the first external electrical contact; providing a clip; connecting the first end of the clip to the second contact pad and the second end to the second external electrical contact; wherein connecting the first bonding wire between the first external electrical contact and the third contact pad is performed between the step of connecting the semiconductor die to the carrier and the step of connecting the clip between the second contact pad and the second external electrical contact.

[0005] A third aspect of the present disclosure relates to a semiconductor device, comprising: a carrier; a first external electrical contact and a second external electrical contact; a semiconductor die, comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad arranged on the first main surface, a second contact pad arranged on the second main surface, and a third contact pad arranged on the second main surface, wherein the semiconductor die comprises a vertical transistor and is arranged on the carrier with its first main surface; a clip, which connects the second contact pad to the second external electrical contact; and a first welding wire connected to the first external electrical contact, wherein the first welding wire is connected between the third contact pad and the first external electrical contact, and the first welding wire is at least partially arranged below the clip. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The accompanying drawings are included to provide a further understanding of the embodiments, and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate the embodiments and, together with the description, are used to explain the principles of the embodiments. Other embodiments and many of the expected advantages of the embodiments will be readily understood as they become better understood by reference to the following detailed description.

[0007] The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.

[0008] Figure 1 A flow chart for explaining a method for manufacturing a semiconductor device according to the first aspect is shown.

[0009] Figure 2 A flow chart for explaining a method for manufacturing a semiconductor device according to the second aspect is shown.

[0010] Figure 3A and 3B A top view (A) of an exemplary semiconductor device according to the third aspect is shown, and Figure 3A FIG. 1 is a view of a semiconductor device viewed from the left side (B), wherein a normal gap is provided between the bonding wire and the clip.

[0011] Figure 4 Shows Figure 3B A semiconductor device, wherein an encapsulation material is applied to the semiconductor device such that an upper main surface of the clip is exposed to the outside.

[0012] Figure 5 Shows Figure 3A A view of a semiconductor device from the right side with a larger gap between the bond wire and the clip. DETAILED DESCRIPTION

[0013] The present disclosure enables placement of wire bonds on the die and allows a large clip to be placed over the die, particularly on the source or emitter of a semiconductor MOSFET die. The large clip can be overmolded or exposed to allow efficient double-sided cooling.

[0014] In the detailed description that follows, reference is made to the accompanying drawings that form a part of the specification, in which specific embodiments in which the present disclosure may be practiced are illustrated by way of illustration. In this regard, directional terms such as "top," "bottom," "front," "back," "leading," "trailing," etc. are used with reference to the orientation of the described drawings. Because the components of the embodiments may be positioned in many different orientations, the directional terms are used for illustrative purposes and are by no means restrictive. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description should not be construed as restrictive, and the scope of the present disclosure is defined by the appended claims.

[0015] It should be understood that the features of the various exemplary embodiments described herein may be combined with each other, unless specifically stated otherwise.

[0016] As used in this specification, the terms "combined", "attached", "connected", "coupled" and / or "electrically connected / electrically coupled" do not mean that the elements or layers must be directly in contact with each other; rather, intervening elements or intervening layers may be provided between the elements being "combined", "attached", "connected", "coupled" and / or "electrically connected / electrically coupled", respectively. However, according to the present disclosure, the above terms may also optionally have a specific meaning, that is, the elements or layers are directly in contact with each other, that is, no intervening elements or layers are provided between the elements being "combined", "attached", "connected", "coupled" and / or "electrically connected / electrically coupled", respectively.

[0017] In addition, the term "on..." used in a component, element or material layer is formed or located "on" a surface may be used herein to indicate that the component, element or material layer is "indirectly" located (e.g., placed, formed, deposited, etc.) on the surface while allowing one or more additional components, elements or layers to be arranged between the surface and the component, element or material layer. However, the term "on..." used in a component, element or material layer is formed or located "on" a surface may also optionally have the specific meaning that the component, element or material layer is "directly" located (e.g., placed, formed, deposited, etc.) on the surface, such as in direct contact with the surface.

[0018] A connection method using a solder material such as diffusion solder or solder paste will be described below. Such a solder material may include Sn or any Sn alloy with two or more other elements, such as Sn / Au, Sn / Ag or Sn / Au / Ag alloy.

[0019] Detailed description

[0020] Figure 1 A flow chart for explaining a method for manufacturing a semiconductor device according to the first aspect is shown.

[0021] Figure 1 The method comprises: providing a carrier (110); providing first and second external electrical contacts (120); providing a semiconductor die comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad arranged on the first main surface, a second contact pad arranged on the second main surface, and a third contact pad arranged on the second main surface, wherein the semiconductor die comprises a vertical transistor (130); connecting the semiconductor die with its first main surface to the carrier (140); providing a first bonding wire (150); connecting one end of the first bonding wire to the third contact pad and the other end to the first external electrical contact (160); providing a clip (170); connecting a first end of the clip to the second contact pad and a second end to the second external electrical contact (180); wherein connecting the semiconductor die to the carrier and connecting the clip between the second contact pad and the second external electrical contact (190) are performed by different connection methods.

[0022] according to Figure 1 In one embodiment of the method, the semiconductor die is connected to the carrier by one of diffusion soldering, in particular flux-free diffusion soldering, and sintering, in particular silver sintering. Accordingly, the clip is then connected to the second contact pad by another method other than diffusion soldering or sintering. The other method may be, for example, one of using a solder paste and using a silver conductive adhesive.

[0023] according to Figure 1 In one embodiment of the method, the connecting of the clip to the second contact pad is performed by one of using a solder paste and using a silver conductive adhesive. Accordingly, the semiconductor die is connected to the carrier by another method other than using a solder paste or using a silver conductive adhesive. The other method may be, for example, one of diffusion soldering, in particular flux-free diffusion soldering, and sintering, in particular silver sintering.

[0024] according to Figure 1 In one embodiment of the method, connecting the first bonding wire between the first external electrical contact and the third contact pad is performed between the steps of connecting the semiconductor die to the carrier and connecting the clip between the second contact pad and the second external electrical contact.

[0025] according to Figure 1An embodiment of the method of connecting a first bonding wire to a first external electrical contact and connecting the clip to a second contact pad in such a way that the first bonding wire is at least partially disposed under the clip is performed. Examples thereof will be shown in conjunction with FIGS. 3-5 and the accompanying description of the semiconductor device presented.

[0026] Figure 2 A flow chart for explaining a method for manufacturing a semiconductor device according to the second aspect is shown.

[0027] Figure 2 The method comprises: providing a carrier (210); providing first and second external electrical contacts (220); providing a semiconductor die comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad arranged on the first main surface, a second contact pad arranged on the second main surface, and a third contact pad arranged on the second main surface, wherein the semiconductor die comprises a vertical transistor (230); connecting the semiconductor die to the carrier (240) with its first main surface; providing a first welding wire (250); connecting one end of the first welding wire to the third contact pad and the other end to the first external electrical contact (260); providing a clip (270); connecting a first end of the clip to the second contact pad and a second end to the second external electrical contact (280); wherein connecting the first welding wire between the first external electrical contact and the third contact pad (290) is performed between the step of connecting the semiconductor die to the carrier and the step of connecting the clip between the second contact pad and the second external electrical contact.

[0028] according to Figure 2 In one embodiment of the method, connecting the semiconductor die to the carrier and connecting the clip to the second contact pad are performed by different connection methods.

[0029] according to Figure 2 In one embodiment of the method, the semiconductor die is connected to the carrier by diffusion soldering, in particular flux-free diffusion soldering, and sintering, in particular silver sintering. The clip is then connected to the second contact pad not by diffusion soldering and sintering, but by, for example, using a solder paste and using a silver conductive adhesive.

[0030] according to Figure 2 In one embodiment of the method, the clip is connected to the second contact pad by using one of a solder paste and using a silver conductive adhesive. Then, the semiconductor die can be connected to the carrier not by using a solder paste or using a silver conductive adhesive, but by, for example, one of diffusion soldering, in particular flux-free diffusion soldering, and sintering, in particular silver sintering.

[0031] according to Figure 2An embodiment of the method of connecting a first bonding wire to a first external electrical contact and connecting the clip to a second contact pad in such a way that the first bonding wire is at least partially disposed under the clip is performed. Examples thereof will be shown in conjunction with FIGS. 3-5 and the accompanying description of the semiconductor device presented.

[0032] Figure 3A and 3B The semiconductor device 10 is shown before packaging, in which the bond wires are partially disposed under the clip with a normal gap between them.

[0033] More specifically, Figure 3A and 3B The semiconductor device 10 comprises: a carrier 11; a first external electrical contact 12 and a second external electrical contact 13; a semiconductor die 14 comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad 14.1 arranged on the first main surface, a second contact pad 14.2 arranged on the second main surface, and a third contact pad 14.3 arranged on the second main surface, wherein the semiconductor die 14 comprises a vertical transistor and is arranged on the carrier 11 with its first main surface; a clip 15, which connects the second contact pad 14.2 to the second external electrical contact 13; and a first welding wire 16 connected to the first external electrical contact 12, wherein the first welding wire 16 is connected between the third contact pad 14.3 and the first external electrical contact 12, and the first welding wire 16 is at least partially arranged below the clip 15.

[0034] The present disclosure, in particular the semiconductor device according to the third aspect, enables the placement of bonding wires 16 on the semiconductor die 14 and allows the placement of a relatively wide clip 15 on the semiconductor die 14, in particular on the second contact pad 14.2 of the semiconductor MOSFET or IGBT die. In this way, most of the surface of the second contact pad 14.2 can be covered with the clip 15, so that a higher current can be conducted through the transistor.

[0035] According to one embodiment of the semiconductor device 10, Figure 3A and 3B As is the case in the embodiment shown, the first bonding line 16 is only partially arranged under the clip 15. However, the first bonding line can also be arranged completely under the clip 15.

[0036] According to one embodiment of the semiconductor device 10, Figure 3A and 3B As is the case in the embodiment shown, the second contact pad 14.2 is covered over a large part of its surface by the clip 15. According to another example thereof, the second contact pad 14.2 can also be completely covered by the clip 15.

[0037] According to one embodiment of the semiconductor device 10, the first external electrical contact 12 is disposed at a lower height level than the second external electrical contact 13 in order to provide a larger gap between the bonding wire and the clip. Figure 5 Embodiments thereof are shown and explained.

[0038] According to an embodiment of the semiconductor device 10 , the first contact pad 14 . 1 is a drain contact pad, the second contact pad 14 . 2 is a source contact pad and the third contact pad 14 . 3 is a gate contact pad.

[0039] According to an embodiment of the semiconductor device 10, the fourth contact pad is disposed on the second main surface, wherein the semiconductor device further comprises a third external electrical contact 18 and a second bonding wire 17, wherein the second bonding wire 17 is connected between the fourth contact pad and the third external electrical contact 18. According to another example thereof, the fourth contact pad is a source sensing contact pad.

[0040] According to an embodiment of the semiconductor device 10, the semiconductor device further comprises an encapsulation material 19 applied to the die pad 11, the semiconductor die 14 and the first external electrical contact 12 and the second external electrical contact 13. The encapsulation material can in particular be applied such that the lower main surface of the die pad 11 and the upper main surface of the clip 15 are not covered by the encapsulation material 19. Such a semiconductor device package allows efficient double-sided cooling on the customer side. This will be described later in conjunction with Figure 4 Specific examples thereof are shown and explained.

[0041] According to an embodiment of the semiconductor device 10 , the semiconductor die 14 is one of a silicon die, a silicon carbide die, and a gallium nitride die.

[0042] According to an embodiment of the semiconductor device 10 , the carrier 11 and the first 12 and the second 13 external electrical contacts and, if present, the third external electrical contact 18 are part of a leadframe.

[0043] According to one embodiment of the semiconductor device 10 , the bonding wires 16 and 17 are made of Cu or Al.

[0044] Figure 4 A cross-sectional view of a packaged semiconductor device 20 is shown.

[0045] More specifically, Figure 4 The semiconductor device 20 of FIG. 3 includes the semiconductor device 10 of FIG. 3 , but with an additional encapsulation material 19 applied thereto. The encapsulation material may be applied to the semiconductor device 10 by, for example, transfer molding or compression molding, and may include, for example, any kind of resin material, such as epoxy resin. Figure 4As can be seen in FIG, the encapsulation material 19 is applied so that the lower main face of the die pad 11 and the upper main face of the clip 15 are not covered by the encapsulation material 19. This allows the customer to cool the semiconductor device efficiently, because he can on the one hand dissipate heat downwards via the substrate, such as a PCB, and on the other hand place a suitable heat sink on top of the clip 15 to further dissipate heat via the clip 15.

[0046] Figure 5 Yet another exemplary semiconductor device according to the third aspect is shown having a larger gap between the bond wire and the clip.

[0047] More specifically, Figure 5 Shows something like Figure 3A and 3B The semiconductor device 20 is shown as a semiconductor device 10, so the same reference numerals are used for the same or similar components. In addition, the semiconductor device 20 includes another feature, namely an external electrical contact 21, which includes a first part 21.1 to be connected to the clip 15 and a second part 21.2 to be connected to the first bonding wire 26. Figure 5 3 . It can be seen that the second portion 21.2 is lowered compared to the first portion 21.1, so that the second portion 21.2 is located in a plane closer to the die pad 11 than the first portion. This allows the manufacture of a semiconductor device 20 with a larger gap or space between the bonding wire 26 and the clip 15. There may also be a further lowered portion of the external electrical contact 21, which may be connected to a further bonding wire 17. It should be added that this embodiment is particularly suitable for the case where Al bonding wires are used, since their thickness may be in the range of 70 to 80 μm. In the case of Cu bonding wires with a thickness of 45 to 55 μm, the embodiment according to FIG. 3 may be used.

[0048] In addition, although a particular feature or aspect of an embodiment of the present disclosure may have been disclosed with respect to one of several embodiments, such feature or aspect may be combined with one or more other features or aspects of other embodiments, which may be desirable and advantageous for any given or specific application. In addition, for the terms "including," "having," "with," or other variations thereof used in the detailed description or claims, these terms are intended to be open-ended inclusions in a manner similar to the term "comprising." In addition, it should be understood that the embodiments of the present disclosure may be implemented as discrete circuits, partially integrated circuits, or fully integrated circuits or programming devices. Moreover, the term "exemplary" means only an example, not the best or optimal. It should also be understood that for the purpose of simplicity and ease of understanding, the features and / or elements depicted herein are shown in specific sizes relative to each other, and the actual sizes may be substantially different from those shown herein.

[0049] Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that various alternative and / or equivalent embodiments may replace the specific embodiments shown and described without departing from the scope of the present disclosure. The present application is intended to cover any adjustments or modifications to the specific embodiments discussed herein. Therefore, the present disclosure is limited only by the claims and their equivalents.

Claims

1. A method (100) for manufacturing a semiconductor device, comprising: - Step (110): providing a carrier; - Step (120): providing a first external electrical contact arranged in a first plane and a second external electrical contact arranged in a second plane, wherein the first plane is lower than the second plane and the first plane is closer to the carrier than the second plane; - Step (130): providing a semiconductor die comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad arranged on the first main surface, a second contact pad arranged on the second main surface, and a third contact pad arranged on the second main surface, wherein the semiconductor die comprises a vertical transistor; - Step (140): connecting the semiconductor die with its first main face to a carrier; - Step (150): providing a first bonding wire; - Step (160): Connecting one end of a first bonding wire to the third contact pad and the other end to the first external electrical contact; - Step (170): providing a clip; - Step (180): Connecting a first end of the clip to a second contact pad and a second end to a second external electrical contact; - Step ( 190 ): connecting the semiconductor die to the carrier by means of different connection methods and connecting the clip between the second contact pad and the second external electrical contact.

2. The method according to claim 1, wherein: Connecting the semiconductor die to the carrier is performed by one of diffusion soldering and sintering.

3. The method according to claim 1, wherein: Connecting the semiconductor die to the carrier is performed by silver sintering.

4. A method according to any one of the preceding claims, wherein: The clip is connected to the second contact pad by one of using a solder paste and using a silver conductive adhesive.

5. The method according to any one of claims 1 to 3, wherein: Connecting a first bonding wire between the first external electrical contact and the third contact pad is performed between the step of connecting the semiconductor die to the carrier and the step of connecting the clip between the second contact pad and the second external electrical contact.

6. The method according to claim 1, wherein: Connecting the first bond wire to the first external electrical contact and connecting the clip to the second contact pad is performed in such a way that the first bond wire is at least partially disposed under the clip.

7. A method (200) for manufacturing a semiconductor device, comprising: - Step (210): providing a carrier; - Step (220): providing a first external electrical contact arranged in a first plane and a second external electrical contact arranged in a second plane, wherein the first plane is lower than the second plane and the first plane is closer to the carrier than the second plane; - Step (230): providing a semiconductor die comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad arranged on the first main surface, a second contact pad arranged on the second main surface, and a third contact pad arranged on the second main surface, wherein the semiconductor die comprises a vertical transistor; - Step (240): connecting the semiconductor die with its first main face to a carrier; - Step (250): providing a first bonding wire; - Step (260): Connecting one end of a first bonding wire to the third contact pad and the other end to the first external electrical contact; - Step (270): providing a clip; - Step (280): Connecting a first end of the clip to a second contact pad and a second end to a second external electrical contact; - Step (290): connecting a first bonding wire between the first external electrical contact and the third contact pad between the step of connecting the semiconductor die to the carrier and the step of connecting the clip between the second contact pad and the second external electrical contact.

8. The method according to claim 7, wherein: Connecting the semiconductor die to the carrier and connecting the clip to the second contact pad are performed by different connection methods.

9. The method according to claim 7 or 8, wherein: Connecting the semiconductor die to the carrier is performed by one of diffusion soldering and sintering.

10. The method according to claim 7 or 8, wherein: Connecting the semiconductor die to the carrier is performed by silver sintering.

11. The method according to claim 7 or 8, wherein: Connecting the clip to the second contact pad is performed by one of using a solder paste and using a silver conductive adhesive.

12. The method according to claim 7 or 8, wherein: Connecting the first bond wire to the first external electrical contact and connecting the clip to the second contact pad is performed in such a way that the first bond wire is at least partially disposed under the clip.

13. A semiconductor device (10), comprising: - a carrier (11); - a first external electrical contact (12) and a second external electrical contact (13); - a semiconductor die (14), comprising a first main surface, a second main surface opposite to the first main surface, a first contact pad (14.1) arranged on the first main surface, a second contact pad (14.2) arranged on the second main surface, and a third contact pad (14.3) arranged on the second main surface, wherein the semiconductor die (14) comprises a vertical transistor and is arranged with its first main surface on a carrier (11); - a clip (15) which connects the second contact pad (14.2) to the second external electrical contact (13); and A first bonding wire (16) connected to the first external electrical contact (12), wherein the first bonding wire (16) is connected between the third contact pad (14.3) and the first external electrical contact (12), the first bonding wire (16) being at least partially arranged below the clip (15).

14. The semiconductor device (10) according to claim 13, wherein: The first weld line (16) is only partially disposed below the clip (15).

15. The semiconductor device (10) according to claim 13 or 14, wherein: The second contact pad (14.2) is covered over most of its surface by the clip (15).

16. The semiconductor device (10) according to claim 15, wherein: The second contact pad (14.2) is completely covered by the clip (15).

17. The semiconductor device (10) according to any one of claims 13 to 14 and 16, wherein: The first external electrical contact (12) is arranged at a lower height level than the second external electrical contact (13).

18. The semiconductor device (10) according to any one of claims 13 to 14 and 16, wherein: The first contact pad (14.1) is a drain contact pad, the second contact pad (14.2) is a source contact pad, and the third contact pad (14.3) is a gate contact pad.

19. The semiconductor device (10) according to any one of claims 13 to 14 and 16, wherein: The semiconductor device (10) further comprises: a fourth contact pad disposed on the second major surface; a third external electrical contact (18); and The second welding line (17), The second bonding wire (17) is connected between the fourth contact pad and the third external electrical contact portion (18).

20. The semiconductor device (10) according to claim 19, wherein: The fourth contact pad is a source sense contact pad.

21. The semiconductor device (10) according to any one of claims 13 to 14, 16 to 20, wherein: The semiconductor die (14) is one of a silicon die, a silicon carbide die and a gallium nitride die.

22. The semiconductor device (10) according to any one of claims 13 to 14, 16 to 20, wherein: The semiconductor device (10) further comprises: An encapsulation material (19) is applied to the carrier (11), the semiconductor die (14) and the first external electrical contact (12) and the second external electrical contact (13) such that the lower main surface of the carrier (11) and the upper main surface of the clip (15) are not covered by the encapsulation material (19).

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