A surge current suppression circuit for high voltage input

Abstract

The invention relates to the technical field of surge suppression, and discloses a surge current suppression circuit with high voltage input, comprising: an N-type MOS tube VT1, a capacitor C1 and a resistor R2; the drain of the N-type MOS tube VT1 is connected to an input power supply, the source of the N-type MOS tube VT1 is connected to an output end, one end of the capacitor C1 is connected to the source of the N-type MOS tube VT1, the other end of the capacitor C1 is connected to one end of a resistor R2, and the other end of the resistor R2 is grounded; and further comprising a negative feedback circuit, one end of the negative feedback circuit is connected to the resistor R2, and the other end is connected to a gate of the N-type MOS tube VT1, and is used for controlling the conduction depth of the N-type MOS tube VT1, so as to accurately control the surge current. The surge current suppression circuit with high voltage input accurately controls the surge current, and solves the problem of poor consistency of the surge current caused by a wide input voltage range and a wide operating temperature range.

Description

Technical Field

[0001] The present invention relates to the technical field of surge suppression, and in particular to a surge current suppression circuit with high voltage input. Background Art

[0002] The existing inrush current suppression circuit is a power resistor or a thermistor. When the power is turned on, the input capacitor is charged through the power resistor or thermistor. When the capacitor reaches a certain voltage value or the power-on delay time, the switch tube is turned on to short-circuit the two sides of the power resistor or thermistor. This plays a role in suppressing inrush current when the power is turned on.

[0003] In existing inrush current suppression circuits, when the input voltage changes over a wide range, especially when the input voltage is high, the inrush current increases with the voltage. When operating over a wide temperature range, the inrush current suppression consistency is poor and the inrush current cannot be accurately controlled. The cause of this problem is the characteristics of the power resistor and the thermistor. Summary of the invention

[0004] The present invention provides a surge current suppression circuit with high voltage input, which suppresses surge current by controlling the conduction depth of a main loop MOS tube through a negative feedback circuit, thereby accurately controlling the surge current.

[0005] The present invention provides a surge current suppression circuit for high voltage input, comprising: an N-type MOS tube VT1, a capacitor C1 and a resistor R2;

[0006] The drain of the N-type MOS tube VT1 is connected to the input power supply, the source of the N-type MOS tube VT1 is connected to the output terminal, one end of the capacitor C1 is connected to the source of the N-type MOS tube VT1, the other end of the capacitor C1 is connected to one end of the resistor R2, and the other end of the resistor R2 is grounded;

[0007] It also includes a negative feedback circuit, one end of which is connected to the resistor R2, and the other end is connected to the gate of the N-type MOS tube VT1, which is used to control the conduction depth of the N-type MOS tube VT1, thereby accurately controlling the surge current.

[0008] The negative feedback circuit comprises: a sampling amplifier circuit, a comparison circuit and an optical coupling circuit;

[0009] The sampling and amplifying circuit is used to sample the voltage across the resistor R2 and amplify the voltage to obtain a voltage V1;

[0010] A comparison circuit, used for comparing the voltage V1 with a reference voltage V2;

[0011] The optocoupler circuit controls the conduction depth of the N-type MOS tube VT1 according to the output signal of the comparison circuit, thereby accurately controlling the surge current.

[0012] The sampling and amplifying circuit includes: a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7 and an operational amplifier U1A, one end of the resistor R3, one end of the resistor R4 and one end of the resistor R5 are all connected to the non-inverting input terminal of the operational amplifier U1A, the other end of the resistor R3 is grounded, the other end of the resistor R4 and the operational amplifier U1A are both connected to the power supply VCC, the other end of the resistor R5 is connected to the resistor R2, one end of the resistor R6 is connected to the inverting input terminal of the operational amplifier U1A, the other end of the resistor R6 is grounded, the resistor R7 is connected between the output terminal and the inverting input terminal of the operational amplifier U1A, and the output terminal of the operational amplifier U1A is connected to the comparison circuit.

[0013] The comparison circuit includes: a comparator U1B, an inverting input terminal of the comparator U1B is connected to a voltage V1, and is connected to an output terminal of an operational amplifier U1A through a resistor R8, a non-inverting input terminal of the comparator U1B is connected to a reference voltage V2, a resistor R12 and a capacitor C2 are connected in sequence between the inverting input terminal and the output terminal of the comparator U1B, and the output terminal of the comparator U1B is connected to an input terminal of an optocoupler circuit through a resistor R19.

[0014] The optocoupler circuit includes: an optocoupler U2, a resistor R20, a resistor R21 and a diode D1, the optocoupler U2 is connected to a power supply VCC, the resistor R19 is connected to the primary side of the optocoupler U2, the secondary side of the optocoupler U2 is connected in parallel with the resistor R21, one end of the resistor R21 is connected to the source of the N-type MOS tube VT1, the other end of the resistor R21 is connected to one end of the resistor R20, the other end of the resistor R20 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the gate of the N-type MOS tube VT1 through the resistor R1.

[0015] The power supply switching circuit also includes: a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, an N-type MOS tube VT2 and an N-type MOS tube VT3, one end of the resistor R13 is connected to the control signal KZ, the other end of the resistor R13 is connected to the gate of the N-type MOS tube VT2, the resistor R14 is connected between the gate and the source of the N-type MOS tube VT2, the source of the N-type MOS tube VT2 is grounded, one end of the resistor R15 is connected to the drain of the N-type MOS tube VT2, and the resistor R The other end of 15 is connected to one end of resistor R16 and connected to power supply VCC, the other end of resistor R16 outputs reference voltage V2, resistor R18 is connected between source and drain of N-type MOS tube VT2, resistor R18 is connected between gate and source of N-type MOS tube VT3, source of N-type MOS tube VT3 is grounded, source of N-type MOS tube VT3 is connected to primary side of optocoupler U2 through capacitor C3, drain of N-type MOS tube VT3 is connected to the other end of resistor R16 through resistor R17 and connected to positive input terminal of operational amplifier U1B.

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] The present invention controls the conduction depth of the main loop MOS tube through a negative feedback circuit to suppress the surge current, thereby accurately controlling the surge current.

[0018] The present invention samples and amplifies the voltage across a resistor R2 to obtain V1 through a sampling and amplifying circuit, and compares the voltage V1 with a reference voltage V2 through a comparison circuit; controls the conduction depth of an N-type MOS tube VT1 through an optical coupling circuit according to an output signal of the comparison circuit, thereby accurately controlling the surge current, and solving the problem of poor consistency of the surge current caused by a wide input voltage range and a wide operating temperature range. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A circuit diagram of a surge current suppression circuit with high voltage input provided by the present invention. DETAILED DESCRIPTION

[0020] The following is combined with Figure 1 , a specific embodiment of the present invention is described in detail, but it should be understood that the protection scope of the present invention is not limited by the specific embodiment.

[0021] like Figure 1 As shown, an embodiment of the present invention provides a surge current suppression circuit for high voltage input, comprising: an N-type MOS tube VT1, a capacitor C1 and a resistor R2;

[0022] The drain of the N-type MOS tube VT1 is connected to the input power supply, the source of the N-type MOS tube VT1 is connected to the output terminal, one end of the capacitor C1 is connected to the source of the N-type MOS tube VT1, the other end of the capacitor C1 is connected to one end of the resistor R2, and the other end of the resistor R2 is grounded;

[0023] It also includes a negative feedback circuit, one end of which is connected to the resistor R2, and the other end is connected to the gate of the N-type MOS tube VT1, which is used to control the conduction depth of the N-type MOS tube VT1, thereby accurately controlling the surge current.

[0024] The negative feedback circuit comprises: a sampling amplifier circuit, a comparison circuit and an optical coupling circuit;

[0025] The sampling and amplifying circuit is used to sample the voltage across the resistor R2 and amplify the voltage to obtain a voltage V1;

[0026] A comparison circuit, used for comparing the voltage V1 with a reference voltage V2;

[0027] The optocoupler circuit controls the conduction depth of the N-type MOS tube VT1 according to the output signal of the comparison circuit, thereby accurately controlling the surge current.

[0028] The sampling and amplifying circuit includes: a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7 and an operational amplifier U1A, one end of the resistor R3, one end of the resistor R4 and one end of the resistor R5 are all connected to the non-inverting input terminal of the operational amplifier U1A, the other end of the resistor R3 is grounded, the other end of the resistor R4 and the operational amplifier U1A are both connected to the power supply VCC, the other end of the resistor R5 is connected to the resistor R2, one end of the resistor R6 is connected to the inverting input terminal of the operational amplifier U1A, the other end of the resistor R6 is grounded, the resistor R7 is connected between the output terminal and the inverting input terminal of the operational amplifier U1A, and the output terminal of the operational amplifier U1A is connected to the comparison circuit.

[0029] The comparison circuit includes: a comparator U1B, an inverting input terminal of the comparator U1B is connected to a voltage V1, and is connected to an output terminal of an operational amplifier U1A through a resistor R8, a non-inverting input terminal of the comparator U1B is connected to a reference voltage V2, a resistor R12 and a capacitor C2 are connected in sequence between the inverting input terminal and the output terminal of the comparator U1B, and the output terminal of the comparator U1B is connected to an input terminal of an optocoupler circuit through a resistor R19.

[0030] The optocoupler circuit includes: an optocoupler U2, a resistor R20, a resistor R21 and a diode D1, the optocoupler U2 is connected to a power supply VCC, the resistor R19 is connected to the primary side of the optocoupler U2, the secondary side of the optocoupler U2 is connected in parallel with the resistor R21, one end of the resistor R21 is connected to the source of the N-type MOS tube VT1, the other end of the resistor R21 is connected to one end of the resistor R20, the other end of the resistor R20 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the gate of the N-type MOS tube VT1 through the resistor R1.

[0031] The power supply switching circuit also includes: a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, an N-type MOS tube VT2 and an N-type MOS tube VT3, one end of the resistor R13 is connected to the control signal KZ, the other end of the resistor R13 is connected to the gate of the N-type MOS tube VT2, the resistor R14 is connected between the gate and the source of the N-type MOS tube VT2, the source of the N-type MOS tube VT2 is grounded, one end of the resistor R15 is connected to the drain of the N-type MOS tube VT2, and the resistor R The other end of 15 is connected to one end of resistor R16 and connected to power supply VCC, the other end of resistor R16 outputs reference voltage V2, resistor R18 is connected between source and drain of N-type MOS tube VT2, resistor R18 is connected between gate and source of N-type MOS tube VT3, source of N-type MOS tube VT3 is grounded, source of N-type MOS tube VT3 is connected to primary side of optocoupler U2 through capacitor C3, drain of N-type MOS tube VT3 is connected to the other end of resistor R16 through resistor R17 and connected to positive input terminal of operational amplifier U1B.

[0032] like Figure 1As shown in the circuit diagram, compared with the prior art, the N-type MOS tube VT1 in the main circuit works in the linear region, the conduction depth of the N-type MOS tube VT1 is controlled to suppress the surge current, the maximum value of the surge current is set, and the surge current can be accurately controlled.

[0033] Specifically, the main circuit of the present invention includes an N-type MOS tube VT1, an output capacitor C1, and a resistor R2. Resistors R3-R7 and an operational amplifier U1A sample and amplify the voltage across resistor R2 to obtain V1. Resistors R16 and R17 divide the voltage to generate a reference voltage V2. Voltages V1 and V2 are compared by an operational amplifier U1B, and the output end of the operational amplifier U1B is connected to the primary side of the optocoupler U2 through a resistor R19, and the resistors R20, R21, and a diode D1 connected to the secondary side of the optocoupler U2 are then connected to the driving pin of the N-type MOS tube VT1 of the main circuit through a resistor R1. Resistors R13-R18 and N-type MOS tubes VT2 and VT3 form a switching circuit.

[0034] Working principle: Since the capacity of capacitor C1 is large, when there is no inrush current suppression circuit, the voltage across C1 is 0V before power-on. When power is suddenly added, the impact current on the input side is very large, so an inrush current suppression circuit is designed.

[0035] The N-type MOS tube VT1 works in the linear region, and the conduction depth of the N-type MOS tube VT1 is controlled to change the resistance value of the N-type MOS tube VT1 to adjust the size of the surge current. The operational amplifiers U1A, U1B, optocoupler U2, N-type MOS tube VT1 and other devices form a negative feedback circuit, and the resistor R2 is sampled and amplified to obtain the voltage V1, which is compared with the reference voltage V2 through the operational amplifier UIB to control the optocoupler U2. The optocoupler U2 can control the conduction depth of the main circuit N-type MOS tube VT1. And the size of the surge current can be accurately set by resistors R16 and R17.

[0036] Resistors R13-R18 and N-type MOS tubes VT2 and VT3 are switching circuits. When the power supply is just started, the control signal KZ is low level, and the V2 voltage is the voltage divided by resistors R16 and R17, and the set surge current suppression point is small. When the charging of capacitor C1 is basically completed, the voltage drop detection circuit detects that the voltage drop across the N-type MOS tube VT1 is less than a certain range, so that the control signal KZ is switched to a high level, V2 = VCC, and the circuit is switched to a large current mode.

[0037] The switching circuit changes the voltage of V2 through a KZ signal to control the power supply to work in low current mode and high current mode. The power supply works in low current mode when it starts, and switches to high current mode after the startup is completed.

[0038] The present invention can be used not only for high voltage input but also for low voltage input power supply.

[0039] The present invention can accurately suppress surge current by using operational amplifiers U1A, U1B, optocoupler U2, N-type MOS tube VT1, resistors and other devices in coordination.

[0040] The present invention relates to a surge current suppression circuit, which is a part of a DC high voltage power supply. When a DC power supply input terminal has a large capacitance, a large surge current will be generated when the DC input is suddenly increased. The present invention is used to suppress the power-on impact current of the DC high voltage input. The present invention can make the power supply meet the relevant requirements of GJB181A-2003 on input current, and play a role in protecting the power supply and front-end equipment.

[0041] The present invention suppresses surge current by controlling the conduction depth of the main loop MOS tube, sets the maximum value of surge current, and can accurately control surge current, thereby solving the problem of poor consistency of surge current caused by wide input voltage range and wide operating temperature range.

[0042] The present invention controls the conduction depth of the main loop MOS tube through a negative feedback circuit to suppress the surge current, thereby accurately controlling the surge current.

[0043] The present invention samples and amplifies the voltage across a resistor R2 to obtain V1 through a sampling and amplifying circuit, and compares the voltage V1 with a reference voltage V2 through a comparison circuit; controls the conduction depth of an N-type MOS tube VT1 through an optical coupling circuit according to an output signal of the comparison circuit, thereby accurately controlling the surge current, and solving the problem of poor consistency of the surge current caused by a wide input voltage range and a wide operating temperature range.

[0044] The above disclosures are only several specific embodiments of the present invention. However, the embodiments of the present invention are not limited thereto. Any changes that can be conceived by those skilled in the art should fall within the protection scope of the present invention.

Claims

1. A surge current suppression circuit for high voltage input, characterized in that: include: N-type MOS tube VT1, capacitor C1 and resistor R2; The drain of the N-type MOS tube VT1 is connected to the input power supply, the source of the N-type MOS tube VT1 is connected to the output terminal, one end of the capacitor C1 is connected to the source of the N-type MOS tube VT1, the other end of the capacitor C1 is connected to one end of the resistor R2, and the other end of the resistor R2 is grounded; It also includes a negative feedback circuit, one end of which is connected to the resistor R2, and the other end is connected to the gate of the N-type MOS tube VT1, which is used to control the conduction depth of the N-type MOS tube VT1, so as to accurately control the surge current; The negative feedback circuit comprises: a sampling amplifier circuit, a comparison circuit and an optical coupling circuit; The sampling and amplifying circuit is used to sample the voltage across the resistor R2 and amplify it to obtain a voltage V1; A comparison circuit, used for comparing the voltage V1 with a reference voltage V2; The optocoupler circuit controls the conduction depth of the N-type MOS tube VT1 according to the output signal of the comparison circuit, thereby accurately controlling the surge current; The sampling and amplifying circuit comprises: a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7 and an operational amplifier U1A, one end of the resistor R3, one end of the resistor R4 and one end of the resistor R5 are all connected to the non-inverting input terminal of the operational amplifier U1A, the other end of the resistor R3 is grounded, the other end of the resistor R4 and the operational amplifier U1A are both connected to the power supply VCC, the other end of the resistor R5 is connected to the resistor R2, one end of the resistor R6 is connected to the inverting input terminal of the operational amplifier U1A, the other end of the resistor R6 is grounded, the resistor R7 is connected between the output terminal and the inverting input terminal of the operational amplifier U1A, and the output terminal of the operational amplifier U1A is connected to the comparison circuit; The comparison circuit includes: a comparator U1B, an inverting input terminal of the comparator U1B is connected to a voltage V1, and is connected to an output terminal of an operational amplifier U1A through a resistor R8, a non-inverting input terminal of the comparator U1B is connected to a reference voltage V2, a resistor R12 and a capacitor C2 are connected between the inverting input terminal and the output terminal of the comparator U1B in sequence, and an output terminal of the comparator U1B is connected to an input terminal of an optocoupler circuit through a resistor R19; The optocoupler circuit includes: an optocoupler U2, a resistor R20, a resistor R21 and a diode D1, the optocoupler U2 is connected to a power supply VCC, the resistor R19 is connected to the primary side of the optocoupler U2, the secondary side of the optocoupler U2 is connected in parallel with the resistor R21, one end of the resistor R21 is connected to the source of the N-type MOS tube VT1, the other end of the resistor R21 is connected to one end of the resistor R20, the other end of the resistor R20 is connected to the cathode of the diode D1, and the anode of the diode D1 is connected to the gate of the N-type MOS tube VT1 through the resistor R1; Also included is a power switching circuit; The power switching circuit includes: a resistor R13, a resistor R14, a resistor R15, a resistor R16, a resistor R17, a resistor R18, an N-type MOS tube VT2 and an N-type MOS tube VT3, one end of the resistor R13 is connected to the control signal KZ, the other end of the resistor R13 is connected to the gate of the N-type MOS tube VT2, the resistor R14 is connected between the gate and the source of the N-type MOS tube VT2, the source of the N-type MOS tube VT2 is grounded, one end of the resistor R15 is connected to the drain of the N-type MOS tube VT2, the other end of the resistor R15 is connected to the drain of the N-type MOS tube VT2, and the The end is connected to one end of the resistor R16 and is also connected to the power supply VCC, the other end of the resistor R16 outputs the reference voltage V2, the resistor R18 is connected between the source and drain of the N-type MOS tube VT2, the resistor R18 is connected between the gate and source of the N-type MOS tube VT3, the source of the N-type MOS tube VT3 is grounded, the source of the N-type MOS tube VT3 is connected to the primary side of the optocoupler U2 through the capacitor C3, the drain of the N-type MOS tube VT3 is connected to the other end of the resistor R16 through the resistor R17 and is also connected to the non-inverting input terminal of the operational amplifier U1B; Resistors R13~R18 and N-type MOS tubes VT2 and VT3 form a switching circuit. When the power supply is just started, the control signal KZ is at a low level, and the V2 voltage is the divided voltage of resistors R16 and R17. The set surge current suppression point is small. When the capacitor C1 is fully charged, the voltage drop detection circuit detects that the voltage drop across the N-type MOS tube VT1 is less than the set range, so that the control signal KZ is switched to a high level, V2=VCC, and the circuit switches to a high current mode. The switching circuit changes the voltage of V2 through a KZ signal to control the power supply to work in a low current mode and a high current mode. The power supply works in a low current mode when it is started, and switches to a high current mode after the startup is completed.

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