Image sensor including SPAD photodiode

Abstract

The present disclosure relates to an image sensor comprising a plurality of avalanche photodiodes having a structure formed inside and on top of a semiconductor substrate (101) of a first conductivity type having a front side and a back side, wherein: a groove (107) vertically extends in the substrate (101) from its front side to its back side, the groove (107) having the shape of a continuous grid laterally delimiting a plurality of substrate islands (109) in a top view, each island (109) defining a pixel (PIX), the pixel (PIX) comprising a single individually controllable avalanche photodiode and comprising a doped region (119) for collecting an avalanche signal of the pixel photodiode.

Description

Technical Field

[0001] The present disclosure relates generally to the field of avalanche photodiodes (also known as SPAD "single photon avalanche diodes") for detecting individual photons. The present disclosure is more particularly directed to image sensors that include multiple SPAD photodiodes. Background Art

[0002] A SPAD photodiode is essentially formed by a PN junction that is reverse biased at a voltage greater than its avalanche threshold. When no charge is present in the depletion region, or space charge region, of the PN junction, the photodiode is in a non-conducting pseudo-steady state. When photogenerated charge is injected into the depletion region, if the displacement velocity of the charge in the depletion region is high enough—that is, if the electric field in the depletion region is strong enough—the photodiode can avalanche. A single photon can therefore generate a measurable electrical signal with a very short response time. SPAD photodiodes are capable of detecting very low-intensity radiation and are particularly useful for single-photon detection and photon counting.

[0003] The applicant's previously filed patent application WO2018050996 describes an embodiment of a SPAD photodiode having a vertical PN junction capable of efficiently collecting charges photogenerated deep in the substrate.

[0004] Considered herein is the formation of an image sensor comprising a plurality of SPAD photodiodes having vertical PN junctions. Summary of the Invention

[0005] An embodiment provides an image sensor including a plurality of avalanche photodiodes having vertical PN junctions formed inside and on top of a semiconductor substrate of a first conductivity type having a front surface and a back surface, wherein:

[0006] - trenches extending vertically in the substrate from its front side to its back side, said trenches having the shape of a continuous grid in top view and laterally delimiting a plurality of substrate islands (or blocks), each island (or block) defining a pixel, said pixel comprising a single, individually controllable avalanche photodiode having a vertical PN junction and comprising a doped region for collecting an avalanche signal of said pixel photodiode;

[0007] - the sidewalls of the trench are coated with a first semiconductor layer having a conductivity type opposite to that of the collecting region; and

[0008] A conductive region extends in the trench, said conductive region being in contact with the surface of the first semiconductor layer opposite to the substrate.

[0009] According to an embodiment, the collecting areas of different pixels are electrically insulated from each other.

[0010] According to an embodiment, the electrically conductive area is opaque to the radiation to be detected.

[0011] According to an embodiment, the electrically conductive area is made of metal.

[0012] According to an embodiment, the conductive region includes copper or tungsten.

[0013] According to an embodiment, the first semiconductor layer is made of doped polysilicon.

[0014] According to an embodiment, the first semiconductor layer has the second conductivity type, and the junction between the side surface of each substrate island and the first semiconductor layer defines an avalanche region of an avalanche photodiode of the sensor.

[0015] According to an embodiment, the sensor further comprises in an upper portion of each substrate island a peripheral annular region of the second conductivity type having a doping level lower than a doping level of the first semiconductor layer, extending laterally from the sidewalls of the trench.

[0016] According to an embodiment, in each island, a collecting region is of the same conductivity type as that of the substrate, but with a higher doping level, located in a central portion of said island.

[0017] According to an embodiment, the sensor further includes a central region of the second conductivity type in the central part of each substrate island, wherein the central region forms a collection region of the island and extends vertically from its front side to its back side in the substrate, and the junction between the side surface of the central region of the second conductivity type and the substrate defines the avalanche region of the avalanche photodiode of the sensor.

[0018] According to an embodiment, the first semiconductor layer has a first conductivity type.

[0019] According to an embodiment, the sensor further comprises in the upper part of each substrate island an annular region of the second conductivity type having a lower doping level than the central region of the second conductivity type, extending laterally from sidewalls of the central region of the second conductivity type.

[0020] According to an embodiment, the substrate is covered at its front side with a second semiconductor layer of the first conductivity type having a doping level lower than that of the substrate, the trench passing through the second layer.

[0021] According to an embodiment, the substrate rests on its rear side on a third semiconductor layer of the second conductivity type, the trench emerging in or on the third layer or through the third layer.

[0022] According to an embodiment, the doping level of the third layer is lower than the doping level of the first layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the following description of specific embodiments, given by way of illustration and not limitation, with reference to the accompanying drawings, in which:

[0024] Figure 1A is a cross-sectional view illustrating an example of an image sensor according to an embodiment;

[0025] Figure 1B yes Figure 1A Top view of the sensor;

[0026] Figure 2 is a cross-sectional view illustrating another example of the image sensor according to the embodiment;

[0027] Figure 3 is a cross-sectional view illustrating another example of the image sensor according to the embodiment;

[0028] Figure 4A is a cross-sectional view illustrating another example of the image sensor according to the embodiment; and

[0029] Figure 4B yes Figure 4A Top view of the sensor. DETAILED DESCRIPTION

[0030] In the various figures, similar features are always designated by similar reference numerals. Specifically, common structural and / or functional features in various embodiments may have the same reference numerals and may be provided with the same structural, dimensional, and material properties.

[0031] For the sake of clarity, only the steps and elements that are useful for understanding the embodiments described herein are illustrated and described in detail. In particular, the circuit for controlling the SPAD photodiode of the described sensor, in particular including a circuit for biasing the PN junction of the SPAD photodiode, a readout circuit capable of detecting the avalanche of the SPAD photodiode, and a quenching circuit having the function of interrupting the avalanche of the SPAD photodiode once it has begun, is not described in detail, the described embodiments are compatible with the conventional implementation of such circuits, or based on the guidance of this disclosure, the formation of such circuits is within the capabilities of those skilled in the art.

[0032] Unless otherwise indicated, when two elements are referred to as being connected together, this means a direct connection without any intervening elements other than conductors, and when two elements are referred to as being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0033] In the following description, when referring to terms that modify absolute positions (such as terms "front", "back", "top", "bottom", "left", "right", etc.) or terms that modify relative positions (such as terms "above", "below", "upper", "lower", etc.), or terms that modify directions (such as terms "horizontal", "vertical", etc.), unless otherwise specified, it refers to the orientation of the cross-sectional view of the accompanying drawings.

[0034] Unless otherwise specified, the expressions "substantially", "essentially" and "approximately" mean within 10%, preferably within 5%, or when they relate to angles, or absolute or relative angular orientations, within 10 degrees, preferably within 5 degrees.

[0035] Figure 1A and 1B An example of an image sensor 100 according to an embodiment is shown schematically and partially. Figure 1B is the top view of the sensor, Figure 1A It is along Figure 1B Cross-sectional view of plane AA.

[0036] The sensor 100 includes, for example, a plurality of identical or similar pixels PIX (within manufacturing dispersion). Each pixel PIX includes a SPAD photodiode having a vertical PN junction. The different pixels PIX of the sensor are, for example, individually addressable, that is, the SPAD photodiode of each pixel PIX can be controlled independently of the SPAD photodiodes of other pixels PIX.

[0037] The sensor 100 includes a substantially horizontal upper surface and a lower surface (at Figure 1A A semiconductor substrate 101 is provided (in an orientation). Substrate 101 may be made of silicon, such as single crystal silicon. In this example, substrate 101 is p-type doped (P). In the example shown, substrate 101 rests on an n-type doped layer 103 (N-), which has its upper surface in contact with the lower surface of the substrate.

[0038] In this example, layer 13 itself rests on a P-type doped layer 105, which has its upper surface in contact with the lower surface of layer 103. By way of example, layer 105 can be a supporting substrate with layer 103, on whose upper surface substrate 101 is then formed by epitaxy. By way of example, substrate 101 has a thickness in the range of 3 to 25 μm. Layer 103 has a thickness in the range of 500 nm to 3 μm, for example.

[0039] Sensor 100 includes trenches 107 extending vertically downward in substrate 101 from its upper or front surface to its lower or back surface. In this example, trenches 107 appear on the upper surface of layer 103 or in layer 103. In top view, trenches 107 have the shape of a continuous grid that laterally delimits a plurality of islands 109 of substrate 101. In this example, each island 109 is completely surrounded by trenches 107 and laterally separated from adjacent islands 109. As an example, in top view ( Figure 1B ), trenches 107 include horizontal and vertical trenches that are all regularly distributed across the sensor surface. Island 109 thus all have substantially the same square or rectangular shape (in top view) and the same size. Each island 109 has a width in the range of 2 to 10 μm, for example. In this example, each pixel PIX includes a single island 109.

[0040] The sidewalls and bottom of trench 107 are coated with an N-type semiconductor layer 113 (N). Layer 113 is made, for example, of doped polysilicon. In this example, the doping level of layer 113 is greater than that of layer 103. Layer 113 extends, for example, entirely along the height of the sidewalls of trench 107 and entirely along the length of the sidewalls of trench 107. Layer 113 contacts the side surfaces of each substrate island 109, which extends entirely along the height of island 109 and entirely along the perimeter of island 109. During fabrication, the structure is subjected to a diffusion anneal, which causes the dopants of layer 113 to diffuse into substrate 101, for example, over a distance ranging from 200 nm to 1 μm.

[0041] In this example, sensor 100 includes an N-type annular peripheral region 111 (N-) in the upper portion of each island 109. The doping level of region 111 is lower than the doping level of layer 113. In a top view, region 111 extends around the entire perimeter of the island. Vertically, region 111 extends from the upper surface of substrate 101 downward to a depth less than the depth of the substrate, e.g., in the range of 100 to 1,500 nm. Laterally, region 111 extends from the edge of trench 107 delimiting island 109 toward the center of the island. The width of region 111 is less than the total width of the island, e.g., in the range of 100 to 1,500 nm.

[0042] Each substrate island 109 defines a SPAD photodiode of a pixel PIX of the sensor. The anode region of the SPAD photodiode is formed by the P-type doped substrate portion 101 of the island. The cathode region of the SPAD photodiode includes a portion of the N-type layer 113 in contact with the side surface of the island 109, an N-type region (not shown) diffused from layer 113 in the peripheral region of the island 109, an N-type ring region 111 of the island, and a portion of the N-type region 103 in contact with the lower surface of the island 109. The PN junction formed between the side surface of the island 109 and layer 113 defines the avalanche region of the SPAD photodiode, that is, the portion of the PN junction of the photodiode where avalanche can be initiated by a single photogenerated charge.

[0043] In the upper portion of trench 107, layer 113 contacts the outer surface of N-type annular region 111. At this level, the PN junction of the photodiode thus corresponds to the interface between region 111 and substrate 101. Due to the fact that the N-type doping level of region 111 is lower than that of layer 113, the intensity of the electric field generated at the level of the upper portion of the PN junction is lower than that generated at the level of the PN junction between substrate 101 and layer 113. Region 111 thus limits the risk of parasitic triggering of the photodiode due to edge effects at the upper end of trench 107. Alternatively, region 111 may have a lateral doping level gradient, such that its N-type doping level decreases with increasing distance from trench 107.

[0044] In the lower portion of trench 107, layer 113 is in contact with N-type layer 103. The lower portion of the PN junction of the photodiode thus corresponds to the interface between layer 103 and substrate 101. Here again, due to the fact that the N-type doping level of layer 103 is lower than that of layer 113, the intensity of the electric field generated at the level of the lower horizontal portion of the PN junction is lower than the electric field generated at the level of the vertical PN junction between substrate 101 and layer 113. Consequently, layer 103 makes it possible to limit the risk of parasitic triggering of the photodiode, which is associated with edge effects at the lower end of trench 107.

[0045] The doping levels of the substrate 101, layers 113 and 103, and region 111, as well as the diode bias voltage are preferably selected so that the electric field at the horizontal plane of the perpendicular PN junction formed between the substrate 101 and layer 113 is strong enough to trigger avalanche by a single photogenerated charge, for example, greater than 400 kV / cm at a distance of 100 to 500 nm along a direction perpendicular to the PN junction, and are preferably selected so that the electric field at the horizontal plane of the PN junction formed between the substrate 101 and region 111 and between the substrate 101 and layer 103 is low enough to prevent avalanche from being triggered by a single photogenerated charge, for example, less than 400 kV / cm. As an example, the reverse breakdown voltage (or avalanche voltage) of the photodiode is in the range of 10 to 50 V, and the reverse bias voltage of the photodiode is a value in the range of 0.5 to 10 V greater than its breakdown voltage. The doping level of the substrate 101 is, for example, in the range of 5*10 16 to 7*10 17 Number of atoms / cm 3 The doping level of layer 113 is, for example, 5*10 18 to 1*10 20 Number of atoms / cm 3 The N-type doping level of the region 111 and the doping level of the layer 103 are, for example, between one-third and three times the P-type doping level of the substrate 101. As an example, the N-type doping level of the region 111 and the layer 103 is substantially equal to the P-type doping level of the substrate 101.

[0046] As a variant, layer 103 may have a doping level that is substantially the same as the doping level of layer 113. In this case, the avalanche region of each SPAD photodiode includes not only a vertical PN junction formed between the side surface of substrate 101 and layer 113, but also a horizontal PN junction formed between substrate 101 and layer 103. This makes it possible to increase the surface area of ​​the avalanche region and, therefore, the sensitivity of the photodiode.

[0047] exist Figure 1A and 1B In the example shown, the thickness of layer 113 is less than half the width of trench 107, so that layer 113 does not completely fill trench 107. A conductive region 115 (e.g., containing metal) is arranged in the central region of the trench not occupied by layer 113. Region 115 is in contact with the surface of layer 113 opposite substrate island 109 via its side surfaces and is in contact with the lower surface of the portion of layer 113 coating the bottom of trench 107 via its lower portion. Region 115 extends substantially along the entire height of trench 107 and along the entire length of trench 107.

[0048] Region 115 forms a continuous conductive grid, electrically connecting the cathode regions of all sensor pixels to each other.

[0049] Each pixel PIX can include an anode contact metallization 117 disposed above the upper surface of the pixel's island 109 of the substrate 101 and electrically coupled to the substrate 101. In the example shown, a localized P-type doped contact region 119 having a doping level higher than that of the substrate extends in the upper center portion of the island 109. The metallization 117 is disposed on top of and in contact with the contact region 119. The anode contact metallization 117 enables the SPAD photodiodes of different sensor pixels to be individually controlled. Region 119 forms a collection area for the signal representing the illumination of the pixel.

[0050] The sensor may further include one or more cathode contact metallizations 121 arranged on top of and in contact with the upper surface of the common conductive region 115. Due to the electrical continuity of the conductive region 115, the number of contact metallizations 121 may be less than the number of sensor pixels PIX.

[0051] For clarity, in Figure 1B The anode contact metal plating layer 117 and the cathode contact metal plating layer 121 are not shown.

[0052] In operation, the cathode region of the sensor's SPAD photodiode is biased to a positive potential V+, e.g., via cathode contact metallization 121, and the anode region of the sensor's SPAD photodiode is biased to a negative potential V-, e.g., via contact metallization 117, so that the cathode-to-anode voltage of each photodiode is greater than its avalanche voltage.

[0053] The sensor is intended, for example, to be back-illuminated. As an example, the sensor may comprise an integrated control circuit, not shown, which is arranged next to the sensor on the upper surface side of the substrate 101 and is electrically connected to the metallizations 117 and 121. It should be noted that in case the sensor is intended to be back-illuminated, it is possible to provide for a thinning or even a complete removal of the lower layer 105. As an example, the lower layer 105 is removed in its entirety and the layer 103 is removed partially down to the layer 113 or even down to the lower surface of the region 115. The lower surface of the sensor may further be coated with a stack of one or more dielectric layers, not shown, such as, for example, a silicon nitride layer, in order to facilitate the penetration of light into the SPAD photodiode.

[0054] In addition to its cathode contact function, conductive region 115 forms an optical shield that is opaque to the radiation being detected. This limits the risk of parasitic triggering of the sensor's SPAD photodiode. Indeed, when a SPAD photodiode avalanches, the avalanche region emits photons. Region 115 creates an optical barrier that prevents photons from triggering avalanches in other photodiodes of the sensor.

[0055] As an example, region 115 comprises a copper layer and may further comprise a titanium nitride barrier layer that forms an interface between the copper layer and layers 113 and 103 to prevent copper from diffusing into layers 113 and 103. As a variant, region 115 comprises tungsten. More generally, any metal that can fulfill the dual functions of electrical cathode contact and optical isolation of the SPAD photodiode may be used to form region 115.

[0056] By way of example, the trench 107 has a width in the range of 0.4 to 2 μm. The layer 113 has, for example, a thickness in the range of 0.1 to 0.8 μm. The thickness of the conductive region 115 is, for example, in the range of 0.2 to 1 μm.

[0057] Figure 2 is a cross-sectional view schematically and partially illustrating another example of the image sensor 200 according to the embodiment.

[0058] Figure 2 Sensor 200 differs from sensor 100 of FIG. 1 in that it does not include N-type annular region 111 of sensor 100 . Furthermore, in sensor 200 , substrate 101 is covered with a P-type doped layer 202 (P−), which has a lower doping level than the substrate and has a lower surface in contact with the upper surface of the substrate. By way of example, the thickness of layer 202 ranges from 50 nm to 1.5 μm. Layer 202 is formed, for example, by epitaxy on the upper surface of substrate 101.

[0059] exist Figure 2 In the example shown, trench 107 extends vertically from the upper surface of layer 202 all the way to layer 103. Thus, at the level of the upper portion of trench 107, in each pixel PIX, layer 113 contacts the side surface of the portion of layer 202 that covers island 109 of the pixel. At this level, the PN junction of the photodiode thus corresponds to the interface between layer 202 and layer 113. Due to the fact that the P-type doping level of layer 202 is lower than that of substrate 101, the intensity of the electric field generated at the level of the PN junction between layer 202 and layer 113 is lower than that generated at the level of the PN junction between substrate 101 and layer 113. Consequently, layer 202 limits the risk of parasitic triggering of the photodiode associated with edge effects at the upper end of trench 107. Preferably, the doping level of layer 202 is selected so that the electric field at the level of the PN junction between layer 202 and layer 113 is sufficiently low to enable avalanche initiation by a single photogenerated charge, for example, below 400 kV / cm. As an example, the doping level of layer 202 is lower than 8*10 16 Number of atoms / cm 3 .

[0060] exist Figure 2 In the example of FIG. 1 , in each pixel PIX of the sensor, the contact area 119 is located opposite the central area of ​​the island 109 of the pixel and extends vertically from the upper surface of the layer 202 to the substrate 101 .

[0061] Figure 3 is a cross-sectional view schematically and partially illustrating another example of the image sensor 300 according to the embodiment. Figure 3 The sensor 300 has the Figure 2 The common elements of the sensor 200 are not described in detail again. Figure 2 The differences of sensor 200 will be described in detail.

[0062] exist Figure 3 In the example shown, the sensor is formed from a silicon-on-insulator (SOI) substrate. Layer 105 corresponds to the supporting substrate of the SOI stack. An insulating layer 301 ("Box"), for example made of silicon oxide, is arranged on top of and in contact with the upper surface of layer 105. Insulating layer 301 itself is covered by the stack of layers 103, 101, and 202.

[0063] exist Figure 3 In the example shown in FIG. 3 , the trench 107 appears on the upper surface of the insulating layer 301 .

[0064] In case the sensor is intended to be back-illuminated, it is possible to provide for a thinning or even a complete removal of the lower layer 105 .

[0065] It should be noted that Figure 3 A variant of Figure 1A and 1B Example of .

[0066] Figure 4A and 4B An example of an image sensor 400 according to another embodiment is shown schematically and partially. Figure 4B is the top view of the sensor, Figure 4A It is along Figure 4B Cross-sectional view of plane AA.

[0067] Figure 4A and 4B The sensor 400 includes Figure 1A and 1B The common elements of the sensor 100 will therefore not be described again. In the following, only the differences between the two sensors will be detailed.

[0068] Figure 4A and 4B The sensor 400 with Figure 1A and 1BSensor 100 differs in that, in sensor 400, N-type layer 113 of sensor 100 is replaced by a P-type doped layer 413 (P+) having a higher doping level than that of substrate 101. Layer 413 is made, for example, of doped polysilicon. During fabrication, the structure may be subjected to a diffusion annealing process, which causes the dopant element of layer 413 to diffuse into substrate 101, for example, over a distance in the range of 200 nm to 1 μm.

[0069] In addition, Figure 4A and 4B In sensor 400 , trench 107 passes completely through layer 103 and emerges into or onto the upper surface of layer 105 .

[0070] Figure 4A and 4B The sensor 400 with Figure 1A and 1B The sensor 100 is further different in that it does not include the N-type annular region 111 present in the sensor 100 .

[0071] Figure 4A and 4B Sensor 400 further comprises, in the central portion of each substrate island 109, an N-type doped region 419 extending vertically from the upper surface of substrate 101 to layer 103. In top view, the center of region 419 coincides, for example, with the center of island 109. However, the described embodiment is not limited to this particular case. Region 419 is made, for example, of doped polysilicon. In this example, the doping level of region 419 is higher than the doping level of layer 103. During manufacturing, the structure can be subjected to a diffusion annealing, which causes the dopant element to diffuse from region 419 into substrate 101. Region 419 has, for example, the shape of a vertical stem or vertical rod with a circular cross-section. Region 419 is formed, for example, before trench 107.

[0072] Sensor 400 further includes an N-type annular region 421 (N-) in the upper portion of each island 109, completely surrounding region 419 in top view. The doping level of region 421 is lower than that of region 419. Region 421 extends laterally from the edge of region 419 toward the perimeter of island 109, stopping before reaching trench 107. The width of region 421 ranges from 100 nm to 1,500 nm, for example. Vertically, region 421 extends downward from the upper surface of substrate 101 to a depth less than the depth of the substrate, for example, from 100 nm to 1,500 nm.

[0073] Each substrate island 109 defines a SPAD photodiode for a pixel PIX of the sensor. The anode region of the SPAD photodiode is formed by layer 413 and the P-type doped portion of the substrate 101 of the island. The cathode region of the SPAD photodiode includes an N-type central region 419, a central annular region 421, and the portion of the N-type layer 103 that contacts the lower surface of the island 109. The PN junction formed between the side surface of region 419 and substrate 101 defines the avalanche region of the SPAD photodiode, that is, the portion of the PN junction of the photodiode where avalanche can be triggered by a single photogenerated charge.

[0074] In the upper portion of region 419, the side surface of region 419 is in contact with annular region 421. At this level, the PN junction of the photodiode thus corresponds to the interface between region 421 and substrate 101. Due to the fact that the N-type doping level of region 421 is lower than that of region 419, the intensity of the electric field generated at the level of the upper portion of the PN junction is smaller than the electric field generated at the level of the PN junction between substrate 101 and region 419. Consequently, region 421 makes it possible to limit the risk of parasitic triggering of the photodiode due to edge effects at the upper end of region 419.

[0075] In its lower portion, region 419 is in contact with N-type layer 103. The lower portion of the photodiode's PN junction thus corresponds to the interface between layer 103 and substrate 101. Here again, due to the fact that the N-type doping level of layer 103 is lower than that of region 419, the intensity of the electric field generated at the level of the lower horizontal portion of the PN junction is lower than the electric field generated at the level of the vertical PN junction between substrate 101 and region 419. Consequently, layer 103 makes it possible to limit the risk of parasitic triggering of the photodiode, which is associated with edge effects at the lower end of region 419.

[0076] The doping levels of substrate 101, regions 419 and 421, and layer 103, and the photodiode bias voltage are preferably selected so that the electric field in the horizontal plane of the vertical PN junction formed between substrate 101 and region 419 is strong enough to trigger avalanche by a single photogenerated charge, for example, greater than 400 kV / cm at a distance of 100 to 500 nm along a direction orthogonal to the PN junction, and are preferably selected so that the electric field in the horizontal plane of the PN junction formed between substrate 101 and region 421 and between substrate 101 and layer 103 is low enough so that avalanche is not triggered by a single photogenerated charge, for example, less than 400 kV / cm.

[0077] Region 115 forms a continuous conductive grid, electrically connecting the anode regions of all sensor pixels to each other.

[0078] Each pixel PIX can include a cathode contact metallization 117 disposed on top of and in contact with the upper surface of region 419. To facilitate contact, region 419 can include a more heavily doped region (not detailed in the figures) near its upper surface that contacts the metallization 117. Cathode contact metallization 117 enables individual control of the SPAD photodiodes of different sensor pixels. Region 419 defines a collection area for a signal representing the illumination of the pixel.

[0079] The sensor may further include one or more anode contact metallizations 121 arranged on top of and in contact with the upper surface of the common conductive region 115. Due to the electrical continuity of the conductive region 115, the number of cathode contact metallizations 121 may be less than the number of sensor pixels PIX.

[0080] For clarity, in Figure 4B The anode contact metal plating layer 121 and the cathode contact metal plating layer 117 are not shown.

[0081] In operation, the cathode region of the sensor's SPAD photodiode is biased to a positive potential V+, e.g., via cathode contact metallization 117, and the anode region of the sensor's SPAD photodiode is biased to a negative potential V-, e.g., via contact metallization 121, so that the cathode-to-anode voltage of each photodiode is greater than its avalanche voltage.

[0082] In addition to its anode contact function, the electrically conductive region 115 forms an optical shield that is opaque to the radiation to be detected. This makes it possible to limit the risk of parasitic triggering of the SPAD photodiode of the sensor.

[0083] In the case of sensors intended to be back-illuminated, it is possible to provide for thinning or even complete removal of the lower layer 105. As a variant, before thinning, the grooves 107 are present at an intermediate level of the layer 103, but do not pass completely through the layer 103, and during back-side thinning, the layer 105 is completely removed and the layer 103 is partially removed down to the layer 413, or even down to the lower surface of the region 115.

[0084] It should be noted that Figure 4A and 4B The embodiment may be suitable for Figure 2 In this case, the annular region 421 can be omitted and replaced by the P-type layer 202. In addition, Figure 4A and 4B The embodiment may be suitable for Figure 3 Example of .

[0085] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variations can be combined, and that other variations will occur to those skilled in the art. Specifically, the described embodiments are not limited to the numerical examples of dimensions and doping levels mentioned in this disclosure.

[0086] Furthermore, all conductivity types of the above structures can be reversed, with the cathode regions then being replaced with anode regions, and vice versa.

Claims

1. An image sensor comprising a plurality of avalanche photodiodes having vertical PN junctions formed inside and on top of a semiconductor substrate (101) of a first conductivity type having a front surface and a back surface, wherein: - a trench (107) extending vertically in the substrate (101) from its front side to its back side, said trench (107) having, in top view, the shape of a continuous grid laterally delimiting a plurality of substrate islands (109), each island (109) defining a pixel (PIX), said pixel (PIX) comprising a single, individually controllable avalanche photodiode having a vertical PN junction, and comprising a doped region (119) for collecting the avalanche signal of said pixel photodiode; - the sidewalls and the bottom of the trench (107) are coated with a first doped polysilicon semiconductor layer (113) having a conductivity type opposite to that of the collection region; and - a conductive region (115) extending in the trench, the conductive region (115) being in contact with a surface of the first doped polysilicon semiconductor layer (113) opposite to the substrate (101), the conductive region (115) forming a continuous conductive grid, electrically connecting the anode regions or cathode regions of all avalanche photodiodes to each other; as well as - The conductivity type of the first doped polysilicon semiconductor layer (113) is opposite to the conductivity type of the substrate, and the junction between the side surface of each island (109) of the substrate (101) and the first doped polysilicon semiconductor layer (113) defines the avalanche region of the avalanche photodiode of the sensor.

2. The sensor according to claim 1, wherein The collection areas (119) of different pixels (PIX) are electrically insulated from each other.

3. The sensor according to claim 1, wherein The conductive region (115) is opaque to the radiation to be detected.

4. The sensor according to claim 1, wherein the conductive area (115) is made of metal.

5. The sensor of claim 4, wherein the conductive region (115) comprises copper or tungsten.

6. The sensor according to claim 1, further comprising a peripheral annular region (111) in an upper portion of each substrate island (109), the peripheral annular region (111) having a conductivity type opposite to that of the substrate and a doping level lower than the doping level of the semiconductor layer (113) of first doped polysilicon, extending laterally from the sidewalls of the trench (107).

7. The sensor according to claim 1, wherein In each island (109), a collection region (119) having the same conductivity type as that of the substrate (101), but with a higher doping level, is located in the central portion of the island.

8. The sensor according to claim 1, wherein The substrate (101) is covered on its front side with a second semiconductor layer (202) of the first conductivity type having a doping level lower than the doping level of the substrate (101), and the trench (107) passes through the second semiconductor layer (202).

9. The sensor according to claim 1, wherein The substrate (101) rests on a third semiconductor layer (103) having a conductivity type opposite to that of the substrate at its back side, and the trench appears in or above the third semiconductor layer (103) or passes through the third semiconductor layer (103).

10. The sensor according to claim 9, wherein The doping level of the third semiconductor layer (103) is lower than the doping level of the first doped polysilicon semiconductor layer (113).

11. An image sensor comprising a plurality of avalanche photodiodes having vertical PN junctions formed inside and on top of a semiconductor substrate (101) of a first conductivity type having a front surface and a back surface, wherein: - a trench (107) extending vertically in the substrate (101) from its front side to its back side, said trench (107) having, in top view, the shape of a continuous grid laterally delimiting a plurality of substrate islands (109), each island (109) defining a pixel (PIX), said pixel (PIX) comprising a single, individually controllable avalanche photodiode having a vertical PN junction and comprising a collection area for an avalanche signal of said avalanche photodiode; - the sidewalls and the bottom of the trench (107) are coated with a first doped polysilicon semiconductor layer (413) having a conductivity type opposite to that of the collection region; and - a conductive region (115) extending in the trench, the conductive region (115) being in contact with a surface of the first doped polysilicon semiconductor layer (413) opposite to the substrate (101), the conductive region (115) forming a continuous conductive grid, electrically connecting the anode regions or cathode regions of all avalanche photodiodes to each other; and Each substrate island (109) further includes a central region (419) in a central portion thereof, the central region (419) having a conductivity type opposite to that of the substrate, forming a collecting region of the island, extending vertically from its front side to its back side in the substrate (101), the junction between the side surface of the central region (419) having a conductivity type opposite to that of the substrate and the substrate (101) defining an avalanche region of the avalanche photodiode of the sensor.

12. The sensor according to claim 11 further comprises an annular region (421) in the upper portion of each substrate island (109), the annular region (421) having a conductivity type opposite to the conductivity type of the substrate and a doping level lower than the doping level of the central region (419) having a conductivity type opposite to the conductivity type of the substrate, extending laterally from the side walls of the central region (419) having a conductivity type opposite to the conductivity type of the substrate.

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