Inductor current reconstruction circuit, reconstruction method, and power converters using it.

Abstract

This invention discloses an inductor current reconstruction circuit and method. In the first interval of the conduction range of the transistor being detected, the switching current sampling signal is used as a reconstruction signal characterizing the inductor current. In the other intervals excluding the first interval, the current analog signal generated based on the switching current sampling signal and the inductor voltage signal characterizing the voltage across the inductor in the power converter is used as the reconstruction signal, thereby accurately tracking the inductor current within a complete switching cycle.

Description

Technical Field

[0001] This invention relates to power electronics technology, and more specifically, to an inductor current reconfiguration circuit, an inductor current reconfiguration method, and a power converter using the same. Background Technology

[0002] Currently, switching power regulators (VRs) are widely used in various electronic systems to provide the constant voltage and current required by the load. For most power regulators, inductor current needs to be detected and reported in real time. In the event of a short circuit, if the current flowing through the power transistor or other electronic components exceeds their maximum current limit, the transistor or component may be damaged. Therefore, real-time detection of the inductor current is necessary to prevent overcurrent. Alternatively, in applications where direct measurement of the output current is inconvenient, the output current information can be obtained by acquiring the inductor current information over the entire cycle. However, in some applications, real-time measurement of inductor current (or output current) is not feasible due to space constraints, integration requirements, or other electrical performance limitations. Summary of the Invention

[0003] In view of this, the present invention provides a novel inductor current detection method and detection circuit to accurately and conveniently obtain inductor current information for a complete switching cycle, thereby overcoming the problems of the inability to directly detect inductor current and the low accuracy of existing inductor current detection methods in the prior art.

[0004] According to a first aspect of the present invention, an inductor current reconfiguration method is provided for use in a power converter, comprising:

[0005] When the main power transistor and / or rectifier transistor in the power converter is configured as the transistor under test, the current characterizing the current flowing through the transistor under test is acquired, and a switching current sampling signal is generated.

[0006] Within one switching cycle, within the first interval of the conduction interval of the transistor under test, the switching current sampling signal is used as a reconstruction signal characterizing the inductor current, the first interval including the end time of the conduction interval of the transistor under test.

[0007] In the intervals excluding the first interval, the current analog signal generated based on the switching current sampling signal and the inductor voltage signal characterizing the voltage across the inductor in the power converter is used as the reconstructed signal.

[0008] Preferably, the phase of the switching current sampling signal is controlled to correspond in real time to the direction of the actual inductor current.

[0009] Preferably, the switching current sampling signal is obtained by detecting the voltage across the on-resistance of the transistor being tested.

[0010] Preferably, a mirror transistor with a common source and common gate with the transistor under test and a mirror transistor with a common drain and common gate with the transistor under test are used to obtain the current characterizing the current flowing through the transistor under test in order to generate the switching current sampling signal.

[0011] Preferably, the main power transistor or the rectifier transistor configured as the transistor under test has a conduction interval with a duration longer than the second interval, wherein the second interval coincides with a preset blanking time, the second interval begins at the conduction time of the transistor under test, and is continuous with the first interval.

[0012] Preferably, a first slope signal characterizing the rate of change of the current inductor current is obtained based on the switching current sampling signal.

[0013] Preferably, the second slope signal is obtained based on the first slope signal and the change in the voltage difference across the inductor during the on and off intervals of the detected transistor.

[0014] Preferably, the ratio between the first slope signal and the second slope signal is directly proportional to the ratio of the inductor voltage signal within the conduction interval and the turn-off interval.

[0015] Preferably, within the off-state range of the transistor being detected, the analog current signal is generated based on the switching current sampling signal and the second slope signal.

[0016] Preferably, within the off-state interval of the transistor being detected, the value of the switching current sampling signal from the end of the first interval is varied according to the second slope signal to obtain the current analog signal.

[0017] Preferably, within the second interval, the value of the switching current sampling signal at the end of the turn-off interval is used to obtain the current analog signal according to the change of the first slope signal.

[0018] Preferably, when both the main power transistor and the rectifier transistor are configured as detected transistors, the reconstructed signal includes, within one switching cycle:

[0019] The switching current sampling signal of the first transistor of the main power transistor and the rectifier transistor within its first interval;

[0020] The current analog signal immediately following the second transistor within the second interval;

[0021] The switching current sampling signal of the second transistor within its first interval;

[0022] The current analog signal immediately following the first transistor within the second interval.

[0023] Preferably, in the first sub-interval within the first interval, the inductor current is tracked in real time to generate a current tracking signal that is proportional to the inductor current.

[0024] In the second sub-interval of the first interval, the rate of change of the current tracking signal is adjusted to track the rate of change of the inductor current in order to obtain the first slope signal.

[0025] Preferably, within the second interval, a controllable current source is used to charge and discharge a capacitor to obtain the current tracking signal and the first slope signal; the output current of the controllable current source is adjusted according to the error between the real-time switching current sampling signal and the current tracking signal, so that the current tracking signal is consistent with the switching current sampling signal; and the output current of the controllable current source characterizes the first slope signal.

[0026] Preferably, the output current of the controllable current source is positively correlated with the voltage difference across the inductor.

[0027] The present invention also provides an inductor current reconfiguration circuit for use in a power converter, comprising:

[0028] A switching current sampling circuit is used to acquire at least one of the currents characterizing the current flowing through the main power transistor in the power converter and the currents characterizing the current flowing through the rectifier transistor, in order to generate a switching current sampling signal.

[0029] An inductor current generation circuit, when the main power transistor and / or rectifier transistor in the power converter is configured as a detected transistor, uses the switching current sampling signal as a reconstructed signal characterizing the inductor current within the first interval of the conduction interval of the detected transistor.

[0030] In the intervals excluding the first interval, the current analog signal generated based on the switching current sampling signal and the inductor voltage signal characterizing the voltage across the inductor in the power converter is used as the reconstructed signal.

[0031] Preferably, the inductor current generating circuit includes:

[0032] An error amplifier circuit is used to generate an error compensation signal based on the switching current sampling signal and the analog reconstruction signal;

[0033] The reconstructed signal generation circuit selects whether to receive the switching current sampling signal through a switching circuit; and adjusts the output current of the controllable current source according to the error compensation signal and the inductor voltage signal; the output current of the controllable current source charges and discharges a capacitor, thereby generating the analog reconstructed signal across the capacitor.

[0034] A reconstructed signal output circuit is configured to output the switching current sampling signal as a reconstructed signal characterizing the inductor current within the first interval; and to output the analog reconstructed signal as the reconstructed signal in other intervals excluding the first interval, wherein the current analog signal is a part of the analog reconstructed signal.

[0035] Preferably, the phase of the switching current sampling signal corresponds in real time to the direction of the actual inductor current.

[0036] Preferably, the switching current sampling circuit obtains the switching current sampling signal by detecting the voltage across the on-resistance of the transistor being detected.

[0037] Preferably, the switching current sampling circuit includes a first mirror transistor that shares a common gate and common source with the transistor being detected, and a second mirror transistor that shares a common gate and common drain with the transistor being detected.

[0038] Preferably, the switching current sampling circuit further includes a differential amplifier, whose two input terminals are respectively connected to the drain of the first mirror transistor and the source of the second mirror transistor, and whose two output terminals respectively output a first current and a second current, and the switching current sampling signal is obtained based on the difference between the first current and the second current.

[0039] Preferably, the reconstructed signal output circuit includes:

[0040] A first output switch is turned on in the first interval to transmit the switch current sampling signal to the output terminal of the reconstructed signal output circuit;

[0041] And a second output switch, which is turned on in all intervals except the first interval to transmit the analog reconstructed signal to the output of the reconstructed signal output circuit.

[0042] Preferably, through the switching circuit, one input terminal of the error amplifier circuit selects to receive either the analog reconstruction signal or the switching current sampling signal.

[0043] Preferably, the output current of the controllable current source is positively correlated with the inductor voltage signal and negatively correlated with the error compensation signal.

[0044] Preferably, in the first sub-interval of the first interval, the switching circuit enables a current tracking signal to track the switching current sampling signal in real time, thereby making it proportional to the inductor current, wherein the current tracking signal is a part of the analog reconstructed signal;

[0045] In the second sub-interval of the first interval, the analog reconstruction signal is coupled to an input terminal of the error amplifier circuit through the switching circuit, and the rate of change of the current tracking signal is adjusted to track the rate of change of the inductor current, so as to adjust the output current of the controllable current source.

[0046] Preferably, within at least a portion of the off-range of the transistor being detected, the output current of the controllable current source is adjusted according to the inductor voltage signal to generate the current analog signal that is continuous with the current tracking signal.

[0047] Preferably, the current analog signal is generated within a second interval of the conduction interval of the transistor being detected.

[0048] The present invention also provides a power converter, including any of the aforementioned inductor current reconfiguration circuits, and further including a main power transistor, a rectifier transistor, and a control circuit; the control circuit generates a control signal according to the reconfiguration signal to control the switching state of the main power transistor and the rectifier transistor.

[0049] The inductor current detection method and detection circuit of the present invention directly output the switching current sampling signal as a reconstruction signal characterizing the inductor current during a portion of the switching cycle, and obtain a current tracking signal using the switching current sampling signal; during another portion of the time interval, the inductor current in that time interval is simulated using the obtained current tracking signal and the determined trend of the inductor current to obtain a current simulation signal, thereby accurately tracking the inductor current throughout the complete switching cycle. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0051] Figure 1 This is a schematic diagram of an inductor current reconstruction circuit according to a first embodiment of the present invention;

[0052] Figure 2 This is a waveform diagram of the inductor current reconstruction circuit of the present invention.

[0053] Figure 3 This is a schematic diagram of an inductor current reconstruction circuit according to a second embodiment of the present invention;

[0054] Figure 4 This is a schematic diagram of an inductor current reconstruction circuit according to a third embodiment of the present invention;

[0055] Figure 5 This is a schematic diagram of an inductor current reconstruction circuit according to the fourth embodiment of the present invention;

[0056] Figure 6 This is a schematic diagram of a switching current sampling circuit according to the present invention;

[0057] Figure 7 This is a schematic diagram of an inductor current reconstruction circuit according to the fifth embodiment of the present invention;

[0058] Figure 8 This is a schematic diagram of an inductor current reconstruction circuit according to the sixth embodiment of the present invention;

[0059] Figure 9 This is a schematic diagram of another working waveform of the inductor current reconstruction circuit of the present invention. Detailed Implementation

[0060] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0061] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0062] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0063] Unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0064] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0065] Figure 1 This is an inductor current reconstruction circuit according to the first embodiment of the present invention. For example... Figure 1 As shown, this embodiment of the invention uses a buck topology for the power stage circuit of a power converter as an example. The power stage circuit includes a main power switch HS and a rectifier switch LS, as well as an inductor L and an output capacitor Cout. In this embodiment, the main power transistor is the main power switch HS, and the rectifier transistor is the rectifier switch LS.

[0066] The inductor current reconstruction circuit 10 includes a switching current sampling circuit 11, used to acquire at least one of the current I1 characterizing the current flowing through the main power transistor HS in the power converter and the current I2 characterizing the current flowing through the rectifier transistor LS, to generate a switching current sampling signal Vref. The inductor current generation circuit 12 is used to generate a reconstruction signal Vmon1 characterizing the inductor current waveform throughout the entire switching cycle based on the switching current sampling signal Vref and the inductor voltage signal VL characterizing the voltage across the inductor L in the power converter, with the ultimate goal of tracking the inductor current IL.

[0067] It should be noted that the inductor voltage signal VL can be obtained by directly detecting the voltage across the inductor L, or indirectly by using other indirect detection methods.

[0068] In this embodiment of the invention, the switching current sampling circuit 11 generates a switching current sampling signal Vref by directly acquiring at least one of the voltages across the main power transistor HS and the voltages across the rectifier transistor LS.

[0069] refer to Figure 1 The inductor current reconstruction circuit 10 according to this embodiment includes:

[0070] The switching current sampling circuit 11 is used to acquire at least one of the currents characterizing the current flowing through the main power transistor HS and the currents characterizing the current flowing through the rectifier transistor LS, in order to generate a switching current sampling signal Vref.

[0071] The inductor current generation circuit 12 is configured to, when the main power transistor HS and / or rectifier transistor LS in the power converter are configured as the detected transistor, use the switching current sampling signal Vref as a reconstructed signal Vmon1 representing the inductor current within a first interval of the conduction range of the detected transistor; and within other intervals excluding the first interval, use a current analog signal generated based on the switching current sampling signal Vref and the inductor voltage signal VL representing the voltage across the inductor in the power converter as the reconstructed signal Vmon1. The switching current sampling circuit 11 obtains the switching current sampling signal Vref by detecting the voltage across the on-resistance of the detected transistor, thereby ensuring that the phase of the switching current sampling signal Vref corresponds in real time to the direction of the actual inductor current.

[0072] The switching current sampling circuit 11 consists of a voltage-controlled voltage source VVS1, a first sampling switch SL, and a first capacitor C1. The voltage-controlled voltage source VVS1 detects the voltage across the rectifier transistor LS and obtains a switching current sampling signal Vref, representing the current flowing through the rectifier transistor LS, by varying the voltage across the transistor. Since the transistor has a fixed on-resistance Rdson when it is turned on, the detected drain-source voltage is proportional to the current flowing through it. Furthermore, because the current flows from the source to the drain when the rectifier transistor LS is turned on, the detected drain-source voltage is negative. To simplify the circuit design, the coefficient of the voltage-controlled voltage source VVS1 is chosen to be negative, making the switching current sampling signal Vref positive for easier design of subsequent circuits. Here, a coefficient of 1:-1 is used as an example. However, those skilled in the art will understand that the coefficient of the voltage-controlled voltage source VVS1 can be chosen with other values ​​depending on the different parameter designs. The first sampling switch SL is turned on for a period of time during the conduction of the rectifier transistor LS, so that the switching current sampling signal Vref is held on the first capacitor C1.

[0073] The inductor current generating circuit 12 includes:

[0074] Error amplifier circuit 121 is used to generate error compensation signal Vcomp based on switch current sampling signal Vref and analog reconstruction signal Vmom;

[0075] The reconstructed signal generation circuit 122 selects whether to receive the switching current sampling signal Vref through the switching circuit 123; and adjusts the output current of the controllable current source Imon according to the error compensation signal Vcomp and the inductor voltage signal VL; the output current of the controllable current source Imon charges and discharges a capacitor C2, so that the voltage across the capacitor C2 is used as the analog reconstructed signal Vmon; wherein, the output current of the controllable current source Imon is positively correlated with the inductor voltage signal VL and negatively correlated with the error compensation signal Vcomp.

[0076] Through the switching circuit 123, one input terminal of the error amplifier circuit 121 selects to receive either the analog reconstruction signal Vmon or the switching current sampling signal Vref.

[0077] The reconstructed signal output circuit 124 is used to output the switching current sampling signal Vref as a reconstructed signal Vmon1 characterizing the inductor current in the first interval; and to output the voltage across capacitor C2, i.e. the analog reconstructed signal Vmon, as the reconstructed signal Vmon1 in other intervals excluding the first interval, wherein the current analog signal is a part of the analog reconstructed signal Vmon.

[0078] The reconstructed signal output circuit 124 includes a first output switch S1, one end of which is connected to the output terminal of the switching current sampling circuit 11 to receive the switching current sampling signal Vref, and the other end of which is connected to the output terminal of the reconstructed signal output circuit 124. The first output switch S1 is turned on in the first interval to transmit the switching current sampling signal Vref to the output terminal of the reconstructed signal output circuit 124. The second output switch S2 is turned on in intervals other than the first interval to transmit the analog reconstructed signal to the output terminal of the reconstructed signal output circuit.

[0079] Specifically, the error amplifier circuit 121 is composed of an error amplifier amp, wherein the non-inverting input terminal of the error amplifier amp receives the switching current sampling signal Vref, and the inverting input terminal of the error amplifier amp is shorted to the non-inverting input terminal through a switch, or connected to the analog reconstruction signal Vmon through another switch.

[0080] The reconstructed signal generation circuit 122 is connected to the switching current sampling signal Vref via the switching circuit 123, and consists of a controllable current source Imon related to the compensation signal Vcomp and the inductor voltage signal VL, and a second capacitor C2. An analog reconstructed signal Vmon is generated at the non-grounded terminal of the second capacitor C2. Preferably, the value of the controllable current source Imon is Imon = (a - Vcomp) * VL, where a is a constant.

[0081] In one embodiment, the switching circuit 123 includes: a first switch K1 connected across the two input terminals of the error amplifier circuit 121; a second switch K2 connected across the switching current sampling signal Vref and the analog reconstruction signal Vmon; and a third switch K3 connected between the analog reconstruction signal Vmon and one input terminal of the error amplifier amp.

[0082] During operation, one of the main power transistor HS and the rectifier transistor LS, which are in the on state, is configured as the transistor to be detected. In the first interval of the on-state of the transistor to be detected, a current tracking signal is generated based on the switching current sampling signal Vref. In at least a portion of the off-state of the transistor to be detected, a current analog signal that follows the change of inductor current is generated based on the current tracking signal and the inductor voltage signal VL. Both the current tracking signal and the current analog signal are continuous and can both be used as part of the analog reconstruction signal Vmon.

[0083] In the first sub-interval of the aforementioned first interval, the switching circuit 123 enables the analog reconstruction signal to track the switching current sampling signal Vref in real time, making the current tracking signal consistent with the switching current sampling signal Vref. For example, when switch K2 is turned on and switches K1 and K3 are turned off, capacitor C2 is directly coupled to the switching current sampling signal Vref, making the current tracking signal at this time, i.e., the analog reconstruction signal Vmon in this operating state, consistent with the switching current sampling signal Vref.

[0084] In the second sub-interval of the first interval, the analog reconstruction signal Vmon is coupled to one input of the error amplifier circuit 121 via the switching circuit 123. The rate of change of the current tracking signal (i.e., the analog reconstruction signal Vmon in this operating state) is adjusted according to the error between the analog reconstruction signal Vmon and the real-time switching current sampling signal Vref to track the rate of change of the inductor current, thereby regulating the output current of the controllable current source. For example, when switch K3 is turned on and switches K1 and K2 are turned off, one input of the error amplifier circuit receives the switching current sampling signal Vref, and the other input receives the analog reconstruction signal Vmon. A compensation signal Vcomp is generated based on the error between the two, thereby changing the adaptability of the output current Imon of the controllable current source. Through this feedback adjustment, the current tracking signal (i.e., the analog reconstruction signal Vmon in this operating interval) tracks the switching current sampling signal Vref in real time.

[0085] Within at least a portion of the off-range of the transistor being tested, the inductor voltage signal VL changes, and the output current of the controllable current source changes accordingly, generating a current analog signal that is continuous with the current tracking signal.

[0086] It should be noted that the conduction time of the main power transistor HS or the rectifier transistor LS, which is configured as the transistor to be detected, needs to be longer than the time of the second interval, where the second interval is consistent with the preset blanking time. That is, the inductor current reconstruction circuit 10 is configured to set a blanking time Tb, and whether the main power transistor HS and the rectifier transistor LS participate in the generation of the analog reconstruction signal Vmon is determined according to whether the conduction time of each transistor exceeds the blanking time Tb.

[0087] When the on-time of the main power transistor and / or the rectifier transistor is greater than the blanking time, the current analog signal is generated based on the current tracking signal.

[0088] The current tracking signal is not generated within the second interval of the conduction range of the transistor being detected; the second interval includes the conduction time of the transistor being detected, and the time length of the second interval is consistent with the blanking time.

[0089] A current analog signal is generated within the second interval of the conduction range of the transistor being tested.

[0090] The switching current sampling circuit 11 can be configured to detect the switching current flowing through only one of the main power transistor HS and the rectifier transistor LS, or it can be configured to detect the switching current flowing through both the main power transistor HS and the rectifier transistor LS simultaneously.

[0091] Whether only one transistor is detected or two transistors are detected simultaneously, a transistor is only considered as a detected transistor if its on-time is longer than its blanking time, and an adjacent analog current signal is generated based on the switching current signal obtained from the switching current flowing through it.

[0092] When only one transistor is detected, adjacent current analog signals are generated based on the switching current signal only during a switching cycle in which the conduction time of that transistor is longer than the blanking time.

[0093] When two transistors are detected simultaneously, at least one transistor's on-time will necessarily be longer than its blanking time within a single switching cycle. If only one transistor's on-time is longer than its blanking time, a current analog signal is generated based solely on that transistor's switching current signal. If both transistors' on-times are longer than their blanking times, current analog signals are generated based on both transistors' switching current signals. A single cycle includes a current tracking signal that tracks the main power transistor's switching current sampling signal and its continuous current analog signal, as well as a current tracking signal that tracks the rectifier transistor's switching current sampling signal and its continuous current analog signal.

[0094] Figure 2 This is a waveform diagram of the inductor current reconstruction circuit of the present invention. The following is in conjunction with... Figure 2 The working principle of the inductor current reconstruction circuit of the present invention will be explained below. In this embodiment of the invention, the reconstruction process of the inductor current throughout the entire switching cycle will be illustrated by taking the example of only detecting the rectifier transistor LS and participating in the generation of the analog reconstruction signal Vmon.

[0095] Phase 2: The rectifier transistor LS is in the on state; Phase 2 begins after the blanking time Tb from the on time of the rectifier transistor LS and ends before the off time of the rectifier transistor LS.

[0096] In stage 2, the second switch K2 and the third switch K3 are turned on, and the first switch K1 is turned off. It can be seen that the analog reconstruction signal Vmon output terminal and the switch current sampling signal Vref are shorted through the second switch K2. Therefore, after this stage, the value of the analog reconstruction signal Vmon is equal to or very close to the value of the switch current sampling signal Vref, which means that the starting points of the analog reconstruction signal Vmon and the switch current sampling signal Vref are equal.

[0097] Phase 3: In Phase 3, the second switch K2 and the first switch K1 are turned off, and the third switch K3 is turned on. The analog reconstructed signal Vmon tracks the current of the rectifier transistor through the negative feedback circuit. Here, it refers to the current sampling signal Vref. During this phase, the inductor voltage signal VL is -Vout, which is negative. When the analog reconstructed signal Vmon is higher than the switching current sampling signal Vref (i.e., the falling slope of the analog reconstructed signal Vmon is less than the falling slope of the inductor current IL), the error compensation signal Vcomp output by the error amplifier amp decreases. Therefore, the current output by the controllable current source Imon increases. However, since the inductor voltage signal VL is negative at this time, the current output by the controllable current source Imon is reversed, which will accelerate the discharge speed of the second capacitor C2, causing the analog reconstructed signal Vmon to tend to be consistent with the switching current sampling signal Vref. After this phase, the analog reconstructed signal Vmon achieves tracking of the rectifier transistor current, and the current Imon output by the controllable current source Imon represents the rate of change of the inductor current IL at this time. That is, by adjusting the negative feedback, the slopes of the analog reconstructed signal Vmon and the switching current sampling signal Vref are made equal.

[0098] It can be seen that in stages 2 and 3, the analog reconstruction signal Vmon in these two stages can be considered as the current tracking signal, which tracks the switching current sampling signal Vref in real time.

[0099] Stage 4: In Stage 4, the main power transistor HS is turned on, and the rectifier transistor LS is turned off. During this stage, the second switch K2 and the third switch K3 are turned off, and the first switch K1 is turned on. The input signals to both input terminals of the error amplifier amp are the switch current sampling signals, therefore the error compensation signal Vcomp remains unchanged. In this stage, the inductor voltage signal VL = Vin - Vout, and VL is a positive value. The output current of the controllable current source is Imon_1 = Imon_0 * (Vin - Vout) / (Vout), where Imon_0 represents the slope of the inductor current IL obtained in Stage 3. The slope of the inductor current is the ratio of the voltage across the inductor to the inductance. In Stage 3, the voltage across the inductor is Vout; in Stage 4, the voltage across the inductor is Vin - Vout. Therefore, the rising slope of the inductor current IL in Stage 4 can be obtained through the formula Imon_1 = Imon_0 * (Vin - Vout) / (Vout). Following this rising slope, the voltage across capacitor C2 continues to rise from its value at the end of stage 3 until the rectifier transistor LS is turned on again. That is, in this stage, the inductor current information is not obtained through direct detection, but rather indirectly simulated through a current analog signal.

[0100] Stage 1: As mentioned above, in Stage 1, the rectifier transistor LS is just turned on. The oscillation on the drain-source voltage Vds of the rectifier transistor LS will greatly affect the detection result. Therefore, a certain blanking time T is set, during which the current signal flowing through the rectifier transistor LS is ignored. Specifically, the second switch K2 (control signal VK2) and the third switch K3 (control signal VK3) are turned off, and the first sampling switch SL (control signal S4) and the first switch K1 (control signal VK1) are turned on. Therefore, in this stage, since the two input terminals of the error amplifier amp are short-circuited, its output error current Icomp is 0. The error compensation signal Vcomp remains unchanged, and the voltage value across the inductor changes from Vin-Vout to Vout. The output current of the controllable current source Imon changes accordingly to discharge the capacitor C2. Therefore, the analog reconstruction signal Vmon gradually decreases from the peak with a fixed slope (the slope of the change of the inductor current IL obtained in Stage 3, Imon_0).

[0101] Therefore, the principle behind the present invention's solution, which extends the inductor current waveform across the entire switching cycle by sampling the current of a single transistor, is as follows: In stage 3, the inductor voltage signal VL is -Vout, so the inductor current slope is k3 = (-Vout) / L; in stage 4, the inductor voltage signal VL = Vin - Vout, so the inductor current slope is k4 = (Vin - Vout) / L. That is, k3 / k4 = -Vout / (Vin - Vout). At the end of stage 3, we have already obtained k3, and the value of the inductor voltage signal VL can be measured. Therefore, the inductor current slope k4 in stage 4 can be obtained, thus completing the extension of the inductor current waveform across the entire switching cycle.

[0102] Thus, the inductor current waveform can be reconstructed in three stages: Stage 2 forces the analog reconstructed signal Vmon and the reference signal (i.e., the switching current sampling signal Vref) to be equal; Stage 3 makes the slope of the analog reconstructed signal Vmon equal to the reference signal; and the relationship between the voltage and current slopes extends the analog reconstructed signal Vmon to other stages (e.g., Stage 4 and Stage 1). The inductor current reconstruction circuit 10 reconstructs the inductor current waveform throughout the entire switching cycle based on only detecting the rectifier transistor current.

[0103] In the inductor current reconstruction circuit of this invention, within the first interval of the conduction range of the transistor being detected, the switching current sampling signal Vref is used as the reconstruction signal Vmon1 characterizing the inductor current. This avoids errors caused by using the analog reconstruction signal Vmon to characterize the inductor current when the analog reconstruction signal Vmon is not fully established during the startup phase or other operating conditions. In the intervals excluding the first interval, the analog current signal generated based on the switching current sampling signal Vref and the inductor voltage signal VL characterizing the voltage across the inductor in the power converter is used as the reconstruction signal Vmon1. Therefore, the reconstruction signal Vmon1 in this invention is partly a directly sampled signal and partly an analog signal, which are spliced ​​together in time. This allows the reconstruction signal Vmon1 to more accurately track the inductor current throughout the complete switching cycle.

[0104] Figure 3 This is an inductor current reconstruction circuit according to a second embodiment of the present invention. The only difference between it and the inductor current reconstruction circuit 10 of the first embodiment is that the switching current sampling circuit 31 samples the current flowing through the main power transistor HS, and that the inductor current generation circuit 32, compared to the reconstructed signal output circuit inductor current generation circuit 12, adds a voltage-controlled voltage source VVS4 and a second control switch SH1. The other parts of the circuit and their operating principles are the same and will not be described again.

[0105] refer to Figure 3 The switching current sampling circuit 31 consists of a voltage-controlled voltage source VVS2, a second sampling switch SH, and a first capacitor C1. The voltage-controlled voltage source VVS2 detects the voltage across the main power transistor HS to obtain a switching current sampling signal Vref, representing the current flowing through the main power transistor HS. Unlike when the rectifier transistor LS is on, when the main power transistor HS is on, the current flows from its drain to its source. Therefore, the detected drain-source voltage is positive. To achieve a certain proportional change, the coefficient of the voltage-controlled voltage source VVS2 only needs to be positive. Of course, those skilled in the art will understand that, depending on different parameter designs, the coefficient of the voltage-controlled voltage source VVS2 can also be selected as other values ​​besides 1:1. Furthermore, when the coefficient is selected as 1:1, the voltage-controlled voltage source VVS2 can be omitted. The second sampling switch SH is on for a period of time during the on-state of the main power transistor HS, so that the switching current sampling signal Vref is maintained across the first capacitor C1.

[0106] In the inductor current generation circuit 32, a voltage-controlled voltage source VVS4 and a second control switch SH1 are added to the input of the error amplifier amp. Preferably, the second control switch SH1 can be turned on and off simultaneously with the second sampling switch SH. Since the slope of the inductor current IL increases when the main power transistor HS is on and decreases when the rectifier transistor LS is on, the direction of change of the error compensation signal Vcomp needs to be different when the main power transistor HS is on compared to when the rectifier transistor LS is on. Therefore, when the rectifier transistor LS is on, the positive error input to the error amplifier amp is applied between the analog reconstruction signal Vmon and the switching current sampling signal Vref. When the main power transistor HS is on, the proportional coefficient of the voltage-controlled voltage source VVS4 needs to be negative, for example, 1:-1 in this embodiment. Other values ​​can be selected according to different parameter designs, so that the analog reconstruction signal Vmon and the switching current sampling signal Vref pass through the negative error input to the error amplifier amp.

[0107] Figure 4 This is an inductor current reconstruction circuit according to a third embodiment of the present invention. The only difference between it and the inductor current reconstruction circuit 10 of the first embodiment is that the switching current sampling circuit 41 samples the current flowing through the main power transistor HS and the rectifier transistor LS, and that the inductor current generating circuit 42, compared to the inductor current generating circuit 12, adds a voltage-controlled voltage source VVS4, a second control switch SH1, a voltage-controlled voltage source VVS3, and a first control switch SL1. The other parts of the circuit and their operating principles are the same and will not be described again.

[0108] refer to Figure 4 The switching current sampling circuit 41 consists of a voltage-controlled voltage source VVS2, a second sampling switch SH, a voltage-controlled voltage source VVS1, a first sampling switch SL, and a first capacitor C1. The voltage-controlled voltage source VVS2 detects the voltage across the main power transistor HS and acquires a switching current sampling signal Vref representing the current flowing through the main power transistor HS during the HS's conduction phase. The voltage-controlled voltage source VVS1 detects the voltage across the rectifier transistor LS and acquires a switching current sampling signal Vref representing the current flowing through the rectifier transistor LS during the rectifier transistor LS's conduction phase.

[0109] In the inductor current generating circuit 42, compared to the inductor current generating circuit 12, a voltage-controlled voltage source VVS4, a second control switch SH1, a voltage-controlled voltage source VVS3, and a first control switch SL1 are added to the input of the error amplifier amp. Preferably, the second control switch SH1 can be turned on and off simultaneously with the second sampling switch SH, and the first control switch SL1 can be turned on and off simultaneously with the first sampling switch SL. As analyzed above, since the slope of the inductor current IL increases when the main power transistor HS is turned on, and the slope of the inductor current IL decreases when the rectifier transistor LS is turned on, the direction of change of the error compensation signal Vcomp needs to be different when the main power transistor HS is turned on compared to when the rectifier transistor LS is turned on. Therefore, when the rectifier transistor LS is turned on, if the scaling factor of the voltage-controlled voltage source VVS3 is positive, for example, 1:1 in this embodiment, the positive error between the analog reconstruction signal Vmon and the switch current sampling signal Vref is input to the error amplifier amp, then when the main power transistor HS is turned on, the scaling factor of the voltage-controlled voltage source VVS4 needs to be negative, for example, 1:-1 in this embodiment. Depending on the different parameter designs, other values ​​can be selected, allowing the analog reconstructed signal Vmon and the switching current sampling signal Vref to pass through the negative error input error amplifier amp. By setting the positive or negative of the corresponding proportional value, the analog reconstructed signal Vmon and the switching current sampling signal Vref can pass through the positive or negative error input error amplifier amp.

[0110] Figure 5 This is an inductor current reconstruction circuit according to the fourth embodiment of the present invention. The only difference between it and the inductor current reconstruction circuit 10 of the first embodiment is that the switching current sampling circuit 51 samples the current flowing through the rectifier transistor LS through a current mirror circuit. The other parts of the circuit and its working principle are the same, and will not be described again.

[0111] Specifically, the switching current sampling circuit 51 uses a mirror transistor FET2, which shares a common source and common gate with the rectifier transistor LS, to acquire the current flowing through the rectifier transistor LS, thereby generating the switching current sampling signal Vref. Therefore, the current flowing through the mirror transistor FET2 is proportional to the current flowing through the rectifier transistor LS. By converting the current flowing through the mirror transistor FET2 into two voltage signals VR2+ and VR2-, the voltage-controlled voltage source VVS1 acquires the voltage signals VR2+ and VR2-, and, with or without a certain proportional change, acquires the switching current sampling signal Vref, representing the current flowing through the rectifier transistor LS. Relative to... Figure 1In the embodiments shown in 3 and 4, the switching current information is obtained by detecting the voltage. The mirror circuit can directly obtain the current signal, which can avoid the influence of noise and the temperature drift of the resistor, and is more accurate. Moreover, the temperature of the mirror transistor is closer to that of the main power transistor or rectifier transistor, which facilitates compensation.

[0112] Figure 6 This is a circuit diagram of a switching current sampling circuit. To ensure that the phase of the switching current sampling signal Vref corresponds to the direction of the actual inductor current in real time, that is, the positive and negative values ​​of the switching current sampling signal Vref can reflect the two directions of the actual inductor current, so that a single circuit can be used to detect both positive and negative currents, this invention also provides a switching current sampling circuit 61. Here, we will take the detection of the current flowing through the rectifier transistor LS as an example for illustration.

[0113] The current sampling circuit 61 includes a first mirror transistor FET21 with a common gate and common source with the transistor LS being detected, and a second mirror transistor FET22 with a common gate and common drain with the transistor LS being detected. The switching current sampling circuit 61 also includes a differential amplifier 611, whose two input terminals are respectively connected to the drain of the first mirror transistor FET21 and the source of the second mirror transistor FET22. The two output terminals of the differential amplifier 611 output a first current Iref1 and a second current Iref2, respectively. The switching current sampling signal Vref is obtained based on the difference between the first current Iref1 and the second current Iref2. Using this circuit, the direction of the actual inductor current can be reflected in the phase of the switching current sampling signal Vref, specifically its positive or negative value.

[0114] Figure 7 This is an inductor current reconstruction circuit according to the fifth embodiment of the present invention. The only difference between it and the inductor current reconstruction circuit 10 of the second embodiment is that the switching current sampling circuit 71 samples the current flowing through the main power transistor HS through a mirror transistor. The other parts of the circuit and its working principle are the same, and will not be described again.

[0115] Specifically, the switching current sampling circuit 71 uses a mirror transistor FET1, which shares a common source and common gate with the main power transistor HS, to acquire the current flowing through the main power transistor HS, thereby generating the switching current sampling signal Vref. Therefore, the current flowing through the mirror transistor FET1 is proportional to the current flowing through the main power transistor HS. By converting the current flowing through the mirror transistor FET1 into two voltage signals VR1+ and VR1-, the voltage-controlled voltage source VVS2 acquires the voltage signals VR1+ and VR1-, and, with or without a certain proportional change, acquires the switching current sampling signal Vref, which represents the current flowing through the main power transistor HS.

[0116] Figure 8 This is an inductor current reconstruction circuit according to the sixth embodiment of the present invention. The only difference between it and the inductor current reconstruction circuit 10 of the third embodiment is that the switching current sampling circuit 81 samples the current flowing through the main power transistor HS and the rectifier transistor LS through a mirror transistor. The other parts of the circuit and its working principle are the same, and will not be described again.

[0117] Specifically, the switching current sampling circuit 81 uses a mirror transistor FET1, which shares a common source and common gate with the main power transistor HS, to acquire the current flowing through the main power transistor HS during the HS's conduction phase, thereby generating the switching current sampling signal Vref. It also uses a mirror transistor FET2, which shares a common source and common gate with the rectifier transistor LS, to acquire the current flowing through the rectifier transistor LS during the rectifier transistor LS's conduction phase, thereby generating the switching current sampling signal Vref.

[0118] Figure 9 This is another operating waveform diagram of the inductor current reconstruction circuit of the present invention. The following is in conjunction with... Figure 9 The working waveforms shown are Figure 8 The inductor current reconstruction circuit of the sixth embodiment shown illustrates the working principle of the inductor current reconstruction circuit of the present invention. In this embodiment, the main power transistor and the rectifier transistor are detected simultaneously to obtain the switching current sampling signal, and the conduction interval of both the main power transistor and the rectifier transistor is longer than the blanking time.

[0119] One of the conducting main power transistor and rectifier transistor is used as the transistor under test, and a current analog signal is generated in an interval of the same length as the blanking time immediately following the first interval of the transistor under test.

[0120] The reconstructed signal for one switching cycle includes:

[0121] The current tracking signal of the first transistor in its first interval, which is either the main power transistor or the rectifier transistor;

[0122] The analog current signal immediately following the blanking time of the second transistor;

[0123] The current tracking signal of the second transistor during its blanking time;

[0124] The analog current signal that follows during the blanking time of the first transistor.

[0125] During period I: The main power transistor HS is turned on, but assuming its on-time is less than the blanking time Tb, sampling of the main power transistor HS is not enabled. The input of the error amplifier amp is short-circuited by the first switch K1, and the switching current sampling signal characterizing the current flowing through the main power transistor HS does not participate in feedback regulation.

[0126] Phase II: Similar Figure 2 In the first stage shown, the rectifier transistor LS is turned on, and the on time is longer than the blanking time Tb. During the blanking time Tb, the error amplifier is short-circuited by the first switch K1, and the switch current sampling signal, which represents the current flowing through the rectifier transistor LS, does not participate in the feedback regulation.

[0127] Phase III: Similar Figure 2 In the second stage shown, the rectifier transistor LS is turned on for a sufficiently long time, greater than the blanking time Tb. The current sampling of the rectifier transistor LS is enabled, the first switch K1 is turned off, and the second switch K2 is turned on to short-circuit the analog reconstruction signal Vmon and the switch current sampling signal Vref, thereby forcing the analog reconstruction signal Vmon to be set to the target value.

[0128] IV period: similar Figure 2 In the third stage shown, the first switch K1 and the second switch K2 are open, and the first sampling switch SL is also in the conducting state. The analog reconstruction signal Vmon tracks the current of the rectifier transistor LS through the negative feedback adjustment circuit, specifically, the tracking switch current sampling signal Vref.

[0129] V-period: The next switching cycle begins. The on-time of the main power transistor HS is longer than the blanking time Tb. During the blanking time Tb, the error amplifier amp is short-circuited by the first switch K1. The switching current sampling signal, which represents the current flowing through the main power transistor HS, does not participate in the feedback regulation.

[0130] VI period: This is the second stage when the main power transistor HS is turned on. The main power transistor HS is turned on for a sufficiently long time, which is greater than the blanking time Tb. The current sampling of the main power transistor HS is enabled. The first switch K1 is turned off and the second switch K2 is turned on, which short-circuits the analog reconstruction signal Vmon and the switch current sampling signal Vref, thereby forcing the analog reconstruction signal Vmon to be set to the target value.

[0131] VII: This refers to the third stage when the main power transistor HS is turned on. The first switch K1 and the second switch K2 are turned off, and the second sampling switch SH is also turned on. The analog reconstruction signal Vmon tracks the current flowing through the main power transistor HS through the negative feedback adjustment circuit. Specifically, it tracks the switch current sampling signal Vref.

[0132] VIII period: This is the first stage when the rectifier transistor LS is turned on. When the rectifier transistor LS is just turned on, its on time is longer than the blanking time T. During the blanking time T, the error amplifier amp is short-circuited by the first switch K1, and the switch current sampling signal that represents the current flowing through the rectifier transistor LS does not participate in the feedback regulation.

[0133] IX period: This is the second stage when the rectifier transistor LS is turned on. The rectifier transistor LS is turned on for a sufficiently long time, the current sampling of the rectifier transistor LS is enabled, the first switch K1 is turned off, and the second switch K2 is turned on to short-circuit the analog reconstruction signal Vmon and the switch current sampling signal Vref, thereby forcing the analog reconstruction signal Vmon to be set to the target value.

[0134] Period X: This refers to the third stage when the rectifier transistor LS is turned on. The first switch K1 and the second switch K2 are off, and the first sampling switch SL is already on. The analog reconstruction signal Vmon tracks the current flowing through the rectifier transistor LS through the negative feedback adjustment circuit; specifically, it tracks the switch current sampling signal Vref. During this switching cycle, both the main power transistor HS and the rectifier transistor LS participate in the adjustment process.

[0135] Based on the above analysis of the working process, it can be seen that in one switching cycle, the inductor current reconstruction circuit 10 adjusts the output of the analog reconstruction signal Vmon according to the sampled values ​​of the currents of the main power transistor HS and / or the rectifier transistor LS. Whether the currents flowing through the main power transistor HS and the rectifier transistor LS participate in the adjustment process is determined by whether their corresponding on-time exceeds the blanking time T. If their on-time reaches the blanking time T, the corresponding sampling and control switch is enabled and turned on, and the current sampling signal of the transistor will participate in the generation of the analog reconstruction signal Vmon. The inductor current reconstruction circuit of the present invention, by designing a circuit based on negative feedback, enables the reconstruction signal to track its reference signal, namely the switching current sampling signal. By combining the switching current sampling signal and the inductor voltage signal obtained by acquiring at least one of the two characteristics of the current flowing through the main power transistor in the power converter and the current flowing through the rectifier transistor, the tracking of the inductor current within a complete switching cycle can be achieved.

[0136] According to the present invention, a power converter is also provided, including the aforementioned arbitrary inductor current reconfiguration circuit, and further including a main power transistor, a rectifier transistor, and a control circuit; the control circuit generates a control signal according to the reconfiguration signal to control the switching state of the main power transistor and the rectifier transistor.

[0137] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for reconstructing an inductor current in a power converter, comprising: obtaining a switching current sampling signal representing a current flowing through a detected transistor in the power converter when the detected transistor is configured as a main power transistor and / or a rectifier transistor in the power converter; and using the switching current sampling signal as a reconstructed signal representing the inductor current in a first interval of a conduction interval of the detected transistor, the first interval including an end time of the conduction interval of the detected transistor; and using a current analog signal generated from the switching current sampling signal and an inductor voltage signal representing a voltage across an inductor in the power converter as the reconstructed signal in other intervals of the conduction interval of the detected transistor; and thereby, the reconstructed signal is obtained from the switching current sampling signal directly sampled and the current analog signal analogized in a switching cycle, avoiding an error caused when the current analog signal has not been established; wherein the switching current sampling signal representing the current flowing through the detected transistor is obtained using a first mirror transistor sharing a source and a gate with the detected transistor, a second mirror transistor sharing a drain and a gate with the detected transistor, and a differential amplifier, wherein two input terminals of the differential amplifier are connected to a drain of the first mirror transistor and a source of the second mirror transistor respectively, two output terminals of the differential amplifier output a first current and a second current respectively, the switching current sampling signal is obtained according to a difference between the first current and the second current, and a positive or negative value of the switching current sampling signal reflects a direction of an actual inductor current.

2. The inductor current reconstruction method of claim 1, wherein, a phase of the switching current sampling signal is controlled to correspond to the direction of the actual inductor current in real time.

3. The inductor current reconstruction method of claim 1, wherein, the main power transistor configured as the detected transistor or the rectifier transistor has a time length of the conduction interval greater than a time length of a second interval, wherein the second interval is consistent with a preset blanking time, the second interval starts from a conduction time of the detected transistor and is continuous with the first interval.

4. The inductor current reconstruction method of claim 3, wherein, a first slope signal representing a rate of change of a current is obtained according to the switching current sampling signal.

5. The inductor current reconstruction method of claim 4, wherein, a second slope signal is obtained according to the first slope signal and a change of a voltage difference across the inductor in the conduction interval and an off interval of the detected transistor.

6. The inductor current reconstruction method of claim 5, wherein, a ratio between the first slope signal and the second slope signal is in a positive proportional relationship with a ratio of the inductor voltage signal in the conduction interval and the off interval.

7. The inductor current reconstruction method of claim 6, wherein, the current analog signal is generated according to the switching current sampling signal and the second slope signal in the off interval of the detected transistor.

8. The inductor current reconstruction method of claim 7, wherein, the current analog signal is obtained from a value of the switching current sampling signal at the end time of the first interval according to the second slope signal in the off interval of the detected transistor.

9. The inductor current reconstruction method of claim 8, wherein, In the second interval, the value of the switch current sampling signal at the end of the off interval changes according to the first slope signal to obtain the current analog signal.

10. The inductor current reconstruction method of claim 3, wherein, When the main power transistor and the rectifier transistor are both configured as a detected transistor, in a switching cycle, the reconstructed signal includes: the switch current sampling signal of a first transistor of the two in the first interval of the first transistor; the current analog signal in the second interval of the second transistor immediately after; the switch current sampling signal of the second transistor in the first interval of the second transistor; the current analog signal in the second interval of the first transistor immediately after.

11. The inductor current reconstruction method of claim 4, wherein, in a first sub-interval of the first interval, the inductor current is tracked in real time to generate a current tracking signal in a positive proportional relationship with the inductor current; in a second sub-interval of the first interval, the rate of change of the current tracking signal is adjusted to track the rate of change of the inductor current to obtain the first slope signal.

12. The inductor current reconstruction method of claim 11, wherein, In the second sub-interval, a controllable current source is used to charge and discharge a capacitor to obtain the current tracking signal and the first slope signal; the output current of the controllable current source is adjusted according to the error between the real-time switch current sampling signal and the current tracking signal, so that the current tracking signal is consistent with the switch current sampling signal; and the output current of the controllable current source represents the first slope signal.

13. The inductor current reconstruction method of claim 12, wherein, The output current of the controllable current source is positively related to the voltage difference across the inductor.

14. An inductor current reconstruction circuit for use in a power converter, comprising: a switch current sampling circuit configured to obtain at least one of a current flowing through a main power transistor in the power converter and a current flowing through a rectifier transistor in the power converter to generate a switch current sampling signal; an inductor current generation circuit configured to, when the main power transistor and / or the rectifier transistor in the power converter is configured as a detected transistor, use the switch current sampling signal as a reconstructed signal representing an inductor current in a first interval of a conduction interval of the detected transistor; in other intervals excluding the first interval, use a current analog signal generated according to the switch current sampling signal and an inductor voltage signal representing a voltage across an inductor in the power converter as the reconstructed signal; wherein the inductor current generation circuit includes a reconstructed signal output circuit configured to, in the first interval, select the switch current sampling signal as the reconstructed signal representing the inductor current; and in other intervals excluding the first interval, select the current analog signal as the reconstructed signal, the first interval including an end time of the conduction interval of the detected transistor. The switch current sampling circuit comprises a first mirror transistor sharing the gate and the source of the detected transistor, and a second mirror transistor sharing the gate and the drain of the detected transistor, and further comprises a differential amplifier having two input terminals connected to the drain of the first mirror transistor and the source of the second mirror transistor respectively, and two output terminals outputting a first current and a second current respectively, wherein the switch current sampling signal is obtained according to the difference between the first current and the second current, and the positive and negative values of the switch current sampling signal reflect the direction of the actual inductor current.

15. The inductor current reconstruction circuit of claim 14, wherein, The inductor current generating circuit further comprises: an error amplification circuit configured to generate an error compensation signal according to the switch current sampling signal and an analog reconstruction signal; a reconstruction signal generating circuit configured to select whether to receive the switch current sampling signal through a switch circuit, and adjust the output current of a controllable current source according to the error compensation signal and the inductor voltage signal, wherein the output current of the controllable current source charges and discharges a capacitor, so as to generate the analog reconstruction signal at both ends of the capacitor, and the current analog signal is part of the analog reconstruction signal.

16. The inductor current reconstruction circuit of claim 14, wherein, The phase of the switch current sampling signal corresponds to the direction of the actual inductor current in real time.

17. The inductor current reconstruction circuit of claim 15, wherein, The reconstruction signal output circuit comprises: a first output switch turned on in the first interval to transmit the switch current sampling signal to the output terminal of the reconstruction signal output circuit; and a second output switch turned on in intervals other than the first interval to transmit the analog reconstruction signal to the output terminal of the reconstruction signal output circuit.

18. The inductor current reconstruction circuit of claim 15, wherein, Through the switch circuit, an input terminal of the error amplification circuit selects one of the analog reconstruction signal and the switch current sampling signal.

19. The inductor current reconstruction circuit of claim 15, wherein, The output current of the controllable current source is positively related to the inductor voltage signal and negatively related to the error compensation signal.

20. The inductor current reconstruction circuit according to claim 15, wherein in a first sub-interval of the first interval, a current tracking signal is caused to track the switch current sampling signal in real time through the switch circuit, so as to be positively related to the inductor current, wherein the current tracking signal is part of the analog reconstruction signal; in a second sub-interval of the first interval, the analog reconstruction signal is coupled to an input terminal of the error amplification circuit through the switch circuit, and the variation rate of the current tracking signal is adjusted to track the variation rate of the inductor current, so as to adjust the output current of the controllable current source.

21. The inductor current reconstruction circuit of claim 20, wherein, In at least part of the off interval of the detected transistor, the output current of the controllable current source is adjusted according to the inductor voltage signal, and the current analog signal continuous to the current tracking signal is generated.

22. The inductor current reconstruction circuit of claim 20, wherein, In the second interval of the on interval of the detected transistor, the current analog signal is generated.

23. A power converter comprising the inductor current reconstruction circuit of any one of claims 14-22, further comprising a main power transistor, a rectifier transistor, and a control circuit; the control circuit generating a control signal to control switching states of the main power transistor and the rectifier transistor based on the reconstruction signal.

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