Method and apparatus for protecting dielectric films during microelectronic assembly processing

Abstract

The present application relates to methods and apparatus for protecting dielectric films during microelectronic component processing. Methods and apparatus for protecting dielectric films on microelectronic components from contamination associated with singulating wafers, picking singulated microelectronic components from wafers, and handling singulated microelectronic components for assembly with other components are disclosed.

Description

[0001] Priority claim

[0002] This application claims the benefit of the filing date of U.S. Patent Application No. 16 / 715,540, filed on December 16, 2019, entitled “Methods and Apparatus for Protection of Dielectric Films During Microelectronic Component Processing”. Technical Field

[0003] Embodiments disclosed herein relate to methods and apparatus for protecting dielectric films during microelectronic component processing. More particularly, embodiments disclosed herein relate to methods and apparatus for protecting dielectric films from surface contamination before and during stacking of microelectronic components to form an assembly. Background Art

[0004] As the performance of electronic devices and systems increases, an associated demand is to improve the performance of microelectronic components of such systems while maintaining or even shrinking the form factor. Such demands are often, but not exclusively, associated with mobile devices and high-performance devices. In order to maintain or reduce the footprint and height of assemblies of components in the form of microelectronic devices (e.g., semiconductor dies), three-dimensional (3D) assemblies of stacked components equipped with so-called through-silicon vias (TSVs) for vertical electrical (i.e., signal, power, ground / bias) communication between stacked components have become more common, because the use of preformed dielectric films in the bonding wires between components reduces the bonding wire thickness while increasing bonding wire uniformity. Such films include, for example, so-called non-conductive films (NCFs) and wafer-level underfills (WLUFs), such terms are often used interchangeably. Non-limiting examples of microelectronic devices including stacked components in the form of memory dies include so-called high bandwidth memories (HBMx), hybrid memory cubes (HBMs), and chip-to-wafer (C2W) assemblies.

[0005] In practice, and the term NCF is used for convenience, the NCF is bonded over and to the active surface of a bulk semiconductor substrate, typically in the form of a wafer such as a silicon wafer. The wafer is then singulated, for example by a diamond-coated dicing blade, along so-called "streets" between adjacent semiconductor die locations on the wafer while supported on a dicing tape supported on a film frame to provide individual semiconductor die, each having the NCF on its active surface. Even though the NCF may be laminated to a protective film during shipping and handling, once the NCF is laminated to the wafer, that protective film is stripped off before singulation occurs, exposing the upper, exposed surface of the NCF to contaminants during subsequent die handling and stacking.

[0006] Specifically, it has been found that particles generated by the singulation process and accidentally deposited on the exposed surface of the NCF can cause a significant reduction in the die yield per wafer. Such particles can be inorganic, such as silicon fragments, or organic, such as NCF residues, dicing tape residues, or particulates from other sources within the clean room environment. Silicon particles can, for example, cause die cracking when the particle size exceeds the bond wire thickness, while organic particles, if located on conductive elements such as solder-capped conductive pillars or under-bump metallization (UBM) of solder bumps, can cause solder non-wetting, thereby compromising electrical communication between stacked dies.

[0007] In the attached figure Figure 1 is a schematic diagram of die cracks caused by silicon particles in a bonding wire when a silicon particle having a size greater than the thickness of the bonding wire is inserted between two stacked semiconductor dies. Figure 2 On the left hand side is a schematic diagram of a bonding wire between two adjacent, stacked semiconductor dies and on the right hand side is a magnified view of the left circular pillar-to-pad arrangement showing the non-wetting of the pillar and the resulting open connection due to the presence of foreign organic material O at the pillar-to-pad interface. Figure 3 is a schematic diagram showing the chip residue on the back side of the die caused by dicing on the dicing tape, and Figure 4 is a schematic diagram of die backside debris caused by dicing.

[0008] It has been determined that the two aforementioned types of particulate contaminants on the exposed NCF surface cause a significant reduction in die yield, particularly in the case of blade dicing (i.e., singulation) processes, resulting in appreciable and numerous particulate fragments. It should be noted that the die yield due to NCF contaminants gradually deteriorates during processing, starting from the debonding of the wafer from the carrier wafer after (i.e., post) wafer slotting, after lamination of the wafer to the dicing tape supported on a film frame, and after dicing. If a 60 μm contaminant particle size is used as a baseline for determining damaged die (i.e., die remnants), the yield gradually decreases from almost 100% after debonding to over 90% after dicing, with about half of the defective die of the wafer being damaged by silicon (i.e., solid) particles and about half being damaged by organic (i.e., transparent) particles. However, if a 20 μm contaminant particle size is used as a baseline, the yield drops from over 95% after debonding to less than 75% after dicing, where again about half of the defective dies on the wafer are damaged by silicon (i.e., solid) particles and about half are damaged by organic (i.e., transparent) particles.

[0009] Thus, the inventors have recognized that it would be desirable to continue protecting the exposed NCF surface until shortly before each individual die is picked up to be stacked with other dies in a pick and place operation. Summary of the invention

[0010] In an embodiment, a method includes: providing a substrate having a non-conductive film (NCF) thereon and a protective film on the NCF; segmenting the protective film to correspond to microelectronic device locations of the substrate; separating the substrate into microelectronic devices corresponding to the microelectronic device locations; lifting the segmented protective film from the microelectronic devices; and removing the microelectronic devices from which the segmented protective film has been lifted.

[0011] In an embodiment, a method includes: providing a substrate having a non-conductive film (NCF) thereon and a protective film on the NCF; segmenting the protective film to correspond to microelectronic device locations of the substrate; separating the substrate into microelectronic devices corresponding to the microelectronic device locations; lifting the segmented protective film from the microelectronic devices; and removing the microelectronic devices from which the segmented protective film has been lifted.

[0012] In an embodiment, a system includes: a support for a substrate configured with microelectronic device locations; a dicing saw programmed to singulate the substrate into microelectronic devices; an apparatus for removing protective film segments from NCF segments on the microelectronic devices; a pick-up tool for lifting and inverting individual microelectronic devices for placement on other components to form a component stack; and a bonding head for thermocompression bonding of conductive elements of the component stack. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 Schematic diagram of wafer cracks caused by silicon particles in the bonding wire;

[0014] Figure 2 on the left hand side is a schematic diagram of a bond wire between two adjacent, stacked semiconductor dies and on the right hand side is an enlarged view of the left circular pillar-to-pad arrangement showing non-wetting of the pillar and the resulting open connection due to the presence of foreign organic material;

[0015] Figure 3 is a schematic diagram showing chip residue on the back side of a die caused by dicing on a dicing tape;

[0016] Figure 4 is a schematic diagram showing chipping on the back side of a die caused by dicing;

[0017] Figures 5A to 5D2 is a series of schematic cross-sectional views depicting a process for protecting NCFs on a semiconductor wafer from contamination prior to picking up semiconductor die of the wafer and illustrating two implementations thereof, in accordance with an embodiment of the present invention;

[0018] Figures 6A to 6D is a series of schematic cross-sectional views depicting a process for protecting NCFs on a semiconductor wafer from contamination prior to picking up semiconductor die of the wafer and illustrating two implementations thereof, according to other embodiments of the present invention;

[0019] Fig. 7A and 7B is a schematic partial cross-sectional side view of a method and apparatus for removing protective film segments from individual semiconductor dies prior to picking the individual semiconductor dies from a wafer;

[0020] Figure 8 is a schematic side cross-section of a stack of microelectronic assemblies in the form of semiconductor die processed in accordance with an embodiment of the invention and mounted to a substrate; and

[0021] Figures 9A1 to 9D is a collection of schematic illustrations of systems for implementing embodiments of the invention. DETAILED DESCRIPTION

[0022] The following description provides specific details such as size, shape, material composition and orientation in order to provide a thorough description of embodiments of the present invention. However, it will be understood by those skilled in the art that embodiments of the present invention may be practiced without necessarily adopting these specific details. Embodiments of the present invention may be practiced in conjunction with conventional manufacturing techniques employed in industry. In addition, the description provided below does not form a complete process flow for manufacturing the 3D microelectronic device or equipment employed in this process. Only those process actions and structures necessary for understanding embodiments of the present invention are described in detail below. Additional actions for forming a complete 3D microelectronic device or complete structure comprising multiple stacked components, or a complete 3D microelectronic device, may be performed by conventional manufacturing processes.

[0023] The drawings presented herein are for illustrative purposes only and are not intended to be actual views of any particular material, component, structure, device, or system. It is expected that the shape variations depicted in the drawings due to, for example, manufacturing techniques and / or tolerances are present. Therefore, the embodiments described herein should not be interpreted as being limited to a specific shape or region as described, but rather include shape deviations, for example, caused by manufacturing. For example, a region described or described as box-shaped may have rough and / or nonlinear features, and a region described or described as circular may include some rough and / or linear features. In addition, the sharp angles between the described surfaces may be rounded, and vice versa. Therefore, the regions illustrated in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shape of the regions and do not limit the scope of the claims. The drawings are not necessarily drawn to scale.

[0024] For convenience and clarity, similar elements and features in the various embodiments of the invention as described herein are referred to by the same or similar reference numerals and other identifiers.

[0025] As used herein, the terms "comprising," "including," "containing," "characterized by," and their grammatical equivalents are inclusive or open-ended terms that do not exclude additional, unrecited elements or methodological actions, and encompass the more restrictive terms "consisting of," and "consisting essentially of," and their grammatical equivalents. As used herein, the term "may," with respect to a material, structure, feature, or methodological action, indicates that this is contemplated for use in embodiments of the invention and this term is used in preference to the more restrictive term "is" in order to avoid any suggestion that other compatible materials, structures, features, and methods with which use may be combined should or must be excluded.

[0026] As used herein, the terms "longitudinal", "vertical", "lateral", and "horizontal" refer to a major plane of a substrate (e.g., a substrate material, a substrate structure, a substrate configuration, etc.) in or on which one or more structures and / or features are formed and are not necessarily defined by the earth's gravitational field. A "lateral" or "horizontal" direction is a direction substantially parallel to the major plane of a substrate, while a "longitudinal" or "vertical" direction is a direction substantially perpendicular to the major plane of a substrate. A major plane of a substrate is defined by a surface of the substrate having a relatively large area compared to other surfaces of the substrate.

[0027] As used herein, spatially relative terms, such as "below," "beneath," "lower," "bottom," "above," "over," "up," "top," "front," "rear," "left," "right," and the like, may be used to describe the relationship of one element or feature to another or elements or features for ease of description, as illustrated in the figures. Unless otherwise specified, spatially relative terms are intended to encompass different orientations of the material other than the orientation depicted in the figures. For example, if the material in the figure is reversed, then the element described as "above" or "above" or "on the other elements or features" or "on the top of the other elements or features" would be oriented "below" or "below" or "under" or "under" or "on the bottom of the other elements or features." Thus, the term "above" may encompass both the above and below orientations depending on the context in which the term is used, as will be apparent to one of ordinary skill in the art. The material may be oriented in other ways (e.g., rotated 90 degrees, reversed, flipped) and the spatially relative descriptors used herein interpreted accordingly.

[0028] As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0029] As used herein, the terms "configured" and "configuration" refer to the size, shape, material composition, orientation, and arrangement of at least one structure and at least one device to facilitate operation of the structure and one or more of the devices in a predetermined manner.

[0030] As used herein, the term "substantially" with respect to a given parameter, property, or condition means and encompasses to the extent that one of ordinary skill in the art would understand that the given parameter, property, or condition is satisfied to a varying degree (e.g., within acceptable manufacturing tolerances). For example, depending on the particular parameter, property, or condition that is substantially satisfied, the parameter, property, or condition may be at least 90.0% satisfied, at least 95.0% satisfied, at least 99.0% satisfied, or even at least 99.9% satisfied.

[0031] As used herein, "about" or "approximately" with respect to a numerical value of a particular parameter includes the numerical value and the degree of deviation from the numerical value within an acceptable tolerance for the particular parameter as would be understood by one of ordinary skill in the art. For example, "about" or "approximately" with respect to a numerical value may include additional numerical values ​​within a range from 90.0% to 110.0% of the numerical value (e.g., within a range from 95.0% to 105.0% of the numerical value, within a range from 97.5% to 102.5% of the numerical value, within a range from 99.0% to 101.0% of the numerical value, within a range from 99.5% to 100.5% of the numerical value, or within a range from 99.9% to 100.1% of the numerical value).

[0032] As used herein, the terms "layer" and "film" mean and include a layer, sheet, or coating of material residing on a structure, which layer or coating may be continuous or discontinuous between portions of the material and may be conformal or non-conformal, unless otherwise indicated.

[0033] As used herein, the term "substrate" means and includes a base material or structure on which additional materials are formed. The substrate may be a semiconductor substrate, a base semiconductor layer on a support structure, a metal electrode, or a semiconductor substrate on which one or more materials, layers, structures, or regions are formed. The materials on the semiconductor substrate may include, but are not limited to, semiconductive materials, insulating materials, conductive materials, and the like. The substrate may be a conventional silicon substrate or other bulk substrate including a layer of semiconductive material. As used herein, the term "bulk substrate" means and includes not only silicon wafers, but also silicon-on-insulator ("SOI") substrates, such as silicon-on-sapphire ("SOS") substrates and silicon-on-glass ("SOG") substrates, silicon epitaxial layers on base semiconductor pedestals, and other semiconductor or optoelectronic materials, such as silicon germanium, germanium, gallium arsenide, gallium nitride, and indium phosphide. The substrate may be doped or undoped.

[0034] As used herein, the terms "comprising," "including," "containing," "characterized by," and their grammatical equivalents are inclusive or open-ended terms that do not exclude additional, unrecited elements or method actions, and encompass the more restrictive terms "consisting of," and "consisting essentially of," and their grammatical equivalents.

[0035] As used herein, the term "may" with respect to a material, structure, feature, or method action indicates that this is intended for use in implementing an embodiment of the invention and this term is used in preference to the more restrictive term "is" so as to avoid any suggestion that other compatible materials, structures, features, and methods with which they may be used should or must be excluded.

[0036] Embodiments may be described in terms of processes depicted as flow charts, job diagrams, structure diagrams, or block diagrams. Although a flow chart may describe operational actions as a sequential process, many of these actions may be performed in another order, in parallel, or substantially simultaneously. In addition, the order of the actions may be rearranged. A process may correspond to a method, a thread, a function, a procedure, a subroutine, a subprogram, other structures, or a combination thereof.

[0037] Any reference to an element herein using titles such as "first," "second," etc. does not limit the number or order of those elements unless such limitation is explicitly stated. Rather, these titles may be used herein as a convenient method of distinguishing between two or more elements or examples of elements. Thus, a reference to a first and second element does not mean that only two components may be employed there, or that the first component must precede the second component in some manner. Additionally, unless otherwise stated, a group of elements may include one or more elements.

[0038] Various embodiments of the method of the present invention are described and illustrated herein. However, the embodiments share a common initial implementation scheme, such as Fig. 6A , in which a semiconductor (eg, silicon) wafer has an NCF laminated over an active surface, the NCF being covered by a protective film.

[0039] Figures 5A to 5D2 Schematically depicts a wafer singulation and semiconductor die pick-up process sequence of a semiconductor wafer having an NCF laminated over its active surface according to an embodiment of the present invention. This arrangement is employed when semiconductor dies singulated from a wafer are stacked together with the NCF, thereby providing a dielectric in the bonding wires between adjacent dies.

[0040] like Figure 5A As shown in FIG. 1 , a semiconductor wafer 100 is mounted with its active surface 102 facing upward on a dicing tape 104 supported on a film frame 106. Conductive pillars 108 protrude from the active surface 102 and are covered by an NCF 110 having a thickness that may be greater than, equal to, or less than the height of the conductive pillars. As a non-limiting example, Figure 5AAn NCF 110 is illustrated having a thickness greater than the conductive pillars 108. A protective film 112 bonded to the NCF 110 covers the NCF 110 to protect it from contamination. This protective film 112 may be disposed on the NCF 110 as received from a supplier, or may be photodefinable and applied to the NCF 110 after lamination to the wafer 100 in the form of a dry film photoresist or a photodefinable polyimide. Suitable dry film photoresists are commercially available from numerous sources, including Nikko-Materials Co., Ltd, DuPont Electronics & Imaging, Engineered Materials Systems, Inc., and the like.

[0041] Conventionally, the protective film 112 is peeled off from the NCF 110 before singulating the semiconductor wafer 100. Figure 5B , instead of removing the protective film 112 after laminating the NCF 110 to the wafer 100, a maskless aligner is used to photolithographically open the die scribe lines ST in the protective film 112 extending into the NCF 110. Such maskless aligners are commercially available, for example, from EV Group, headquartered in Austria with offices throughout the United States, and identified as MLE Technology, and from Heidelberg Instruments, Inc., Torrance, California, and identified as MLA 150. Thus, the protective film segments 112S remain over the NCF 110 over each semiconductor die location 114L of the semiconductor wafer 100.

[0042] like Figure 5C , according to an embodiment of the present invention, using, for example, a diamond-coated dicing blade, resulting in scribe lines 116, which may also be referred to as cuts, to segment the NCF 110 and the wafer 100 into NCF segments 110S and semiconductor dies 114, respectively, extending to the dicing tape 104 to achieve singulation of the wafer 100 into semiconductor dies 114 within the dicing streets ST of the separated die locations 114L. As a result of this process, inorganic particles I from the material of the semiconductor wafer 100 and organic particles O from the dicing tape 104 and the NCF 110 are deposited (shown greatly enlarged for clarity) on the protective film segments 112S instead of the NCF segments 110S. Other particles may also be dispersed on the protective film segments 112S, falling from adjacent dies and from the environment in which the wafer 100 resides during pick-up.

[0043] like Fig.5D1, in one implementation of this embodiment of the invention, conventional stripping equipment (such as, for example, Takao Semiconductor Process Equipment from GTI Technologies, Inc. of Shelton, CT or various strippers from Nitto Inc. of Teaneck, NJ) is used to substantially simultaneously remove the protective film segments 112S from the semiconductor dies 114 of the singulated wafer 100. After removing the protective film segments 112S, conventional pick and place equipment of a thermocompression bonding tool is used to remove each semiconductor die 114 having the NCF segments 110S, and the semiconductor dies 114 are flipped and stacked on a base wafer 100 or other base substrate, such as Figure 8 Using this method, when the protective film segment 112S is peeled off from the NCF segment 110S before picking up the semiconductor die 114, contaminants in the form of inorganic and organic particles caused by singulation of the semiconductor wafer 100 deposited on the protective film segment 112S are removed, so that the die picking as shown by the arrow P does not cause contaminant residues from the NCF segment 110S of the picked-up die 114 to fall on another die 114.

[0044] like Fig.5D2 As shown in FIG. 1 , in another implementation of this embodiment of the present invention, the protective film segment 112s is allowed to remain on the NCF segment 110S until immediately before each semiconductor die 114 is removed from the dicing tape 104. In this implementation, tool modifications (with respect to the pick-and-place equipment of the thermocompression bonding tool used to remove each semiconductor die 114 from the dicing tape 104) are made to the pick-and-place equipment of the thermocompression bonding tool used to remove each semiconductor die 114 from the dicing tape 104. Fig. 7A and 7B The protective film segments 112S described above allow for individual removal of the protective film segments 112S from each semiconductor die 114 immediately before each semiconductor die 114 is picked up from the dicing tape 104 as shown by arrow P to be stacked on another die or wafer before thermocompression bonding the stacked semiconductor die 114 or in some cases a base wafer configured with semiconductor die positions. Therefore, if contaminant residues are present on the protective film segments 112S, if they fall during the removal of the protective film segments 112S while being removed from the semiconductor die 114 to be picked up, they will fall on the protective film segments 112S remaining on the other semiconductor die 114 instead of the associated NCF segments 110S.

[0045] To provide further details, Fig. 7AA so-called "flipper head" 200 of a pick-and-place apparatus (e.g., a pick-up tool) is shown, which is cooperatively associated with a thermocompression bonding tool and is used to remove each semiconductor die 114 having NCF segments 110S from a dicing tape 104 and invert the assembly to be stacked on another semiconductor die 114 or semiconductor wafer. The pick-and-place apparatus has been modified with a film-assisted bonding (FAB) unit, such as a bonding head that cooperates with a thermocompression bonder to place a film between the bonding head and the back side of the semiconductor die undergoing thermocompression bonding to prevent contamination of the bonding head. However, in an embodiment of the present invention, the FAB unit is equipped with a film 202 having an adhesive coating 204, which may be referred to as an adhesive film for convenience. In operation, the FAB unit is configured to place a segment 202S of film 202 having adhesive 204 facing the semiconductor die 114 between the flipper head 200 and the protective film segment 112S to allow the flipper head 200 to contact the protective film segment 112S with the adhesive 204 in a first pass and lift or "strip" the protective film segment 112S from the NCF segment 110S while pressing the semiconductor die 114 upward against the flipper head 200 as indicated by arrow 124. The film 202 may be fed as a continuous tape from a roller source 206 of the FAB unit to provide a fresh film segment 202S having adhesive 204 to contact the protective film segment 112s over the NCF segment 110S of the target semiconductor die 114 to pull that protective film segment 112S away from the NCF segment 110S, after which the film 202 is advanced by the drive roller 208 a sufficient distance to present the fresh film segment 202S.

[0046] like Figure 7B, after removing the protective film segments 112S in the first pass, in one embodiment the flipper head 200 may then be rotated 180° about axis A as shown to place the pick-up surface 208 of the flipper head 200 in position to retrieve that die from the dicing tape 104 in a second pass of the flipper head 200 while pressing the right semiconductor die 114 upward as indicated by arrow 124 to facilitate release from the dicing tape 104. After picking up the semiconductor die 114, the flipper head 200 is then rotated 180° about axis A again to flip the picked semiconductor die 114 so that its backside faces upward and the conductive pillars 108 face downward to present and stack the semiconductor die 114 for thermocompression bonding. After placing the inverted semiconductor die 114, the pick and place device returns the flipper head 200 to the semiconductor wafer 100, the flipper head is rotated 180° again, and the protective film segment 112s of another target semiconductor die 114 contacts the fresh film segment 202S. Of course, the film 202 may be advanced before or after a given target semiconductor die 114 is picked up from the wafer 100. One of ordinary skill in the art will understand and appreciate that the device for picking up semiconductor dies singulated from a wafer and inverting the semiconductor dies for placement may include a pick and place tool separate from the bonding head of a thermocompression bonding tool, or may be integrated with the bonding head, both configurations being known. Similarly, the removal of the protective film segment 112S may be achieved by a device separate from the device for picking up, lifting, and inverting each singulated semiconductor die 114. Once the die stack or array of die stacks is completed, a thermocompression bond head is applied to the top of each die stack and heat and pressure (i.e., normal force) is applied to cause the conductive pillars 108 of each semiconductor die 114 to be forced through the material of the NCF and bonded with the aligned conductive pads on the upper surface of the next lower die or wafer in the stack while the resin material of the NCF in the bond wire is cured. By way of example only, the pillar-to-pad bond may be achieved by solder reflow in the case of solder tip pillars, or by diffusion bonding a metal (e.g., copper) pillar against a compatible metal pad.

[0047] Figures 6A to 6D Schematically depicts a wafer singulation and semiconductor die pick-up process sequence of a semiconductor wafer having NCF laminated over its active surface in preparation for stacking the resulting semiconductor dies according to an embodiment of the present invention. Figures 6A to 6D .

[0048] like Fig. 6A, a semiconductor wafer 100 is mounted with its active surface 102 facing upward on a dicing tape 104 supported on a film frame 106. Conductive pillars 108 protrude from the active surface 102 and may be covered by an NCF 110 having a thickness greater than the height of the conductive pillars, or alternatively covered by an NCF thickness commensurate with the height of the conductive pillars 108. Suitable NCFs in the form of uniform thickness, B-stage, highly filled (with, for example, silica particles of controlled size) films are commercially available from Nanotech, Dow Electronic Materials and Henkel Electronic materials, by way of example only. A preformed protective film 112 covers and is bonded to the NCF 110 to prevent contamination thereof. This protective film 112 may be applied to the NCF 110 after laminating the NCF 110 to the wafer 100, or may be pre-applied to the NCF 110 before applying the NCF 110 to the semiconductor wafer 100 to protect the NCF 110 during transportation and handling.

[0049] Conventionally, the preformed protective film 112 is peeled off from the NCF 110 before singulating the semiconductor wafer 100. Figure 6B , according to an embodiment of the present invention, a diamond-coated dicing blade is used, for example, to obtain a scribe line 116, which may also be referred to as a cut, to segment the protective film 112, NCF 110, and wafer 100 into protective film segments 112S, NCF segments 110S, and semiconductor dies 114, respectively, and to extend to and slightly into the dicing tape 104 to achieve singulation of the wafer 100 into semiconductor dies 114. As a result of this process, inorganic particles I from the material of the semiconductor wafer 100 and organic particles O from the dicing tape 104, protective film segments 112S, and NCF segments 110S are deposited on the protective film segments 112S. Other particles may also be dispersed on the protective film segments 112S, falling from adjacent dies and from the environment in which the wafer 100 resides during pick-up.

[0050] like Figure 6C, the protective film segment 112S over the right semiconductor die 114 is removed as indicated by arrow 118. Prior to removing the protective film segment 112S, and depending on the composition of the protective film 112, this protective film segment 112S may be locally heated as indicated by ellipse 120 to weaken the bond between that protective film segment 112S and its underlying NCF segment 110S, or all protective film segments 112S heated, for example, in a low temperature oven. Suitable protective films include, for example, REVALPHA thermal release tape from NittoDenko Corporation, providing low temperature (e.g., 90° C.), zero force release, and residue-free removal. A similar product, Xinst 6011-15 degree thermal release tape, is commercially available from Shenzhen Xinst Technology Co., Ltd. of Shenzen, Peoples Republic of China. Alternatively and as another example, a protective film segment 112S having a suitable composition and including a base polymer, oligomers, and a photoinitiator may be blanket exposed to ultraviolet (UV) radiation (i.e., light) at a wavelength of 250 nm to 360 nm to weaken the bond. Such films are commercially available, for example, from Ultron Systems, Inc. of Moorpark, CA and Furukawa Electric Group, which have offices around the world.

[0051] like Fig.6D , as shown in FIG. 1 , the right semiconductor die 114 having the NCF segment 110S is removed from the dicing tape 104 as indicated by arrow 122 and ellipse 120 for placement and stacking for thermocompression bonding to form, for example, Figure 8 The semiconductor device described in Figure 8 Depicted is a stack of semiconductor dies 114 on a base wafer 100 or other base substrate. Since the right semiconductor die 114 is removed, there is no significant amount of residue on the NCF segment 110S that falls onto the left semiconductor die 114. However, to the extent that any additional residue in the form of inorganic particles I and organic particles O exists on the NCF segment 110S of the right semiconductor die 114 or on the die itself, this residue will fall onto the protective film segment 112S of the left semiconductor die 114 rather than its exposed NCF segment 110S.

[0052] To provide further details, Fig. 7AA so-called "flipper head" 200 of a pick-and-place apparatus (e.g., a pick tool) is shown, which is cooperatively associated with a thermocompression bonding tool and is used to remove each semiconductor die 114 having an NCF segment 110 from a dicing tape 104 and flip the assembly to be stacked on another semiconductor die 114 or a semiconductor wafer. The pick-and-place apparatus has been modified with a film assisted bonding (FAB) unit, such as a bonding head that cooperates with a thermocompression bonder to place a film between the bonding head and the back side of the semiconductor die undergoing thermocompression bonding to prevent contamination of the bonding head. However, in an embodiment of the present invention, the FAB unit is equipped with a film 202 having an adhesive coating 204, which may be referred to as an adhesive film for convenience. In operation, the FAB unit is configured to place a segment 202S of film 202 having adhesive 204 facing the semiconductor die 114 between the flipper head 200 and the protective film segment 112S to allow the flipper head 200 to contact the protective film segment 112S with the adhesive 204 in a first pass and lift or "debond" the protective film segment 112S from the NCF segment 110S while pressing the semiconductor die 114 upward against the flipper head 200 as indicated by arrow 124. The film 202 may be fed as a continuous tape from a roller source 206 of the FAB unit to provide a fresh film segment 202S having adhesive 204 to contact the protective film segment 112S over the NCF segment 110S of the target semiconductor die 114 to pull that protective film segment 112S away from the NCF segment 110S, after which the film 202 is advanced by the drive roller 208 a sufficient distance to present the fresh film segment 202S.

[0053] like Figure 7B, after removing the protective film segments 112S in the first pass, in one embodiment the flipper head 200 may then be rotated 180° about axis A as shown to place the pick-up surface 208 of the flipper head 200 in position to retrieve that die from the dicing tape 104 in a second pass of the flipper head 200 while pressing the right semiconductor die 114 upward as indicated by arrow 124 to facilitate release from the dicing tape 104. After picking up the semiconductor die 114, the flipper head 200 is then rotated 180° about axis A again to flip the picked semiconductor die 114 so that its backside faces upward and the conductive pillars 108 face downward to present and stack the semiconductor die 114 for thermocompression bonding. After placing the inverted semiconductor die 114, the pick and place device returns the flipper head 200 to the semiconductor wafer 100, the flipper head is rotated 180° again, and the protective film segment 112s of another target semiconductor die 114 contacts the fresh film segment 202S. Of course, the film 202 may be advanced before or after a given target semiconductor die 114 is picked up from the wafer 100. One of ordinary skill in the art will understand and appreciate that the device for picking up semiconductor dies singulated from a wafer and inverting the semiconductor dies for placement may include a pick and place tool separate from the bonding head of a thermocompression bonding tool, or may be integrated with the bonding head, both configurations being known. Similarly, the removal of the protective film segment 112S may be achieved by a device separate from the device for picking up, lifting, and inverting each singulated semiconductor die 114. Once the die stack or array of die stacks is completed, a thermocompression bond head is applied to the top of each die stack and heat and pressure (i.e., normal force) is applied to cause the conductive pillars 108 of each semiconductor die 114 to be forced through the material of the NCF and bonded with the aligned conductive pads on the upper surface of the next lower die or wafer in the stack while the resin material of the NCF in the bond wire is cured. By way of example only, the pillar-to-pad bond may be achieved by solder reflow in the case of solder tip pillars, or by diffusion bonding a metal (e.g., copper) pillar against a compatible metal pad.

[0054] Reference now Figures 9A1 to 9D And first refer to Fig.9A1 , the system 300 includes a support 302, such as a dicing tape, supported by a film frame configured to support a substrate such as a semiconductor wafer 100, the substrate being configured with microelectronic device locations such as semiconductor die locations 114L. The semiconductor wafer 100 has an NCF 110 on its active surface 102 and a protective film 112 located on the NCF 110. In an embodiment, a maskless aligner 304 is used to segment the protective film 112, which in this embodiment may include a dry photoresist. Fig.9A2, a dicing saw 306 is mounted and configured to singulate semiconductor die locations 114L into microelectronic devices, such as semiconductor die 114, as shown in FIG. Fig. 9B . The dicing saw separates the wafer 100 into semiconductor dies 114, each having an NCF segment 110S and a protective film segment thereon. The protective film 112 may or may not be segmented, depending on the embodiment. In addition, if the protective film 112 comprises a heat release tape or a UV sensitive film, heat or ultraviolet radiation may be applied to the protective film 112 using appropriate equipment to weaken the bond to the NCF 110 and facilitate removal. Fig. 9B In the embodiment, the debonding device 308 may be used to lift all protective film segments 112S from the NCF segments 110S substantially simultaneously. Fig. 9C As shown in FIG. 1 , a film assisted bonding (FAB) unit 310 may be modified using a tape 202 having an adhesive 204 thereon to individually contact each protective film segment 112S and lift it from the underlying NCF segment 110S, thereafter as Fig.9D , the underlying NCF segments 110S and their associated semiconductor dies 114 are removed from the support 302 by a pick-up tool 312 cooperatively associated with the thermocompression bonding apparatus. The pick-up tool 312 with the semiconductor die 114 and NCF segments 110S is then inverted and presented to a bond head 314 to be moved to and stacked on another component, as is known to one of ordinary skill in the art. Alternatively, the pick-up tool may be configured to not only invert the semiconductor die 114 but also move the die and stack the die independently of the bond head. Of course, as previously described, the use of the FAB unit 310 to remove the protective film segments may be incorporated into the functionality of the pick-up tool 312. Regardless of the embodiment implemented, whether all protective film segments 112S are removed substantially simultaneously or individually, the likelihood of contamination of the NCF segments 110S is significantly reduced, if not eliminated.

[0055] By significantly reducing the likelihood of surface contamination of the NCF in the short period after lamination on a semiconductor wafer until it is picked up from the dicing tape and stacked with semiconductor dies singulated from the wafer, or even immediately before it, the yield of semiconductor devices including stacked dies processed according to embodiments of the present invention can be significantly improved by a significant reduction in the likelihood of die cracking at the bond wires and a significant reduction in opens between conductive pillars and pads of adjacent dies. It should be noted that embodiments of the present invention allow for multiple picks of semiconductor dies from the same wafer without the risk of contaminant particles from the die falling on other dies of the same wafer still on the dicing tape. In addition, embodiments of the present invention eliminate the need to store unsingulated semiconductor wafers laminated with NCFs waiting for singulation in a processing queue in a chamber filled with an inert (e.g., N2) atmosphere to reduce the likelihood of contamination, thereby reducing handling time, processing costs, thereby eliminating equipment and gas costs, and reducing space requirements in the fab.

[0056] In an embodiment, a method includes: providing a substrate having a non-conductive film (NCF) thereon and a protective film on the NCF; segmenting the protective film to correspond to microelectronic device locations of the substrate; separating the substrate into microelectronic devices corresponding to the microelectronic device locations; lifting the segmented protective film from the microelectronic devices; and removing the microelectronic devices from which the segmented protective film has been lifted.

[0057] In an embodiment, a method includes: providing a substrate having a non-conductive film (NCF) thereon and a protective film on the NCF; segmenting the protective film to correspond to microelectronic device locations of the substrate; separating the substrate into microelectronic devices corresponding to the microelectronic device locations; lifting the segmented protective film from the microelectronic devices; and removing the microelectronic devices from which the segmented protective film has been lifted.

[0058] In an embodiment, a system includes: a support for a substrate configured with microelectronic device locations; a dicing saw programmed to singulate the substrate into microelectronic devices; an apparatus for removing protective film segments from NCF segments on the microelectronic devices; a pick-up tool for lifting and inverting individual microelectronic devices for placement on other components to form a component stack; and a bonding head for thermocompression bonding of conductive elements of the component stack.

[0059] Although certain illustrative embodiments have been described in conjunction with the figures, it will be recognized and appreciated by those skilled in the art that the embodiments encompassed by the present invention are not limited to those embodiments explicitly shown and described herein. Rather, many additions, deletions, and modifications may be made to the embodiments described herein without departing from the scope of the embodiments encompassed by the present invention, such as the embodiments claimed hereinafter, including legal equivalents. Additionally, features from one disclosed embodiment may be combined with features of another disclosed embodiment while still being encompassed within the scope of the present invention.

Claims

1. A method for processing a semiconductor device, comprising: Mounting a semiconductor wafer on a dicing tape, the semiconductor wafer comprising an active surface covered with a non-conductive film NCF; applying a protective film to the non-conductive film NCF located over the active surface of the semiconductor wafer; separating the protective film into protective film segments between die locations on the semiconductor wafer; singulating the die locations on the semiconductor wafer into semiconductor dies, each of the semiconductor dies comprising a cut wafer, a protective film segment, and an associated NCF segment located between the protective film segment and the cut wafer; physically removing the protective film segment from the associated NCF segment of the semiconductor die without removing remaining protective film segments from remaining NCF segments of remaining semiconductor dies; and The semiconductor dies are picked up, allowing the protective film segments to remain on the associated NCF segments of the semiconductor dies until just prior to individually removing the semiconductor dies from the dicing tape. 2 . The method of claim 1 , wherein separating the protective film into protective film segments is accomplished before singulating the die sites on the semiconductor wafer into semiconductor dies each having an NCF segment thereover.

3. The method of claim 1, wherein separating the protective film into protective film segments and singulating the die locations on the semiconductor wafer into semiconductor dies each having an NCF segment thereover are accomplished substantially simultaneously. 4 . The method of claim 1 , wherein picking up individual semiconductor dies is accomplished by a pick-up tool cooperatively associated with a thermocompression bonding apparatus or by a bond head carrying the pick-up tool. 5 . The method of claim 4 , further comprising inverting each individual semiconductor die after picking up the each individual semiconductor die and stacking the each individual semiconductor die on another component.

6. The method according to claim 1, wherein: Applying a protective film to the non-conductive film NCF located over the active surface of the semiconductor wafer comprises bonding a preformed protective film to said NCF.

7. The method of claim 6, further comprising weakening the bond between the preformed protective film segment to the associated NCF segment by applying at least one of heat and ultraviolet radiation to the preformed protective film segment before removing the protective film segment from the associated NCF segment.

8. A method for processing a semiconductor device, comprising: Mounting a semiconductor wafer on a dicing tape, the semiconductor wafer comprising an active surface covered with a non-conductive film NCF; applying a protective film including a dry film photoresist to the non-conductive film NCF located over the active surface of the semiconductor wafer; patterning the dry film photoresist of the protective film using a maskless aligner and separating the protective film into protective film segments; cutting the semiconductor wafer into semiconductor dies, each of the semiconductor dies comprising a cut wafer, a protective film segment, and an associated NCF segment between the protective film segment and the cut wafer; physically removing the protective film segment from the associated NCF segment of the semiconductor die without removing the remaining protective film segments from the remaining NCF segments of the remaining semiconductor dies; and The semiconductor die is picked up, allowing the protective film segments to remain on the associated NCF segments of the semiconductor die until just prior to removing the semiconductor die from the dicing tape.

9. The method of claim 8, wherein immediately prior to removing the semiconductor die from the dicing tape, removing the protective film segment from the associated NCF segment of the semiconductor die comprises: By applying an adhesive film segment only to the protective film segment and lifting the protective film segment from the associated NCF segment of the semiconductor die.

10. A method for processing a semiconductor device, comprising: Mounting a semiconductor wafer on a dicing tape, the semiconductor wafer comprising an active surface covered with a non-conductive film NCF; applying a protective film to the non-conductive film NCF located over the active surface of the semiconductor wafer; separating the protective film into protective film segments between die locations on the semiconductor wafer; singulating the die locations on the semiconductor wafer into semiconductor dies, each of the semiconductor dies comprising a cut wafer, a protective film segment, and an associated NCF segment located between the protective film segment and the cut wafer; using the adhesive film segment that contacts only the protective film segment to physically remove the protective film segment from the associated NCF segment of the semiconductor die without removing remaining protective film segments from remaining NCF segments of remaining semiconductor dies; and The semiconductor dies are picked up, allowing the protective film segments to remain on the associated NCF segments of the semiconductor dies until just prior to individually removing the semiconductor dies from the dicing tape.

11. A method for processing a semiconductor device, comprising: Mounting a semiconductor wafer on a dicing tape, the semiconductor wafer comprising an active surface covered with a non-conductive film NCF; applying a protective film to the non-conductive film NCF located over the active surface of the semiconductor wafer; segmenting the protective film into protective film segments corresponding to microelectronic device locations of the substrate; After segmenting the protective film into the protective film segments, separating the substrate and the NCF into microelectronic devices corresponding to the positions of the microelectronic devices, each of the microelectronic devices having a protective film segment and an associated NCF segment thereon; lifting the protective film segment from the associated NCF segment of the microelectronic device without lifting remaining protective film segments from remaining NCF segments of remaining semiconductor dies; and The semiconductor dies are picked up, allowing the protective film segments to remain on the associated NCF segments of the semiconductor dies until just prior to individually removing the semiconductor dies from the dicing tape.

12. The method according to claim 11, wherein: Applying a protective film to the NCF includes applying the protective film to the NCF in the form of a dry film photoresist, and segmenting the protective film includes patterning the dry film photoresist using a maskless aligner.

13. The method according to claim 11, wherein: Applying a protective film to the NCF includes providing a preformed protective film on the NCF.

14. The method of claim 13, wherein the protective film is bonded to the NCF, and further comprising applying at least one of heat and ultraviolet radiation to weaken the bond prior to removing the protective film segment from the associated NCF segment.

15. A system for processing a semiconductor device, comprising: A support member for a substrate provided with a location of a microelectronic device; a dicing saw programmed to singulate the substrate into microelectronic devices; an apparatus configured for removing the protective film segments from the associated non-conductive NCF segments one at a time without removing the remaining protective film segments from the remaining non-conductive NCF segments on the remaining microelectronic devices; a pick-up tool for lifting and inverting an individual microelectronic device for placement on other components to form a component stack, the pick-up tool being configured to pick up the individual microelectronic device immediately after removing the protective film segment from the associated NCF segment of the individual microelectronic device; and A bonding head is used to thermocompressively bond the conductive elements of the component stack.

16. The system of claim 15, wherein the apparatus configured for removing the protective film segments from the associated non-conductive NCF segments one at a time comprises a film-assisted engagement unit configured to lift the protective film segments from the associated non-conductive NCF segments one at a time.

17. The system of claim 16, wherein the membrane assisted engagement unit is associated with the pick-up tool.

18. The system of claim 15, further comprising a device for weakening a bond between the protective film segment and the associated non-conductive NCF segment prior to removing the protective film segment from the associated non-conductive NCF segment.

19. The system of claim 18, wherein the means for weakening the bond of the protective film segment to the associated non-conductive NCF segment comprises a heat source or an ultraviolet radiation source.

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