Method for manufacturing a receiver substrate of a semiconductor-on-insulator structure for radio frequency applications and method for manufacturing such a structure

Abstract

The present invention relates to a method for manufacturing a receiving substrate (30) of a semiconductor-on-insulator structure for radio frequency applications, the method comprising the following steps: - providing a semiconductor substrate, the semiconductor substrate comprising a base substrate (1) made of a single crystal material and a charge trapping layer (2) made of polycrystalline silicon arranged on the base substrate (1), - oxidizing the charge trapping layer (2) to form an oxide layer (3) arranged on the charge trapping layer, the method being mainly characterized in that the oxidation of the charge trapping layer (2) is at least partially performed at a temperature lower than or equal to 875°C in the following manner: - starting the oxidation at a first temperature (T1) between 750°C and 1000°C, - reducing the temperature to a second temperature (T2) lower than the first temperature (T1) and between 750°C and 875°C, - continuing the oxidation at the second temperature (T2).

Description

Technical Field

[0001] The invention relates to the manufacture of a substrate called a "receiver substrate" for manufacturing semiconductor-on-insulator structures for radio frequency applications. The invention also relates to a method for manufacturing such structures by transferring layers of a second substrate called a "donor substrate" to the recipient substrate. Background Art

[0002] In the context of manufacturing a semiconductor-on-insulator structure (abbreviated as SeOI), a donor substrate is bonded to a recipient substrate, a specific example of which is a silicon-on-insulator (SOI) structure when the semiconductor is silicon.

[0003] Typically, the provider substrate comprises a single-crystalline semiconductor substrate, for example a single-crystalline silicon substrate, whereas the recipient substrate comprises at least one base substrate particularly intended to serve as a carrier for thin semiconductor layers that have to be transferred from the provider substrate to the recipient substrate.

[0004] An oxide layer is formed on the provider substrate or the receiver substrate so that after the provider substrate and the receiver substrate are bonded, the oxide layer is located at the bonding interface. The oxide layer is then called "buried" and is referred to as "BOX" (abbreviation for Buried OXide).

[0005] For radio frequency (RF) applications, a polysilicon layer is integrated into a receiver substrate below a buried oxide layer to capture charges present at the interface between the base layer and the buried oxide layer. The polysilicon layer is disposed on the base layer of the receiver substrate before bonding.

[0006] An oxide layer is formed on a substrate made of a single crystal semiconductor of a donor substrate using a first method called "direct bonding" or on a polysilicon layer of a receiver substrate using a second method called "reverse bonding".

[0007] Reference Figure 1 In the direct bonding method, a receiving substrate 10 and a providing substrate 20 are provided, the receiving substrate 10 includes a base substrate 1 covered with a charge trapping layer 2 made of polycrystalline silicon, and the providing substrate 20 includes a substrate 4 made of a single crystal semiconductor. The substrate made of a single crystal material of the providing substrate is oxidized to form an oxide layer 3.

[0008] Next, atomic substances are implanted into the layer 4 made of single-crystalline material through the oxide layer 3 to form a region called a "weakened zone" in the layer made of single-crystalline material. The weakened zone is produced at a defined depth that corresponds substantially to the thickness of the layer to be transferred. The layer to be transferred then comprises the oxide layer and a fragment of the single-crystalline substrate.

[0009] The provider substrate 20 is then bonded to the receiver substrate 10 with the polysilicon layer 2 and the oxide layer 3 at the bonding interface, and then the provider substrate 20 is separated along the weakened area to transfer the oxide layer 3 and the fragments of the single crystal substrate to the receiver substrate 10 .

[0010] A disadvantage of the direct bonding method is that the oxide layer is located on the provider substrate. Therefore, during the implantation, the atomic species must pass through the oxide layer before reaching the single crystal layer, which requires high implantation energies. Currently, the higher the implantation energy, the greater the amount of ions to be implanted must be, and the lower the implantation flow (current density), which leads to an increase in production costs, limits the feasibility of the method, and in particular limits the maximum thickness of the oxide layer. In addition, the method reduces the reusability of the provider substrate, since some of the provider substrate is consumed to form the oxide layer.

[0011] Reference Figure 2 In the reverse bonding method, a receiving substrate 10 including a base substrate 1 covered with a charge trapping layer 2 made of polysilicon and a providing substrate 20 including a substrate 4 made of a single crystal semiconductor are provided. However, in contrast to the direct bonding method, an oxide layer 3 is formed directly on the receiving substrate 10 by oxidizing the charge trapping layer 2.

[0012] To form the weakened zone, an implantation of atomic species then takes place directly into the layer 4 of the provider substrate made of single-crystalline material without passing through the oxide layer 3. The layer to be transferred then comprises only a fragment of the single-crystalline substrate.

[0013] The provider substrate is then bonded to a receiver substrate with the single crystal substrate and the oxide layer at the bonding interface, and the provider substrate is then separated along the weakened region to transfer the fragments of the single crystal substrate to the receiver substrate.

[0014] The reverse bonding method allows reducing production costs and improving the reusability of the donor substrate.

[0015] On the contrary, the breakdown voltage (Vbd) of the oxide layer formed on the polysilicon layer is too low relative to the breakdown voltage of the oxide layer obtained by growing on the single crystal material of the provider substrate (especially when it is single crystal silicon matter) in the direct bonding method. The breakdown voltage is too low to be compatible with radio frequency applications.

[0016] To illustrate this statement, Figure 3 It is shown that according to the prior art, a direct connection (such as Figure 1 substrate) or by reverse bonding (such as Figure 2The current (in amperes (A)) is plotted as a function of the electric field (in megavolts per centimeter (MV / cm)) for various recipient substrates on which a buried oxide layer is formed (in the substrate in FIG. 1 ).

[0017] The two curves D1 and D2 on the right side of the figure correspond to two substrates obtained by direct bonding. In these two substrates, the oxide layer is formed by oxidation of the single-crystalline semiconductor of the provider substrate and then transferred to the charge trapping layer.

[0018] The five curves on the left side of the figure, marked I1, I2, I3, I4 and I5, correspond to five substrates obtained by reverse bonding. In the substrate, the oxide layer is formed by oxidation of the charge trapping layer made of polysilicon of the receiving substrate.

[0019] The current flow between ground and the free surface of the substrate is measured using an aluminum sheet arranged on the oxide layer and a measuring probe.

[0020] Regarding direct bonding, the two curves D1 and D2 show a discontinuity in slope corresponding to a maximum electric field of about 7 MV / cm that the substrate can withstand before shorting. The maximum electric field value corresponding to curve D2 is slightly higher than that corresponding to curve D1.

[0021] Regarding reverse bonding, the five curves I1, I2, I3, I4 and I5 show a discontinuity in slope, which corresponds to the maximum electric field of about 3 MV / cm that the substrate can withstand before shorting. The maximum electric field value increases between I1 and I5.

[0022] By comparison, it can be seen that the maximum electric field value of the substrate obtained by reverse bonding is significantly lower than that of the substrate obtained by direct bonding. The average distance between the two groups of curves is about 4 MV / cm.

[0023] Therefore, fabricating the substrate by reverse bonding results in a decrease in the maximum electric field, which leads to a corresponding decrease in the breakdown voltage. Summary of the invention

[0024] An object of the present invention is to provide a method that overcomes the above-mentioned drawbacks.The present invention aims to provide a method that allows manufacturing a receiver substrate for a semiconductor-on-insulator structure whose buried oxide layer has a sufficient breakdown voltage for radio frequency applications while limiting production costs.

[0025] To this end, the present invention provides a method for manufacturing a receiving substrate of a semiconductor-on-insulator structure for radio frequency applications, comprising the following steps:

[0026] ● providing a semiconductor substrate, the semiconductor substrate comprising a base layer made of a single crystal material and a charge trapping layer made of polycrystalline silicon disposed on the base layer,

[0027] ● oxidizing the charge-trapping layer to form an oxide layer disposed on the charge-trapping layer,

[0028] The main feature of the method is that the oxidation of the charge trapping layer is at least partially performed at a temperature lower than or equal to 875° C. by:

[0029] - starting said oxidation at a first temperature comprised between 750° C. and 1000° C.,

[0030] - reducing the temperature to a second temperature lower than said first temperature and comprised between 750° C. and 875° C.,

[0031] - continuing oxidation at said second temperature.

[0032] The temperature lower than or equal to 875° C. is lower than the temperature at which the oxidation of the trapping layer is usually carried out in the prior art. In particular, the Applicant surprisingly found that lowering the temperature at which the oxidation of the charge trapping layer is carried out allows to increase the breakdown voltage of the oxide layer formed, contrary to what would be expected by a person skilled in the art in the radio frequency field based on their current knowledge (e.g., as described in particular in publication [1]).

[0033] Oxidation of the charge trapping layer made of polysilicon consumes the polysilicon, and the rate of oxide formation depends on the orientation of the polysilicon grains. Therefore, the fact that the grains of the polysilicon layer have different orientations causes the silicon oxide formed from these grains to grow at different rates. For example, the oxide from the same <100> and <111> The grains oriented in the <100> Direction and <111> Directions grow at different rates. <100> and <111> are the Miller indices which allow the orientation of planes in a crystal to be determined and thus represent the orientation of grains in a crystal structure.

[0034] These differences in the dependence of oxide growth rate on the grain orientation of polysilicon create mechanical stresses within the crystal structure, particularly at the interface between the growing oxide layer and the underlying polysilicon layer. These stresses are amplified at the polysilicon surface as the growing oxide layer increases in volume and as oxidation proceeds.

[0035] According to other aspects, the proposed method has the following various features, which can be implemented individually or in technically feasible combinations:

[0036] - The charge trapping layer is at least partially oxidized at a temperature greater than or equal to 750° C. Therefore, the oxidation rate is more in line with industrial requirements and is still economically feasible;

[0037] - the decrease in temperature from said first temperature T1 to said second temperature T2 is gradual;

[0038] - at least 50%, preferably at least 70%, of the thickness of said oxide layer is produced at said first temperature T1 and at least 20%, preferably at least 30% of the thickness of said oxide layer is produced at said second temperature T2;

[0039] - said oxide layer formed has a thickness comprised between 200 nm and 400 nm;

[0040] - said charge trapping layer has a thickness comprised between 20 nm and 500 nm;

[0041] - said charge-trapping layer is pre-deposited on a base substrate made of a single-crystalline material by low-pressure chemical vapor deposition in a reactor.

[0042] The present invention also relates to a method for manufacturing a semiconductor-on-insulator structure for radio frequency applications, characterized in that the method comprises the following steps:

[0043] • fabricating a receiver substrate such as described above;

[0044] ● providing a provider substrate including a single crystal substrate,

[0045] ● bonding the donor substrate to the recipient substrate,

[0046] • Transferring the layers of the donor substrate to a recipient substrate.

[0047] According to other aspects, the proposed method has the following various features, which can be implemented individually or in technically feasible combinations:

[0048] - said layer transferred from said provider substrate comprises a semiconductor.

[0049] - said layer transferred from said provider substrate comprises a ferroelectric material.

[0050] According to other aspects, the proposed method has the following various features, which can be implemented individually or in technically feasible combinations:

[0051] - The ferroelectric material is selected from: LiTaO3, LiNbO3, LiAlO3, BaTiO3, PbZrTiO3, KNbO3, BaZrO3, CaTiO3, PbTiO3, KTaO3.

[0052] - The transfer comprises the following steps:

[0053] implanting atomic species into the donor substrate to form a weakened zone that delineates the single-crystalline semiconductor layer or ferroelectric material layer to be transferred,

[0054] ● bonding the provider substrate to the receiver substrate, the oxide layer and the single crystal semiconductor layer or ferroelectric material layer to be transferred are at a bonding interface,

[0055] ● Separating the provider substrate along the weakened region to transfer the single crystal semiconductor layer or ferroelectric material layer to the receiver substrate, the oxide layer being disposed between the charge trapping layer and the transferred single crystal semiconductor layer or ferroelectric material layer.

[0056] Said single crystalline semiconductor or ferroelectric material is preferably located at a surface of said provider substrate, said implantation of atomic species being performed directly through said surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Other advantages and characteristics of the invention will become apparent from reading the following description, given by way of illustrative and non-limiting example, with reference to the following drawings:

[0058] Figure 1 is a diagram illustrating the fabrication of a semiconductor-on-insulator substrate for radio frequency applications by direct bonding;

[0059] Figure 2 is a diagram illustrating the manufacture of a semiconductor-on-insulator substrate for radio frequency applications by reverse bonding;

[0060] Figure 3 is a diagram illustrating the variation of the magnitude of current with the electric field for various receiving substrates in which a buried oxide layer is formed by direct bonding or by reverse bonding according to the prior art;

[0061] Figure 4 It shows that for <100> and <111> Miller index of oxide crystals, plot of the growth time of an oxide layer with a thickness of 400 nm as a function of temperature;

[0062] Figure 5 It is shown Figure 4 A graph showing the difference between the two curves as a function of temperature;

[0063] Figure 6 is obtained after oxidation of the charge trapping layer and has a convex curvature Figure 2 A schematic diagram of a substrate;

[0064] Figure 7is a graph showing the variation of the magnitude of current with the electric field for various receiving substrates in which a buried oxide layer is formed by reverse bonding according to the present invention.

[0065] For the sake of legibility of the drawings, the various layers forming the substrate are not necessarily shown to scale. DETAILED DESCRIPTION

[0066] The present invention relates to a method for manufacturing a receiver substrate (30) of a semiconductor-on-insulator structure for radio frequency applications, comprising the following steps:

[0067] The method of the present invention is a reverse bonding method. Figure 2 The method comprises the steps of providing a semiconductor substrate 10, the semiconductor substrate 10 comprising a base substrate 1 made of a single crystal material and a charge trapping layer 2 made of polycrystalline silicon disposed on the base substrate, followed by the step of oxidizing the charge trapping layer 2 to form an oxide layer 3 disposed on the charge trapping layer.

[0068] The charge trapping layer 2 may be formed by epitaxy on the base substrate 1, or alternatively deposited on the base substrate by chemical vapor deposition (CVD).

[0069] The charge trapping layer 2 is at least partially oxidized at a temperature comprised between 750°C and 875°C.

[0070] Such a method makes it possible to form, by reverse bonding, a receiving substrate 30 whose oxide layer has a higher breakdown voltage than when oxidized at a temperature exceeding 875° C.

[0071] The oxide layer 3 formed has a thickness of several hundred nanometers (nm), preferably comprised between 200 nm and 400 nm.

[0072] The charge-trapping layer remaining after oxidation preferably has a thickness between 20 nm and 500 nm.

[0073] The wording "at least partially" means that the entire oxidation is carried out at a temperature of 750°C to 875°C, or only a part of the oxidation is carried out at a temperature of 750°C to 875°C.

[0074] According to one embodiment, the charge trapping layer 2 is oxidized starting from a temperature T1 between 750° C. and 1000° C., and then the temperature is directly or gradually reduced until a temperature T2 lower than T1 and between 750° C. and 875° C. is reached, and then the oxidation is continued.

[0075] The temperature T1 may thus be lower than 875°C, or indeed higher than 875°C and for example equal to 900°C or 950°C.

[0076] In this embodiment, the upper section of the oxide layer 3 is generated at temperature T1, and the lower section of the oxide layer 3 is generated at temperature T2 lower than T1. Specifically, the charge trapping layer 2 is oxidized from its upper surface to its lower surface, and as the reaction proceeds, the oxidation interface moves from the upper surface to the lower surface.

[0077] This embodiment allows the oxidation rate of the upper section of the charge trapping layer 2 to be increased, because the oxidation rate increases with increasing temperature, and thus the time required for oxidation of the trapping layer is reduced.

[0078] An increase in the breakdown voltage of the oxide layer 3 is observed both for the case where all oxidation is performed at a temperature between 750° C. and 875° C., and for the case where only some oxidation is performed at a temperature between 750° C. and 875° C. Specifically, only at least a section of the charge trapping layer 2 extending from the interface between the charge trapping layer and the substrate to the free surface of the charge trapping layer needs to be oxidized at a temperature between 750° C. and 875° C.

[0079] The oxidation parameters may be adjusted to minimize the fragmentation of the charge-trapping layer produced at temperatures between 750°C and 875°C, and thus minimize the overall length of the oxidation step.

[0080] According to one embodiment, at least 50%, preferably at least 70%, of the thickness of the oxide layer 3 is produced at the first temperature T1, and at least 20%, preferably at least 30% of the thickness of the oxide layer is produced at the second temperature T2;

[0081] Studies have been conducted on the time taken to grow an oxide layer as a function of temperature for crystals of different crystal orientations.

[0082] Figure 4 It is shown that for the Miller index <100> (curve E1) and <111> Oxide crystal (curve E2), plot of the growth time (in hours) of an oxide layer with a thickness of 400 nm as a function of the temperature (in degrees Celsius).

[0083] Figure 5 It shows that Figure 4 Miller Index <100> (curve E1) and <111> (curve E2) is a graph of the relative difference Δv in growth rate between oxide crystals (in relative percentage) as a function of temperature (in degrees Celsius).

[0084] These results show that the lower the temperature, the different <100> and <111> The greater the difference in growth rate between crystals of different crystal directions, the greater the difference in growth rate between crystals of different crystal directions. In particular, when the temperature is 875°C, the relative difference is about 48%, and increases to more than 50% for temperatures below 875°C.

[0085] On the contrary, the higher the temperature, the different <100> and <111> The smaller the difference in growth rate between crystals of different crystal directions, the smaller the difference in growth rate between crystals of different crystal directions. In particular, when the temperature is 1200°C, the difference is about 9%.

[0086] Furthermore, the oxidation time increases greatly for temperatures below 1000° C. and even further for temperatures below 850° C. It is therefore desirable not to drop below 750° C. so that the process can be carried out in a time compatible with industrial requirements and remain economically viable.

[0087] The oxidation of the charge trapping layer 2 is accompanied by the oxidation of the opposite side of the base substrate 1. Due to the material difference between the two sides of the substrate, the semiconductor substrate 10 including the base substrate 1 and the charge trapping layer 2 is deformed. This deformation affects the entire substrate, that is, the curvature of the substrate as a whole is modified, so that it becomes concave or convex. When the substrate is disk-shaped, it will have a substantially parabolic shape after deformation.

[0088] More precisely, during oxidation, the charge trapping layer 2 maintains the mechanical stress of the oxide layer 3 during growth. The substrate then undergoes a convex deformation.

[0089] The terms "convex" and "concave" are to be understood relative to the curvature of the side of the substrate 30 intended to form a bonding interface with a provider substrate described below, which side is referred to as the "front side". Thus, when the curvature of the front side is convex, the substrate is referred to as "convex", and when the curvature of the front side is concave, the substrate is referred to as "concave".

[0090] Figure 6 The substrate 30 shown has a convex deformation. The front side 31 is the upper side. The rear side 32 is parallel to the front side.

[0091] The curvature of the substrate is often referred to as bow and is denoted by B W The amplitude parameter is used to quantify.

[0092] B W Corresponds to the distance between the center point C of the center plane Pm of the substrate (shown by a dotted line) and a reference plane P corresponding to the reference support on which the substrate is placed. W Positive in case of convex curvature (e.g. Figure 6 shown), and is negative in the case of concave curvature.

[0093] The Applicant has also observed that carrying out at least some oxidation of the charge-trapping layer 2 at a lower temperature than in the prior art, in particular at a temperature between 750° C. and 875° C., allows reducing the bend B W The difference in curvature between the lower surface of the charge trapping layer 2 at the interface with the base substrate 1 and the upper surface of the charge trapping layer at the interface with the oxide 3 is thus reduced, which consequently reduces the mechanical stress within the charge trapping layer.

[0094] From the receiver substrate 30 obtained using the above method, a non-insulator semiconductor structure for radio frequency applications is manufactured using the manufacturing method described below.

[0095] A recipient substrate 30 is provided, which comprises in sequence a base substrate 1, a charge trapping layer 2 and an oxide layer 3. A second substrate, called a donor substrate, made of a single-crystal material is also provided.

[0096] Preferably, the provider substrate comprises a semiconductor substrate.

[0097] A weakened area is formed in the donor substrate to delineate the layer to be transferred.

[0098] The layer to be transferred is preferably a semiconductor layer.

[0099] The weakened zone is formed at a predetermined depth in the provider substrate, which predetermined depth substantially corresponds to the thickness of the layer to be transferred. Preferably, the weakened zone is produced by implanting atomic species, such as hydrogen and / or helium atoms, into the provider substrate. In practice, the implantation of atomic species is preferably performed directly through the single-crystalline material at the free surface of the provider substrate.

[0100] The donor substrate is then bonded to the receptor substrate, with the oxide layer and the layer to be transferred located at the bonding interface.

[0101] The donor substrate is then separated along the weakened area to transfer the layer to the receiver substrate (Smart Cut TM Method). This results in a final structure in which the oxide layer is arranged between the charge trapping layer and the transfer layer.

[0102] Alternatively, the layer may be transferred by thinning the donor substrate from the side of the donor substrate opposite to the bonding interface until the desired thickness of the layer is obtained.

[0103] According to one embodiment, the layer to be transferred of the provider substrate comprises a ferroelectric material.

[0104] The ferroelectric material is advantageously selected from the group consisting of: LiTaO3, LiNbO3, LiAlO3, BaTiO3, PbZrTiO3, KNbO3, BaZrO3, CaTiO3, PbTiO3, KTaO3.

[0105] The monocrystalline layer to be transferred of the provider substrate can be in the form of a circular wafer of standard size, for example 150 mm or 200 mm in diameter. However, the invention is by no means limited to these sizes or this form. The wafer can be obtained from a ferroelectric material ingot in a manner to form a provider substrate having a predetermined crystal orientation. Alternatively, the provider substrate can include a ferroelectric material layer connected to a carrier substrate.

[0106] The crystal orientation of the single crystal layer of the ferroelectric material to be transferred is selected depending on the intended application. Thus, with respect to the material LiTaO3, an orientation between 30° and 60° XY or between 40° and 50° XY is usually selected, especially in the case where it is desired to utilize the properties of the thin layer to form a SAW filter (SAW is the acronym for surface acoustic wave). With respect to the material LiNbO3, an orientation of about 128° XY is usually selected. However, the present invention is by no means limited to a specific crystal orientation.

[0107] Regardless of the crystal orientation of the ferroelectric material of the provider substrate, the method comprises, for example, introducing hydrogen and / or helium species (ions and / or atoms) into the provider substrate. Such introduction may correspond, for example, to hydrogen implantation, ie bombarding the plane of the provider substrate with hydrogen ions.

[0108] As is known per se, the purpose of the implanted ions is to form a weakened plane that delineates the first layer of ferroelectric material to be transferred, which layer is located on one side of this plane and the other part forms the rest of the substrate. The choice of the nature of the implanted substance, the dose and the type of ions implanted as well as the implantation energy depends on the thickness of the layer to be transferred and the physicochemical properties of the donor substrate. In the case of a donor substrate made of LiTaO3, it is possible to choose to implant 1E16 at / cm 2 to 5E17 at / cm 2 The hydrogen dose is between 30 keV and 300 keV to outline a first layer of about 20 nm to 2000 nm thickness.

[0109] Experimental Results

[0110] The magnitude of the current in the structure changes with the electric field.

[0111] In order to illustrate the advantages obtained using the method of the invention described above, a study of the variation of the current in a structure with an electric field was carried out.

[0112] Figure 7 A graph is shown which plots the magnitude of the current (in amperes (A) multiplied by a percentage to make the graph clearer) as a function of the electric field (in megavolts per centimeter (MV / cm)) for various substrates obtained by reverse bonding according to the invention. The substrates differ in the oxidation formation conditions of the receiving substrate for forming the buried oxide layer.

[0113] The current is measured between ground and the free surface of the substrate with the aid of an aluminum sheet placed on the oxide layer and a measuring probe.

[0114] Marked as C ref The curves of C1, C2, C3, C4 and C5 are drawn as follows:

[0115] - Curve Cref Corresponding to the benchmark, i.e. a substrate with an oxide layer of 4000 angstroms obtained by direct bonding, it has a slope discontinuity corresponding to a maximum electric field of about 7 MV / cm;

[0116] - Curve C1 corresponds to oxidation performed completely at 850°C without additional annealing. It has a maximum electric field of about 6 MV / cm;

[0117] - Curve C2 corresponds to oxidation at 950°C, then increasing its temperature to 1100°C for 1 hour in a conventional oven. It has a maximum electric field of about 3.7 MV / cm;

[0118] - Curve C3 corresponds to oxidation performed completely at 950°C without thermal annealing. It has a maximum electric field of about 3.5 MV / cm;

[0119] - Curve C4 corresponds to full oxidation at 950°C followed by rapid thermal annealing (RTA) at 1100°C for 45 seconds. It has a maximum electric field of about 2.8 MV / cm;

[0120] - Curve C5 corresponds to oxidation performed completely at 1000° C., followed by a rapid thermal annealing (RTA) at 1100° C. for 45 seconds. It has a maximum electric field of about 2.8 MV / cm.

[0121] These results indicate that a decrease in the oxidation temperature allows an increase in the maximum electric field, which results in a corresponding increase in the breakdown voltage.

[0122] References

[0123] [1]:Effect of Physical Stress on the Degradation of Thin SiO2 FilmsUnder Electrical Stress,Tien-Chun Yang,2000IEEE.

Claims

1. A method for manufacturing a receiver substrate (30) of a semiconductor-on-insulator structure for radio frequency applications, comprising the following steps: - providing a semiconductor substrate (10), the semiconductor substrate comprising a base substrate (1) made of a single crystal material and a charge trapping layer (2) made of polycrystalline silicon disposed on the base substrate (1), - oxidizing the charge trapping layer (2) to form an oxide layer (3) disposed on the charge trapping layer, The method is characterized in that the oxidation of the charge trapping layer (2) is at least partially performed at a temperature lower than or equal to 875° C. by: - starting said oxidation at a first temperature (T1) comprised between 750° C. and 1000° C., - reducing the temperature to a second temperature (T2) lower than said first temperature (T1) and comprised between 750°C and 875°C, - Oxidation continues at said second temperature (T2).

2. The method according to claim 1, wherein: The charge trapping layer (2) is at least partially oxidized at a temperature greater than or equal to 750°C.

3. The method according to claim 1 or 2, wherein: The decrease in temperature from the first temperature (T1) to the second temperature (T2) is gradual.

4. The method according to claim 1, wherein: At least 50% of the thickness of the oxide layer is produced at the first temperature (T1) and at least 20% of the thickness of the oxide layer is produced at the second temperature (T2).

5. The method according to claim 4, wherein: At least 70% of the thickness of the oxide layer is produced at the first temperature (T1).

6. The method according to claim 4, wherein: At least 30% of the thickness of the oxide layer is produced at the second temperature (T2).

7. The method according to claim 1, wherein: The oxide layer (3) is formed to have a thickness comprised between 200 nm and 400 nm.

8. The method according to claim 1, wherein: The charge trapping layer (2) has a thickness comprised between 20 nm and 500 nm.

9. The method according to claim 1, wherein: The charge trapping layer (2) is pre-deposited on the base substrate (1) made of a single crystal material by low-pressure chemical vapor deposition in a reactor.

10. A method for manufacturing a semiconductor-on-insulator structure for radio frequency applications, characterized in that: The method comprises the following steps: - manufacturing a receiving substrate (30) according to any one of claims 1 to 9, - providing a provider substrate comprising a single crystal substrate, - bonding the donor substrate to the recipient substrate, - transferring a layer of the donor substrate to the recipient substrate.

11. The method according to claim 10, wherein: The layer transferred from the provider substrate comprises a semiconductor.

12. The method according to claim 10, wherein: The layer transferred from the provider substrate comprises a ferroelectric material.

13. The method according to claim 12, wherein: The ferroelectric material is selected from: LiTaO3, LiNbO3, LiAlO3, BaTiO3, PbZrTiO3, KNbO3, BaZrO3, CaTiO3, PbTiO3, and KTaO3.

14. The method according to one of claims 10 to 13, wherein: The transfer comprises the following steps: - implanting atomic species into the donor substrate to form a weakened zone, which delineates the single-crystalline semiconductor layer or the ferroelectric material layer to be transferred, - bonding the provider substrate to the receiver substrate, the oxide layer and the single crystal semiconductor layer or ferroelectric material layer to be transferred being at a bonding interface, - separating the provider substrate along the weakened region to transfer the single crystalline semiconductor layer or the ferroelectric material layer to the receiver substrate, the oxide layer being disposed between the charge trapping layer and the transferred single crystalline semiconductor layer or the ferroelectric material layer.

15. The method according to claim 14, wherein: The single crystal semiconductor or ferroelectric material is located at the surface of the provider substrate, and the implantation of atomic species is performed directly through the surface.

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