Self-calibrating crystal oscillator drive system

By using a self-calibrating crystal oscillator drive system, the crystal oscillator gain is adjusted through positive and negative feedback, which solves the problem of oscillation instability caused by the aging of external circuits and components in the crystal oscillator drive circuit, thereby improving the stability of the crystal oscillator amplitude and the reliability of the system.

CN113014249BActive Publication Date: 2025-11-04SUZHOU HUAXIN MICROELECTRONICS
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Patent Information

Application Number
CN202110256568.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-03-09
Publication Date
2025-11-04
Estimated Expiration
2041-03-09

AI Technical Summary

Technical Problem

Existing crystal oscillator drive circuits are susceptible to factors such as device parameters, supply voltage, temperature, and device aging, resulting in unstable oscillation states and affecting system reliability.

Method used

A self-calibrating crystal oscillator drive system is adopted, including a crystal oscillator element, a drive module, a peak detection module, and a comparison feedback module. By adjusting the strength of positive and negative feedback, the tail current of the drive module is adjusted using the peak detection and comparison feedback modules to stabilize the crystal oscillator oscillation gain.

Benefits of technology

Maintaining stable crystal oscillator amplitude under external circuit changes and device aging conditions improves the stability and reliability of the circuit system and eliminates the influence of power supply and temperature.

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Abstract

The application discloses a self-calibration crystal oscillator driving system, comprising: a crystal oscillator element for outputting an oscillation signal; a driving module connected with the crystal oscillator element for outputting a gain for maintaining oscillation of the crystal oscillator element by adjusting strengths of positive feedback and negative feedback; a peak detection module connected with the crystal oscillator element for performing peak detection on the oscillation signal of the crystal oscillator element and outputting a direct current signal; and a comparison feedback module connected with the peak detection module and the driving module for outputting a signal for adjusting a tail current of the driving module by analyzing the direct current signal so as to adjust the output gain of the driving module. The self-calibration crystal oscillator driving system can stabilize the amplitude of the crystal oscillator at a fixed value under the condition that various passive crystal oscillators are externally connected to an external circuit, and can eliminate the influence caused by power supply, temperature and device aging, thereby improving the stability and reliability of the whole circuit system.
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Description

TECHNICAL FIELD

[0001] The present application belongs to the field of integrated circuits, and particularly relates to a self-calibration crystal oscillator driving system. BACKGROUND

[0002] In today's various electronic devices, crystal oscillator is an indispensable device. Passive quartz crystal oscillator is often used as the clock circuit of various chips due to its mature technology and low cost. When using the crystal oscillator, an external circuit is needed as a driving source. As shown in the figure, a typical driving circuit is a digital inverter, and the quartz crystal oscillator is connected in parallel with a large resistor at the input and output of the inverter. The driving circuit structure is simple, but the crystal oscillator amplitude is affected by many factors such as device parameters, power supply voltage, environmental temperature and device layout. In some applications, a small resistor is connected in series with the passive crystal oscillator to prevent the amplitude from being too large to damage the crystal oscillator. In many applications, the crystal oscillator is prone to stop oscillating due to insufficient driving. Even for the same crystal oscillator circuit, different oscillation states will be presented after the voltage drops, the temperature changes or the device ages. Once the crystal oscillator is bad or the amplitude is not enough, the system will fail. Therefore, a stable crystal oscillator oscillation driving circuit plays an extremely important role in the system. Figure 1

[0003] Therefore, in view of the above technical problems, it is necessary to provide a self-calibration crystal oscillator driving system. SUMMARY

[0004] Therefore, in view of the above technical problems, it is necessary to provide a self-calibration crystal oscillator driving system.

[0005] In order to achieve the above-mentioned purpose, the technical scheme provided by an embodiment of the present application is as follows:

[0006] A self-calibration crystal oscillator driving system, the self-calibration crystal oscillator driving system comprises:

[0007] A crystal oscillator element for outputting an oscillation signal;

[0008] A driving module connected with the crystal oscillator element, for outputting a gain for maintaining the oscillation of the crystal oscillator element by adjusting the strength of positive feedback and negative feedback;

[0009] A peak detection module connected with the crystal oscillator element, for performing peak detection on the oscillation signal of the crystal oscillator element and outputting a direct current signal;

[0010] A comparison feedback module connected with the peak detection module and the driving module, for outputting a signal for adjusting the tail current of the driving module by analyzing the direct current signal, so as to adjust the output gain of the driving module.

[0011] In an embodiment, the driving module comprises a first differential amplifier, a second differential amplifier and a third differential amplifier.​

[0012] wherein the input terminal of the second differential amplifier and the input terminal of the third differential amplifier are both connected to the output terminal of the first differential amplifier, the output terminal of the second differential amplifier is connected to the positive input terminal of the first differential amplifier, the second differential amplifier is configured to provide positive feedback gain to the first differential amplifier, the output terminal of the third differential amplifier is connected to the negative input terminal of the first differential amplifier, and the third differential amplifier is configured to provide negative feedback gain to the first differential amplifier;

[0013] one end of the crystal oscillator element is connected to the output terminal of the second differential amplifier and the other end is grounded, the output terminal of the second differential amplifier is connected to one end of the first capacitor and the other end of the first capacitor is grounded, and the output terminal of the third differential amplifier is connected to one end of the second capacitor and the other end of the second capacitor is grounded.

[0014] In one embodiment, the total feedback gain G 总 of the second differential amplifier and the third differential amplifier to the input terminal of the first differential amplifier is:

[0015]

[0016] wherein G m1 is the gain of the first differential amplifier, G m2 is the gain of the second differential amplifier, and G m3 is the gain of the third differential amplifier, R osc is the equivalent impedance of the crystal oscillator element, and ω is the angular frequency, is the capacitive reactance of the first capacitor, and is the capacitive reactance of the second capacitor.

[0017] In one embodiment, the first differential amplifier comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a sixth NMOS transistor.

[0018] wherein the gate and the drain of the first PMOS transistor are connected, the gate of the first PMOS transistor is connected to the second differential amplifier and the third differential amplifier, the source of the first PMOS transistor is connected to a power supply, the drain of the first PMOS transistor is connected to the drain of the first NMOS transistor, and the gate of the first NMOS transistor is connected to the third differential amplifier;

[0019] the gate and the drain of the second PMOS transistor are connected, the gate of the second PMOS transistor is connected to the second differential amplifier and the third differential amplifier, the source of the second PMOS transistor is connected to a power supply, the drain of the second PMOS transistor is connected to the drain of the second NMOS transistor, and the gate of the second NMOS transistor is connected to the second differential amplifier;

[0020] The drain of the sixth NMOS tube is connected with the source of the first NMOS tube and the source of the second NMOS tube, the gate of the sixth NMOS tube is connected with the comparison feedback module, and the source of the sixth NMOS tube is grounded.

[0021] In an embodiment, the second differential amplifier comprises a third PMOS tube, a fourth PMOS tube, a third NMOS tube and a fourth NMOS tube.

[0022] The source of the third PMOS tube is connected with a power supply, the gate of the third PMOS tube is connected with the first differential amplifier, and the drain of the third PMOS tube is connected with the drain of the third NMOS tube.

[0023] The drain of the third NMOS tube is connected with the gate of the third NMOS tube, the gate of the third NMOS tube is connected with the gate of the fourth NMOS tube, and the source of the third NMOS tube is grounded.

[0024] The source of the fourth PMOS tube is connected with a power supply, the gate of the fourth PMOS tube is connected with the first differential amplifier and the third differential amplifier, and the drain of the fourth PMOS tube is connected with the drain of the fourth NMOS tube and simultaneously connected with the first differential amplifier, the crystal oscillator element and the first capacitor.

[0025] The gate of the fourth NMOS tube is connected with the third differential amplifier, and the source of the fourth NMOS tube is grounded.

[0026] In an embodiment, the third differential amplifier comprises a third PMOS tube, a fifth PMOS tube, a third NMOS tube and a fifth NMOS tube.

[0027] The source of the third PMOS tube is connected with a power supply, the gate of the third PMOS tube is connected with the first differential amplifier, and the drain of the third PMOS tube is connected with the drain of the third NMOS tube.

[0028] The drain of the third NMOS tube is connected with the gate of the third NMOS tube, the gate of the third NMOS tube is connected with the gate of the fifth NMOS tube, and the source of the third NMOS tube is grounded.

[0029] The source of the fifth PMOS tube is connected with a power supply, the gate of the fifth PMOS tube is connected with the first differential amplifier and the second differential amplifier, and the drain of the fifth PMOS tube is connected with the drain of the fifth NMOS tube and simultaneously connected with the first differential amplifier and the second capacitor.

[0030] The gate of the fifth NMOS tube is connected with the second differential amplifier, and the source of the fifth NMOS tube is grounded.

[0031] In an embodiment, the peak detection module comprises a seventh NMOS tube, a resistor and a third capacitor.

[0032] The gate of the seventh NMOS tube is connected with the crystal oscillator element, the drain of the seventh NMOS tube is connected with a power supply, one end of a resistor is connected with the source of the seventh NMOS tube, the other end of the resistor is grounded, one end of a third capacitor is connected with the source of the seventh NMOS tube, the other end of the third capacitor is grounded, and the source of the seventh NMOS tube is connected with a comparison feedback module.

[0033] In an embodiment, the comparison feedback module comprises a sixth PMOS tube, a seventh PMOS tube, an eighth PMOS tube, a ninth PMOS tube, an eighth NMOS tube, a ninth NMOS tube and a tenth NMOS tube.

[0034] The source of the sixth PMOS tube is connected with a power supply, the gate of the sixth PMOS tube is connected with the gate of the seventh PMOS tube, and the drain of the sixth PMOS tube is connected with the source of the eighth PMOS tube and the source of the ninth PMOS tube.

[0035] The gate of the eighth PMOS tube is connected with a peak value detection module, and the drain of the eighth PMOS tube is connected with the drain of the eighth NMOS tube.

[0036] The drain and the gate of the eighth NMOS tube are connected, the source of the eighth NMOS tube is grounded, and the gate of the eighth NMOS tube is connected with the gate of the ninth NMOS tube.

[0037] The gate of the ninth PMOS tube is connected with a reference voltage, the drain of the ninth PMOS tube is connected with the drain of the ninth NMOS tube and the gate of the tenth NMOS tube, and the source of the ninth NMOS tube is grounded.

[0038] The source of the seventh PMOS tube is connected with a power supply, the drain of the seventh PMOS tube is connected with the drain of the tenth NMOS tube and a driving module, and the source of the tenth NMOS tube is grounded.

[0039] Compared with the prior art, the present application has the following advantages:

[0040] The self-calibration crystal oscillator driving system in the present application can stabilize the amplitude of the crystal oscillator at a fixed value in the case of connecting various passive crystal oscillators outside the external circuit, and can eliminate the influence of power supply, temperature and device aging, thereby improving the stability and reliability of the entire circuit system. BRIEF DESCRIPTION OF DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments described in the present application, and those skilled in the art can also obtain other drawings according to these drawings without creating any creative labor.

[0042] Figure 1 a prior art circuit diagram;

[0043] Figure 2 a system block diagram of a self-calibration crystal oscillator driving system in an embodiment of the present application;

[0044] Figure 3 a system block diagram of a driving module of a self-calibration crystal oscillator driving system in an embodiment of the present application;

[0045] Figure 4 a gain-adjusted amplitude-frequency characteristic diagram of a driving module of a self-calibration crystal oscillator driving system in an embodiment of the present application;

[0046] Figure 5 a specific circuit diagram of a driving module of a self-calibration crystal oscillator driving system in an embodiment of the present application;

[0047] Figure 6 a specific circuit diagram of a peak detection module of a self-calibration crystal oscillator driving system in an embodiment of the present application;

[0048] Figure 7 a specific circuit diagram of a comparison feedback module of a self-calibration crystal oscillator driving system in an embodiment of the present application. DETAILED DESCRIPTION

[0049] The present application will be described in detail below with reference to the embodiments shown in the drawings. However, the embodiments do not limit the present application, and the structural, method, or functional changes made by those skilled in the art based on the embodiments are included in the protection scope of the present application.

[0050] The present application discloses a self-calibration crystal oscillator driving system, comprising:

[0051] a crystal oscillator element X for outputting an oscillation signal;

[0052] a driving module connected to the crystal oscillator element X for outputting a gain for maintaining oscillation of the crystal oscillator element X by adjusting the strength of positive feedback and negative feedback;

[0053] a peak detection module connected to the crystal oscillator element X for performing peak detection on the oscillation signal of the crystal oscillator element X and outputting a direct current signal;

[0054] a comparison feedback module connected to the peak detection module and the driving module for outputting a signal for adjusting the tail current of the driving module by analyzing the direct current signal so as to adjust the output gain of the driving module.

[0055] The present application will be further described below in combination with specific embodiments.

[0056] Referring to Figure 2 FIG. 1 shows a self-calibration crystal oscillator driving system, comprising:

[0057] a crystal element X, configured to output an oscillation signal;

[0058] a driving module 100, a fout port of the driving module 100 being connected to the crystal element X, configured to output a gain for maintaining oscillation of the crystal element X by adjusting strengths of positive feedback and negative feedback;

[0059] a peak detection module 200, a fin port of the peak detection module 200 being connected to the crystal element X, configured to perform peak detection on the oscillation signal of the crystal element X and output a direct current signal;

[0060] a comparison feedback module 300, a Vn port of the comparison feedback module 300 being connected to a Vout1 port of the peak detection module 200, a Vout2 port of the comparison feedback module 300 being connected to a Vb port of the driving module 100, a Vp port of the comparison feedback module 300 being connected to a reference voltage Vref, configured to output a signal for adjusting a tail current of the driving module 100 by analyzing the direct current signal, so as to adjust an output gain of the driving module 100.

[0061] Referring to FIG. 1, the driving module 100 includes a first differential amplifier 110, a second differential amplifier 120 and a third differential amplifier 130. Figure 3

[0062] The input end of the second differential amplifier 120 and the input end of the third differential amplifier 130 are both connected to the output end of the first differential amplifier 110; the output end of the second differential amplifier 120 is connected to the positive input end of the first differential amplifier 110, and the second differential amplifier 120 is configured to provide a positive feedback gain to the first differential amplifier 110; the output end of the third differential amplifier 130 is connected to the negative input end of the first differential amplifier 110, and the third differential amplifier 130 is configured to provide a negative feedback gain to the first differential amplifier 110.

[0063] In addition, one end of the crystal element X is connected to the output end of the second differential amplifier 120, and the other end is grounded; the output end of the second differential amplifier 120 is connected to one end of a first capacitor C1, and the other end of the first capacitor C1 is grounded; the output end of the third differential amplifier 130 is connected to one end of a second capacitor C2, and the other end of the second capacitor C2 is grounded.

[0064] In this embodiment, the positive feedback gain of the second differential amplifier 120 fed back to the first differential amplifier 110 is

[0065] The negative feedback gain of the third differential amplifier 130 fed back to the first differential amplifier 110 is

[0066] ​The total feedback gain G of the first differential amplifier 110 input end fed back by the second differential amplifier 120 and the third differential amplifier 130 总 is:

[0067]

[0068] wherein, G m1 is the gain of the first differential amplifier 110, G m2 is the gain of the second differential amplifier 120, G m3 is the gain of the third differential amplifier 130, R osc is the equivalent impedance of the crystal element X, and ω is the angular frequency, is the capacitive reactance of the first capacitor C1, is the capacitive reactance of the second capacitor C2.

[0069] From the calculation formula of the total feedback gain G 总 , it can be seen that the positive feedback gain fed back by the second differential amplifier 120 is greater than the negative feedback gain fed back by the third differential amplifier 130, so that the total feedback gain G 总 is positive feedback, the positive feedback gain fed back by the second differential amplifier 120 is less than the negative feedback gain fed back by the third differential amplifier 130, so that the total feedback gain G 总 is negative feedback.

[0070] In addition, at the resonant frequency of the crystal element X, R osc is much greater than so that is approximately equal to At the same time it is obtained that It can be seen that as long as G m2 is greater than G m3 , the total feedback gain of the system is positive feedback; at the resonant frequency far away from the crystal element X, R osc is a small inductive reactance or capacitive reactance in absolute value, the value of G is small, and the total feedback gain of the system is negative feedback.

[0071] At the same time, the Bode plot of the whole system is a very narrow positive feedback at the resonant frequency, and is the same as the general negative feedback circuit at other frequencies. The circuit will oscillate at the resonant frequency of the crystal element X, and the amplitude of the crystal element X is related to the strength of the positive feedback at the resonant time. The greater the gain of the positive feedback, the greater the amplitude.

[0072] Figure 4As shown, the oscillation frequency of the crystal element X in the system is on the transition band of the driving module transfer function, and increasing the tail current can make the bandwidth of the system wider, and the closer the oscillation frequency is to the passband, the greater the gain; on the contrary, the smaller the tail current, the narrower the bandwidth, and the smaller the gain; the relative size of the gain of the second differential amplifier 120 and the third differential amplifier 130 is also controlled by the bandwidth, and the current amplified by the second differential amplifier 120 is relatively large, and the bandwidth is relatively wide.

[0073] Referring to Figure 5 As shown, the first differential amplifier 110 specifically includes a first PMOS tube MP1, a second PMOS tube MP2, a first NMOS tube MN1, a second NMOS tube MN2, and a sixth NMOS tube MN6.

[0074] The gate and the drain of the first PMOS tube MP1 are connected, the gate of the first PMOS tube MP1 is connected with the second differential amplifier 120 and the third differential amplifier 130 at the same time, the source of the first PMOS tube MP1 is connected with the power supply, the drain of the first PMOS tube MP1 is connected with the drain of the first NMOS tube MN1, and the gate of the first NMOS tube MN1 is connected with the third differential amplifier 130.

[0075] The gate and the drain of the second PMOS tube MP2 are connected, the gate of the second PMOS tube MP2 is connected with the second differential amplifier 120 and the third differential amplifier 130 at the same time, the source of the second PMOS tube MP2 is connected with the power supply, the drain of the second PMOS tube MP2 is connected with the drain of the second NMOS tube MN2, and the gate of the second NMOS tube MN2 is connected with the second differential amplifier 120.

[0076] The drain of the sixth NMOS tube MN6 is connected with the source of the first NMOS tube MN1 and the source of the second NMOS tube MN2 at the same time, the gate of the sixth NMOS tube MN6 is connected with the Vb port and connected with the Vout2 port of the comparison feedback module 300 through the Vb port, and the source of the sixth NMOS tube MN6 is grounded.

[0077] Referring to Figure 5 As shown, the second differential amplifier 120 is composed of a first module 123 and a second module 121, the first module 123 specifically includes a third PMOS tube MP3 and a third NMOS tube MN3, and the second module 121 specifically includes a fourth PMOS tube MP4 and a fourth NMOS tube MN4.

[0078] The source of the third PMOS tube MP3 is connected with the power supply, the gate of the third PMOS tube MP3 is connected with the first differential amplifier 110, and specifically, the gate of the third PMOS tube MP3 is connected with the gate of the first PMOS tube MP1, and the drain of the third PMOS tube MP3 is connected with the drain of the third NMOS tube NM3.

[0079] The drain of the third NMOS transistor NM3 is connected to its gate, the gate of the third NMOS transistor NM3 is connected to the gate of the fourth NMOS transistor NM4, and the source of the third NMOS transistor NM3 is grounded.

[0080] The source of the fourth PMOS transistor PM4 is connected to the power supply. The gate of the fourth PMOS transistor PM4 is connected to the first differential amplifier 110 and the third differential amplifier 130. Specifically, the gate of the fourth PMOS transistor PM4 is connected to the gate of the second PMOS transistor MP2. The drain of the fourth PMOS transistor PM4 is connected to the drain of the fourth NMOS transistor NM4 and is also connected to the first differential amplifier 110, the crystal oscillator element X, and the first capacitor C1 at the same time. The drain of the fourth PMOS transistor PM4 is connected to the gate of the second NMOS transistor MN2. The drain of the fourth PMOS transistor PM4 is connected to the Fout port and is connected to the crystal oscillator element X and the fin port of the peak detection module 200 through the Fout port. The gate of the fourth NMOS transistor NM4 is connected to the third differential amplifier 130, and the source of the fourth NMOS transistor NM4 is grounded.

[0081] See Figure 5 As shown, the third differential amplifier 130 consists of a first module 123 and a third module 131. The first module 123 includes a third PMOS transistor MP3 and a third NMOS transistor MN3, and the third module 131 includes a fifth PMOS transistor MP5 and a fifth NMOS transistor MN5.

[0082] Among them, the source of the third PMOS transistor MP3 is connected to the power supply. The gate of the third PMOS transistor MP3 is connected to the first differential amplifier 110. Specifically, the gate of the third PMOS transistor MP3 is connected to the gate of the first PMOS transistor MP1. The drain of the third PMOS transistor MP3 is connected to the drain of the third NMOS transistor NM3.

[0083] The drain of the third NMOS transistor NM3 is connected to its gate, the gate of the third NMOS transistor NM3 is connected to the gate of the fifth NMOS transistor NM5, and the source of the third NMOS transistor NM3 is grounded.

[0084] The source of the fifth PMOS transistor MP5 is connected to the power supply. The gate of the fifth PMOS transistor MP5 is connected to the first differential amplifier 110 and the second differential amplifier 120. Specifically, the gate of the fifth PMOS transistor MP5 is connected to the gate of the fourth PMOS transistor PM4 and the gate of the second PMOS transistor MP2. The drain of the fifth PMOS transistor MP5 is connected to the drain of the fifth NMOS transistor NM5 and is also connected to the first differential amplifier 110 and the second capacitor C2 at the same time. Specifically, the drain of the fifth PMOS transistor MP5 is connected to the gate of the first NMOS transistor MN1.

[0085] The gate of the fifth NMOS transistor NM5 is connected with the second differential amplifier 120, and specifically, the gate of the fifth NMOS transistor NM5 is connected with the gate of the fourth NMOS transistor NM4, and the source of the fifth NMOS transistor NM5 is grounded.

[0086] Referring to Figure 6 As shown in the figure, the peak detection module 200 includes a seventh NMOS transistor MN7, a resistor R and a third capacitor C3.

[0087] The gate of the seventh NMOS transistor MN7 is connected with the fin port and connected with the crystal oscillator element X and the fout port of the driving module 100 through the fin port, the drain of the seventh NMOS transistor MN7 is connected with the power supply, the source of the seventh NMOS transistor MN7 is connected with the Vout1 port and connected with the Vn port of the comparison feedback module 300 through the Vout1 port, the source of the seventh NMOS transistor MN7 is connected with one end of the resistor R, the other end of the resistor R is grounded, the source of the seventh NMOS transistor MN7 is connected with one end of the third capacitor C3, and the other end of the third capacitor C3 is grounded.

[0088] The oscillation waveform after the crystal oscillator element X is started is subjected to peak detection by the peak detection module 200, and is subjected to detection by the source follower, the gate of the seventh NMOS transistor MN7 is connected with the oscillation pin of the crystal oscillator element X, and no additional current is consumed on the oscillation pin, the pull-up current of the seventh NMOS transistor MN7 is large, the pull-down current of the resistor R is small, the voltage on the fin port rises rapidly, the voltage on the Vout1 port rises rapidly, the voltage on the fin port falls rapidly, the voltage on the Vout1 port falls slowly, and the voltage on the Vout1 port can maintain the high voltage peak on the fin port for a long time to form a direct current signal, thereby realizing the function of peak detection.

[0089] Referring to Figure 7 As shown in the figure, the comparison feedback module 300 includes a sixth PMOS transistor MP6, a seventh PMOS transistor MP7, an eighth PMOS transistor MP8, a ninth PMOS transistor MP9, an eighth NMOS transistor MN8, a ninth NMOS transistor MN9 and a tenth NMOS transistor MN10.

[0090] The source of the sixth PMOS transistor MP6 is connected with the power supply, the gate of the sixth PMOS transistor MP6 is connected with the gate of the seventh PMOS transistor MP7 and is suspended, and the drain of the sixth PMOS transistor MP6 is connected with the source of the eighth PMOS transistor MP8 and the source of the ninth PMOS transistor MP9.

[0091] The gate of the eighth PMOS transistor MP8 is connected with the Vn port and connected with the peak detection module 200 through the Vn port, and the drain of the eighth PMOS transistor MP8 is connected with the drain of the eighth NMOS transistor MN8.

[0092] The drain and the gate of the eighth NMOS transistor MN8 are connected, the source of the eighth NMOS transistor MN8 is grounded, and the gate of the eighth NMOS transistor MN8 is connected to the gate of the ninth NMOS transistor MN9.

[0093] The gate of the ninth PMOS transistor MP9 is connected to the Vp port and connected to the reference voltage Vref through the Vp port, the drain of the ninth PMOS transistor MP9 is connected to the drain of the ninth NMOS transistor MN9 and the gate of the tenth NMOS transistor MN10, and the source of the ninth NMOS transistor MN9 is grounded.

[0094] The source of the seventh PMOS transistor MP7 is connected to the power supply, the drain of the seventh PMOS transistor MP7 is connected to the drain of the tenth NMOS transistor MN10 and the Vout2 port, and the Vb port of the driving module 100 is connected through the Vout2 port, and the source of the tenth NMOS transistor MN10 is grounded.

[0095] The feedback module 300 compares the peak-detected direct current signal with the reference voltage Vref, and then outputs a signal to adjust the tail current of the first differential amplifier 110, so as to adjust the output gain of the driving module 100.

[0096] From the above technical solutions, the present application has the following beneficial effects:

[0097] The self-calibration crystal oscillator driving system in the present application can stabilize the amplitude of the crystal oscillator at a certain fixed value in the case of connecting various passive crystal oscillators outside the external circuit, and can also eliminate the influence caused by the power supply, temperature and device aging, thereby improving the stability and reliability of the entire circuit system.

[0098] For those skilled in the art, it is obvious that the present application is not limited to the details of the above exemplary embodiments, and the present application can be realized in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the above description, and therefore all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the present application. Any reference signs in the claims should not be regarded as limiting the claims involved.

[0099] In addition, it should be understood that although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description manner of the specification is only for the sake of clarity, and those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be properly combined to form other implementation manners that those skilled in the art can understand.

Claims

1. A self-calibrating crystal oscillator drive system, characterized by, The self-calibration crystal oscillator driving system comprises: a crystal oscillator element for outputting an oscillation signal; a driving module connected to the crystal oscillator element, for outputting a gain for maintaining oscillation of the crystal oscillator element by adjusting strengths of positive feedback and negative feedback; the driving module comprises a first capacitor, a second capacitor, a first differential amplifier, a second differential amplifier and a third differential amplifier; wherein, the input end of the second differential amplifier and the input end of the third differential amplifier are both connected to the output end of the first differential amplifier, the output end of the second differential amplifier is connected to the positive input end of the first differential amplifier, the second differential amplifier is used for providing positive feedback gain to the first differential amplifier, the output end of the third differential amplifier is connected to the negative input end of the first differential amplifier, and the third differential amplifier is used for providing negative feedback gain to the first differential amplifier; one end of the crystal oscillator element is connected to the output end of the second differential amplifier, and the other end is grounded, the output end of the second differential amplifier is connected to one end of the first capacitor, the other end of the first capacitor is grounded, the output end of the third differential amplifier is connected to one end of the second capacitor, and the other end of the second capacitor is grounded; The total feedback gain G of the second differential amplifier and the third differential amplifier to the first differential amplifier input end 总 is: wherein G m1 is the gain of the first differential amplifier, G m2 is the gain of the second differential amplifier, G m3 is the gain of the third differential amplifier, R osc is the equivalent impedance of the crystal element, and ω is the angular frequency, is the capacitive reactance of the first capacitor, is the capacitive reactance of the second capacitor; a peak detection module connected to the crystal oscillator element, for performing peak detection on the oscillation signal of the crystal oscillator element and outputting a direct current signal; a comparison feedback module connected to the peak detection module and the driving module, for outputting a signal for adjusting the tail current of the driving module by analyzing the direct current signal, so as to adjust the output gain of the driving module.

2. The self-calibrating crystal oscillator drive system of claim 1, wherein, the first differential amplifier comprises a first PMOS tube, a second PMOS tube, a first NMOS tube, a second NMOS tube and a sixth NMOS tube; wherein, the gate and the drain of the first PMOS tube are connected, the gate of the first PMOS tube is connected to the second differential amplifier and the third differential amplifier at the same time, the source of the first PMOS tube is connected to a power supply, the drain of the first PMOS tube is connected to the drain of the first NMOS tube, and the gate of the first NMOS tube is connected to the third differential amplifier; the gate and the drain of the second PMOS tube are connected, the gate of the second PMOS tube is connected to the second differential amplifier and the third differential amplifier at the same time, the source of the second PMOS tube is connected to a power supply, the drain of the second PMOS tube is connected to the drain of the second NMOS tube, and the gate of the second NMOS tube is connected to the second differential amplifier; the drain of the sixth NMOS tube is connected to the source of the first NMOS tube and the source of the second NMOS tube at the same time, the gate of the sixth NMOS tube is connected to the comparison feedback module, and the source of the sixth NMOS tube is grounded.

3. The self-calibrating crystal oscillator drive system of claim 1, wherein, the second differential amplifier comprises a third PMOS tube, a fourth PMOS tube, a third NMOS tube and a fourth NMOS tube; wherein, the source of the third PMOS tube is connected to a power supply, the gate of the third PMOS tube is connected to the first differential amplifier, and the drain of the third PMOS tube is connected to the drain of the third NMOS tube; the drain and the gate of the third NMOS tube are connected, the gate of the third NMOS tube is connected to the gate of the fourth NMOS tube, and the source of the third NMOS tube is grounded; The source of the fourth PMOS is connected to a power supply, the gate of the fourth PMOS is connected to the first differential amplifier and the third differential amplifier, and the drain of the fourth PMOS is connected to the drain of the fourth NMOS and is also connected to the first differential amplifier, the crystal element and the first capacitor; The gate of the fourth NMOS is connected to the third differential amplifier, and the source of the fourth NMOS is grounded.

4. The self-calibrating crystal oscillator drive system of claim 1, wherein, The third differential amplifier comprises a third PMOS, a fifth PMOS, a third NMOS and a fifth NMOS; The source of the third PMOS is connected to a power supply, the gate of the third PMOS is connected to the first differential amplifier, and the drain of the third PMOS is connected to the drain of the third NMOS; The drain of the third NMOS is connected to the gate of the third NMOS, the gate of the third NMOS is connected to the gate of the fifth NMOS, and the source of the third NMOS is grounded; The source of the fifth PMOS is connected to a power supply, the gate of the fifth PMOS is connected to the first differential amplifier and the second differential amplifier, and the drain of the fifth PMOS is connected to the drain of the fifth NMOS and is also connected to the first differential amplifier and the second capacitor; The gate of the fifth NMOS is connected to the second differential amplifier, and the source of the fifth NMOS is grounded.

5. The self-calibrating crystal oscillator drive system of claim 1, wherein, The peak detection module comprises a seventh NMOS, a resistor and a third capacitor; The gate of the seventh NMOS is connected to the crystal element, the drain of the seventh NMOS is connected to a power supply, one end of the source of the seventh NMOS is connected to one end of the resistor, the other end of the resistor is grounded, one end of the third capacitor is connected to the source of the seventh NMOS, the other end of the third capacitor is grounded, and the source of the seventh NMOS is connected to the comparison feedback module.

6. The self-calibrating crystal oscillator drive system of claim 1, wherein, The comparison feedback module comprises a sixth PMOS, a seventh PMOS, an eighth PMOS, a ninth PMOS, an eighth NMOS, a ninth NMOS and a tenth NMOS; The source of the sixth PMOS is connected to a power supply, the gate of the sixth PMOS is connected to the gate of the seventh PMOS, and the drain of the sixth PMOS is connected to the source of the eighth PMOS and the source of the ninth PMOS; The gate of the eighth PMOS is connected to the peak detection module, and the drain of the eighth PMOS is connected to the drain of the eighth NMOS; The drain and the gate of the eighth NMOS are connected, the source of the eighth NMOS is grounded, and the gate of the eighth NMOS is connected to the gate of the ninth NMOS; The gate of the ninth PMOS is connected to a reference voltage, the drain of the ninth PMOS is connected to the drain of the ninth NMOS and is also connected to the gate of the tenth NMOS, and the source of the ninth NMOS is grounded; The source of the seventh PMOS is connected to a power supply, the drain of the seventh PMOS is connected to the drain of the tenth NMOS and is also connected to the driving module, and the source of the tenth NMOS is grounded.

Citation Information

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