Non-volatile memory erasing and programming method

Abstract

The present invention discloses a non-volatile memory erasing and programming method. During the erasing operation, each storage unit in the A-type storage area is subjected to standard erasing and changed to the erased state 1, and each storage unit in the B-type storage area is subjected to weak erasing and changed to the weakly erased state; during the programming operation, the storage units in the A-type storage area are programmed according to programming data, so that the storage units in the A-type storage area corresponding to the programming data 1 remain in the erased state, and the storage units in the A-type storage area corresponding to the programming data 0 are subjected to standard programming and changed to the standard programming state 0, while the storage units in the B-type storage area are not operated and are still maintained in the weakly erased state. In the non-volatile memory erasing and programming method, the readout circuit can accurately determine the data stored in the storage units in the A-type storage area according to the magnitude relationship between the readout currents of the storage units in the A-type storage area and the storage units in the B-type storage area, and can improve the reliability of the storage of programming data in the memory product.

Description

Technical Field

[0001] The present invention relates to the field of memory technology, and in particular to a non-volatile memory erasing and programming method. Background Art

[0002] Conventional semiconductor non-volatile memory devices are usually composed of a charge storage unit 120 and an access metal oxide semiconductor field effect transistor (MOSFET) 110, such as Figure 1 . The charge storage memory cell 120 is a MOSFET having a layer of charge storage material 122, which is located below a control gate 124 and above a MOSFET channel. The amount of charge in the charge storage material 122 can affect the threshold voltage, which is applied to the control gate 124 to turn on the channel of the MOSFET memory cell. The threshold voltage of an N-type semiconductor memory cell is shifted to a higher voltage due to the storage of electrons (negative charge) in the charge storage layer. However, the threshold voltage of a P-type semiconductor memory cell is shifted to a lower voltage due to the storage of electrons (negative charge) in the charge storage layer. If the charge in the storage layer can be retained for a long time (usually more than 10 years for a typical semiconductor non-volatile memory), the semiconductor memory cell becomes non-volatile. If a non-volatile memory element can perform multiple erase / program operation cycles, the non-volatile memory is a multiple times programming non-volatile memory (MTPNVM). Generally, for a semiconductor non-volatile memory, the number of erase / program cycles is between thousands and millions.

[0003] The operations of non-volatile memory to save data include erasing operations and programming operations. The erasing operation usually includes two steps: pre-programming and erasing. Pre-programming uses a weaker programming operation to program the states of the storage cells to be erased in the memory to a weaker programming state, so that the initial states of these storage cells are closer. Erasing changes the states of the storage cells to be erased to the erased state. The programming operation usually includes one programming step, which programs the corresponding storage cells to the programming state according to the data to be stored.

[0004] When reading data, a read voltage is generally applied to the word line and bit line of the memory cell. The read current of the memory cell is sent to the read circuit through the bit line. The read circuit compares the size of the memory cell current and the reference current generated separately, and determines the storage state of the memory cell by the current size. For example, if the memory cell current is greater than the reference current, the memory cell is in the erased state, and the corresponding storage data is 1; if the memory cell current is less than the reference current, the memory cell is in the programmed state, and the storage data is 0.

[0005] The degree to which a memory cell stores data is affected by various factors. For example: operating voltage, temperature, number of erase and write times, data retention time, etc. Affected by these factors, the difference between the current of the memory cell and the reference current may become smaller. For example, in a typical case, the reference current is set to 5uA, the current of the memory cell in the erased state is about 10uA, and the current of the memory cell in the programmed state is 0uA. The difference between the two states of the memory cell and the reference current is 5uA. Affected by various factors, the reference current changes to 7uA, and the difference between the current of the erased state memory cell and the reference current is reduced to 3uA, and the margin for reading data becomes smaller. When the difference between the memory cell current and the reference current is small, there may be a risk of reading errors. Summary of the invention

[0006] The technical problem to be solved by the present invention is to provide a non-volatile memory erasing and programming method, which can improve the reliability of storing programming data of memory products with high reliability requirements.

[0007] In order to solve the above technical problems, the present invention provides a non-volatile memory programming method, which performs high reliability erasure programming on a memory with high reliability requirements, and the high reliability erasure programming includes the following steps:

[0008] 1. Dividing the memory cells to be programmed into class A memory cells and class B memory cells;

[0009] 2. Perform an erase operation on the memory cells to be programmed of the memory, perform standard erasure on each memory cell in the A-type memory area and change it to erase state 1, perform weak erasure on each memory cell in the B-type memory area and change it to weak erase state, and the threshold voltage of the weakly erased memory cell is between the threshold of the standard erased memory cell and the threshold of the standard programmed memory cell;

[0010] 3. Perform programming operations on the storage cells to be programmed of the memory, program the storage cells in the Class A storage area according to the programming data, so that the storage cells in the Class A storage area corresponding to the programming data 1 remain in the erased state 1, and the storage cells in the Class A storage area corresponding to the programming data 0 are subjected to standard programming and become the standard programmed state 0, while the storage cells in the Class B storage area are not operated and remain in the weakly erased state; standard programming is to program the charge storage layer of the storage cell corresponding to the data 0 with a standard programming voltage and a standard programming time, so that the storage cell becomes the standard programmed state 0.

[0011] Preferably, the threshold voltage of the weakly erased memory cell is equal to the average value of the threshold voltage of the standard erased memory cell and the threshold voltage of the standard programmed memory cell.

[0012] Preferably, when reading data from a high-reliability memory that has undergone high-reliability erasure programming, the same voltage is applied to the word lines and bit lines of the memory cells in the class A storage area and the memory cells in the class B storage area, and the read currents of the memory cells in the class A storage area and a memory cell in the class B storage area are sent to the read circuit through the bit line. The read circuit determines the data stored in the memory cell in the class A storage area based on the relationship between the read currents of the memory cells in the class A storage area and the memory cells in the class B storage area.

[0013] Preferably, when the read current of a memory cell in the A-type memory area is greater than the read current of a memory cell in the B-type memory area, it is determined that the storage data of the memory cell in the A-type memory area is 1;

[0014] When the read current of a memory cell in the A-type memory area is less than the read current of a memory cell in the B-type memory area, it is determined that the storage data of the memory cell in the A-type memory area is 0.

[0015] Preferably, during high-reliability erase programming, before step one, each storage cell in the Class A storage area and each storage cell in the Class B storage area of ​​the storage cell to be programmed are pre-programmed, so that the charge storage layer of each storage cell is programmed with a pre-programming voltage and a pre-programming time; the standard programming voltage is greater than or equal to the pre-programming voltage, and the standard programming time is greater than the pre-programming time.

[0016] Preferably, the number of storage units in the B-type storage area may be equal to or less than the number of storage units in the A-type storage area.

[0017] Preferably, the number of storage units in the Class B storage area is 1.

[0018] Preferably, conventional erasing and conventional programming are performed on the conventionally required memory;

[0019] When performing conventional erasure: firstly, pre-program the memory cells to be erased of the memory, so that the charge storage layer of each memory cell is programmed with a pre-programmed voltage and a pre-programmed time; then, standard erasure is performed on the memory cells to be erased of the memory, so that each memory cell changes to the erased state 1;

[0020] When performing conventional programming: first perform standard erasure on the storage cells to be programmed in the memory, so that each storage cell becomes erased state 1; then each bit of programming data corresponds to a storage cell to be programmed in the memory, and the storage cells to be programmed in the memory are programmed using a standard programming method.

[0021] In the non-volatile memory erasing and programming method of the present invention, since the storage unit in the class B storage area has undergone a weak erasing operation, its erasure degree is also affected by various factors at the same time, so its erasure degree and the erasure degree of the storage unit in the class A storage area will change synchronously, thereby maintaining the synchronous change of the read current of the storage unit in the class A storage area and the storage unit in the class B storage area, reducing the influence of various factors on the difference between the two read currents, and the read circuit can accurately determine the data stored in the storage unit in the class A storage area according to the size relationship between the read current of the storage unit in the class A storage area and the read current of the storage unit in the class B storage area, thereby improving the reliability of storing programming data in memory products with high reliability requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings required for use in the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0023] Figure 1 It is a schematic diagram of a conventional non-volatile memory;

[0024] Figure 2 It is a flow chart of an embodiment of a method for erasing and programming a non-volatile memory of the present invention;

[0025] Figure 3 The present invention is a schematic diagram of erasing and programming operations of storage cells in a class A storage area and storage cells in a class B storage area in an embodiment of a non-volatile memory erasing and programming method. DETAILED DESCRIPTION

[0026] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] Embodiment 1

[0028] like Figure 2 , Figure 3 As shown, a non-volatile memory erasing and programming method is used to perform high reliability erasing and programming on a memory with high reliability requirements. The high reliability erasing and programming includes the following steps:

[0029] 1. Dividing the memory cells to be programmed into class A memory cells and class B memory cells;

[0030] 2. Performing an erase operation on the memory cells to be programmed of the memory, performing standard erasure on each memory cell in the A-type memory area and changing it to erase state 1, and performing weak erasure on each memory cell in the B-type memory area and changing it to a weakly erased state, wherein the threshold voltage of the weakly erased memory cell is between the threshold of the standard erased memory cell and the threshold of the standard programmed memory cell (for example, the threshold voltage of the weakly erased memory cell is equal to the average of the threshold of the standard erased memory cell and the threshold of the standard programmed memory cell).

[0031] 3. Perform programming operations on the storage cells to be programmed of the memory, program the storage cells in the Class A storage area according to the programming data, so that the storage cells in the Class A storage area corresponding to the programming data 1 remain in the erased state 1, and the storage cells in the Class A storage area corresponding to the programming data 0 are subjected to standard programming and become the standard programmed state 0, while the storage cells in the Class B storage area are not operated and remain in the weakly erased state; standard programming is to program the charge storage layer of the storage cell corresponding to the data 0 with a standard programming voltage and a standard programming time, so that the storage cell becomes the standard programmed state 0.

[0032] The non-volatile memory erasing and programming method of the first embodiment performs high reliability erasing and programming on the memory requiring high reliability. During the high reliability erasing and programming, the memory cells to be programmed of the memory are divided into memory cells of the class A storage area and memory cells of the class B storage area. During the erasing operation, each memory cell of the class A storage area is subjected to standard erasure and changed to the erased state 1, and each memory cell of the class B storage area is subjected to weak erasure and changed to the weak erased state; during the programming operation, the memory cells of the class A storage area are programmed according to the programming data, so that the memory cells of the class A storage area corresponding to the programming data 1 remain in the erased state, and the memory cells of the class A storage area corresponding to the programming data 0 remain in the erased state. The storage cells in the storage area are changed to the standard programming state 0 by standard programming, and at the same time, the storage cells in the class B storage area are not operated and remain in the weak erase state; the storage cells in the class A storage area and the storage cells in the class B storage area have different read currents due to the different erase strengths, for example, the read current of the storage cells in the class A storage area in erase state 1 is 10uA, and the read current of the storage cells in the class B storage area in the weak erase state is 5uA; the read current of the storage cells in the standard programming state 0 is different from the read current of the storage cells in the erase state 1 or the weak erase state, for example, the read current of the storage cells in the standard programming state 0 is 0uA.

[0033] In the non-volatile memory erasing and programming method of the first embodiment, since the memory cell of the class B storage area has undergone a weak erasing operation, its erasure degree is also affected by various factors at the same time, so its erasure degree and the erasure degree of the memory cell of the class A storage area will change synchronously, thereby maintaining the synchronous change of the read current of the memory cell of the class A storage area and the memory cell of the class B storage area, reducing the influence of various factors on the difference of the two read currents, and the read circuit can accurately determine the data stored in the memory cell of the class A storage area according to the size relationship between the read current of the memory cell of the class A storage area and the memory cell of the class B storage area, thereby improving the reliability of storing programming data in memory products with high reliability requirements.

[0034] Embodiment 2

[0035] Based on the non-volatile memory erasing and programming method of embodiment 1, when reading data from a high-reliability memory that has undergone high-reliability erasing and programming, the same voltage is applied to the word lines and bit lines of the memory cells in the class A storage area and the memory cells in the class B storage area, and the read currents of the memory cells in the class A storage area and a memory cell in the class B storage area are sent to the read circuit through the bit line. The read circuit determines the data stored in the memory cell in the class A storage area according to the relationship between the read currents of the memory cells in the class A storage area and the memory cells in the class B storage area.

[0036] Preferably, when the read current of a memory cell in a class A storage area is greater than the read current of a memory cell in a class B storage area, the storage data of the memory cell in the class A storage area is determined to be 1; when the read current of a memory cell in a class A storage area is less than the read current of a memory cell in a class B storage area, the storage data of the memory cell in the class A storage area is determined to be 0.

[0037] For example, the read current of the memory cell in class A storage area in erase state 1 is 10uA, the read current of the memory cell in class A storage area in standard programming state 0 is 0uA, and the read current of the memory cell in class B storage area in weak erase state is 5uA. By comparing the read current of the memory cell in class A storage area with the read current of the memory cell in class B storage area, it can be determined whether the programming data stored in the memory cell in class A storage area is 1 or 0.

[0038] In the non-volatile memory erasing and programming method of the second embodiment, the read circuit determines the data stored in the memory cell of the class A memory area according to the magnitude relationship between the read currents of the memory cell of the class A memory area and the memory cell of the class B memory area. Since the memory cell of the class B memory area has undergone a weak erase operation, its erase degree is also affected by various factors. Therefore, its erase degree and the erase degree of the memory cell of the class A memory area will change synchronously, thereby maintaining the synchronous change of the read currents of the memory cell of the class A memory area and the memory cell of the class B memory area, reducing the influence of various factors on the difference between the two currents, and improving the reliability of the memory product.

[0039] Embodiment 3

[0040] Based on the non-volatile memory erasing and programming method of embodiment 1, during high reliability erasing and programming, before step 1, each storage cell in the Class A storage area and each storage cell in the Class B storage area of ​​the storage cell to be programmed of the memory are pre-programmed, so that the charge storage layer of each storage cell is programmed with a pre-programming voltage and a pre-programming time; the standard programming voltage is greater than or equal to the pre-programming voltage, and the standard programming time is greater than the pre-programming time.

[0041] Pre-programming uses a weaker programming operation to program the states of all the memory cells to be programmed in the memory into a weaker programming state, so that the initial states of these memory cells are relatively close.

[0042] Preferably, the standard programming voltage is equal to the pre-programming voltage, and the standard programming time is 1.5 to 10 times the pre-programming time.

[0043] Preferably, the standard programming voltage is 0.5V to 2V higher than the pre-programming voltage, and the standard programming time is 1.1 to 10 times the pre-programming time.

[0044] Embodiment 4

[0045] Based on the non-volatile memory erasing and programming method of embodiments 1 to 3, the number of storage cells in the B-type storage area can be equal to or less than the number of storage cells in the A-type storage area. When the number of storage cells in the B-type storage area is equal to the number of storage cells in the A-type storage area, when reading, the A-type storage cells can correspond one to one with the B-type storage cells. When the number of storage cells in the B-type storage area is less than the number of storage cells in the A-type storage area, when reading, multiple A-type storage cells need to share the same B-type storage cell.

[0046] Preferably, the number of storage cells in the B-type storage area is 1, that is, when reading, all storage cells in the A-type storage area share the same B-type storage cell.

[0047] The non-volatile memory erasing and programming method of the fourth embodiment makes the number of storage cells in the B-type storage area much smaller than the number of storage cells in the A-type storage area, thereby improving the reliability of the memory product while maintaining a large effective data storage area ratio.

[0048] Embodiment 5

[0049] Based on the non-volatile memory erasing and programming method of embodiments 1 to 4, conventional erasing and conventional programming are performed on the conventional memory;

[0050] When performing conventional erasure: firstly, pre-program the memory cells to be erased of the memory, so that the charge storage layer of each memory cell is programmed with a pre-programmed voltage and a pre-programmed time; then, standard erasure is performed on the memory cells to be erased of the memory, so that each memory cell changes to the erased state 1;

[0051] When performing conventional programming: first perform standard erasure on the storage cells to be programmed in the memory, so that each storage cell becomes erased state 1; then each bit of programming data corresponds to a storage cell to be programmed in the memory, and the storage cells to be programmed in the memory are programmed using a standard programming method.

[0052] In the non-volatile memory erasing and programming method of the fifth embodiment, when performing high reliability erasing and programming on a memory requiring high reliability, each storage unit in the Class B storage area is not used to store programming data, so that the number of storage units used to store programming data is reduced, and the actual memory capacity available to users is reduced. Therefore, non-volatile memory products can choose between conventional and high reliability configurations. For conventional memory, a conventional erasing and programming method is used to make the available memory capacity larger; for high reliability memory, a high reliability erasing and programming method is used to improve the reliability of the memory product.

[0053] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A non-volatile memory erasing and programming method, characterized in that: For a memory requiring high reliability, high reliability erasure programming is performed. When data is read from the memory requiring high reliability after high reliability erasure programming, the same voltage is applied to the word lines and bit lines of the memory cells in the A-type memory area and the memory cells in the B-type memory area, and the read currents of the memory cells in the A-type memory area and the memory cells in the B-type memory area are sent to the read circuit through the bit line. The read circuit determines the data stored in the memory cell in the A-type memory area according to the magnitude relationship between the read currents of the memory cells in the A-type memory area and the memory cells in the B-type memory area. The high reliability erasure programming includes the following steps:

1. Dividing the memory cells to be programmed into class A memory cells and class B memory cells; 2. Perform an erase operation on the memory cells to be programmed, perform standard erasure on each memory cell in the A-type memory area to become an erased state 1, and perform weak erasure on each memory cell in the B-type memory area to become a weakly erased state; The threshold voltage of the weakly erased memory cell is between the threshold voltage of the standard erased memory cell and the threshold voltage of the standard programmed memory cell; 3. Perform programming operations on the storage cells to be programmed of the memory, program the storage cells in the Class A storage area according to the programming data, so that the storage cells in the Class A storage area corresponding to the programming data 1 remain in the erased state 1, and the storage cells in the Class A storage area corresponding to the programming data 0 are subjected to standard programming and become the standard programmed state 0, while the storage cells in the Class B storage area are not operated and remain in the weakly erased state; standard programming is to program the charge storage layer of the storage cell corresponding to the data 0 with a standard programming voltage and a standard programming time, so that the storage cell becomes the standard programmed state 0.

2. The non-volatile memory erasing and programming method according to claim 1, characterized in that: The threshold voltage of the weakly erased memory cell is equal to the average value of the threshold voltage of the standard erased memory cell and the threshold voltage of the standard programmed memory cell.

3. The non-volatile memory erasing and programming method according to claim 1, characterized in that: When the read current of a memory cell in the A-type memory area is greater than the read current of a memory cell in the B-type memory area, it is determined that the storage data of the memory cell in the A-type memory area is 1; When the read current of a memory cell in the A-type memory area is less than the read current of a memory cell in the B-type memory area, it is determined that the storage data of the memory cell in the A-type memory area is 0.

4. The non-volatile memory erasing and programming method according to claim 1, characterized in that: During high reliability erasing programming, before step 1, each memory cell in the A-type memory area and each memory cell in the B-type memory area of ​​the memory cell to be programmed are pre-programmed, so that the charge storage layer of each memory cell is programmed with a pre-programming voltage and a pre-programming time; The standard programming voltage is greater than or equal to the pre-programming voltage, and the standard programming time is greater than the pre-programming time.

5. The non-volatile memory erasing and programming method according to claim 3, characterized in that: The number of storage units in the B-type storage area is equal to or less than the number of storage units in the A-type storage area.

6. The non-volatile memory erasing and programming method according to claim 3, characterized in that: The number of storage units in the Class B storage area is 1.

7. The non-volatile memory erasing and programming method according to claim 1, characterized in that: For conventional requirements, the memory is routinely erased and routinely programmed; When performing conventional erasure: firstly, pre-program the memory cells to be erased of the memory, so that the charge storage layer of each memory cell is programmed with a pre-programmed voltage and a pre-programmed time; then, standard erasure is performed on the memory cells to be erased of the memory, so that each memory cell changes to the erased state 1; When performing conventional programming: first perform standard erasure on the memory cells to be programmed, so that each memory cell changes to the erase state 1; Then each bit of the programming data corresponds to a memory cell to be programmed in the memory, and the memory cell to be programmed in the memory is programmed in a standard programming manner.

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