Display device and driving method thereof

Abstract

The present invention relates to a display device and a driving method thereof, and more specifically, to a display device and a driving method thereof that prevent a user from recognizing a brightness change when a frame frequency changes. The display device of the present invention comprises: a display panel including a plurality of pixel areas; a gate driver for sequentially providing a light emitting control signal to horizontal rows of the display panel; a data driver for providing a data signal corrected by a source voltage to the display panel; and a dimming controller for controlling whether to gradually change a frame frequency and a gamma correction data according to a duty cycle of the light emitting control signal.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0178632, filed on December 30, 2019, which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present invention relates to a display device and a driving method thereof, and more particularly, to a display device and a driving method thereof that prevent a user from recognizing a brightness change when a frame frequency changes. Background Art

[0004] Recently, display devices mainly used by users include flat panel display devices such as liquid crystal displays and organic light emitting display devices. In addition, flexible display devices that are flexible and thus bendable, foldable, or rollable are also developed and widely used.

[0005] When the display device displays a still image or an image with a small grayscale change rate between frames, the display device can be driven at a low speed by reducing the frame frequency. Conversely, when the display device displays an image with a large grayscale change rate between frames, the display device can be driven at a high speed by increasing the frame frequency.

[0006] As described above, in the method of changing the frame frequency of the display device according to the image characteristics, it is not necessary to always drive the display device at a high frequency, and thus there is an advantage that power consumption can be reduced.

[0007] Meanwhile, the human eye responds nonlinearly to brightness changes and has the characteristic of being more sensitive to brightness changes (especially in dark areas). Therefore, when the grayscale data of an image is linearly set according to the brightness, the dark area cannot be displayed as a portion of which the brightness corresponds to the grayscale data of the image. Therefore, when the brightness is changed in the dark area, a tone separation effect in which the image is cut off may be generated.

[0008] In order to prevent the posterization effect from being generated, the display device may perform gamma encoding in which grayscale data of an image is nonlinearly set to correspond to brightness.

[0009] Furthermore, since the degree to which the human eye responds nonlinearly to brightness changes varies according to the frame frequency, the gamma correction data may have different values ​​for each frame frequency.

[0010] Therefore, when the display device changes the frame frequency according to the image type, the gamma correction data also changes, but the gamma correction data differs according to the frame frequency, so an error may occur in gamma encoding, resulting in a brightness change that is instantly recognizable.

[0011] Since the above phenomenon causes display quality to deteriorate, there is a need for a method in which a brightness change is not recognized when a frame frequency is changed. Summary of the invention

[0012] SUMMARY OF THE INVENTION Accordingly, the present invention is directed to a display device and a method of driving the same that substantially obviate one or more problems due to limitations and disadvantages of the related art.

[0013] An object of the present invention is to provide a display device and a driving method thereof in which brightness variation is not recognized when a frame frequency is changed.

[0014] One aspect of the present invention provides a display device, comprising: a display panel including a plurality of pixel areas; a gate driver for sequentially providing a light emitting control signal to horizontal rows of the display panel; a data driver for providing a data signal corrected by a source voltage to the display panel; and a dimming controller for controlling whether to gradually change a frame frequency and a gamma correction data according to a duty cycle of the light emitting control signal.

[0015] Another aspect of the present invention provides a method for driving a display device. The method includes: inputting a first duty cycle and a second duty cycle; inputting a first frame frequency (F1), a second frame frequency (F2), the amount of frequency change, whether to turn on gradual dimming control, and a duty cycle of a light emitting control signal; and when the gradual dimming control is turned on and the duty cycle of the light emitting control signal is within a range from the first duty cycle to the second duty cycle, controlling the frame frequency and gamma correction data so that the frame frequency and the gamma correction data gradually change.

[0016] The advantages and features of the present invention will be partially described in the following description, and some of these advantages and features will be clear to those of ordinary skill in the art after studying the following or can be understood through the practice of the present invention. Other advantages and features of the present invention can be realized and obtained through the structures specifically pointed out in the written description, claims and drawings.

[0017] It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and together with the description serve to explain the principle of embodiments of the invention.

[0019] Figure 1 is a block diagram showing a display device according to an embodiment of the present invention.

[0020] Figure 2 is a block diagram showing a shift register included in a gate driver.

[0021] Figure 3 is a graph showing parameters for controlling a dimming controller.

[0022] Figures 4A to 4D is a timing diagram showing a process in which a light emission control signal and a source voltage are changed according to parameters input to a dimming controller.

[0023] Figure 5A and 5B : is a diagram showing the effect of recognizing the brightness change in the first and fourth examples of the present invention. DETAILED DESCRIPTION

[0024] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

[0025] Figure 1 is a block diagram schematically showing a display device according to an embodiment of the present invention.

[0026] When describing the present invention, an example of a display panel using an organic light emitting diode is described, but the present invention is not limited thereto, and the technical scope of the present invention can be applied to a liquid crystal display panel or a display panel operated in other ways.

[0027] The display device 100 according to the embodiment of the present invention may include a display panel 110 , a timing controller 120 , a gamma correction unit 130 , a gate driver 140 , and a data driver 150 .

[0028] The display panel 110 may include a plurality of pixel regions P, and the plurality of pixel regions P may be arranged in a matrix form.

[0029] The gate lines GL1 to GLh and the data lines DL1 to DLw may cross on the display panel 110 to form a pixel region P. The gate lines GL1 to GLh may extend and be connected to the gate driver 140, and may include a plurality of scan lines, light emission control lines, etc. In addition, the data lines DL1 to DLw may extend to the outside of the display panel 110 and be connected to the data driver 150.

[0030] The timing controller 120 may receive image signals RGB and a clock signal CLK as inputs from a host system (not shown). In addition, the timing controller 120 may receive a data enable signal DE and horizontal and vertical synchronization signals HSYNC and VSYNC as timing signals as inputs.

[0031] The clock signal CLK is a reference signal used when the timing controller 120 is synchronized with the gate driver 140 and the data driver 150 .

[0032] The horizontal synchronization signal HSYNC indicates the time required to display one horizontal line in one frame, and the vertical synchronization signal VSYNC indicates the time required to display one frame.

[0033] The data enable signal DE is a signal that activates the pixel regions P located on one horizontal line.

[0034] The timing controller 120 may generate a gate control signal GCS for controlling the operation of the gate driver 140 and a data control signal DCS for controlling the operation of the data driver 150 using the horizontal synchronization signal HSYNC, the vertical synchronization signal VSYNC, and the data enable signal DE, and then transmit the gate control signal GCS and the data control signal DCS to the gate driver 140 and the data driver 150, respectively. In addition, the timing controller 120 may transmit the image signal RGB to the data driver 150.

[0035] The timing controller 120 may include a dimming controller 121. The dimming controller 121 may control the light emission control signal and the gamma correction data to change when the frame frequency changes, and a driving method thereof will be described below.

[0036] The gamma correction unit 130 may include an integrated circuit (IC) storing gamma correction data, and may generate a source voltage SV according to the gamma correction data and transmit the source voltage SV to the data driver 150. The gamma correction data may have different values ​​for each frame frequency.

[0037] The gate driver 140 may have an in-panel gate structure located inside the display panel 110, or may have a structure located outside the display panel 140. The gate driver 140 may include a shift register having a plurality of stages, and may generate a plurality of gate driving signals using a gate control signal GCS.

[0038] The gate control signal GCS may include a gate start pulse GSP, a gate shift clock GSC, a gate output enable signal GOE, etc. In addition, the plurality of gate driving signals may include a scan signal for turning on or off a transistor included in a pixel region and a light emitting control signal for turning on or off a light emitting control transistor.

[0039] The gate start pulse GSP can be controlled so that a gate drive signal is generated in the first stage of the shift register. The gate shift clock GSC can be controlled so that a gate drive signal is generated in the next stage. The gate output enable signal GOE can control the output timing of the gate drive signal to prevent the gate drive signal from being output simultaneously from different stages.

[0040] The scan signal may control whether a thin film transistor included in the pixel region P is turned on or off, and the light emission control signal may control a current flowing through the light emitting diode.

[0041] In an embodiment of the present invention, the light emitting diode may be controlled by a duty cycle driving method, in which an on state and an off state are repeated, wherein in the on state, current flows through the light emitting diode included in the pixel region P; and in the off state, current does not flow through the light emitting diode. In particular, in one duty cycle period (i.e., a period in which the on state and the off state are repeated), the light emission amount may be controlled by adjusting the duty cycle (ratio occupied by the on state).

[0042] The data driver 150 may convert the image signal RGB as a digital signal into the data signal DATA as an analog signal, and the data signal DATA may be latched by one horizontal section and simultaneously transmitted to the display panel 110 through all the data lines DL1 to DLw. The data driver 150 may adjust the size of the data signal DATA according to the source voltage SV transmitted from the gamma correction unit 130.

[0043] The data control signal DCS may include a source start pulse SSP, a source shift clock SSC, a source output enable signal SOE, and the like.

[0044] The source start pulse SSP may control the sampling start timing in response to the image signal RGB as a digital signal. The source shift clock SSC may control the sampling timing of each horizontal line in response to a rising edge or a falling edge. The source output enable signal SOE may control the output timing of the data signal DATA.

[0045] In the present invention, the structure of the shift register will be described as follows.

[0046] Figure 2 is a block diagram schematically illustrating a shift register included in a gate driver.

[0047] Figure 1 The shift register 141 included in the gate driver 140 may include a plurality of stages ST1 to STh which are slave-connected.

[0048] Each of the plurality of stages ST1 to STh may include a set input terminal SET, a reset input terminal RST, a driving voltage input terminal VDD, a low potential voltage input terminal VSS, a gate driving signal input terminal G IN , Gate shift clock input terminal S IN .

[0049] In addition, each of the plurality of stages ST1 to STh may include a gate driving signal output terminal G OUT and gate shift clock output terminal SOUT .

[0050] exist Figure 2 In FIG. 1 , only one gate drive signal input terminal G is shown. IN and a gate drive signal output terminal G OUT , but in order to input and output a plurality of gate driving signals GDS, each stage ST1 to STh may include a plurality of gate driving signal input terminals G IN and a plurality of gate drive signal output terminals G OUT In addition, the gate driving signal GDS may include a scan signal, a light emitting control signal, and the like.

[0051] Gate drive signal output terminal G OUT Can be connected to the corresponding Figure 1 The gate lines GL1 to GLh are arranged in each horizontal line on the display panel 110 .

[0052] In addition, the gate shift clock output terminal S OUT It may be connected to a set input terminal SET of a stage corresponding to a next horizontal line, and may be connected to a reset input terminal RST of a stage corresponding to a previous horizontal line.

[0053] The first stage ST1 may receive the gate start pulse GSP via the set input terminal SET connected to the start pulse input terminal VST of the shift register 141 .

[0054] In this case, the first stage ST1 is in an enabled state. In addition, the first stage ST1 can output a gate drive signal to the gate drive signal output terminal G OUT Output from the gate drive signal input terminal G IN The received gate drive signal GDS is transmitted to Figure 1 The first gate line GL1 is provided.

[0055] In addition, the first stage ST1 can output the clock via the gate shift clock output terminal S OUT Output from the gate shift clock input terminal S IN The received gate shift clock GSC is transmitted to the set input terminal SET of the second stage ST2 which is the subsequent stage.

[0056] The second stage ST2 is in an enabled state after receiving the gate shift clock GSC via the set input terminal SET. OUT Output from the gate drive signal input terminal G IN The received gate drive signal GDS is transmitted to Figure 1The second gate line GL2.

[0057] In addition, the second stage ST2 can output the clock via the gate shift output terminal S OUT Output from the gate shift clock input terminal S IN The received gate shift clock GSC is transmitted to the set input terminal SET of the third stage ST3 as the subsequent stage, and the gate shift clock GSC is transmitted to the reset input terminal RST of the first stage ST1 as the previous stage.

[0058] In this case, since the first stage ST1 receives the gate shift clock GSC via the reset input terminal RST, the first stage ST1 is in a disabled state. In addition, since the third stage ST3 receives the gate shift clock GSC via the set input terminal SET, the third stage ST3 is in an enabled state. That is, the gate shift clock GSC output from one stage changes the previous stage to a disabled state and changes the next stage to an enabled state, so that the gate drive signal GDS can be output sequentially.

[0059] Until the last stage STh, the same operation method as the first stage ST1 and the second stage ST2 may be performed. Figure 1 Each of the gate lines GL1 to GLh may output a gate driving signal GDS in sequence, thereby displaying an image.

[0060] exist Figure 2 In the process, the gate shift clock output terminal S of a stage OUT The gate shift clock output terminal S is shown as being connected to the reset input terminal RST of the previous stage and the set input terminal SET of the next stage, but the present invention is not limited thereto. OUT It can be connected to the reset input terminal RST of the previous k-th stage, and can be connected to the set input terminal SET of the subsequent k-th stage, where k is an integer greater than or equal to 1. Here, when it is assumed that the number of stages is h, k can be an integer between 1 and h-1, and h is an integer greater than or equal to 2.

[0061] Meanwhile, in the display device according to the embodiment of the present invention, when the frame frequency is changed, the frame frequency and the gamma correction data are adjusted by Figure 1 The dimming controller 121 gradually changes, which will be described below.

[0062] Figure 3 is a graph showing parameters used to control the operation of a dimming controller.

[0063] Figure 1The dimming controller 121 may be an IC type element and may be operable to gradually change or not gradually change the frame frequency and gamma correction data according to the received parameters. In addition, in order to store the received parameters, Figure 1 The dimming controller 121 may include a parameter storage unit (not shown) such as a register, a memory, etc.

[0064] Input to Figure 1 The parameters of the dimming controller 121 may include a first frequency F1 and a second frequency F2, a dimming control signal GDC_ON, a frequency number N (N is an integer greater than or equal to 2), an EM control signal GDC_EVST_EN, a source control signal GDC_SRC_EN, a duty cycle number M (M is an integer greater than or equal to 2), a first duty cycle D1 and a second duty cycle D2, a plurality of first gamma correction data GS1 and a second gamma correction data GS2, etc.

[0065] The parameters may be received from a host system (not shown) or may be received via Figure 1 The dimming controller 121 directly sets the parameters.

[0066] The first frame frequency F1 represents the current frame frequency. In order to store the first frame frequency F1, a space of 8 bits or more may be allocated to a parameter storage unit (not shown).

[0067] The second frame frequency F2 represents the frame frequency to be changed according to the characteristics of the image. When a still image or an image with a small grayscale change rate between frames is displayed, the current frame frequency can be reduced; when an image with a large grayscale change rate between frames is displayed, the current frame frequency can be increased.

[0068] In order to store the second frame frequency F2, a space of 8 bits or more may be allocated to a parameter storage unit (not shown).

[0069] The dimming control signal GDC_ON allows Figure 1 The dimming controller 121 gradually changes or does not gradually change the frame frequency and the gamma correction data. When the parameter is in the on state, the frame frequency and the gamma correction data are gradually changed; when the parameter is in the off state, the frame frequency and the gamma correction data are not gradually changed.

[0070] In order to store the dimming control signal GDC_ON, a space of 1 bit or more may be allocated to a parameter storage unit (not shown).

[0071] The number of frequencies N represents the number of different frame frequencies occurring in the process of gradually changing the frame frequency. In order to store the number of frequencies N, a space of 8 bits or more may be allocated to a parameter storage unit (not shown).

[0072] The gradually changed frame frequency may have a value between the first frame frequency F1 and the second frame frequency F2. In addition, the gradually changed frame frequency may form an arithmetic sequence. In this case, the tolerance d of the arithmetic sequence may be obtained using the following equation 1:

[0073] [Equation 1]

[0074]

[0075] In addition, the N frame frequencies (i.e., the i-th frequency i th frequency) can be obtained by using the following equation 2:

[0076] [Equation 2]

[0077] i th frequency=F1+dxi(1≤i≤N, i is an integer)

[0078] For example, when the number N of frame frequencies gradually changed when the frame frequency is changed from 60 Hz to 90 Hz is set to 4, the tolerance d becomes (90-60) / (4+1) = 6. Therefore, the tolerance becomes 6 Hz, so that the frame frequency can be gradually changed in the order of 60 Hz, 66 Hz, 72 Hz, 78 Hz, 84 Hz, and 90 Hz.

[0079] EM control signal GDC_EVST_EN allows Figure 1 The dimming controller 121 determines whether to gradually change the frame frequency by adjusting the period of the light control signal output. When the parameter is in the enabled state, the frame frequency is gradually changed; when the parameter is in the disabled state, the frame frequency is not gradually changed.

[0080] To gradually change the frame rate, Figure 1 The dimming controller 121 can control Figure 1 The timing controller 120 changes the duty period of the light emitting control signal.

[0081] In order to store the EM control signal GDC_EVST_EN, a space of 1 bit or more may be allocated to a parameter storage unit (not shown).

[0082] The source control signal GDC_SRC_EN allows Figure 1 The dimming controller 121 determines whether to gradually change the gamma correction data. When the parameter is in an enabled state, the gamma correction data is gradually changed; when the parameter is in a disabled state, the gamma correction data is not gradually changed.

[0083] To gradually change the gamma correction data, Figure 1The dimming controller 121 can change Figure 1 The gamma correction data is stored in the gamma correction unit 130. In order to store the source control signal GDC_SRC_EN, a space of 1 bit or more may be allocated to a parameter storage unit (not shown).

[0084] The number of duty cycles M represents the number of duty cycle periods of the light emitting control signal output in one frame. By adjusting the number of duty cycle periods in one frame, the refresh rate of the frame can be controlled.

[0085] In order to store the number M of duty cycles, a space of 8 bits or more may be allocated to a parameter storage unit (not shown).

[0086] The first duty ratio D1 and the second duty ratio D2 represent the range of the duty ratio of the light emitting control signal.

[0087] When the brightness is very large or small, the brightness change may not be recognized even if the frame frequency is changed. Therefore, by gradually changing the frame frequency and gamma correction data only in the area where the brightness change can be recognized, unnecessary gradual changes in the frame frequency and gamma correction data in the area where the brightness change cannot be recognized can be prevented.

[0088] The brightness can be changed by adjusting the current flowing through the light emitting diode, and the current flowing through the light emitting diode can be changed by adjusting the duty cycle of the light emitting control signal. That is, when the duty cycle of the light emitting control signal is large, the amount of current flowing through the light emitting diode can be increased, thereby increasing the brightness; when the duty cycle of the light emitting control signal is small, the amount of current flowing through the light emitting diode can be reduced, thereby reducing the brightness.

[0089] Therefore, since the duty cycle of the light emitting control signal corresponds to the brightness, the duty cycle can be used to distinguish between the area where the brightness change can be recognized and the area where the brightness change cannot be recognized. When the duty cycle of the light emitting control signal is within the predetermined duty cycle range corresponding to the area where the brightness change can be recognized, Figure 1 The dimming controller 121 may control the gradual change of the frame frequency and the gamma correction data.

[0090] For example, in the case where the first duty ratio D1 is set to 20% and the second duty ratio D2 is set to 80%, only when the duty ratio of the light emitting control signal is in the range of 20% to 80%, Figure 1 The dimming controller 121 may control the gradual change of the frame frequency and the gamma correction data.

[0091] The first gamma correction data GS1 represents gamma correction data corresponding to the current frame frequency. In order to store the first gamma correction data GS1, a space of 8 bits or more may be allocated to a parameter storage unit (not shown).

[0092] The second gamma correction data GS2 represents gamma correction data corresponding to the frame frequency to be changed. In order to store the second gamma correction data GS2, a space of 8 bits or more may be allocated to a parameter storage unit (not shown).

[0093] Figure 1 The dimming controller 121 may use the following equation 3 to obtain gamma correction data corresponding to each of the N frame frequencies that are gradually changed (using the i-th gamma correction data i th gamma correction data):

[0094] [Equation 3]

[0095] (1≤i≤N, i is an integer).

[0096] In the following first to fourth examples, the following description will be given according to the input Figure 1 The parameters of the dimming controller 121 are used to gradually change the frame frequency and the processing of the gamma correction data.

[0097] Figures 4A to 4D is a timing diagram showing a process in which a light emission control signal and a source voltage are changed according to parameters input to a dimming controller.

[0098] In the first to fourth examples, a process in which each of the duty cycles T1 to T4 of the light emitting control signal EM and the source voltage SRC corresponding to the gamma correction data are gradually changed when the frame frequency is changed from 60 Hz to 90 Hz is shown.

[0099] In addition, the first duty cycle D1 and the second duty cycle D2 are set to 20% and 80%, respectively, and when the duty cycle of the light emitting control signal EM is in the range of 20% to 80%, the frame frequency and the gamma correction data can be set to gradually change. In the first to fourth examples, the duty cycle of the light emitting control signal EM is 50%.

[0100] exist Figures 4A to 4D , the first duty cycle T1 to the fourth duty cycle T4 respectively represent the duty cycle of the light emitting control signal EM when the frame frequency is 60 Hz, 70 Hz, 80 Hz and 90 Hz. In one frame, the light emitting control signal EM may have the same duty cycle. In addition, it is shown that one frame starts when the gate start pulse GSP is in the on state.

[0101] exist Figure 4A In the first example shown, the dimming control signal GDC_ON is set to be in an off state.

[0102] Since the dimming control signal GDC_ON is in the off state, Figure 1The dimming controller 121 does not gradually change the frame frequency and the gamma correction data without considering other parameters.

[0103] As shown in the timing diagram, it can be seen that the frame frequency changes directly from 60 Hz to 90 Hz without going through gradual steps. In this case, the duty cycle of the light emitting control signal EM changes from the first duty cycle T1 to a fourth duty cycle T4 that is smaller than the first duty cycle T1.

[0104] Furthermore, it can be seen that the source voltage SRC also changes instantly from the B level Sb to the A level Sa without going through gradual steps.

[0105] exist Figure 4B In the second example shown, the dimming control signal GDC_ON is set to be in the on state. In addition, the number of frequencies N is set to 2, the EM control signal GDC_EVST_EN is set to be in the enabled state, the source control signal GDC_SRC_EN is set to be in the disabled state, and the number of duty cycles M is set to 4.

[0106] In the second example, the frame frequency is gradually changed, and the tolerance d becomes (90-60) / (2+1)=10 according to the above equation 1. Therefore, two different frame frequencies appearing in the gradual change process of the frame frequency may be 70 Hz and 80 Hz according to the above equation 2.

[0107] In the timing diagram, it can be seen that the frame frequency forms an arithmetic sequence with a 10Hz tolerance d in the order of 60Hz, 70Hz, 80Hz and 90Hz, and gradually changes. In this case, the duty cycle of the light emitting control signal EM changes in the order of the first duty cycle T1 to the fourth duty cycle T4. Among the lengths of the duty cycle, the length of the first duty cycle T1 is the longest, and the length decreases in the order of the second duty cycle T2, the third duty cycle T3 and the fourth duty cycle T4.

[0108] Furthermore, it can be seen that the number of light emission control signals EM appearing in one frame is four according to the number M of duty cycles.

[0109] However, since the source control signal GDC_SRC_EN is set in the disabled state, it can be seen that the source voltage SRC does not undergo a gradual step, and when the frame frequency becomes 90 Hz (the frame frequency after the change), the source voltage SRC immediately changes from the B level Sb to the A level Sa.

[0110] exist Figure 4CIn the third example shown, the dimming control signal GDC_ON is set to the on state. In addition, the number of frequencies N is set to 2, the EM control signal GDC_EVST_EN is set to the disabled state, the source control signal GDC_SRC_EN is set to the enabled state, and the number of duty cycles M is set to 4.

[0111] Unlike the second example, since the EM control signal GDC_EVST_EN is set to be in a disabled state, it can be seen that the frame frequency changes from 60 Hz to 90 Hz without undergoing a gradual step. In this case, the duty cycle of the light emitting control signal EM changes from the first duty cycle T1 to a fourth duty cycle T4 that is less than the first duty cycle T1.

[0112] However, since the source control signal GDC_SRC_EN is set to be in the enable state, it can be seen that the source voltage SRC undergoes a gradual step, gradually changing from the B level Sb to the A level Sa.

[0113] exist Figure 4D In the fourth example shown, the dimming control signal GDC_ON is set to the on state. In addition, the number of frequencies N is set to 2, the EM control signal GDC_EVST_EN is set to be in the enabled state, the source control signal GDC_SRC_EN is set to be in the enabled state, and the number of duty cycles M is set to 4.

[0114] Since the EM control signal GDC_EVST_EN is set to be in an enabled state, it can be seen that the frame frequency forms an arithmetic sequence with a 10 Hz tolerance d in the order of 60 Hz, 70 Hz, 80 Hz, and 90 Hz, and gradually changes as in the second example. In this case, the duty cycle of the light emitting control signal EM changes in the order of the first duty cycle T1 to the fourth duty cycle T4.

[0115] Furthermore, since the source control signal GDC_SRC_EN is set to be in the enable state, it can be seen that the source voltage SRC undergoes a gradual step, changing from the B level Sb to the A level Sa as in the third example.

[0116] As described above, in the embodiment of the present invention, when the frame frequency is changed, the frame frequency, the duty cycle of the light emitting control signal EM, and the source voltage SRC may be gradually changed.

[0117] Figure 5A and 5B : is a diagram showing the effect of recognizing the brightness change in the first and fourth examples of the present invention.

[0118] exist Figure 5AIn the first example shown, since the frame frequency and gamma correction data are not gradually changed, the frame frequency changes from 60 Hz to 90 Hz, and the duty cycle of the light emitting control signal EM changes from the first duty cycle T1 to the fourth duty cycle T4. In addition, the source voltage SRC changes from the B level Sb to the A level Sa immediately.

[0119] Therefore, the grayscale level of the image at 60 Hz is quickly changed to the grayscale level of the image at 90 Hz, so that the change in the brightness FL of each frame can be recognized.

[0120] exist Figure 5B In the fourth example shown, the frame frequency and gamma correction data are gradually changed.

[0121] Since the grayscale of the images at 70 Hz and 80 Hz appears between the grayscale of the image at 60 Hz and the grayscale of the image at 90 Hz, the luminance FL of each frame may gradually change so that the change of the luminance FL of each frame is not recognized.

[0122] As described above, in the present invention, when the frame frequency is changed, the frame frequency and the gamma correction data can be changed gradually, whereby the user cannot recognize the brightness change.

[0123] Furthermore, when the duty ratio of the light emission control signal is within a predetermined range, the frame frequency and the gamma correction data can be gradually changed, whereby a gradual change can be performed in a region where a brightness change can be originally recognized.

[0124] As described above, the present invention is described in the above-mentioned embodiments, but various modifications can be made without departing from the scope of the present invention.

Claims

1. A display device, include: A display panel including a plurality of pixel regions; A gate driver, the gate driver being used to sequentially provide light emitting control signals to horizontal rows of the display panel; a data driver configured to provide a data signal corrected by a source voltage to the display panel; as well as a dimming controller configured to control gradual changes in the frame frequency and the gamma correction data when changing the frame frequency of the display device, wherein the dimming controller controls the gradual change of the frame frequency by outputting frames having a first frame frequency to an Nth frame frequency, wherein the first frame frequency to the Nth frame frequency are N gradually changing different frame frequencies, and Wherein, when the frames having the first frame frequency to the Nth frame frequency are output, the dimming controller controls the gradual change of the gamma correction data by setting the first gamma correction data to the Nth gamma correction data, and each of the first gamma correction data to the Nth gamma correction data corresponds to one of the first frame frequency to the Nth frame frequency respectively.

2. The display device according to claim 1, wherein the dimming controller receives a first duty cycle and a second duty cycle as input, and when the duty cycle of the light emitting control signal is within the range of the first duty cycle to the second duty cycle, the dimming controller controls the frame frequency and the gamma correction data so that the frame frequency and the gamma correction data change gradually. 3 . The display device according to claim 2 , wherein the first duty ratio is 20%, and the second duty ratio is 80%.

4. The display device according to claim 1, wherein the dimming controller receives a first frame frequency F1, a second frame frequency F2, and a number N of frame frequencies as inputs, and controls outputting the frames having the first frame frequency to the Nth frame frequency in a process of gradually changing the frame frequency of the display device from the first frame frequency F1 to the second frame frequency F2, in, Each of the first to N-th frame frequencies has a value between the first frame frequency F1 and the second frame frequency F2, The dimming controller is configured to control a gradual change in the duty cycle of the light emitting control signal so that the frame frequency changes gradually.

5. The display device according to claim 4, wherein the i-th frame frequency representing the first frame frequency to the N-th frame frequency is set according to the following equation: in, 1≤i≤N, and i is an integer. 6 . The display device of claim 5 , wherein the dimming controller receives a number M of duty cycle periods as input, and controls the light emitting control signal so that the generated light emitting control signal has M duty cycle periods in one frame.

7. The display device according to claim 4, wherein the dimming controller receives the first gamma correction data GS1 and the second gamma correction data GS2 as inputs, and when outputting frames having the first frame frequency to the N-th frame frequency, the dimming controller sets the i-th gamma correction data i representing the plurality of first gamma correction data to the N-th gamma correction data between the first gamma correction data GS1 and the second gamma correction data GS2 according to the following equation: th gamma correctiondata: in, 1≤i≤N, and i is an integer.

8. The display device according to claim 1, wherein the gate driver comprises a shift register including a plurality of stages connected in a slave manner, The plurality of stages output gate driving signals in sequence. 9 . The display device according to claim 8 , wherein the gate driving signal comprises a scan signal and a light emitting control signal.

10. The display device according to claim 8, wherein the stage comprises a set input terminal, a reset input terminal, a gate drive signal output terminal, and a gate shift clock output terminal, The gate shift clock output terminal is connected to the reset input terminal of the previous k-th stage, and is connected to the set input terminal of the following k-th stage. 11 . The display device according to claim 10 , wherein when the number of the stages is h, the number k ranges from 1 to h−1. 12 . The display device according to claim 10 , wherein a gate start pulse is input to a set input terminal of the first stage of the shift register. 13 . The display device according to claim 10 , wherein a gate driving signal output terminal of the stage is connected to a gate line arranged for each horizontal line of the display panel. 14 . The display device according to claim 10 , wherein the stages output gate shift clocks so that a front k-th stage is disabled and a rear k-th stage is enabled. 15 . The display device according to claim 1 , further comprising a gamma correction unit in which the gamma correction data is stored, and the gamma correction unit generates the source voltage according to the gamma correction data and transmits the source voltage to the data driver. 16 . The display device of claim 1 , wherein the dimming controller receives as input a source control signal for allowing the dimming controller to determine whether to gradually change the gamma correction data. 17 . The display device according to claim 16 , wherein when the source control signal is in an enabled state, the level of the source voltage is gradually changed; and when the source control signal is in a disabled state, the level of the source voltage is not gradually changed.

18. A method for driving a display device, the method comprising the following steps: Input a first duty cycle and a second duty cycle; Input the first frame frequency F1, the second frame frequency F2, the number of frame frequencies N, whether to turn on the gradual dimming control, and the duty cycle of the light control signal; as well as When changing the frame frequency of the display device, when the gradual dimming control is in an on state and the duty cycle of the light emitting control signal is within a range from the first duty cycle to the second duty cycle, controlling to gradually change the frame frequency and the gamma correction data, wherein controlling to gradually change the frame frequency comprises outputting frames having a first frame frequency to an Nth frame frequency, wherein the first frame frequency to the Nth frame frequency are N gradually changing different frame frequencies, and Wherein, controlling the gradual change of the gamma correction data includes setting the first gamma correction data to the Nth gamma correction data when outputting the frames having the first frame frequency to the Nth frame frequency, each of the first gamma correction data to the Nth gamma correction data corresponding to one of the first frame frequency to the Nth frame frequency respectively. The method according to claim 18 , wherein the first duty cycle is 20% and the second duty cycle is 80%.

20. The method according to claim 18, wherein the step of controlling the frame frequency and the gamma correction data so that the frame frequency and the gamma correction data are gradually changed include: In the process of gradually changing the frame frequency from the first frame frequency F1 to the second frame frequency F2, the frames having the first frame frequency to the Nth frame frequency are controlled to be output, wherein each of the first to Nth frame frequencies has a value between the first frame frequency F1 and the second frame frequency F2, The duty cycle of the light emitting control signal is gradually changed so that the frame frequency is gradually changed.

21. The method according to claim 20, wherein the ith frame frequency representing the first frame frequency to the Nth frame frequency is set according to the following equation: in, 1≤i≤N, and i is an integer.

22. The method according to claim 21, further comprising: include: Enter the number of duty cycle periods M; as well as The light emitting control signal is controlled so that the generated light emitting control signal has M duty cycle periods in one frame.

23. The method according to claim 20, further comprising: include: Input first gamma correction data GS1 and second gamma correction data GS2; as well as When frames having the first frame frequency to the Nth frame frequency are output, the i-th gamma correction data i representing the plurality of first gamma correction data to the N-th gamma correction data between the first gamma correction data GS1 and the second gamma correction data GS2 is set according to the following equation: th Gamma correction data: Wherein, 1≤i≤N, and i is an integer.

24. The method according to claim 18, further comprising: include: A source voltage is generated by the gamma correction data, and a data signal input to the display device is corrected by the source voltage.

25. The method according to claim 24, further comprising: include: A source control signal is input, the source control signal being used to allow determination of whether to gradually change the gamma correction data. 26 . The method according to claim 25 , wherein when the source control signal is in an enabled state, the level of the source voltage is gradually changed; and when the source control signal is in a disabled state, the level of the source voltage is not gradually changed.

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