Flip chip bonding structure and circuit substrate thereof

Abstract

The present invention discloses a flip chip bonding structure and a circuit substrate thereof. The flip chip bonding structure comprises a circuit substrate, the circuit substrate comprises a carrier, a plurality of inner pins, a T-shaped circuit and a dummy metal pattern, the inner pins, the T-shaped circuit and the dummy metal pattern are located in the inner bonding area of ​​the carrier, the T-shaped circuit comprises a main line segment, a connecting segment and a branch line segment, the connecting segment connects the main line segment and the branch line segment, the main line segment extends along the horizontal axis direction, the branch line segment extends along the vertical axis direction, and the dummy metal pattern is located between the connecting segment and the inner pins.

Description

Technical Field

[0001] The invention relates to a flip chip bonding structure, wherein a chip is bonded to a circuit substrate having a T-shaped circuit and a dummy metal pattern. Background Art

[0002] The circuit etching process uses an etching liquid to etch the metal layer exposed by the patterned photoresist, and transfers the pattern to the metal layer to form a fine circuit pattern. The etching liquid flows between the patterned photoresists to evenly etch the exposed metal layer. However, when the etching liquid flows to the space surrounded by the photoresist on three sides, the fluidity of the etching liquid will decrease and accumulate in the space surrounded by the photoresist on three sides. If the etching liquid stays for too long, it may cause over-etching, causing the fine circuit to break and fail. Summary of the invention

[0003] The object of the present invention is to provide a flip chip bonding structure and a circuit substrate thereof, wherein a dummy metal pattern is arranged around a T-shaped circuit to prevent the T-shaped circuit from being broken due to excessive etching by an etching solution.

[0004] The present invention discloses a circuit substrate, which includes a carrier, a plurality of inner pins, at least one T-shaped circuit and at least one dummy metal pattern. The carrier has a surface, the surface defines an inner bonding area, the inner bonding area has a first area and a second area, the first area is located outside the second area, the inner pin is located in the first area, the T-shaped circuit is located in the second area and has a main line segment, a connecting segment and a branch line segment, the main line segment connects the connecting segment and extends along the horizontal axis direction, the branch line segment connects the connecting segment and extends toward the first area along the longitudinal axis direction, the branch line segment is used to connect a bump, the dummy metal pattern is located between the connecting segment and the inner pin, and the dummy metal pattern is not electrically connected to the inner pin and the T-shaped circuit.

[0005] Preferably, the main line segment has a first width along the longitudinal axis, and the connecting segment has a second width along the longitudinal axis, and the second width is smaller than the first width.

[0006] Preferably, the branch line segment has a third width along the horizontal axis, and a ratio of the second width to the third width is not less than 0.5.

[0007] Preferably, the branch line segment extends along the longitudinal axis direction toward one of the inner pins.

[0008] Preferably, the branch line segment extends along the longitudinal axis to between two adjacent inner pins.

[0009] Preferably, the branch line segment has a first end and a second end, the first end is connected to the connecting segment, the second end is used to engage the bump, and the line width of the first end is greater than the line width of the second end.

[0010] Preferably, the branch line segment has a first end and a second end, the first end is connected to the connecting segment, the second end is used to engage the protrusion, and the first end and the second end are perpendicular to each other.

[0011] Preferably, it has two dummy metal patterns, and the dummy metal patterns are respectively located on both sides of the branch line segment.

[0012] The present invention further discloses a flip chip bonding structure, which includes the above-mentioned circuit substrate, chip and solder layer. The chip is arranged in the inner bonding area and has multiple first bumps and at least one second bump. The solder layer is located between the circuit substrate and the chip, and is used to bond the first bump and the inner pin of the inner pin, and to bond the second bump and the branch line segment.

[0013] Preferably, the second protrusion has a fourth width, and a ratio of the second width to the fourth width is less than 2.

[0014] Preferably, the connecting section has a first length along the transverse axis, the second protrusion has a second length, and the ratio of the first length to the second length is not less than 4.

[0015] Preferably, there is a straight-line distance between the connecting section and the second protrusion, and a ratio of the straight-line distance to the second width is not less than 3.

[0016] The present invention arranges the dummy metal pattern between the connecting section and the inner pin, so that the dummy metal pattern is located in the space surrounded by the connecting section, the branch line section and the inner pin, so that the etching liquid will not accumulate around the connecting section and the branch line section, and the etching liquid can be prevented from over-etching the T-shaped circuit and causing the connecting section and / or the branch line section to break. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 : A top view of a carrier according to one embodiment of the present invention.

[0018] Figure 2 : A top view of a flip chip bonding structure according to one embodiment of the present invention.

[0019] Figure 3 : A partial top view of the inner bonding area of ​​the circuit substrate according to one embodiment of the present invention.

[0020] Figure 4 : Figure 3 A partial enlarged view of .

[0021] Figure 5 : Figure 3 A partial enlarged view of .

[0022] Figure 6 : Figure 3 A partial enlarged view of .

[0023] Figure 7 : A partial top view of the inner bonding area of ​​the circuit substrate according to one embodiment of the present invention.

[0024] Figure 8 : A partial top view of the inner bonding area of ​​the circuit substrate according to one embodiment of the present invention.

[0025] Fig. 9 : A cross-sectional view of a flip chip bonding structure according to one embodiment of the present invention.

[0026]

Main component symbol description

[0027] 100: Circuit board 110: Carrier board

[0028] 111: surface 112: outer bonding area

[0029] 113: inner bonding area 113a: first area

[0030] 113b: Second area 120: Circuit layer

[0031] 121: outer pin 122: inner pin

[0032] 130: solder mask 140: T-type circuit

[0033] 141: Main line segment 142: Connecting segment

[0034] 143: branch line segment 143a: first end

[0035] 143b: second end 150: dummy metal pattern

[0036] 200: wafer 210: first bump

[0037] 220: second bump 300: solder layer

[0038] 400: Encapsulation colloid I: Flip chip bonding structure

[0039] L1: first length L2: second length

[0040] LD: Straight line length W1: First width

[0041] W2: second width W3: third width

[0042] W4: fourth width X: horizontal axis direction

[0043] Y: vertical axis direction DETAILED DESCRIPTION

[0044] See also Figures 1 to 3The present invention discloses a circuit substrate 100, which has a carrier 110 and a circuit layer 120. The circuit layer 120 is located on a surface 111 of the carrier 110. The surface 111 defines an outer bonding area 112 and an inner bonding area 113. The circuit layer 120 has a plurality of outer pins 121 and a plurality of inner pins 122. The outer pins 121 are located in the outer bonding area 112, and the inner pins 122 are located in the inner bonding area 113. The outer pins 121 and the inner pins 122 are arranged in the outer bonding area 112 and the inner bonding area 113 along a horizontal axis direction X, respectively. The inner bonding area 113 has a first area 113a and a second area 113b. The first area 113a is located outside the second area 113b. In the present embodiment, the inner bonding area 113 has two first areas 113a. The second area 113b is located between the first areas 113a. The inner pins 122 are located in the first area 113a.

[0045] Preferably, the carrier 110 may be made of polyimide (PI), polyethylene terephthalate (PET), glass, ceramic, metal or other materials, and the circuit layer 120 may be made of copper, nickel, gold or other metals or alloys.

[0046] See also Figure 2 Preferably, the circuit substrate 100 further has a solder mask 130, which covers the circuit layer 120 but does not cover the outer pins 121 and the inner pins 122. The solder mask 130 is used to protect the circuit layer 120, and the exposed outer pins 121 and the inner pins 122 are respectively used to join the electronic device and the chip (not shown).

[0047] See also Figure 3 and Figure 4 The circuit substrate 100 further has at least one T-shaped circuit 140, which is located in the second area 113b of the inner bonding area 113. The T-shaped circuit 140 is used to connect to the ground or power supply and is not electrically connected to the inner pin 122. The T-shaped circuit 140 has a main line segment 141, a connecting segment 142 and a branch line segment 143. The main line segment 141 connects the connecting segment 142 and extends along the horizontal axis direction X. The branch line segment 143 connects the connecting segment 142 and extends along the vertical axis direction X. The direction Y extends toward the first area 113a, and the branch segment 143 is used to engage the protrusion. In the present embodiment, the main segment 141 and the connecting segment 142 connected to each other are straight, and the connecting segment 142 and the branch segment 143 connected to each other are perpendicular to each other, but the present invention is not limited thereto. The main segment 141 and the connecting segment 142 may be non-straight, and the angle between the connecting segment 142 and the branch segment 143 may be greater than, less than or substantially equal to 90 degrees.

[0048] Preferably, the circuit substrate 100 has a plurality of T-shaped circuits 140, the main line segments 141 of the T-shaped circuits 140 extend along the horizontal axis direction X and are connected to each other, and the branch line segments 143 of the T-shaped circuits 140 extend along the vertical axis direction Y toward the first area 113a of the inner bonding area 113 to respectively bond with bumps.

[0049] See also Figure 3 and Figure 4 The circuit substrate 100 also has at least one dummy metal pattern 150, which is located between the connecting section 142 and the inner pin 122, and is not electrically connected to the T-shaped circuit 140 and the inner pin 122. The present invention does not limit the shape of the dummy metal pattern 150, and can be adjusted in conjunction with the surrounding circuit configuration. The dummy metal pattern 150 is used to protect the T-shaped circuit 140, especially to prevent the connecting section 142 and the branch section 143 from being broken due to excessive etching. Preferably, the circuit substrate 100 has two dummy metal patterns 150, which are respectively located on both sides of the branch section 143. The dummy metal patterns 150 can be the same pattern and symmetrically located on both sides of the branch section 143, or different patterns and asymmetrically located on both sides of the branch section 143.

[0050] In the present embodiment, the circuit layer 120, the T-shaped circuit 140 and the dummy metal pattern 150 are formed on the carrier 110 via the same metal etching process. The dummy metal pattern 150 is located in the space surrounded by the connecting section 142, the branch section 143 and the inner pin 122, so as to avoid the accumulation of etching liquid around the connecting section 142 and the branch section 143, thereby preventing the connecting section 142 and the branch section 143 from being broken due to excessive etching.

[0051] Figures 4 to 8 The T-type circuit 140 is different in form. Figure 4 , Figure 5 The branch line segment 143 shown extends along the longitudinal direction Y toward one of the inner pins 122 . Figure 6 The branch line segment 143 shown extends along the longitudinal axis direction Y to between two adjacent inner pins 122. Preferably, the line widths of the branch line segment 143 and the inner pins 122 are substantially the same. Figure 7 The branch line segment 143 shown in the figure has a first end 143a and a second end 143b, wherein the first end 143a is connected to the connecting segment 142, and the second end 143b is used to engage the bump, wherein the line width of the first end 143a is greater than the line width of the second end 143b to avoid a break between the connecting segment 142 and the branch line segment 143, and the second end 143b is located between two adjacent inner pins 122, which is different from Figure 7 , Figure 8 The branch line segment 143 is shown to be non-linear, and the first end 143 b and the second end 143 b are perpendicular to each other.

[0052] See also Figure 2 and Fig. 9 ( Fig. 9 for Figure 7 The present invention further discloses a flip chip bonding structure I, which includes the aforementioned circuit substrate 100, a chip 200 and a solder layer 300, wherein the chip 200 is disposed in the inner bonding area 113 of the carrier 110 and has a plurality of first bumps 210 and at least one second bump 220, and the solder layer 300 is located between the circuit substrate 100 and the chip 200, and is used to bond the first bump 210 and the inner pin 122, and is used to bond the second bump 220 and For the branch line segment 143, preferably, the thickness of the solder layer 300 is not greater than 0.30μm, and more preferably, the thickness of the solder layer 300 is not greater than 0.20μm. In the present embodiment, the solder layer 300 is formed on the inner pin 122 and the T-type circuit 140, and the thickness is 0.16±0.4μm. After the chip 200 is set in the inner bonding area 113, a hot pressing process is performed. The solder layer 300 is softened by heat and used to bond the chip 200 and the circuit substrate 100.

[0053] Since the solder layer 300 becomes fluid after being softened by heat, when the second bump 220 is joined to the branch segment 143, the solder layer 300 on the T-shaped circuit 140 will flow toward the branch segment 143 from different directions, thereby increasing the incidence of overflow of the solder layer 300. Therefore, the design of the T-shaped circuit 140 can be selectively changed to avoid solder overflow and cause a bridging short circuit.

[0054] See also Figure 4 The main line segment 141 has a first width W1 along the longitudinal axis direction Y, and the connecting segment 142 has a second width W2 along the longitudinal axis direction Y. Preferably, the second width W2 is smaller than the first width W1. Reducing the width of the connecting segment 142 can effectively reduce the amount of solder flowing from the connecting segment 142 to the branch line segment 143, so as to avoid excessive solder flowing to the second bump 220 and causing overflow. In addition, the branch line segment 143 has a third width W3 along the transverse axis direction X, and the ratio of the second width W2 to the third width W3 is greater than or equal to When the ratio is between 0.5 and 1 Indicates that the second width W2 is smaller than the third width W3, when the ratio is equal to Indicates that the second width W2 is equal to the third width W3, when the ratio is greater than It indicates that the second width W2 is greater than the third width W3.

[0055] In addition to limiting the line width ratio between the main line segment 141, the connecting segment 142 and the branch line segment 143, the line width of the connecting segment 142 can also be adjusted according to the size of the second bump 220, see Figure 5 Preferably, the second protrusion 220 has a fourth width W4 along the horizontal axis direction X, and the ratio of the second width W2 to the fourth width W4 is less than When the ratio is between 1 and 2 Indicates that the second width W2 is greater than the fourth width W4, but less than twice the fourth width W4, when the ratio is equal to Indicates that the second width W2 is equal to the fourth width W4, when the ratio is less than It indicates that the second width W2 is smaller than the fourth width W4.

[0056] See also Figure 6 The connecting section 142 has a first length L1 along the transverse axis direction X, and the second protrusion 220 has a second length L2 along the longitudinal axis direction Y. Preferably, the length of the connecting section 142 is not less than 4 times the length of the second protrusion 220, so the ratio of the first length L1 to the second length L2 is greater than or equal to The length of the connecting segment 142 that needs to be reduced in width can be determined based on the length of the second protrusion 220. In the present embodiment, the branch segment 143 is located at the center of the connecting segment 142, and the shortest distances from the branch segment 143 to both ends of the connecting segment 142 are substantially the same. However, the present invention is not limited thereto. The branch segment 143 is selectively biased toward one side of the connecting segment 142 according to different wiring design requirements.

[0057] See also Figure 6 There is a straight-line distance LD between the connecting section 142 and the second bump 220, and the straight-line distance LD is the shortest distance between the connecting section 142 and the second bump 220. The ratio of the straight-line distance LD to the second width W2 is The straight-line distance LD is proportional to the thickness of the solder layer 300. When the second width W2 is fixed but the thickness of the solder layer 300 increases, the straight-line distance LD needs to be lengthened to prevent excessive solder from flowing to the branch line segment 143 and causing a bridge short circuit. Preferably, when the thickness of the solder layer 300 is substantially equal to 0.16 μm, the straight-line distance LD must be greater than or equal to 3 times the second width W2. Therefore, the ratio of the straight-line distance LD to the second width W2 is greater than or equal to When the thickness of the solder layer 300 is substantially equal to 0.18 μm, the straight distance LD must be greater than or equal to 4 times the second width W2. Therefore, the ratio of the straight distance LD to the second width W2 is greater than or equal to

[0058] Figures 4 to 7In the embodiment shown, the second bump 220 has the fourth width W4 along the horizontal axis direction X, has the second length L2 along the vertical axis direction Y, and the dummy metal patterns 150 located on both sides of the branch line segment 143 are the same pattern and are mirror-symmetrical to each other. Figures 4 to 7 ,exist Figure 8 In the illustrated embodiment, the second bump 220 has the fourth width W4 along the longitudinal direction Y and the second length L2 along the transverse direction X, and the dummy metal patterns 150 on both sides of the branch line segment 143 are different patterns and are asymmetric to each other.

[0059] The above description is only a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Although the present invention has been disclosed as a preferred embodiment as above, it is not intended to limit the present invention. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of the technical solution of the present invention.

Claims

1. A circuit substrate, characterized in that: It contains: A carrier having a surface, the surface defining an inner bonding area, the inner bonding area having a first area and a second area, the first area being located outside the second area; A plurality of inner pins are located in the first area; At least one T-shaped line is located in the second area, the T-shaped line has a main line segment, a connecting segment and a branch line segment, the main line segment connects the connecting segment and extends along the horizontal axis direction, the branch line segment connects the connecting segment and extends toward the first area along the longitudinal axis direction, and the branch line segment is used to engage the protrusion; as well as At least one dummy metal pattern is located between the connecting section and the inner pin, and the dummy metal pattern is not electrically connected to the inner pin and the T-shaped circuit.

2. The circuit substrate according to claim 1, characterized in that: The main line segment has a first width along the longitudinal axis, and the connecting segment has a second width along the longitudinal axis, and the second width is smaller than the first width.

3. The circuit substrate according to claim 2, characterized in that: The branch line segment has a third width along the horizontal axis, and a ratio of the second width to the third width is not less than 0.

5.

4. The circuit substrate according to claim 1, characterized in that: The branch line segment extends along the longitudinal axis toward one of the inner pins.

5. The circuit substrate according to claim 1, characterized in that: The branch line segment extends along the longitudinal axis to between two adjacent inner pins.

6. The circuit substrate according to claim 1, characterized in that: The branch line segment has a first end and a second end, the first end is connected to the connection segment, the second end is used to engage the bump, and the line width of the first end is greater than the line width of the second end.

7. The circuit substrate according to claim 1, characterized in that: The branch line segment has a first end and a second end, the first end is connected to the connecting segment, the second end is used to engage the protrusion, and the first end and the second end are perpendicular to each other.

8. The circuit substrate according to claim 1, characterized in that: It has two dummy metal patterns, which are respectively located on both sides of the branch line segment.

9. A flip chip bonding structure, characterized in that: It contains: A circuit substrate as claimed in any one of claims 1 to 8; A chip is disposed in the inner bonding area, the chip having a plurality of first bumps and at least one second bump; as well as The solder layer is located between the circuit substrate and the chip. The solder layer is used to join the first bump and the inner lead, and the solder layer is used to join the second bump and the branch line segment.

10. The flip chip bonding structure according to claim 9, wherein: The connecting section has a second width along the longitudinal axis direction, the second protrusion has a fourth width, and the ratio of the second width to the fourth width is less than 2.

11. The flip chip bonding structure according to claim 9, wherein: The connecting section has a first length along the horizontal axis, the second protrusion has a second length, and the ratio of the first length to the second length is not less than 4.

12. The flip chip bonding structure according to claim 9, wherein: The connecting section has a second width along the longitudinal axis direction, and there is a straight-line distance between the connecting section and the second protrusion, and the ratio of the straight-line distance to the second width is not less than 3.

Images