Semiconductor devices

Abstract

The present invention provides a semiconductor device capable of reducing damage to a printed circuit board, comprising: an insulating circuit board; a printed circuit board having a through-hole (34a) penetrating its main surface; and an external terminal being pressed into the through-hole (34a) and inserted through the through-hole (34a), with one end fixed to the front side of the insulating circuit board. The printed circuit board includes: a support region (35) having the through-hole (34a) on its main surface; and a buffer region (36) surrounding the support region (35), having a buffer hole (36a) opening through a torque portion (36b) connected to the support region (35). Depending on the deformation of the external terminal, the support region (35) of the printed circuit board containing the through-hole (34a) deforms due to the deflection of the torque portion (36b).

Description

Technical Field

[0001] This invention relates to a semiconductor device. Background Technology

[0002] Semiconductor devices comprise semiconductor chips including power devices and are used as power conversion devices. Power devices are switching elements. Examples of switching elements include IGBTs (Insulated Gate Bipolar Transistors) and power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

[0003] Such a semiconductor device includes an insulating circuit board, a semiconductor chip, and a printed circuit board. The insulating circuit board includes a ceramic substrate and multiple circuit patterns disposed on the ceramic substrate. The semiconductor chip is disposed on a predetermined circuit pattern. A predetermined circuit is formed on the printed circuit board. External terminals are press-fitted through through holes in such a printed circuit board. The external terminals mounted on the printed circuit board are engaged with the predetermined circuit patterns on the insulating circuit board. Such a structure is placed in a mold, and resin is injected into the mold to manufacture the semiconductor device. It should be noted that various methods are used to mount rod-shaped terminals, etc., on various substrates such as printed circuit boards (for example, see Patent Documents 1 to 5). The terminal mounting methods are as follows. For example, terminal pieces are mounted to through holes in the substrate via terminal connectors (for example, see Patent Document 6). In addition, locating pins are mounted to holes in the ceramic substrate via thin-walled brass cylinders (for example, see Patent Document 7).

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2019-161174

[0007] Patent Document 2: International Publication No. 2014 / 061211

[0008] Patent Document 3: International Publication No. 2014 / 185050

[0009] Patent Document 4: International Publication No. 2014 / 192298

[0010] Patent Document 5: International Publication No. 2015 / 151235

[0011] Patent Document 6: Japanese Patent Application Publication No. 2011-114979

[0012] Patent Document 7: Japanese Patent Application Publication No. 5-191096 Summary of the Invention

[0013] Technical issues

[0014] Semiconductor devices comprised of components with dimensional and assembly tolerances. Therefore, if an external terminal, as a component, is pressed into a printed circuit board (PCB) and bonded to an insulating circuit board, a height deviation occurs in the external terminal. When this height deviation occurs, if the insulating circuit board or similar material is placed in a mold, the external terminal, protruding more than the others, is pressed against the mold. The pressing force and direction relative to the external terminal pressed against the mold cause deformation. Furthermore, this deformation may apply a load to the PCB with the external terminal pressed in, potentially damaging the PCB. A damaged PCB may reduce the reliability of the semiconductor device.

[0015] The present invention has been made in view of this purpose, and its object is to provide a semiconductor device capable of reducing damage to printed circuit boards.

[0016] Technical solution

[0017] According to one aspect of the present invention, a semiconductor device is provided, comprising: a substrate; a printed circuit board having a through-hole penetrating a main surface; and an external terminal being pressed into the through-hole and inserted through the through-hole, and having one end fixed to the front side of the substrate, the printed circuit board comprising: a support region having the through-hole on the main surface; and a buffer region surrounding the support region, having a buffer hole opening to retain a torque portion connected to the support region.

[0018] Technical effect

[0019] According to the disclosed technology, it is possible to reduce damage to the printed circuit board and suppress the decrease in the reliability of semiconductor devices. Attached Figure Description

[0020] Figure 1 This is a cross-sectional view of the semiconductor device according to the first embodiment.

[0021] Figure 2 This is a top view of the printed circuit board included in the semiconductor device of the first embodiment.

[0022] Figure 3 This is a top view that enlarges the through-hole of the printed circuit board included in the semiconductor device of the first embodiment.

[0023] Figure 4This is a cross-sectional view of the printed circuit board included in the semiconductor device of the first embodiment.

[0024] Figure 5 This is a flowchart of a method for manufacturing a semiconductor device according to the first embodiment.

[0025] Figure 6 This is a diagram illustrating the coating of solder in the manufacturing method of the semiconductor device according to the first embodiment.

[0026] Figure 7 This is a diagram showing the mounting of a printed circuit board or the like for illustrating the manufacturing method of the semiconductor device according to the first embodiment.

[0027] Figure 8 This is a diagram illustrating the molding process of the semiconductor device manufacturing method according to the first embodiment.

[0028] Figure 9 This is a diagram used to illustrate the cracks in the through-holes of a printed circuit board for the reference example.

[0029] Figure 10 This is a diagram illustrating the cracks in the through-holes of the printed circuit board included in the semiconductor device of the first embodiment.

[0030] Figure 11 This is a top view that enlarges the other through holes of the printed circuit board included in the semiconductor device of the first embodiment.

[0031] Figure 12 This is a top view (one of the two) of the through-holes in the printed circuit board included in the semiconductor device of the second embodiment.

[0032] Figure 13 This is a top view (second one) of the through holes in the printed circuit board included in the semiconductor device of the second embodiment, magnified.

[0033] Symbol Explanation

[0034] 10 Semiconductor Devices

[0035] 10a Semiconductor Structure

[0036] 20a, 20b Insulated Circuit Boards

[0037] Insulation boards 21a, 21b, and 31

[0038] 22a, 22b metal plates

[0039] Circuit diagrams 23a1, 23a2, 23b1, and 23b2

[0040] 24a1, 24a2, 24b1, 24b2 semiconductor chips

[0041] 30 Printed Circuit Board

[0042] 32 Upper circuit diagram

[0043] 33 Lower circuit diagram

[0044] 34a and 34b through holes

[0045] 35 Support area

[0046] 36 Buffer Zone

[0047] 36a Buffer hole

[0048] 36b Torque section

[0049] 40a, 40b external terminals

[0050] 41a and 41b conductive posts

[0051] 50 Sealing components

[0052] 60 molds

[0053] 61 Upper mold section

[0054] 61a type cavity

[0055] Terminal storage section 61a1, 61b1

[0056] 61c Injection Portal

[0057] 62 Lower mold section

[0058] 62a Positioning Ring Detailed Implementation

[0059] Hereinafter, the embodiments will be described with reference to the accompanying drawings. It should be noted that in the following description, "front" and "top surface" are used interchangeably. Figure 1 In the semiconductor device 10, "upper" indicates the surface facing upwards. Similarly, "upper" is used in... Figure 1 In the semiconductor device 10, the upper side is indicated. "Back side" and "lower surface" are... Figure 1 In the semiconductor device 10, the downward-facing surface is indicated. Similarly, "down" is used in... Figure 1 In the semiconductor device 10, the direction indicated is the lower side. The same directionality may be indicated in other figures as needed. The terms "front," "upper surface," "upper," "back side," "lower surface," "lower," and "side" are merely convenient expressions for determining relative positional relationships and do not limit the technical concept of the invention. For example, "upper" and "lower" do not necessarily mean the vertical direction relative to the ground. That is, the directions of "upper" and "lower" are not limited to the direction of gravity.

[0060] [First Implementation Method]

[0061] use Figure 1 and Figure 2 The semiconductor device of the first embodiment will be described. Figure 1 This is a cross-sectional view of the semiconductor device according to the first embodiment. Additionally, Figure 2 This is a top view of the printed circuit board included in the semiconductor device of the first embodiment. It should be noted that the semiconductor device 10 is rectangular in shape when viewed from above. Figure 1 It is a cross-section parallel to the long side of such a semiconductor device 10. In Figure 2 Only the upper surface of the printed circuit board 30 is shown in the image. Additionally, in... Figure 2 The buffer areas surrounding the through holes 34a and 34b formed on the printed circuit board 30 are omitted in the illustration.

[0062] like Figure 1 As shown, the semiconductor device 10 includes insulating circuit boards 20a and 20b, semiconductor chips 24a1, 24a2, 24b1, and 24b2, a printed circuit board 30, external terminals 40a and 40b, and conductive posts 41a and 41b. These components of the semiconductor device 10 are sealed by a sealing member 50. Specifically, in the semiconductor device 10, the sealing member 50 seals the back surfaces of the insulating circuit boards 20a and 20b, thus exposing them.

[0063] Insulating circuit boards 20a and 20b are arranged side-by-side in a horizontal direction. Each insulating circuit board 20a and 20b includes: insulating plates 21a and 21b; metal plates 22a and 22b disposed on the back side of the insulating plates 21a and 21b; and circuit patterns 23a1, 23a2, 23b1, and 23b2 disposed on the front side of the insulating plates 21a and 21b. The insulating plates 21a and 21b and the metal plates 22a and 22b are rectangular in plan view. Furthermore, the corners of the insulating plates 21a and 21b and the metal plates 22a and 22b may be chamfered into R-shapes and / or C-shapes. In plan view, the metal plates 22a and 22b are smaller than the insulating plates 21a and 21b and are formed on the inner side of the insulating plates 21a and 21b. The insulating plates 21a and 21b are made of ceramic or insulating resin with excellent thermal conductivity. The ceramic is, for example, alumina, aluminum nitride, or silicon nitride. The insulating resin is, for example, a paper phenolic substrate, a paper epoxy board, a glass composite substrate, or a glass epoxy board. Metal plates 22a and 22b are made of a metal with excellent thermal conductivity. Such metals are, for example, aluminum, iron, silver, copper, or alloys including at least one of these. Furthermore, the thickness of metal plates 22a and 22b is 0.1 mm or more and 4.0 mm or less. To improve corrosion resistance, the surfaces of metal plates 22a and 22b can be electroplated. The electroplating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy. Circuit patterns 23a1, 23a2, 23b1, and 23b2 are made of a metal with excellent electrical conductivity. Such metals are, for example, silver, copper, nickel, or alloys including at least one of these. Furthermore, the thickness of circuit patterns 23a1, 23a2, 23b1, and 23b2 is 0.1 mm or more and 4.0 mm or less. To improve corrosion resistance, the surfaces of circuit patterns 23a1, 23a2, 23b1, and 23b2 can be electroplated. The electroplating material used is, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy. A metal layer is formed on the front side of the insulating plates 21a and 21b, and the circuit patterns 23a1, 23a2, 23b1, and 23b2 are obtained by etching or other processing of the metal layer. Alternatively, the circuit patterns 23a1, 23a2, 23b1, and 23b2, pre-cut from the metal layer, can be pressed onto the front side of the insulating plates 21a and 21b. It should be noted that... Figure 1 The circuit patterns 23a1, 23a2, 23b1, and 23b2 shown are examples. The number, shape, and size of the circuit patterns can be appropriately selected as needed. For example, DCB (Direct Copper Bonding) substrates, AMB (Active Metal Brazed) substrates, and resin insulating substrates can be used in the insulating circuit boards 20a and 20b constructed from such components.

[0064] Semiconductor chips 24a1 and 24b1 include switching elements. These switching elements are, for example, IGBTs and power MOSFETs. When semiconductor chips 24a1 and 24b1 are IGBTs, they have a collector as the main electrode on the back side and a gate and emitter as the main electrode on the front side. When semiconductor chips 24a1 and 24b1 are power MOSFETs, they have a drain as the main electrode on the back side and a gate and source as the main electrode on the front side. The back sides of the semiconductor chips 24a1 and 24b1 are bonded to circuit patterns 23a1 and 23b1 using solder (not shown). Conductive posts 41a and 41b are appropriately electrically and mechanically connected to the main electrode and gate on the front side of the semiconductor chips 24a1 and 24b1.

[0065] Additionally, semiconductor chips 24a2 and 24b2 include diodes. These diodes are, for example, SBD (Schottky Barrier Diode), PiN (P-intrinsic-N) diodes, or FWD (Free Wheeling Diode). Such semiconductor chips 24a2 and 24b2 have an output electrode (cathode) as the main electrode on the back side and an input electrode (anode) as the main electrode on the front side. The back sides of the aforementioned semiconductor chips 24a2 and 24b2 are bonded to circuit patterns 23a1 and 23b1 using solder (not shown). Conductive posts 41a and 41b are also appropriately electrically and mechanically connected to the main electrodes on the front side of the semiconductor chips 24a2 and 24b2. It should be noted that RC (Reverse-Conducting) IGBTs, which simultaneously possess the functions of IGBTs and FWBs, can be used instead of semiconductor chips 24a1, 24a2, 24b1, and 24b2. Furthermore, in Figure 1 This example only shows the case where semiconductor chips 24a1, 24a2, 24b1, and 24b2 are provided. However, it is not limited to this case, and the number of groups corresponding to the specifications of the semiconductor device 10 can be provided.

[0066] The solder (not shown) used to bond semiconductor chips 24a1, 24a2, 24b1, 24b2 to circuit patterns 23a1, 23b1 is lead-free solder. The lead-free solder has at least one alloy as its main component, for example, an alloy composed of tin-silver-copper, an alloy composed of tin-zinc-bismuth, an alloy composed of tin-copper, or an alloy composed of tin-silver-indium-bismuth. Furthermore, additives may be included in the solder. Additives are, for example, nickel, germanium, cobalt, or silicon. Because the solder includes additives, wettability, gloss, bond strength, and reliability can be improved.

[0067] Printed circuit board 30 is disposed opposite to horizontally arranged insulating circuit boards 20a and 20b. For example... Figure 2 As shown, such a printed circuit board 30 includes an insulating plate 31 and a plurality of upper circuit patterns 32 formed on the front side of the insulating plate 31. Additionally, the printed circuit board 30 has a plurality of lower circuit patterns 33 on the back side of the insulating plate 31 (see reference). Figure 4 Furthermore, the printed circuit board 30 has a plurality of through holes 34a and 34b formed at predetermined locations, extending from the front to the back. Through holes 34a are formed at the corners of the printed circuit board 30 opposite to the insulating circuit boards 20a and 20b. Through holes 34b are also formed at other locations on the printed circuit board 30. Additionally, buffer regions (not shown) are formed around the through holes 34a and 34b. The buffer regions will be described in detail later.

[0068] The insulating board 31 is flat and made of an insulating material. This material is made by impregnating a substrate with resin. The substrate can be, for example, paper, glass cloth, or glass nonwoven fabric. The resin used can be, for example, phenolic resin, epoxy resin, or polyimide resin. Specific examples of the insulating board 31 include paper phenolic substrates, paper epoxy boards, glass epoxy boards, glass polyimide substrates, and glass composite substrates. Furthermore, such an insulating board 31 is rectangular when viewed from above. The corners of the insulating board 31 can be chamfered into an R-shape and / or a C-shape.

[0069] The upper circuit pattern 32 and the lower circuit pattern 33 are formed into multiple pattern shapes in a manner that constitutes a predetermined circuit. For example, such as Figure 2 As illustrated, the upper circuit pattern 32 forms multiple pattern shapes. Although not shown in the diagram, the lower circuit pattern 33 also similarly forms multiple pattern shapes. Both the upper circuit pattern 32 and the lower circuit pattern 33 are made of a material with excellent electrical conductivity. Such materials include, for example, silver, copper, nickel, or alloys comprising at least one of these. To improve corrosion resistance, the surfaces of the upper circuit pattern 32 and the lower circuit pattern 33 can be electroplated. Materials used in this electroplating process include nickel, nickel-phosphorus alloys, and nickel-boron alloys.

[0070] Such a printed circuit board 30 can be formed, for example, as follows: Metal foils are adhered to the front and back sides of an insulating plate 31, and resist layers of a predetermined shape are printed. Using the printed resist layers as a mask, the metal foils on the front and back sides of the insulating plate 31 are etched to remove the remaining resist layers. Thus, an upper circuit pattern 32 and a lower circuit pattern 33 are formed on the front and back sides of the insulating plate 31, respectively. Furthermore, holes are drilled at predetermined positions on the laminate of the insulating plate 31 with the upper circuit pattern 32 and the lower circuit pattern 33 to form a plurality of through holes 34a, 34b and a buffer region (see reference). Figure 3 To improve corrosion resistance, the multiple through holes 34a, 34b and the buffer area can be electroplated. For example, tin plating or electroless gold plating can be performed. Water-soluble flux treatment can also be used.

[0071] External terminals 40a are pressed into through holes 34a in the printed circuit board 30. At this time, the pressed-in portion is covered with solder. Furthermore, external terminals 40a are electrically connected to the upper circuit pattern 32 and the lower circuit pattern 33 of the printed circuit board 30. One end of the external terminal 40a is bonded to the circuit patterns 23a1 and 23a2 of the insulating circuit board 20a via solder. Alternatively, the mounting positions of the external terminals 40a in the circuit patterns 23a1 and 23a2 of the insulating circuit board 20a can be opened, and one end of the external terminal 40a can be bonded to the opening via solder. Alternatively, a cylindrical contact member can be bonded to the mounting positions of the external terminals 40a in the circuit patterns 23a1 and 23a2 of the insulating circuit board 20a via solder, and one end of the external terminal 40a can be pressed into the contact member. The contact member is made of a material with excellent conductivity. Such a material may be, for example, silver, copper, nickel, or an alloy including at least one of these. External terminal 40b is pressed in and inserted into a through hole in printed circuit board 30. At this time, the pressed-in portion is covered with solder. External terminal 40b is electrically connected to the upper circuit pattern 32 and lower circuit pattern 33 of printed circuit board 30. One end of external terminal 40b is bonded to circuit patterns 23b1 and 23b2 of insulating circuit board 20b via solder. Alternatively, the mounting position of external terminal 40b in circuit patterns 23b1 and 23b2 of insulating circuit board 20b can be opened, and one end of external terminal 40b can be bonded to the opening via solder. Alternatively, a cylindrical contact member can be bonded to the mounting position of external terminal 40b in circuit patterns 23b1 and 23b2 of insulating circuit board 20b via solder, and one end of external terminal 40b can be pressed into the contact member. The contact member is made of a material with excellent conductivity. Such a material may be, for example, silver, copper, nickel, or an alloy including at least one of these. The external terminals 40a and 40b are columnar, with a circular or rectangular cross-section. They are made of a material with excellent conductivity, such as silver, copper, nickel, or an alloy comprising at least one of these materials. To improve corrosion resistance, the surfaces of the external terminals 40a and 40b can be electroplated. The electroplating material is nickel, a nickel-phosphorus alloy, or a nickel-boron alloy. Furthermore, the diameter (in the case of a circle) or the length of the diagonal (in the case of a rectangle) of the cross-section of the external terminals 40a and 40b is a few percentage points longer than the diameter of the through holes 34a and 34b of the printed circuit board 30. Thus, the external terminals 40a and 40b are pressed into the through holes 34a of the printed circuit board 30.

[0072] Conductive post 41a is pressed in and inserted into through hole 34b of printed circuit board 30. At this time, the pressed-in portion is covered with solder. Conductive post 41a is electrically connected to the upper circuit pattern 32 and lower circuit pattern 33 of printed circuit board 30. One end of conductive post 41a is bonded to the main electrode or control electrode of semiconductor chips 24a1 and 24a2 respectively via solder. Conductive post 41b is pressed in and inserted into through hole 34b of printed circuit board 30. At this time, the pressed-in portion is covered with solder. Conductive post 41b is electrically connected to the upper circuit pattern 32 and lower circuit pattern 33 of printed circuit board 30. One end of conductive post 41b is bonded to the main electrode or control electrode of semiconductor chips 24b1 and 24b2 respectively via solder. Such conductive posts 41a and 41b are columnar, with a circular or rectangular cross-section. Furthermore, the length of conductive posts 41a and 41b is sufficiently shorter than the length of external terminals 40a and 40b. The conductive pillars 41a and 41b are made of a material with excellent conductivity. Such materials include, for example, silver, copper, nickel, or alloys comprising at least one of these. To improve corrosion resistance, the surfaces of the conductive pillars 41a and 41b can be electroplated. The electroplating material is nickel, a nickel-phosphorus alloy, a nickel-boron alloy, etc. Furthermore, the diameter (in the case of a circle) or the length of the diagonal (in the case of a rectangle) of the cross-section of the conductive pillars 41a and 41b is a few percentage points longer than the diameter of the through-hole 34b of the printed circuit board 30. Thus, the conductive pillars 41a and 41b are pressed into the through-hole 34b of the printed circuit board 30.

[0073] The sealing component 50 includes thermosetting resins such as epoxy resin, phenolic resin, and maleimide resin, and fillers contained in the thermosetting resin. As an example of the sealing component 50, there is an epoxy resin containing fillers. Inorganic fillers are used as fillers. Examples of inorganic fillers include silicon oxide, aluminum oxide, boron nitride, or aluminum nitride. Additionally, the sealing component 50 contains a release agent in a required amount. Release agents used include, for example, waxes, silicones, and fluorines. It should be noted that in the semiconductor device 10 sealed by such a sealing component 50, metal plates 22a and 22b expose insulating circuit substrates 20a and 20b on their back surfaces. In this case, the metal plates 22a and 22b form the same plane as the back surface of the sealing component 50, or protrude outwards from the back surface.

[0074] A cooling module (not shown) can also be mounted on the back side of such a semiconductor device 10 via solder or silver soldering. In this case, the mounting holes (not shown) of the semiconductor device 10 and the cooling module are threaded together. This improves the heat dissipation of the semiconductor device 10. The cooling module in this case is made of, for example, a metal with excellent thermal conductivity. Such metals are, for example, aluminum, iron, silver, copper, or alloys including at least one of these. In addition, as a cooling module, a heat sink consisting of one or more heat sinks, as well as a water-cooled cooling device, can be used. To improve corrosion resistance, the surface of such a cooling module can also be electroplated. In this case, the electroplating material used is, for example, nickel, nickel-phosphorus alloy, or nickel-boron alloy.

[0075] Next, using Figure 3 and Figure 4 The buffer region formed around the through hole 34a of the printed circuit board 30 will be described. Figure 3 This is a top view magnified of the through-holes in the printed circuit board included in the semiconductor device of the first embodiment. Figure 4 This is a cross-sectional view of the printed circuit board included in the semiconductor device of the first embodiment. It should be noted that... Figure 4 (A) Figure 4 (B) shows Figure 3 Cross-sectional views of the single-dotted dashed lines X1-X1 and X2-X2 respectively.

[0076] The printed circuit board 30 has a buffer region 36 formed around the support region 35, which includes a through hole 34a. The buffer region 36 surrounds the entire circumference of the support region 35, and a buffer hole 36a is formed therein, retaining the torque portion 36b connected to the support region 35.

[0077] The support region 35 includes a through hole 34a formed at its center and is circular when viewed from above. The support region 35 is circular in one example, but it could also be rectangular. The buffer region 36 is arranged in a concentric circle relative to the support region 35. It should be noted that the buffer region 36 is not limited to a concentric circle shape, as long as it includes the area of ​​the support region 35. Four buffer holes 36a are formed at equal intervals along the outer periphery of the support region 35 in the buffer region 36. The buffer holes 36a are formed on the outer side of the support region 35 of the printed circuit board 30 by, for example, etching to open the upper circuit pattern 32. Then, the buffer holes 36a are obtained by further etching within the opened upper circuit pattern 32 to open the insulating plate 31 and the lower circuit pattern 33. Therefore, as... Figure 3 and Figure 4As shown in (A), an insulating plate 31 is exposed around the buffer hole 36a. Since the upper circuit pattern 32 is electroplated, its adhesion to the sealing member 50 that will be sealed later is low. Therefore, it is possible for the sealing member 50 to peel off relative to the upper circuit pattern 32. This causes moisture and other contaminants to penetrate from the peeled area, reducing the reliability of the semiconductor device 10. Therefore, the insulating plate 31 exposed around the buffer hole 36a has sufficient adhesion to the sealing member 50. Thus, the reduction in the reliability of the semiconductor device 10 sealed by the sealing member 50 can be suppressed. Furthermore, the through hole 34a is soldered to the external terminals 40a and 40b pressed into the through hole 34a. In this case, if the upper circuit pattern 32 is copper or a copper alloy, the upper circuit pattern 32 has poor wettability to the solder. Therefore, the insulating plate 31 exposed around the buffer hole 36a easily adheres to the solder that joins the through hole 34a and the external terminals 40a and 40b. Therefore, the external terminals 40a and 40b can be reliably soldered. In particular, this effect is more easily and reliably achieved by increasing the exposed area of ​​the insulating plate 31 on the side of the through hole 34a surrounding the buffer hole 36a. Therefore, even when the support area 35 is deformed due to pressure applied to the external terminals 40a and 40b, as will be described later, the sealing member 50 provides a more reliable seal.

[0078] The torque section 36b is located between adjacent buffer holes 36a, such as... Figure 3 and Figure 4 As shown in (B), this is the region connecting the outer side of the support region 35 and the buffer region 36. Therefore, the location and number of torque portions 36b depend on the size, location, and number of buffer holes 36a. In this case, the torque portion 36b... Figure 3 The buffer area 36 is connected to the support area 35 at four points: top, bottom, left, and right. Alternatively, three buffer holes 36a can be formed at equal intervals along the circumference of the support area 35 in the buffer area 36. In top view, the torque portion 36b connects to the support area 35 at positions of 0°, 120°, and 240°. It should be noted that 0° refers to... Figure 3 The position of the torque portion 36b in the upper part of the buffer region 36. Alternatively, two buffer holes 36a can be formed at equal intervals along the circumference of the support region 35 in the buffer region 36, and in top view, the torque portion 36b connects to the support region 35 at the aforementioned 0° and 180° positions. Alternatively, one buffer hole 36a can be formed along the circumference of the support region 35 in the buffer region 36, and in top view, the torque portion 36b connects to the support region 35 only at the aforementioned 0° position.

[0079] The torque portion 36b preferably has an elastic modulus that allows it to bend and return to its original position according to the deformation of the support region 35. Furthermore, it is preferable that all torque portions 36b have approximately the same elastic modulus. The material of the printed circuit board 30 needs to be selected in a way that results in such torque portions 36b. Moreover, the width of each torque portion 36b, i.e., the length between adjacent buffer holes 36a, needs to be machined in the same manner to achieve an appropriate elastic modulus. On the other hand, current from the support region 35, or current relative to the support region 35, is energized in the region of the upper circuit pattern 32 corresponding to the torque portion 36b. Therefore, the torque portion 36b is preferably of a certain width in order to maintain its elastic modulus while conducting. Such a width is preferably, for example, 15% or more and 25% or less relative to the diameter of the support region 35. Additionally, Figure 3 The torque section 36b shown is roughly rectangular in plan view. Besides this shape, the torque section 36b can have any shape as long as it has a predetermined elastic modulus and is conductive. For example, in plan view, the torque section 36b could also be a trapezoidal shape where the width on the support region 35 side is wider (or narrower) than the width on the buffer region 36 side.

[0080] Next, using Figures 5-8 The manufacturing method of such a semiconductor device 10 will be described. Figure 5 This is a flowchart of a method for manufacturing a semiconductor device according to the first embodiment. Figure 6 This is a diagram illustrating the solder coating process in the manufacturing method of the semiconductor device according to the first embodiment. Figure 7 This is a diagram showing the mounting of a printed circuit board or the like for illustrating the manufacturing method of the semiconductor device according to the first embodiment. Figure 8 This is a diagram illustrating the molding process of the semiconductor device manufacturing method according to the first embodiment.

[0081] First, prepare the semiconductor chips 24a1, 24a2, 24b1, 24b2, insulating circuit boards 20a, 20b, external terminals 40a, 40b, printed circuit board 30, conductive pillars 41a, 41b, solder, and other components required for manufacturing the semiconductor device 10 (step S1). It should be noted that, in the insulating circuit boards 20a, 20b, relative to the through holes 34a, 34b, for example... Figure 3 and Figure 4 The buffer zone 36 is formed as shown.

[0082] Next, external terminals 40a and 40b are pressed into the through holes 34a of the printed circuit board 30 to make one end open. Additionally, conductive posts 41a and 41b are pressed into the through holes 34b of the printed circuit board 30 to make one end open. External terminals 40a and 40b are thus installed on the printed circuit board 30 (step S2).

[0083] Next, insulating circuit boards 20a and 20b are respectively positioned at predetermined locations. Then, semiconductor chips 24a1, 24a2, 24b1, and 24b2 are respectively disposed on the upper circuit pattern 32 of the insulating circuit boards 20a and 20b via a solder plate (step S3). Next, solder is applied to the main surfaces of the semiconductor chips 24a1, 24a2, 24b1, and 24b2, and to the upper circuit pattern 32 connected to external terminals 40a and 40b, respectively, using a distributor (step S4). It should be noted that conductive posts 41a and 41b are respectively connected to the main surfaces of the semiconductor chips 24a1, 24a2, 24b1, and 24b2. Therefore, as... Figure 6 As shown, solder is applied in an amount that matches the dimensions of the conductive posts 41a, 41b and the external terminals 40a, 40b.

[0084] Next, the printed circuit board 30, on which conductive posts 41a and 41b and external terminals 40a and 40b were mounted in step S2, is arranged opposite to the insulating circuit boards 20a and 20b. Furthermore, as... Figure 7 As shown in (A), conductive posts 41a and 41b and external terminals 40a and 40b are moved to insulating circuit boards 20a and 20b. Solder is then inserted into one end of the conductive posts 41a and 41b and one end of the external terminals 40a and 40b, and the printed circuit board 30 is mounted relative to the insulating circuit boards 20a and 20b (step S5). It should be noted that at this time, solder is applied to the pressed-in portions of the conductive posts 41a and 41b and the external terminals 40a and 40b opposite to the through holes 34a and 34b on the printed circuit board 30. In this state, the solder is heated to melt it, and then hardened (step S6). Thus, the conductive posts 41a and 41b are connected to the semiconductor chips 24a1, 24a2, 24b1, and 24b2 via solder. Additionally, the external terminals 40a and 40b are connected to the upper circuit pattern 32 of the insulating circuit boards 20a and 20b via solder. It should be noted that the structure will be constructed as follows: Figure 7 As shown in (B), it is configured as a semiconductor structure 10a.

[0085] Next, the semiconductor structure 10a configured as shown in the figure... Figure 8The mold is placed in mold 60 as shown (step S7). Mold 60 has an upper mold portion 61 and a lower mold portion 62. The upper mold portion 61 and the lower mold portion 62 are made of a material with excellent heat resistance. Such materials are, for example, composite ceramic materials or carbon. In addition, the mold 60 formed by the upper mold portion 61 and the lower mold portion 62 has a positioning ring 62a and an injection port 61c provided between the upper mold portion 61 and the lower mold portion 62.

[0086] Cavity 61a is a receiving space formed by upper mold section 61 and lower mold section 62. Additionally, cavity 61a has terminal receiving sections 61a1 and 61b1 for receiving the external terminals 40a and 40b of semiconductor structure 10a. When semiconductor structure 10a is placed into cavity 61a, the external terminals 40a and 40b are received in terminal receiving sections 61a1 and 61b1. It should be noted that the reception of external terminals 40a and 40b relative to terminal receiving sections 61a1 and 61b1 will be explained in detail later. Positioning ring 62a is used for aligning upper mold section 61 with lower mold section 62 and is installed on the outermost side of mold 60. Inlet 61c is a flow path for a molten sealing component provided on the side of mold 60 and extending from the outside of mold 60 into the interior of cavity 61a.

[0087] In a mold 60 in which a semiconductor structure 10a is placed in a cavity 61a, a molten sealing member is injected through an injection port 61c. The injected sealing member fills the cavity 61a and hardens (step S8). Then, after sufficient hardening, the semiconductor structure 10a is sealed by the sealing member 50, and the upper mold portion 61 and the lower mold portion 62 (mold 60) are separated (step S9). Thus, a... Figure 1 The semiconductor device 10 shown.

[0088] Next, using Figure 9 and Figure 10 The placement of the semiconductor structure 10a relative to the mold 60 in step S7 will be described in detail. Figure 9 This is a diagram used to illustrate the cracks in the through-holes of a printed circuit board for the reference example. Figure 10 This is a diagram illustrating the cracks in the through-holes of the printed circuit board included in the semiconductor device of the first embodiment. It should be noted that... Figure 9 The reference example is the case where the buffer region 36 is not formed in the first embodiment. Figure 9 In this document, components that are the same as those in the first embodiment are marked with the same symbols, and their descriptions are omitted. Figure 9 and Figure 10 The vicinity of the through hole 34a is shown magnified. Additionally, Figure 9 (A) and Figure 10(A) shows the case where crack C was generated in the through hole 34a. Figure 9 (B) and Figure 10 (B) shows the propagation of crack C originating from the through hole 34a. It should be noted that in... Figure 9 and Figure 10 In the description, only the necessary symbols are indicated. Figure 9 and Figure 10 The example given is a through hole 34a. However, this is not limited to this case; the same principle applies to through holes 34b.

[0089] exist Figure 5 In step S7, the semiconductor structure 10a is placed at a predetermined position on the lower mold portion 62, and the upper mold portion 61 is installed from above. If there is a dimensional tolerance in either of the external terminals 40a or 40b, the height of the external terminals 40a or 40b of the semiconductor structure 10a will deviate. If the upper mold portion 61 covers such a semiconductor structure 10a, there will be external terminals among the external terminals 40a or 40b that are not properly housed in the terminal housing portions 61a1 or 61b1 of the upper mold portion 61 and are pressed down.

[0090] At this time, one end of the external terminals 40a and 40b is firmly bonded to the upper circuit pattern 32 by solder. Furthermore, in the reference example, a buffer area 36 is not formed on the printed circuit board 30. Therefore, if the external terminals 40a and 40b (either or both) are pressed by the upper mold portion 61, the pressed external terminals 40a and 40b will bend or deform. Moreover, as the external terminals 40a and 40b deform, the area near the through-hole 34a of the printed circuit board 30 into which the external terminals 40a and 40b are pressed will also deform. Thus, for example, as... Figure 9 As shown in (A), this results in a crack C in the through-hole 34a. If crack C occurs, further deformation of the external terminals 40a and 40b, etc., causes further deformation of the area including the through-hole 34a of the printed circuit board 30, thereby causing crack C to extend outward from the through-hole 34a. Specifically, as... Figure 2 As shown, the through hole 34a is located near the edge of the upper circuit pattern 32. Therefore, the extension of such a crack C is as follows: Figure 9 As shown in (B), it is possible for the upper circuit pattern 32 to be crossed. In this case, the conduction of the upper circuit pattern 32 may be cut off. As a result, the reliability of the semiconductor device 10 is reduced.

[0091] On the other hand, in the first embodiment, a buffer region 36 is formed around the through hole 34a. Therefore, as described above, the deformation of the external terminals 40a and 40b pressed by the upper mold portion 61 corresponds to the deformation of the support region 35 of the through hole 34a of the printed circuit board 30 and the deflection of the torque portion 36b. Therefore, damage to the printed circuit board 30 can be reduced. Furthermore, in this case, as... Figure 10 As shown in (A), a crack C also occurs in the through-hole 34a. Furthermore, the crack C generated in the through-hole 34a extends outward from the through-hole 34a due to the deformation of the support region 35 of the printed circuit board 30. However, in the first embodiment, a buffer hole 36a is formed in the buffer region 36. The extension of the crack C from the through-hole 34a outward is as follows... Figure 10 As shown in (B), it is cut off by the buffer hole 36a. Therefore, the upper circuit pattern 32 is not traversed by the crack C, maintaining the conduction of the upper circuit pattern 32. Thus, the decrease in the reliability of the semiconductor device 10 is suppressed.

[0092] The aforementioned semiconductor device 10 includes: insulating circuit boards 20a and 20b; a printed circuit board 30 with through holes 34a penetrating its main surface; and external terminals 40a and 40b, which are pressed into the through holes 34a and inserted through the through holes 34a, with one end fixed to the front side of the insulating circuit boards 20a and 20b. The printed circuit board 30 includes: a support region 35 containing through holes 34a and 34b on its main surface; and a buffer region 36 surrounding the support region 35, and having a buffer hole 36a formed by retaining a torque portion 36b connected to the support region 35. Corresponding to deformation of the external terminals 40a and 40b, the support region 35, including the through holes 34a of the printed circuit board 30, deforms due to the deflection of the torque portion 36b. Therefore, the occurrence and increase of damage to the printed circuit board 30 can be reduced. Furthermore, in this case, even if a crack C is generated in the through-hole 34a, the extension of the crack C from the through-hole 34a outward will be interrupted by the buffer hole 36a. Therefore, the upper circuit pattern 32 is not traversed by the crack C, maintaining the conductivity of the upper circuit pattern 32. As a result, the decrease in reliability of the semiconductor device 10 is suppressed.

[0093] Next, using Figure 11 Various forms of the buffer region 36 formed around the support region 35 containing the through hole 34a will be described. Figure 11 This is a top view, magnified, of the other through-holes in the printed circuit board included in the semiconductor device of the first embodiment. It should be noted that... Figure 11 (A) Figure 11 (B) represents different forms of the buffer zone.

[0094] exist Figure 11 In (A), similarly as described above, a buffer region 36 is formed around a support region 35 containing a through hole 34a. Figure 11 In (A), unlike the first embodiment, four openings are formed at equal intervals along the circumference of the support region 35 in the buffer region 36 after removing the upper circuit pattern 32, and the insulating plate 31 is exposed in each opening. Four buffer holes 36a are formed in the area of ​​each opening. Furthermore, a torque portion 36b connects the outer regions of the support region 35 and the buffer region 36 between the openings of adjacent upper circuit patterns 32. In this case, the number of openings formed in the upper circuit pattern 32 can be one, or it can be three or two at equal intervals. Torque portions 36b are formed between each adjacent opening. The number and shape of the buffer holes 36a formed in such openings are not limited to four or a circle; they can be several corresponding to the openings, or they can be rectangular, triangular, or elliptical. Figure 11 In case (A), the exposed area of ​​the insulating plate 31 is greater than that of the insulating plate 31. Figure 3 The situation is more complex. Therefore, the tightness of the sealant 50 is improved. Moreover, the engagement of the external terminals 40a and 40b with the through hole 34a using solder is improved. Therefore, even when the support area 35 is deformed due to the deformation of the external terminals 40a and 40b being pressed, the sealant 50 provides a more reliable seal.

[0095] In addition, Figure 11 In (B), the buffer region 36 includes: four buffer holes 36a formed around the support region 35, which includes through holes 34a; and a torque portion 36b formed between adjacent buffer holes 36a. The buffer holes 36a are formed at equal intervals around the support region 35, extending from the front to the back of the printed circuit board 30. The buffer holes 36a are formed to be elliptical in plan view, and the line connecting the center of the ellipse to the center point of the through hole 34a is orthogonal to the major axis of the ellipse. Furthermore, the buffer holes 36a can be connected to... Figure 3 Similarly, the insulating plate 31 is exposed around it. Furthermore, the width and shape of the torque section 36b vary depending on the shape, size, number, and spacing of the buffer holes 36a and adjacent buffer holes 36a. Figure 11 The torque component 36b of (B) is an example.

[0096] [Second Implementation]

[0097] In the second embodiment, using Figure 12 and Figure 13 The case where a buffer region is formed around the through hole 34a of the insulating plate 31 on the printed circuit board 30 will be described. Figure 12 and Figure 13This is a top view magnified of the through-holes in the printed circuit board included in the semiconductor device of the second embodiment. It should be noted that... Figure 12 and Figure 13 The printed circuit board 30 has an upper circuit pattern 32 surrounding the through hole 34a of the insulating plate 31, and another upper circuit pattern 32 is formed vertically and vertically, separate from the upper circuit pattern 32. Additionally, Figure 12 (A) and Figure 13 (A) shows the case where the upper circuit pattern 32 around the through hole 34a is circular. Figure 12 (B) and Figure 13 (B) shows the case where the upper circuit pattern 32 around the through hole 34a is square.

[0098] exist Figure 12 In (A), the printed circuit board 30 includes: a support region 35 comprising a through hole 34a and a circular upper circuit pattern 32 disposed around the through hole 34a; and a buffer region 36 formed around the support region 35. The buffer region 36 is generally rectangular. The buffer region 36 has: rectangular buffer holes 36a formed to surround the support region 35 from four directions; and torque portions 36b between adjacent buffer holes 36a. Additionally, in Figure 12 In (B), the upper circuit pattern 32 surrounding the through hole 34a forms a quadrilateral. The shape, number, size, and location of such buffer holes 36a are also an example.

[0099] exist Figure 13 In (A), the printed circuit board 30 includes: a support region 35 comprising a through hole 34a and a circular upper circuit pattern 32 disposed around the through hole 34a; and a buffer region 36 formed around the support region 35. The buffer region 36 is circular. The buffer region 36 has: a semi-circular buffer hole 36a formed to surround the support region 35; and a torque portion 36b between adjacent buffer holes 36a. Furthermore, in Figure 13 In (B), Figure 13 In (A), the upper circuit pattern 32 surrounding the through hole 34a is formed into a quadrilateral. Therefore, the printed circuit board 30 has a rectangular support region 35 in top view and a quadrilateral buffer region 36 surrounding the support region 35. The shape, number, size, and formation location of such buffer holes 36a are also an example.

[0100] In Figure 12 and Figure 13In the same manner as in the first embodiment, when the external terminals 40a and 40b are pressed into the through-hole 34a and placed into the mold 60, the support region 35 of the through-hole 34a of the printed circuit board 30 deforms due to the deflection of the torque portion 36b, based on the deformation of the pressed external terminals 40a and 40b. Therefore, damage to the printed circuit board 30 can be reduced. Furthermore, even if a crack extending outward from the upper circuit pattern 32 around the through-hole 34a traverses the support region 35, it will be cut off by the buffer hole 36a. Therefore, the insulating plate 31 is not traversed by cracks, suppressing the reduction of insulation withstand voltage.

Claims

1. A semiconductor device, characterized by comprising: Having: a substrate; a printed circuit board having a through-hole passing through a main surface; and an external terminal which is pressed into the through-hole to pass through the through-hole and has one end portion fixed to a front surface of the substrate, the printed circuit board has: a support region including the through-hole in the main surface; a buffer region surrounding the support region, leaving a torsion portion connected to the support region to open a buffer hole; an insulating plate; and a circuit pattern formed on a front surface of the insulating plate, the buffer region exposes the front surface of the insulating plate along a peripheral portion of the region which is opened.

2. The semiconductor device according to claim 1, wherein the support region is circular, the buffer hole is opened along an outer periphery of the support region.

3. The semiconductor device according to claim 2, wherein a plurality of the buffer holes are opened along the outer periphery of the support region, and a plurality of the torsion portions support the support region.

4. The semiconductor device according to claim 1, wherein a plurality of the buffer holes are opened in regions which expose the front surface of the insulating plate, and the torsion portions are formed between the regions which expose the front surface.

5. The semiconductor device according to claim 1, wherein the printed circuit board forms the circuit pattern in a region of the front surface of the insulating plate which includes the through-hole, the buffer region is formed in the insulating plate so as to surround the circuit pattern.

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