Image sensor and method of forming the same

Abstract

A plurality of photovoltaic junctions for sub-pixels may be formed in a semiconductor substrate. After thinning the back surface of the semiconductor substrate, at least one transparent refractive structure may be formed on the back side surface of the thinned semiconductor substrate. Each transparent refractive structure has a variable thickness that decreases as the lateral distance from a vertical axis passing through the geometric center of the column structure of the second conductivity type across the sub-pixel decreases. A sub-pixel optical component including an optical lens may be formed above the at least one transparent refractive structure. Each transparent refractive structure may reduce the tilt angle of light propagating downward into the photodetector, increase the total internal reflection of light, and improve the efficiency of the photodetector. Embodiments of the present application also relate to an image sensor and a method of forming the same.

Description

Technical Field

[0001] Embodiments of the present application relate to an image sensor and a method of forming the same. Background Art

[0002] Semiconductor image sensors are used to sense electromagnetic radiation, such as visible light, infrared radiation, and / or ultraviolet light. Complementary metal-oxide-semiconductor (CMOS) image sensors (CIS) and charge-coupled device (CCD) sensors are used in various applications, such as digital cameras or embedded cameras in mobile devices. These devices utilize an array of image pixels (which may include photodiodes and transistors) to detect radiation by the generation of electron-hole pairs due to light. Summary of the Invention

[0003] Some embodiments of the present application provide an image sensor, including an array of image pixels located on a semiconductor substrate, wherein: each image pixel within the array of image pixels includes at least one sub-pixel; each sub-pixel includes a plurality of photovoltaic junctions, a sensing circuit, a sub-pixel optical component configured to direct incident light onto the plurality of photovoltaic junctions and including an optical lens, and at least one transparent refractive structure; each of the plurality of photovoltaic junctions includes a corresponding first-conductive-type fixed layer and a corresponding second-conductive-type column structure; and the at least one transparent refractive structure contacts the second-conductive-type column structure at a tapered interface.

[0004] Some other embodiments of the present application provide an image sensor, including: an array of image pixels located on a semiconductor substrate, wherein: each image pixel within the array of image pixels includes at least one sub-pixel; each sub-pixel includes: a plurality of photovoltaic junctions located between a front surface and a back surface of the semiconductor substrate, a sensing circuit, a sub-pixel optical component located above the back surface and configured to direct incident light onto the plurality of photovoltaic junctions and including an optical lens, and a transparent refractive structure located between the optical lens and the back surface and having a variable thickness that decreases as a lateral distance from a vertical axis passing through a focal point of the optical lens decreases; and each of the plurality of photovoltaic junctions includes a corresponding first-conductive-type fixed layer and a corresponding second-conductive-type column structure.

[0005] Some further embodiments of the present application provide a method of forming an image sensor, including: forming a plurality of photovoltaic junctions for sub-pixels in a semiconductor substrate by doping a portion of the semiconductor substrate, wherein each of the plurality of photovoltaic junctions includes a corresponding first conductivity type fixed layer and a corresponding second conductivity type column structure; forming a sensing circuit on a front surface of the semiconductor substrate; physically exposing the second conductivity type column structure by thinning a back surface of the semiconductor substrate, wherein a back side surface of the thinned semiconductor substrate is physically exposed; forming at least one transparent refractive structure on the back side surface of the thinned semiconductor substrate, wherein each of the at least one transparent refractive structures has a variable thickness that decreases as a lateral distance from a vertical axis passing through a geometric center of the second conductivity type column structure decreases; and forming a sub-pixel optical assembly including an optical lens above the at least one transparent refractive structure, wherein the sub-pixel optical assembly is configured to direct incident light onto the plurality of photovoltaic junctions. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Aspects of the present invention are best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various components are not drawn to scale. In fact, for clarity of discussion, the dimensions of the various components may be arbitrarily increased or decreased.

[0007] Figure 1A is a plan view of a first configuration of an image pixel array of an image sensor according to an embodiment of the present invention.

[0008] Figure 1B is a plan view of a second configuration of an image pixel array for an image sensor according to another embodiment of the present invention.

[0009] Figure 2A is a plan view of a front side sensor assembly within a region of a sub-pixel in an exemplary structure according to an embodiment of the present invention.

[0010] Figure 2B is along Figure 2A a vertical cross-sectional view of an exemplary structure along a hinged vertical plane B–B’–B”–B’”–B””.

[0011] Figures 3A to 3D is a horizontal cross-sectional view of various configurations of an image pixel at a level of a column structure of a second conductivity type according to an embodiment of the present invention.

[0012] Figure 4 is a vertical cross-sectional view of an exemplary structure of a metal interconnect structure formed within an interconnection level dielectric layer after formation and attachment of a carrier substrate according to an embodiment of the present invention.

[0013] Figure 5 is a vertical cross-sectional view of an exemplary structure after thinning a semiconductor substrate according to an embodiment of the present invention.

[0014] Figure 6A is a vertical cross-sectional view of a region of an image pixel after forming a deep trench. The vertical axes A, A', and A'' are shown.

[0015] Figure 6B is Figure 6A a top view of the image pixel. The articulated vertical plane A–A’–A” corresponds to Figure 6A the plane of the vertical cross-sectional view that includes the vertical axes A, A', and A''.

[0016] Figure 7 is a vertical cross-sectional view of a region of an image pixel after forming a deep trench isolation structure according to a first embodiment of the present invention.

[0017] Figure 8A is a vertical cross-sectional view of a region of an image pixel after forming a chamfered region according to a first embodiment of the present invention. The vertical axes A, A', and A'' are shown.

[0018] Figure 8B is Figure 8A a top view of the image pixel. The articulated vertical plane A–A’–A” corresponds to Figure 8A the plane of the vertical cross-sectional view that includes the vertical axes A, A', and A''.

[0019] Figure 9A is a vertical cross-sectional view of a region of an image pixel after forming a transparent dielectric material layer according to a first embodiment of the present invention. The vertical axes A, A', and A'' are shown.

[0020] Figure 9B is Figure 9A a top view of the image pixel. The articulated vertical plane A–A’–A” corresponds to Figure 9A the plane of the vertical cross-sectional view that includes the vertical axes A, A', and A''.

[0021] Figure 10A is a vertical cross-sectional view of a region of an image pixel after forming a transparent refractive structure according to a first embodiment of the present invention. The vertical axes A, A', and A'' are shown.

[0022] Figure 10B is Figure 10A a top view of the image pixel. The articulated vertical plane A–A’–A” corresponds to Figure 10A the plane of the vertical cross-sectional view that includes the vertical axes A, A', and A''.

[0023] Figure 11A andFigure 11B is a top view of an image pixel in an optional configuration under processing steps corresponding to those of Figure 10A and Figure 10B .

[0024] Figure 12A is a vertical cross-sectional view of a region of an image pixel after forming a sub-pixel optical component according to a first embodiment of the present invention. The vertical axes A, A' and A" are shown.

[0025] Figure 12B is Figure 12A a top view of an image pixel. The hinged vertical plane A–A'–A" corresponds to Figure 12A the plane of the vertical cross-sectional view of

[0026] Figure 13A which includes the vertical axes A, A' and A".

[0027] Figure 13B is Figure 13A a top view of an image pixel. The hinged vertical plane A–A'–A" corresponds to Figure 13A the plane of the vertical cross-sectional view of

[0028] Figure 14A which includes the vertical axes A, A' and A".

[0029] Figure 14B is Figure 14A a top view of an image pixel. The hinged vertical plane A–A'–A" corresponds to Figure 14A the plane of the vertical cross-sectional view of

[0030] Figure 15 which includes the vertical axes A, A' and A".

[0031] Figure 16 is a vertical cross-sectional view of a region of an image pixel after forming a deep trench according to a second embodiment of the present invention.

[0032] Figure 17 is a vertical cross-sectional view of a region of an image pixel after forming a sub-pixel optical component according to a second embodiment of the present invention.

[0033] Figure 18AA vertical cross-sectional view of a region of an image pixel after forming a transparent dielectric material layer and a patterned photoresist layer according to a third embodiment of the present invention.

[0034] Figure 18B is Figure 18A A top view of the image pixel. The hinged vertical plane A–A’–A” corresponds to Figure 18A the plane of the vertical cross-sectional view, which plane includes the vertical axes A, A’, and A”.

[0035] Figure 19A A vertical cross-sectional view of a region of an image pixel after forming a transparent refractive structure according to a third embodiment of the present invention.

[0036] Figure 19B is Figure 19A A top view of the image pixel. The hinged vertical plane A–A’–A” corresponds to Figure 19A the plane of the vertical cross-sectional view, which plane includes the vertical axes A, A’, and A”.

[0037] Figure 20 A vertical cross-sectional view of a region of an image pixel after forming a sub-pixel optical assembly according to a third embodiment of the present invention.

[0038] Figure 21 A process flow diagram showing an exemplary processing sequence for forming an image sensor according to an embodiment of the present invention. Detailed Description

[0039] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present invention. Of course, these are merely examples and are not intended to limit the present invention. For example, in the following description, forming a first component above or on a second component may include embodiments where the first component and the second component are formed in direct contact, and may also include embodiments where additional components may be formed between the first component and the second component such that the first component and the second component may not be in direct contact. Additionally, the present invention may repeat reference numerals and / or characters in various instances. This repetition is for simplicity and clarity purposes and does not in itself indicate a relationship between the various embodiments and / or configurations being discussed.

[0040] Moreover, for ease of description, spatial relative terms such as "under", "below", "lower", "above", "upper", etc. may be used herein to describe the relationship of one element or component to another (or other) element or component as shown in the figures. In addition to the orientation shown in the figures, the spatial relative terms are intended to include different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein may be interpreted accordingly as well.

[0041] Semiconductor image sensors are used to sense light. Complementary metal oxide semiconductor (CMOS) image sensors (CIS) and charge-coupled device (CCD) sensors are widely used in various applications, such as digital camera or mobile phone camera applications. These image sensor devices utilize a pixel array in a substrate that includes photodiodes and transistors, and the pixel array can absorb radiation projected toward the substrate and convert the sensed radiation into an electrical signal. A backside-illuminated (BSI) image sensor device is a type of image sensor device. Since the transistor device size shrinks with the development of each generation of technology, existing BSI image sensor devices may start to encounter problems regarding crosstalk and blooming. These problems may be caused by insufficient isolation between adjacent pixels of the BSI image sensor, especially for a pixel array architecture with a full-phase detection autofocus (PDAF) function. Therefore, although existing methods for manufacturing BSI image sensor devices have generally been sufficient to meet their intended purposes, they are not entirely satisfactory in all aspects.

[0042] Various embodiments disclosed herein relate to semiconductor devices, and more particularly to image sensors including a transparent refractive structure under an optical lens. The image sensors of various embodiments can be configured to refract light toward a vertical direction to increase the likelihood of total internal reflection at an interface between a photodiode layer and a deep trench isolation structure. Various embodiments include methods of manufacturing the same. Generally, the higher the percentage of photons retained within a sub-pixel, the lower the percentage of photons that escape into adjacent image pixels and cause a reduction in image resolution. According to an embodiment, the image resolution of an image sensor can be enhanced by increasing the likelihood of total internal reflection of photons impinging on each sub-pixel. According to an embodiment, in addition to the optical lens, a transparent refractive structure can be used to align the direction of incident photons along a vertical direction, thereby increasing the incident angle of photons at a vertical interface between the photodiode layer and the deep trench isolation structure, and increasing the likelihood of total internal reflection at the vertical interface between the photodiode layer and the deep trench isolation structure. Therefore, photons incident on a sub-pixel have a higher likelihood of staying within the sub-pixel before being detected by the photodiode layer within the sub-pixel. Thus, an image sensor with higher image resolution can be provided.

[0043] ReferenceFigure 1A and Figure 1B , a first configuration of an array 1000 of image pixels 900 of an image sensor and a second configuration of the array 1000 of image pixels 900 of the image sensor are shown in corresponding plan views. The image sensor may be a backside illuminated (BSI) image sensor device. However, it should be appreciated that embodiments of the present invention may be used in a front side illuminated (FSI) image sensor.

[0044] To generate an image from the image sensor, each image pixel 900 represents a smallest unit area. A region including the array 1000 of image pixels 900 is referred to herein as an image pixel array region. The image pixels 900 in the image pixel array region may be arranged in rows and columns. For example, the image pixel array region may include M rows and N columns, where M and N are integers in a range from 1 to 2 16 (such as from 2 8 to 2 14 ). The rows of the image pixels 900 may be consecutively numbered with integers in a range from 1 to M, and the columns of the image pixels 900 may be consecutively numbered with integers in a range from 1 to N. The image pixel P ij refers to the image pixel 900 in the i-th row and the j-th column.

[0045] Each image pixel 900 includes at least one light detector configured to detect radiation in a given wavelength range. Each image pixel 900 may include a plurality of light detectors configured to detect radiation in corresponding wavelength ranges, which may be different from each of the plurality of light detectors. In one embodiment, each image pixel 900 may include a plurality of sub-pixels, each sub-pixel including a corresponding combination of a light detector and an electronic circuit configured to detect radiation incident on the light detector. For example, the image pixel 900 may include a sub-pixel configured to detect radiation in a red wavelength range (such as in a range from 635 nm to 700 nm), a sub-pixel configured to detect radiation in a green wavelength range (such as in a range from 520 nm to 560 nm), and a sub-pixel configured to detect radiation in a blue wavelength range (such as in a range from 450 nm to 490 nm). These sub-pixels are referred to as a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively.

[0046] Typically, an image pixel 900 generates information about incident radiation on a unit detection area. A sub-pixel generates information about the intensity of incident radiation within a specific wavelength range detected within the area of the unit detection area. A monochromatic image pixel 900 may include only a single sub-pixel. An image pixel 900 configured to detect the spectral distribution of incident radiation includes a plurality of sub-pixels having at least two different detection wavelength ranges. The light detectors in the image pixel array area may include photodiodes, complementary metal-oxide semiconductor (CMOS) image sensors, charge-coupled device (CCD) sensors, active sensors, passive sensors, other suitable sensors, or combinations thereof.

[0047] A major subset of the image pixels 900 within each array 1000 of the image pixels 900 of the image sensor includes image pixels that are image pixels for generating a two-dimensional image. Another subset of the image pixels 900 within each array 1000 of the image pixels 900 of the image sensor may include black level correction (BLC) image pixels that are image pixels for determining a black level correction signal. Typically, in the absence of incident light, each sub-pixel within a BLC image pixel measures the charge accumulated within the corresponding photodiode area. In one embodiment, the BLC image pixels may be arranged around the frame of the array 1000 of the image pixels 900 of the image sensor. In an illustrative example, the BLC image pixels may include a first row of image pixels (such as image pixel P 1j , where the index j varies from 1 to N), the last row of image pixels (such as the Mth row of image pixels P Mj , where the index j varies from 1 to N), the first column of image pixels (such as image pixel P i1 , where the index i varies from 1 to M) and the last column of image pixels (such as image pixel P iN , where the index i varies from 1 to M).

[0048] Figure 2A is a plan view of a front-side sensor assembly within the area of a sub-pixel in an exemplary structure according to an embodiment of the present invention. Figure 2B is along Figure 2A of the articulated vertical plane B–B’–B”–B’”–B”” of the exemplary structure. Referring together to Figure 2A and Figure 2B, showing a photodetector circuit in an exemplary structure, which includes a set of front-side sensor components 600 within the area of a sub-pixel. The front-side sensor components 600 refer to all components of an image sensor that can be formed on the front side 609 of a semiconductor substrate 500 or can be formed within a substrate semiconductor layer 601. The photodetector circuit includes a photodetector (including a transfer transistor 630) and a sensing circuit (640, 650, 660), and the sensing circuit includes a reset transistor 640, a source follower transistor 650, and a selection transistor 660.

[0049] Each sub-pixel includes a corresponding photodetector circuit, and the photodetector circuit includes a set of front-side sensor components 600 that can be located within the area of the sub-pixel. A set of at least one sub-pixel 800 can be used for an image pixel 900. Each sub-pixel includes a unit cell (“UC”), and the unit cell can be repeated along at least one horizontal direction to provide the front-side sensor components 600 for a single image pixel, and the single image pixel can include a single sub-pixel, two sub-pixels, or three or more pixel sub-pixels. In one embodiment, multiple instances of the unit cell UC can be repeated along at least one horizontal direction. For example, the unit cell UC can be repeated as a two-dimensional array of the unit cell UC, which is replicated with a first periodicity along a first horizontal direction hd1 and a second periodicity along a second horizontal direction hd2. As referred to above Figure 1A and Figure 1B discussed, the two-dimensional array can be a rectangular array or a hexagonal array. Thus, the second horizontal direction hd2 can be perpendicular to the first horizontal direction hd1 or not perpendicular to the first horizontal direction hd1.

[0050] Referring again to Figure 2A and Figure 2B , the semiconductor substrate 500 includes a substrate semiconductor layer 601. Each sub-pixel can be formed on or within the substrate semiconductor layer 601 having a front side 609 and a back side surface. The substrate semiconductor layer 601 includes a semiconductor material, such as silicon, germanium, silicon-germanium alloy, compound semiconductor material, or another semiconductor material with a bandgap not exceeding the energy of the photons to be detected. The material within the substrate semiconductor layer 601 can be selected based on the energy range of the photons to be detected by the sub-pixel. In one embodiment, the substrate semiconductor layer 601 can include single-crystalline silicon. A commercially available single-crystalline semiconductor substrate can be used as the semiconductor substrate 500. The semiconductor substrate 500 provided in this processing step has a thickness high enough to be able to withstand standard complementary metal-oxide-semiconductor (CMOS) processing steps. For example, the thickness of the semiconductor substrate 500 can be in the range of 200 microns to 1 mm, although smaller and larger thicknesses can also be used.

[0051] The top of the substrate semiconductor layer 601 may be doped appropriately to have a first conductivity type, which may be p-type or n-type. For example, an epitaxial semiconductor deposition process may be performed to form a single-crystalline epitaxial semiconductor material layer on the upper part of the substrate semiconductor layer, such that the atomic concentration of the dopant of the first conductivity type is in the range of 1.0×10 13 / cm 3 to 1.0×10 16 / cm 3 Although smaller and larger atomic concentrations may also be used. The thickness of the single-crystalline epitaxial semiconductor material layer may be in the range of 1 micron to 10 microns.

[0052] A well of the first conductivity type may be formed by ion implantation around the region where the shallow trench isolation structure 620 may be subsequently formed. The atomic concentration of the dopant of the first conductivity type in the well of the first conductivity type may be in the range of 1.0×10 15 / cm 3 to 1.0×10 18 / cm 3 Although smaller and larger atomic concentrations may also be used. The shallow trench isolation structure 620 may be formed to provide electrical isolation between the various components within the sub-pixel.

[0053] A dopant of a second conductivity type may be implanted into the front surface 609 of the semiconductor substrate 500 using at least one masked ion implantation process. The second conductivity type is opposite to the first conductivity type. For example, if the first conductivity type is p-type, then the second conductivity type is n-type, and vice versa. Respective doped regions having the second conductivity type are formed by at least one masked ion implantation process. The source second conductivity type photodiode layer 602 may be formed below the front surface 609 of the semiconductor substrate 500 in each unit cell UC such that the periphery of the source second conductivity type photodiode layer 602 overlaps the edge of the transfer gate electrode 605 in a plan view. The lateral extent of the source second conductivity type photodiode layer 602 may be limited to one side of the transfer gate electrode to be subsequently formed. Thus, the edge of the source second conductivity type photodiode layer 602 may be laterally spaced apart from the shallow trench isolation structure 620, where the regions for subsequently forming the transfer gate electrode and the floating diffusion region may be located.

[0054] By injecting dopants of the second conductivity type with an injection energy higher than that during the injection process for forming the photo-diode layer 602 of the second conductivity type of the source, a column structure 606 of the second conductivity type can be formed below the photo-diode layer 602 of the second conductivity type of the source at a depth at the bottom of the well of the first conductivity type. The column structure 606 of the second conductivity type can be adjacent to the well of the first conductivity type. In one embodiment, each column structure 606 of the second conductivity type can have a periphery adjacent to the well of the first conductivity type. Each combination of the column structure 606 of the second conductivity type and the photo-diode layer 602 of the second conductivity type of the source is collectively referred to as the photo-diode layer (602, 606) of the second conductivity type.

[0055] In one embodiment, the depth of the top surface of the column structure 606 of the second conductivity type can be in the range of 400 nm to 1,500 nm, although smaller and larger depths can also be used. In one embodiment, the depth of the bottom surface of the column structure 606 of the second conductivity type can be in the range of 800 nm to 2,500 nm, although smaller and larger depths can also be used.

[0056] The un-injected portion of the substrate semiconductor layer 601 covering the column structure 606 of the second conductivity type can have doping of the first conductivity type and can subsequently be used as the body region of the transfer transistor. Thus, the un-injected portion of the substrate semiconductor layer 601 covering the column structure 606 of the second conductivity type is referred to as the transfer transistor body region 611. In one embodiment, the column structure 606 of the second conductivity type can have the same lateral extent as the transfer transistor 630 to be subsequently formed and can coincide with a portion of the shallow trench isolation structure 620 surrounding the combination of the photo-diode layer 602 of the second conductivity type of the source and the transfer transistor body region 611.

[0057] A gate stack structure (614, 605, 615) can be formed above the front surface 609 of the semiconductor substrate 500 by depositing and patterning a layer stack including a gate dielectric layer and a gate electrode layer. Each patterned portion of the layer stack constitutes the gate stack structure (614, 605, 615), which can be a transfer gate stack structure (614T, 605) and a control gate stack structure (614, 615). Each transfer gate stack structure (614T, 605) includes a gate dielectric (referred to herein as the transfer gate dielectric 614T) and a gate electrode (referred to herein as the transfer gate electrode 605). Each transfer gate stack structure (614T, 605) is located between the photo-diode layer 602 of the second conductivity type of the source and the floating diffusion region 608. Each control gate stack structure (614, 615) includes a gate dielectric 614 and a gate electrode 615.

[0058] Each control gate stack structure (614, 615) includes a corresponding layer stack of a gate dielectric 614 and a gate electrode 615 of other transistors in the sensing circuit, and the layer stack may include a reset transistor 640, a source follower transistor 650, a select transistor 660, and other suitable transistors that can be used to amplify the signal generated by the photodetector of the sub-pixel.

[0059] Various active regions (608, 612) doped with a second conductivity type can be formed. Each active region (608, 612) may include a floating diffusion region 608 that serves as a drain region of the transfer transistor 630. The current between the photodiode layer 602 of the second conductivity type and the floating diffusion region 608 can be controlled by the transfer gate electrode 605.

[0060] The photodiode layer 602 of the second conductivity type can accumulate charges (such as electrons in an embodiment where the second conductivity type is n-type) during sensing (i.e., when the sub-pixel actively detects photons impinging thereon for the purpose of acquiring a frame or taking a picture), and can serve as the source region of the transfer transistor 630. The active region 612 includes the source and drain regions of each transistor (640, 650, 660) in the sensing circuit. The floating diffusion region 608 can be vertically spaced apart from the column structure 606 of the second conductivity type through the transfer transistor body region 611.

[0061] The floating diffusion region 608 and the active region 612 of each unit cell UC can be formed by ion implanting a dopant of the second conductivity type using a masked ion implantation process. The combination of the corresponding patterned photoresist layer and the gate stack structure (614, 605, 615) can be used as an ion implantation blocking structure (i.e., a mask structure) during the ion implantation process. The depth of the bottom surface of the floating diffusion region 608 can be in the range of 100 nm to 400 nm, such as 150 nm to 250 nm, although smaller and larger depths can also be used. The depth of the bottom surface of the active region 612 can be in the range of 100 nm to 600 nm, such as 150 nm to 400 nm, although smaller and larger depths can also be used.

[0062] The fixed layer 603 of the first conduction type can be directly formed on top of the source second conduction type photodiode layer 602 by ion implantation of a dopant of the first conduction type. The fixed layer 603 of the first conduction type suppresses the depletion of the interface between the source second conduction type photodiode layer 602 and the fixed layer 603 of the first conduction type, and electrically stabilizes the source second conduction type photodiode layer 602. In all top views of the various exemplary structures of the present invention, the fixed layer 603 of the first conduction type is omitted to clearly show the lateral extent of the source second conduction type photodiode layer 602 located below the fixed layer 603 of the first conduction type. The depth of the p-n junction between the fixed layer 603 of the first conduction type and the source second conduction type photodiode layer 602 can range from 5 nm to 100 nm, although smaller and larger depths can also be used. In addition to the p-n junction between the source second conduction type photodiode layer 602 and the substrate semiconductor layer 601, the fixed layer 603 of the first conduction type and the source second conduction type photodiode layer 602 form an additional p-n junction.

[0063] The interconnect-level dielectric layer 670 can be formed above the front surface 609 of the semiconductor substrate 500, and can form a metal interconnect structure 680 that connects the respective nodes of the connection transistors (630, 640, 650, 660) within each sub-pixel. The interconnect-level dielectric layer 670 can include a corresponding dielectric material, such as undoped silicate glass, doped silicate glass, organic silicate glass, porous dielectric material, or a combination thereof. Dielectric pads including various dielectric materials (such as silicon nitride, silicon oxynitride, silicon carbide, and / or dielectric metal oxides) can be optionally used in the interconnect layer dielectric layer 670. The metal interconnect structure 680 can include various metal via structures 682(680) and various metal wire structures 684(680). For example, each floating diffusion region 608 can be connected to the gate electrode 615 of the corresponding source follower transistor 650 through a subset of the metal interconnect structure 680. The photodetector can include a transfer transistor 630 and can be connected to a sensing circuit including additional transistors (640, 650, 660).

[0064] The sensing circuits (640, 650, 660) include a set of reset transistors 640, source follower transistors 650, and selection transistors 660. Generally, the sensing circuits (640, 650, 660) of each sub-pixel can be disposed within the area of the unit cell UC. In one embodiment, a sensing circuit (640, 650, 660) can be provided for each sub-pixel 800. In one embodiment, each set of interconnected transistors (640, 650, 660) of the sensing circuit can be arranged side by side within the area of a corresponding bar, which is positioned near the edge of the unit cell UC and extends along the entire length of the side of the unit cell UC or along at least 30% of the length of the side of the unit cell UC. In another embodiment, each set of interconnected transistors (640, 650, 660) of the sensing circuit can be arranged around the floating diffusion region 608 of the transfer transistor 630 within the area of a block positioned near the corner of the unit cell UC.

[0065] According to an embodiment of the present invention, a plurality of photovoltaic junctions can be formed for the sub-pixels 800 in the semiconductor substrate 500 by doping a portion of the semiconductor substrate 500. Each of the plurality of photovoltaic junctions includes a corresponding fixed layer 603 of a first conductivity type and a corresponding column structure 606 of a second conductivity type, and can include a corresponding photodiode layer 602 of a second conductivity type for the source. A sensing circuit (640, 650, 660) can be formed for each sub-pixel 800 on the front surface of the semiconductor substrate 500.

[0066] Figures 3A to 3D Shows various configurations of the image pixel 900 at the level of the column structure 606 of the second conductivity type.

[0067] Reference Figure 3A , shows a first configuration of the image pixel 900. Each image pixel 900 can include one or more sub-pixels 800. In one embodiment, each image pixel 900 can include a first sub-pixel 801, a second sub-pixel 802, a third sub-pixel 803, and a fourth sub-pixel 804. In a non-limiting illustrative example, the first sub-pixel 801 can be a red image pixel configured to detect light in the wavelength range of 635 nm to 700 nm, the second sub-pixel 802 and the third sub-pixel can be green image pixels configured to detect light in the wavelength range of 520 nm to 560 nm, and the fourth sub-pixel 804 can be a blue image pixel configured to detect light in the wavelength range of 450 nm to 490 nm.

[0068] According to an embodiment of the present invention, each sub-pixel 800 may include a plurality of column structures 606 of a second conductive type. The plurality of column structures 606 of the second conductive type may be arranged around a vertical axis VA that passes through the geometric centers of the plurality of column structures 606 of the second conductive type within each sub-pixel 800. According to an embodiment of the present invention, each vertical axis VA may be located between the column structures 606 of the second conductive type and may not intersect the column structures 606 of the second conductive type. The column structures 606 of the second conductive type may have vertical sidewalls. In one embodiment, four column structures 606 of the second conductive type may be provided for each sub-pixel 800, and each column structure 606 of the second conductive type may have a pentagonal horizontal cross-sectional shape obtained by cutting the corners of a corresponding rectangular shape. A side corresponding to the cut corner of the rectangle may face and may be adjacent to the vertical axis VA passing through the geometric center of the column structure 606 of the second conductive type that passes through the sub-pixel 800. The geometric center of the column structure 606 of the second conductive type of the sub-pixel 800 is the position of the center of gravity of the column structure 606 of the second conductive type of the sub-pixel 800 and may be located between the volumes of the column structures 606 of the second conductive type of the sub-pixel 800.

[0069] Reference Figure 3B , shows a second configuration of the image pixel 900. By merging adjacent pairs of the column structures 606 of the second conductive type of each sub-pixel 800 into a single column structure 606 of the second conductive type, the second configuration of the image pixel 900 can be obtained from Figure 3A the first configuration of the image pixel 900. In this embodiment, each sub-pixel 800 may include two column structures 606 of the second conductive type. The geometric center of the column structure 606 of the second conductive type of the sub-pixel 800 is the position of the center of gravity of the column structure 606 of the second conductive type of the sub-pixel 800 and may be located between the volumes of the column structures 606 of the second conductive type of the sub-pixel 800.

[0070] Reference Figure 3C , shows a third configuration of the image pixel 900. The third configuration of the image pixel 900 can be obtained from Figure 3A the first configuration of the image pixel 900 by changing the shape of the cut at the corner of the rectangular horizontal shape. For example, each chip of the cut may have two sides and may form a region having a generally rectangular horizontal cross-sectional shape around a vertical axis VA that passes through the geometric center of the column structure 606 of the second conductive type of each sub-pixel 800.

[0071] Reference Figure 3D, showing a fourth configuration of the image pixel 900. The fourth configuration of the image pixel 900 can be obtained from the first configuration of the image pixel by cutting off the corner portions of the columnar structures 606 of the second conductive type of each sub-pixel 800 along a vertical axis VA that does not pass through the geometric center of the columnar structures 606 of the second conductive type passing through each sub-pixel 800. In this embodiment, each columnar structure 606 of the second conductive type can have a corresponding rectangular horizontal shape.

[0072] Generally, a plurality of columnar structures 606 of the second conductive type can be provided within each sub-pixel 800, and a region that is not part of the plurality of columnar structures 606 of the second conductive type can be provided at or around the vertical axis VA passing through the geometric centers of the plurality of columnar structures 606 of the second conductive type. The volume of each sub-pixel 800 laterally surrounded by the plurality of columnar structures 606 of the second conductive type can be occupied by the substrate semiconductor layer 601. The focal point of the optical lens to be formed later can be at a point within the vertical axis VA of each sub-pixel 800. Although four configurations of the image pixel 900 are shown in the present invention, it should be understood that the plurality of columnar structures 606 of the second conductive type within each sub-pixel 800 can have various geometric shapes. Each columnar structure 606 of the second conductive type can be laterally limited by a corresponding set of vertical sidewalls, and a portion of the substrate semiconductor layer 601 laterally surrounded by the plurality of columnar structures 606 of the second conductive type can be located around the vertical axis VA passing through the geometric centers of the plurality of columnar structures 606 of the second conductive type passing through the sub-pixel 800.

[0073] Figure 4 is a vertical cross-sectional view of an exemplary structure after formation and attachment of a carrier substrate of a metal interconnect structure formed within an interconnection-level dielectric layer according to an embodiment of the present invention. Referring to Figure 4 , an additional interconnection layer dielectric layer 670 and an additional metal interconnect structure 680 can be formed on the front surface of the semiconductor substrate 500. The front surfaces of the semiconductor substrate 500, the interconnection layer dielectric layer 670, and the components of the structures formed therein can be bonded to the carrier substrate 690. The carrier substrate 690 can be temporarily attached to the components of the semiconductor substrate 500 and the interconnection layer dielectric layer 670 to provide subsequent thinning of the semiconductor substrate 500 and to provide subsequent processing of the thinned semiconductor substrate 510 and the components of the interconnection layer dielectric layer 670. The carrier substrate 690 can include a semiconductor material, an insulating material, or a metal material, and can have a thickness in the range of 300 microns to 1 mm, although smaller and larger thicknesses can also be used.

[0074] Any suitable bonding method can be used to bond the carrier substrate 690 to the front side of the interconnect layer dielectric layer 670. Exemplary bonding methods that can be used to bond the carrier substrate 690 to the interconnect level dielectric layer 670 include, but are not limited to, oxide-to-oxide bonding, oxide-to-semiconductor bonding, fusion bonding, compound bonding, anodic bonding, direct bonding, other suitable bonding processes, and / or combinations thereof. Optionally, a bonding buffer layer 689 including an intermediate bonding material (e.g., silicon oxide, silicon nitride, or semiconductor material) can be used to provide bonding between the interconnect level dielectric layer 670 and the carrier substrate 690.

[0075] Figure 5 is a vertical cross-sectional view of an exemplary structure after thinning a semiconductor substrate according to an embodiment of the present invention. Refer Figure 5 , the back side of the semiconductor substrate 500 can be thinned, for example, by grinding, polishing, isotropic etching processes, and / or anisotropic etching processes. The carrier substrate 690 can provide mechanical support to the semiconductor substrate 500 during the thinning process. The bottom surface of the columnar structure 606 of the second conductive type is physically exposed by thinning the back side of the semiconductor substrate 500.

[0076] In one embodiment, the semiconductor substrate 500 can be thinned to a thickness in the range of 1 micron to 12 microns, such as 1.5 microns to 8 microns. The thinned semiconductor substrate 500 after the thinning process is referred to herein as the thinned semiconductor substrate 510 or the semiconductor substrate 510. Generally, the back side surface 709 of the thinned semiconductor substrate 510 can be physically exposed. The thickness of the thinned semiconductor substrate 510 can be determined by the maximum depth of the deep trenches that will be formed subsequently on the back side of the thinned semiconductor substrate 510. In one embodiment, the thickness of the thinned semiconductor substrate 510 can be selected such that the deep trenches that will be formed subsequently on the back side of the semiconductor substrate 510 reach the proximal surface of the shallow trench isolation structure 620. The back side surface 709 of the thinned semiconductor substrate 510 can be polished to provide a planar horizontal surface parallel to the front side 609 of the thinned semiconductor substrate 510. Subsequently, the exemplary structure can be inverted for further processing.

[0077] Figure 6A is a vertical cross-sectional view of a region of an image pixel after forming deep trenches according to an embodiment of the present invention. The vertical axes A, A', and A'' are shown. Figure 6B is Figure 6A a top view of the image pixel of Figure 6A The articulated vertical plane A–A’–A” corresponds to the plane of the vertical cross-sectional view of Figure 6A and Figure 6BAnd according to a first embodiment of the present invention, a photoresist layer (not shown) may be applied over the backside surface 709 of the thinned semiconductor substrate 510 and may be lithographically patterned to form an opening in a region that laterally surrounds the columnar structure 606 of the second conductivity type. In one embodiment, the pattern of the opening in the photoresist layer may be complementary to the pattern of the columnar structure 606 of the second conductivity type.

[0078] The unmasked portion of the semiconductor substrate 510 may be etched by performing an anisotropic etching process that transfers the pattern of the opening in the photoresist layer into the semiconductor substrate 510. The interconnected deep trench 79 may be formed by etching a portion of the thinned semiconductor substrate 510 from the backside in a region surrounding the columnar structure 606 of the second conductivity type. The vertical sidewalls of the columnar structure 606 of the second conductivity type are physically exposed to the deep trench 79. The depth of the deep trench 79 may be in the range of 1 micron to 10 microns, such as in the range of 1.5 microns to 8 microns. The deep trench may be formed in the semiconductor substrate 510. Subsequently, the photoresist layer may be removed, for example, by ashing.

[0079] Figure 7 is a vertical cross-sectional view of a region of an image pixel after forming a deep trench isolation structure according to a first embodiment of the present invention. Refer Figure 7 , at least one optically transparent dielectric material such as silicon oxide or a polymer material may be deposited in the deep trench 79 and over the backside surface 709 of the thinned semiconductor substrate 510 to form a deep trench isolation structure 76. The deep trench isolation structure 76 may laterally surround each columnar structure 606 of the second conductivity type within the sub-pixel 800. In one embodiment, the deep trench isolation structure 76 may contact the bottom surface of the shallow trench isolation structure 620. The combination of the deep trench isolation structure 76 and the shallow trench isolation structure 620 may provide electrical isolation between each pair of adjacent photovoltaic junctions, between adjacent sub-pixel pairs 800, and between adjacent image pixel pairs 900.

[0080] Figure 8A is a vertical cross-sectional view of a region of an image pixel after forming a chamfered region according to a first embodiment of the present invention. The vertical axes A, A' and A'' are shown. Figure 8B is Figure 8A a top view of the image pixel. The articulated vertical plane A–A’–A” corresponds to Figure 8A the plane of the vertical cross-sectional view of Figure 8A and Figure 8B, a photoresist layer 73 may be applied over the deep trench isolation structure 76, and the photoresist layer 73 may be lithographically patterned to form discrete openings centered on a vertical axis VA passing through the geometric center of the column structures 606 of the second conductivity type that pass through each sub-pixel 800. In one embodiment, the shape of each discrete opening in the photoresist layer 73 that overlies a corresponding sub-pixel 800 may replicate the shape of the outer boundary of the underlying region of the substrate semiconductor layer 601 that is laterally surrounded by the column structures 606 of the second conductivity type of the sub-pixel 800. For example, if the underlying region of the substrate semiconductor layer 601 that is laterally surrounded by the column structures 606 of the second conductivity type of the sub-pixel 800 has a rhombus shape (i.e., diamond shape), then each discrete opening in the photoresist layer 73 may have a rhombus shape of the same size, a larger size, or a smaller size.

[0081] An etching process may be performed to etch the deep trench isolation structure 76 and the lower portions of the column structures 606 of the second conductivity type. The etching process uses an isotropic etching process such as a wet etching process, and an anisotropic etching process may optionally be used. The isotropic etching process may include at least one dry etching process (such as a chemical dry etching process) and / or at least one wet etching process. For example, in an embodiment where the deep trench isolation structure 76 includes silicon oxide, the isotropic etching process may include a first wet etching step using dilute hydrofluoric acid and a second wet etching step using hot trimethyl-2-hydroxyethyl ammonium hydroxide (“hot TMY”), tetramethyl ammonium hydroxide (TMAH), or potassium hydroxide. The first wet etching step may vertically and laterally recess the proximal portion of the deep trench isolation structure 76, and the second wet etching step may vertically and laterally recess the semiconductor material of the column structures 606 of the second conductivity type around each opening in the photoresist layer 73. Cavities are formed within each volume by removing the proximal portions of the deep trench isolation structure 76 and the column structures 606 of the second conductivity type. The cavities may be formed in a region that covers the vertical axis VA that passes through the geometric center of the column structures 606 of the second conductivity type of the corresponding sub-pixel 800. The photoresist layer 73 may be removed, for example, by ashing.

[0082] Figure 9A is a vertical cross-sectional view of a region of an image pixel after formation of a transparent dielectric material layer according to a first embodiment of the present invention. Vertical axes A, A', and A'' are shown. Figure 9B is Figure 9A a top view of the image pixel. The articulated vertical plane A–A’–A” corresponds to Figure 9A the plane of the vertical cross-sectional view of Figure 9A and Figure 9B, a transparent dielectric material layer 78L may be deposited in the grooves and above the horizontal top surface of the deep trench isolation structure 76. The transparent dielectric material layer 78L includes an optically transparent material. In one embodiment, the transparent dielectric material layer 78L may include a dielectric material having a refractive index higher than that of the material of the deep trench isolation structure 76. In one embodiment, the transparent dielectric material layer 78L may include silicon oxide, silicon oxide, or a dielectric metal oxide. The thickness of the transparent dielectric material layer 78L may be selected such that the entire volume of each cavity is filled.

[0083] Figure 10A is a vertical cross-sectional view of a region of an image pixel after forming a transparent refractive structure according to a first embodiment of the present invention. The vertical axes A, A', and A" are shown. Figure 10B is Figure 10A a top view of the image pixel. The articulated vertical plane A–A'–A" corresponds to Figure 10A the plane of the vertical cross-sectional view of, which plane includes the vertical axes A, A', and A". Referring to Figure 10A and Figure 10B , a planarization process such as a chemical mechanical planarization (CMP) process may be performed to remove a portion of the transparent dielectric material layer 78L above the horizontal plane including the top surface of the deep trench isolation structure 76. Each remaining portion of the transparent dielectric material layer 78L includes a transparent refractive structure 78. Each transparent refractive structure 78 may be formed on the backside surface 709 of the thinned semiconductor substrate 510. In one embodiment, each transparent refractive structure 78 may have a variable thickness that decreases with the lateral distance from the vertical axis VA passing through the geometric center of the column structure 606 of the second conductive type in the corresponding sub-pixel 800. Generally, the horizontal cross-sectional shape of each transparent refractive structure 78 may be the same as or similar to the boundary shape of the lower layer portion of the substrate semiconductor layer 601, which lower layer portion is laterally defined by a set of column structures 606 of the second conductive type within the sub-pixel 800. For example, if the boundary of the lower layer portion of the substrate semiconductor layer 601 grid structure laterally defined by a set of column structures 606 of the second conductive type within the sub-pixel 800 has a diamond shape, the overlying transparent refractive structure 78 may have a diamond-shaped horizontal cross-sectional shape.

[0084] Figure 11A and Figure 11B are top views of an image pixel in an alternative configuration under processing steps corresponding to the processing steps of Figure 10A and Figure 10B . Referring to Figure 11A , corresponding to Figure 10A and Figure 10BThe processing steps of the processing steps show the image pixel 900 in an optional configuration. In this optional configuration, the transparent refractive structure 78 may have a corresponding horizontal cross-sectional shape that is rectangular, with the sides of the rectangle parallel to the sidewalls of the columnar structures 606 of the underlying second conductive type.

[0085] Reference Figure 11B , corresponding to the Figure 10A and Figure 10B The processing steps of the processing steps show the image pixel 900 in another optional configuration. In this optional configuration, the transparent refractive structure 78 may have a corresponding horizontal cross-sectional shape that is circular or oval.

[0086] Generally, the horizontal cross-sectional shape of the transparent refractive structure 78 can be changed by changing the shape of the openings in the photoresist layer 73 during the processing steps of Figure 8A and Figure 8B . Each transparent refractive structure 78 may have rotational symmetry about a vertical axis VA that passes through the geometric center of a set of columnar structures 606 of the underlying sub-pixel 800 of the second conductive type.

[0087] Figure 12A is a vertical cross-sectional view of a region of an image pixel after forming a sub-pixel optical component according to a first embodiment of the present invention. The vertical axes A, A' and A" are shown. Figure 12B is Figure 12A a top view of the image pixel of Figure 12A . The articulated vertical plane A–A’–A” corresponds to the plane of the vertical cross-sectional view of Figure 12A and Figure 12B , and a grid structure 740 including at least one optically reflective material can be formed around the periphery of each sub-pixel 800. The grid structure 740 can be formed by depositing and patterning at least one reflective material layer such as at least one layer of a metal material layer.

[0088] An optically transparent layer 770 having a flat top surface can be formed above the grid structure 740. The optically transparent layer 770 can be formed by depositing a self-planarizing dielectric material such as a flowable oxide (FOX). Optionally, the optically transparent layer 770 can be provided by depositing and planarizing a transparent dielectric material, for example, by chemical mechanical planarization.

[0089] Various color filter materials can be applied over the optically transparent layer 770 and can be patterned to form various color filters 780. The color filters 780 can include a first type of color filter 781(780) formed in the region of the first sub-pixel 801, a second type of color filter 782(780) formed in the region of the second sub-pixel 802, a third type of color filter formed in the region of the third sub-pixel 803, and a fourth type of color filter formed in the region of the fourth sub-pixel 804. The composition of each color filter material can be selected such that light within a target wavelength range passes through the color filter material while light outside the target wavelength range is absorbed by the color filter material.

[0090] An optical lens 790 can be formed over the color filter 780 by applying an optically transparent material over the color filter 780 and patterning the optically transparent material into material portions having convex surfaces that are centered over respective openings in the underlying openings within the grid structure 740.

[0091] Each combination of the optical lens 790, the color filter 780, and the lower portion of the optically transparent layer 770 constitutes a sub-pixel optical assembly configured to filter and focus light onto a corresponding set of underlying photovoltaic junctions of the sub-pixel 800. Generally, a sub-pixel optical assembly (770, 780, 790) including the optical lens 790 can be formed over each transparent refractive structure 78. The sub-pixel optical assembly (770, 780, 790) in each sub-pixel 800 can be configured to direct incident light onto the underlying plurality of photovoltaic junctions. In one embodiment, the focal point FP of the sub-pixel optical assembly (770, 780, 790) in each sub-pixel 800 can be located on a vertical axis VA that passes through the geometric center of the set of column structures 606 of the second conductive type of the sub-pixel 800.

[0092] Generally, the optical interface between each transparent refractive structure 78 and the column structure 606 of the second conductive type within each sub-pixel 800 can be conical, i.e., neither vertical nor horizontal. The cone angle of the sidewall of the transparent refractive structure 78 that contacts the column structure 606 of the second conductive type can be selected such that the angle of incidence of light incident on the sidewall of the transparent refractive structure 78 is smaller than the angle of incidence on any vertical surface or any horizontal surface. The angle of incidence is the angle between the direction of the incident light and the surface normal of the corresponding sidewall of the transparent refractive structure 78. Thus, due to the presence of the transparent refractive structure 78, the higher portion of the incident light is refracted at the optical interface located at the sidewall of the transparent refractive structure 78.

[0093] The carrier substrate 690 and the bonding buffer layer 689 (if present) can be separated from the interconnect layer dielectric 670. The semiconductor substrate 510 and the device structures thereon can be diced into discrete image sensors either before or after separating the carrier substrate 690 from the semiconductor substrate 510.

[0094] Figure 13A is a vertical cross-sectional view of a region of image pixels after forming a chamfered region according to a second embodiment of the present invention. The vertical axes A, A', and A" are shown. Figure 13B is Figure 13A a top view of the image pixels. The articulated vertical plane A–A'–A" corresponds to Figure 13A the plane of the vertical cross-sectional view of, which plane includes the vertical axes A, A', and A". Refer to Figure 13A and Figure 13B , showing a region of image pixels 900 after forming a chamfered region according to a second embodiment of the present invention. By applying a photoresist layer 173 over the backside surface 709 of the thinned semiconductor substrate 510 and lithographically patterning it and performing an etching process by using the photoresist layer 173 as an etching mask, the structure shown in Figure 5 can be obtained from Figure 13A and Figure 13B . The lithographic pattern in the photoresist layer 173 can be any pattern that can be used to pattern the photoresist layer 73 in the processing steps of Figure 8A and Figure 8B .

[0095] The etching process etches a lower portion of the semiconductor material in the thinned semiconductor substrate 510. Specifically, the portions of the substrate semiconductor layer 601 and the columnar structures 606 of the second conductivity type closest to the openings in the photoresist layer 173 can be removed by the etching process. The etching process uses an isotropic etching process such as a wet etching process, and an anisotropic etching process can optionally be used. The isotropic etching process can include at least one dry etching process (such as a chemical dry etching process) and / or at least one wet etching process. For example, the isotropic etching process can include a wet etching step using hot trimethyl-2-hydroxyethyl ammonium hydroxide ("hot TMY"), tetramethylammonium hydroxide (TMAH), or potassium hydroxide. Depending on the etching chemistry, crystallographic facets may or may not be formed on the etched surfaces of the substrate semiconductor layer 601 and the columnar structures 606 of the second conductivity type. Cavities are formed in each volume by removing the proximal portions of the substrate semiconductor layer 601 and the columnar structures 606 of the second conductivity type. The cavities can be formed in a region covering the vertical axis VA that passes through the geometric center of the columnar structures 606 of the second conductivity type of the corresponding sub-pixels 800. The photoresist layer 173 can be removed, for example, by ashing.

[0096] Figure 14A is a vertical cross-sectional view of a region of image pixels after forming a transparent refractive structure according to a second embodiment of the present invention. The vertical axes A, A', and A" are shown. Figure 14B is Figure 14ATop view of the image pixels. The articulated vertical plane A–A’–A” corresponds to Figure 14A the plane of the vertical sectional view of Figure 14A , which plane includes the vertical axes A, A’ and A”. Refer to Figure 14A and Figure 14B , a transparent dielectric material layer can be deposited in the grooves. The transparent dielectric material layer includes an optically transparent material. In one embodiment, the transparent dielectric material layer 78L can include a dielectric material having a refractive index higher than that of the material of the deep trench isolation structure to be subsequently formed. In one embodiment, the transparent dielectric material layer can include silicon oxide, silicon oxynitride or a dielectric metal oxide. The thickness of the transparent dielectric material layer can be selected such that the entire volume of each cavity is filled.

[0097] A planarization process such as a chemical mechanical planarization (CMP) process is performed to remove a portion of the transparent dielectric material layer above the horizontal plane of the backside surface 709 of the thinned semiconductor substrate 510. Each remaining portion of the transparent dielectric material layer includes a transparent refractive structure 78. Each transparent refractive structure 78 can be formed on the backside surface 709 of the thinned semiconductor substrate 510. In one embodiment, each transparent refractive structure 78 can have a variable thickness that decreases with the lateral distance from the vertical axis VA passing through the geometric center of the column structure 606 of the second conductive type in the corresponding sub-pixel 800. Generally, the horizontal cross-sectional shape of each transparent refractive structure 78 can be the same as or similar to the boundary shape of the lower layer portion of the substrate semiconductor layer 601, which lower layer portion is laterally defined by a set of column structures 606 of the second conductive type within the sub-pixel 800. For example, if the boundary of the lower layer portion of the grid structure of the substrate semiconductor layer 601 laterally defined by a set of column structures 606 of the second conductive type within the sub-pixel 800 has a rhombic shape, the overlying transparent refractive structure 78 can have a rhombic horizontal cross-sectional shape.

[0098] Figure 15 is a vertical sectional view of a region of an image pixel after formation of deep trenches according to a second embodiment of the present invention. Refer to Figure 15 , a photoresist layer (not shown) can be applied above the backside surface 709 of the thinned semiconductor substrate 510 and can be lithographically patterned to form a pattern of openings. The pattern of openings in the photoresist layer can be the same as the pattern of openings in the photoresist layer used in the processing steps of Figure 6A and Figure 6B . In one embodiment, the pattern of openings in the photoresist layer can be complementary to the pattern of the column structures 606 of the second conductive type.

[0099] The unmasked portion of the semiconductor substrate 510 can be etched by performing an anisotropic etching process that transfers the pattern of the openings in the photoresist layer into the semiconductor substrate 510. The portion of the thinned semiconductor substrate 510 can be etched and thinned from the back side in the region surrounding the columnar structures 606 of the second conductivity type to form the interconnected deep trenches 79. The central portion of the transparent refractive structure 78 can be etched by an anisotropic etching process. In one embodiment, each transparent refractive structure 78 can be divided into a plurality of transparent refractive structures 78. The vertical sidewalls of the columnar structures 606 of the second conductivity type and the transparent refractive structures 78 can be physically exposed to the deep trenches 79. The depth of the deep trenches 79 can be in the range of 1 micron to 10 microns, such as in the range of 1.5 microns to 8 microns. Deep trenches can be formed in the semiconductor substrate 510. Subsequently, the photoresist layer can be removed, for example, by ashing.

[0100] Figure 16 is a vertical cross-sectional view of a region of an image pixel after formation of a deep trench isolation structure according to a second embodiment of the present invention. Refer to Figure 16 , at least one optically transparent dielectric material, such as silicon oxide or a polymer material, can be deposited in the deep trenches 79 and above the back side surface 709 of the thinned semiconductor substrate 510 to form a deep trench isolation structure 76. The deep trench isolation structure 76 can laterally surround each columnar structure 606 of the second conductivity type and each transparent refractive structure 78 within the sub-pixels 800. In one embodiment, the deep trench isolation structure 76 can be in contact with the bottom surface of the shallow trench isolation structure 620. The combination of the deep trench isolation structure 76 and the shallow trench isolation structure 620 can provide electrical isolation between each pair of adjacent photovoltaic junctions, between adjacent pairs of sub-pixels 800, and between adjacent pairs of image pixels 900.

[0101] Figure 17 is a vertical cross-sectional view of a region of an image pixel after formation of a sub-pixel optical component according to a second embodiment of the present invention. Refer to Figure 17 , the processing steps of Figure 12A and Figure 12B can be performed to form the grid structure 740 and the sub-pixel optical components (770, 780, 790). The carrier substrate 690 and the bonding buffer layer 689 (if present) can be separated from the interconnect layer dielectric layer 670. Before or after separating the carrier substrate 690 from the semiconductor substrate 510, the semiconductor substrate 510 and the device structures thereon can be divided into discrete image sensors.

[0102] Refer to Figures 1A to 17, and according to various embodiments of the present invention, an image sensor including an image pixel array 900 located on a semiconductor substrate 510 can be provided. Each image pixel 900 within the image pixel array 900 includes at least one sub-pixel 800. Each sub-pixel 800 includes a plurality of photovoltaic junctions (602, 606, 603); sensing circuits (640, 650, 660) configured to direct incident light to sub-pixel optical components (770, 780, 790) on the plurality of photovoltaic junctions (602, 606, 603) and including an optical lens 790; and at least one transparent refractive structure 78. Each of the plurality of photovoltaic junctions (602, 606, 603) includes a fixed layer 603 of a corresponding first conductivity type and a column structure 606 of a corresponding second conductivity type. At least one transparent refractive structure 78 contacts the column structure 606 of the second conductivity type at a tapered interface.

[0103] In one embodiment, the fixed layer 603 of the first conductivity type is located on the front surface 609 of the semiconductor substrate 510, and the column structure 606 of the second conductivity type is located on the backside surface 709 of the semiconductor substrate 510. In one embodiment, each sub-pixel 800 includes a deep trench isolation structure 76 that laterally surrounds and contacts each column structure 606 of the second conductivity type.

[0104] According to a first embodiment of the present invention, at least one transparent refractive structure 78 includes a single transparent refractive structure 78 that contacts each column structure 606 of the second conductivity type within each sub-pixel 800. In one embodiment, the single transparent refractive structure 78 includes tapered sidewalls that contact a horizontal extension portion of the trench isolation structure 76 that covers and contacts the backside surface 709 of the semiconductor substrate 510. In one embodiment, the horizontal surface of the single transparent refractive structure 78 contacts the horizontal extension portion of the deep trench isolation structure 76 and is vertically spaced from the backside surface 709 of the semiconductor substrate 510.

[0105] According to a second embodiment of the present invention, at least one transparent refractive structure 78 includes a plurality of transparent refractive structures 78 that contact corresponding column structures among the column structures 606 of the second conductivity type within each sub-pixel 800. In one embodiment, a vertical extension portion of the deep trench isolation structure 76 laterally surrounds the plurality of transparent refractive structures 78, and a horizontal extension portion of the deep trench isolation structure 76 covers and contacts each of the plurality of transparent refractive structures 78. In one embodiment, each of the plurality of transparent refractive structures 78 includes a horizontal surface located in a horizontal plane including the backside surface 709 of the semiconductor substrate 510 and contacts the horizontal extension portion of the deep trench isolation structure 76.

[0106] In one embodiment, at least one transparent refractive structure 78 has a variable thickness that decreases as the lateral distance from the vertical axis VA passing through the focal point FP of the optical lens 790 within each sub-pixel 800 decreases. Generally, a sub-pixel optical assembly (770, 780, 790) including the optical lens 790 can be formed above each transparent refractive structure 78. The sub-pixel optical assembly (770, 780, 790) in each sub-pixel 800 can be configured to direct incident light onto a plurality of photovoltaic junctions below. In one embodiment, the focal point FP of the sub-pixel optical assembly (770, 780, 790) in each sub-pixel 800 can be located on the vertical axis VA that passes through the geometric center of the set of column structures 606 of the second conductive type of the sub-pixel 800.

[0107] Figure 18A is a vertical cross-sectional view of an area of an image pixel in forming a transparent dielectric material layer and a patterned photoresist layer 177 according to a third embodiment of the present invention. Figure 18B is Figure 18A a top view of the image pixel of. The hinged vertical plane A–A’–A” corresponds to Figure 18A the plane of the vertical cross-sectional view of, which plane includes the vertical axes A, A’ and A”. Refer to Figure 18A and Figure 18B , showing an area of the image pixel 900 according to a third embodiment of the present invention. By depositing a transparent dielectric material layer 78L above the horizontal top surface of the deep trench isolation structure 76, the structure of Figure 7 can be obtained from Figure 18A and Figure 18B the structure shown. The transparent dielectric material layer 178L includes an optically transparent material. In one embodiment, the transparent dielectric material layer 178L can include a dielectric material having a refractive index higher than that of the material of the deep trench isolation structure 76. In one embodiment, the transparent dielectric material layer 178L can include silicon oxide, silicon oxide or a dielectric metal oxide. The thickness of the transparent dielectric material layer 178L can be in the range of 200 nm to 2,000 nm, such as in the range of 400 nm to 1,000 nm, although smaller or larger thicknesses can also be used.

[0108] Figure 19A is a vertical cross-sectional view of an area of an image pixel after forming a transparent refractive structure according to a third embodiment of the present invention. Figure 19B is Figure 19A a top view of the image pixel of. The hinged vertical plane A–A’–A” corresponds to Figure 19A the plane of the vertical cross-sectional view of, which plane includes the vertical axes A, A’ and A”. Refer to Figure 19A and Figure 19B, a photoresist layer (not shown) may be applied over the transparent dielectric material layer 178L and may be lithographically patterned to cover discrete regions around each vertical axis VA passing through the geometric center of the column structures 606 of the second conductivity type within the corresponding sub-pixel 800. The horizontal cross-sectional shape of each patterned portion of the photoresist layer may be diamond-shaped, circular, rectangular, or any two-dimensional shape having n-fold rotational symmetry, where n is the total number of column structures 606 of the second conductivity type in the underlying sub-pixel 800.

[0109] An isotropic etching process may be performed to etch the unmasked portions of the transparent dielectric material layer 178L. In one embodiment, the isotropic etching process may use an etchant that selectively etches the material of the transparent dielectric material layer 178L with respect to the material of the deep trench isolation structure 76. For example, if the deep trench isolation structure 76 includes silicon oxide and if the transparent dielectric material layer 178L includes silicon nitride, a wet etching process using hot phosphoric acid may be performed. After the isotropic etching process, each remaining portion of the transparent dielectric material layer 178L includes a transparent refractive structure 178. The sidewalls of the transparent dielectric material layer 178L are tapered and may be concave or may be planar.

[0110] Each transparent refractive structure 178 may be formed above the backside surface 709 of the thinned semiconductor substrate 510 and may be formed above the horizontal extension of the deep trench isolation structure 76. In one embodiment, each transparent refractive structure 178 may have a variable thickness that decreases with the lateral distance from the vertical axis VA passing through the geometric center of the column structures 606 of the second conductivity type in the corresponding sub-pixel 800. In one embodiment, the transparent refractive structure 178 includes a vertex located on the vertical axis VA passing through the focal point FP of the optical lens 790. Generally, the horizontal cross-sectional shape of each transparent refractive structure 178 may be the same as or similar to the boundary shape of the lower portion of the substrate semiconductor layer 601 that is laterally defined by a set of column structures 606 of the second conductivity type within the sub-pixel 800. For example, if the boundary of the lower portion of the substrate semiconductor layer 601 grid structure that is laterally defined by a set of column structures 606 of the second conductivity type within the sub-pixel 800 has a diamond shape, the overlying transparent refractive structure 78 may have a diamond-shaped horizontal cross-sectional shape.

[0111] Figure 20 is a vertical cross-sectional view of a region of an image pixel after forming a sub-pixel optical assembly according to a third embodiment of the present invention. Referring to Figure 20 , an Figure 12A and Figure 12BProcessing steps are performed to form the grid structure 740 and the sub-pixel optical components (770, 780, 790). The carrier substrate 690 and the bonding buffer layer 689 (if present) can be separated from the interconnect layer dielectric 670. Before or after separating the carrier substrate 690 from the semiconductor substrate 510, the semiconductor substrate 510 and the device structures thereon can be divided into discrete image sensors.

[0112] Generally, sub-pixel optical components (770, 780, 790) including optical lenses 790 can be formed above each transparent refractive structure 78. The sub-pixel optical components (770, 780, 790) in each sub-pixel 800 can be configured to direct incident light onto a plurality of photovoltaic junctions below. In one embodiment, the focal point FP of the sub-pixel optical components (770, 780, 790) in each sub-pixel 800 can be located on the vertical axis VA, which passes through the geometric center of the set of column structures 606 of the second conductive type of the sub-pixel 800.

[0113] Reference Figures 1A to 7 and Figures 18A to 20 and, in accordance with various embodiments of the present invention, an image sensor including an image pixel array 900 located on a semiconductor substrate 510 can be provided. Each image pixel within the image pixel array 900 includes at least one sub-pixel 800. Each sub-pixel 800 includes: a plurality of photovoltaic junctions (602, 606, 603) located between the front surface 609 and the backside surface 709 of the semiconductor substrate 510, sensing circuits (640, 650, 660), a sub-pixel optical component (770, 780, 790) covering the backside surface 709 and configured to direct incident light onto the plurality of photovoltaic junctions (602, 606, 603) and including an optical lens 790, and a transparent refractive structure 78, 178 located between the optical lens 790 and the backside surface 709 and having a variable thickness that decreases as the lateral distance from the vertical axis VA passing through the focal point FP of the optical lens 790 decreases. Each of the plurality of photovoltaic junctions (602, 606, 603) includes a corresponding fixed layer 603 of the first conductive type and a corresponding column structure 606 of the second conductive type.

[0114] In one embodiment, each sub-pixel 800 includes a deep trench isolation structure 76 that laterally surrounds and contacts each column structure 606 of the second conductive type. The transparent refractive structure 178 in each sub-pixel 800 covers the horizontal extension of the deep trench isolation structure 76 that contacts the backside surface 709 of the semiconductor substrate 510.

[0115] In one embodiment, the bottom surface of the transparent refractive structure 178 contacts the horizontal surface of the horizontal extension of the deep trench isolation structure 76. In one embodiment, the transparent refractive structure 178 includes a vertex located on a vertical axis VA passing through the focal point FP of the optical lens 790.

[0116] Reference Figure 21 , the process flow diagram shows an exemplary processing sequence for forming an image sensor according to an embodiment of the present invention. Referring to step 2110 and Figure 2A 、 Figure 2B and Figures 3A to 3D , a plurality of photovoltaic junctions (602, 606, 603) for the sub-pixels 800 can be formed in the semiconductor substrate 500 by doping portions of the semiconductor substrate 500. Each of the plurality of photovoltaic junctions (602, 606, 603) includes a fixed layer 603 of a corresponding first conductivity type and a column structure 606 of a corresponding second conductivity type. Referring to step 2120 and Figure 2A 、 Figure 2B and Figures 3A to 3D , sensing circuits (640, 650, 660) can be formed on the front surface 609 of the semiconductor substrate 500. Referring to step 2130 and Figure 4 and Figure 5 , the back surface of the semiconductor substrate 500 can be thinned to physically expose the column structure 606 of the second conductivity type. The backside surface 709 of the thinned semiconductor substrate 510 is physically exposed. Referring to step 2140 and Figures 6A to 11B 、 Figures 13A to 16 and Figures 18A to 19B , at least one transparent refractive structure (78, 178) can be formed on the backside surface 709 of the thinned semiconductor substrate 510. Each of the at least one transparent refractive structure (78, 178) has a variable thickness that decreases with the lateral distance from the vertical axis VA passing through the geometric center of the column structure 606 of the second conductivity type. Referring to step 2150 and Figure 12A and Figure 12B 、 Figure 17 and Figure 20 , a sub-pixel optical assembly (770, 780, 790) including an optical lens 790 can be formed above the at least one transparent refractive structure (78, 178). The optical assembly (770, 780, 790) is configured to direct incident light onto the plurality of photovoltaic junctions (602, 606, 603).

[0117] Various embodiments of the present invention can be used to provide sub-pixels 800, wherein incident light passing through an optical lens 790 is further refracted by at least one transparent refractive structure (78, 178) at a tapered interface with a column structure 606 of a second conductivity type, such that reflection at the sidewalls of the column structure 606 of the second conductivity type and the direction of light within the column structure 606 of the second conductivity type are more conducive to total internal reflection. Therefore, an image sensor using the transparent refractive structures (78, 178) of the present invention can provide higher light capture efficiency and higher image resolution.

[0118] Some embodiments of the present application provide an image sensor, including an image pixel array located on a semiconductor substrate, wherein: each image pixel in the image pixel array includes at least one sub-pixel; each sub-pixel includes a plurality of photovoltaic junctions, a sensing circuit, a sub-pixel optical component configured to direct incident light onto the plurality of photovoltaic junctions and including an optical lens, and at least one transparent refractive structure; each of the plurality of photovoltaic junctions includes a corresponding first conductivity type fixed layer and a corresponding second conductivity type column structure; and the at least one transparent refractive structure contacts the second conductivity type column structure at a tapered interface. In some embodiments, the first conductivity type fixed layer is located on the front surface of the semiconductor substrate; and the second conductivity type column structure is located on the backside surface of the semiconductor substrate. In some embodiments, each sub-pixel includes a deep trench isolation structure that laterally surrounds and contacts each of the second conductivity type column structures. In some embodiments, the at least one transparent refractive structure includes a single transparent refractive structure that contacts each of the second conductivity type column structures within each sub-pixel. In some embodiments, the single transparent refractive structure includes a tapered sidewall that contacts a horizontal extension portion of the deep trench isolation structure, the horizontal extension portion being located on and contacting the backside surface of the semiconductor substrate. In some embodiments, a horizontal surface of the single transparent refractive structure contacts the horizontal extension portion of the deep trench isolation structure. In some embodiments, the at least one transparent refractive structure includes a plurality of transparent refractive structures that contact a respective one of the second conductivity type column structures within each sub-pixel. In some embodiments, a vertical extension portion of the deep trench isolation structure laterally surrounds the plurality of transparent refractive structures; and a horizontal extension portion of the deep trench isolation structure is located on and contacts each of the plurality of transparent refractive structures. In some embodiments, each of the plurality of transparent refractive structures includes a horizontal surface and contacts the horizontal extension portion of the deep trench isolation structure, the horizontal surface being in a horizontal plane including the backside surface of the semiconductor substrate. In some embodiments, the at least one transparent refractive structure has a variable thickness that decreases as a lateral distance from a vertical axis passing through the focal point of the optical lens within each sub-pixel decreases.

[0119] Some other embodiments of the present application provide an image sensor, comprising: an image pixel array located on a semiconductor substrate, wherein: each image pixel in the image pixel array includes at least one sub-pixel; each sub-pixel includes: a plurality of photovoltaic junctions located between a front surface and a back surface of the semiconductor substrate, a sensing circuit, a sub-pixel optical component located on the back surface and configured to direct incident light onto the plurality of photovoltaic junctions and including an optical lens, and a transparent refractive structure located between the optical lens and the back surface and having a variable thickness, the variable thickness decreasing as a lateral distance from a vertical axis passing through the focus of the optical lens decreases; and each of the plurality of photovoltaic junctions includes a corresponding fixed layer of a first conductivity type and a corresponding column structure of a second conductivity type. In some embodiments, each sub-pixel includes a deep trench isolation structure that laterally surrounds and contacts each of the column structures of the second conductivity type; and the transparent refractive structure in each sub-pixel is located on a horizontal extension of the deep trench isolation structure that contacts the back surface of the semiconductor substrate. In some embodiments, a bottom surface of the transparent refractive structure contacts the horizontal extension of the deep trench isolation structure. In some embodiments, the transparent refractive structure includes a vertex that is located on a vertical axis passing through the focus of the optical lens.

[0120] Some other embodiments of the present application provide a method of forming an image sensor, including: forming a plurality of photovoltaic junctions for sub-pixels in a semiconductor substrate by doping a portion of the semiconductor substrate, wherein each of the plurality of photovoltaic junctions includes a corresponding first conductivity type fixed layer and a corresponding second conductivity type column structure; forming a sensing circuit on a front surface of the semiconductor substrate; physically exposing the second conductivity type column structure by thinning a back surface of the semiconductor substrate, wherein a back side surface of the thinned semiconductor substrate is physically exposed; forming at least one transparent refractive structure on the back side surface of the thinned semiconductor substrate, wherein each of the at least one transparent refractive structures has a variable thickness that decreases as a lateral distance from a vertical axis passing through a geometric center of the second conductivity type column structure decreases; and forming a sub-pixel optical assembly including an optical lens above the at least one transparent refractive structure, wherein the sub-pixel optical assembly is configured to direct incident light onto the plurality of photovoltaic junctions. In some embodiments, the method further includes: forming a deep trench by etching a portion of the thinned semiconductor substrate from the back surface in a region surrounding the second conductivity type column structure; and forming a deep trench isolation structure by depositing a dielectric material in the deep trench before or after forming the at least one transparent refractive structure. In some embodiments, the deep trench isolation structure is formed before forming the at least one transparent refractive structure; the method includes forming a cavity by etching a portion of the deep trench isolation structure and a portion of the second conductivity type column structure in a region including the vertical axis passing through the geometric center of the second conductivity type column structure; and the at least one transparent refractive structure is formed in the cavity by depositing a transparent dielectric material. In some embodiments, the method further includes: forming a cavity in a region including the vertical axis passing through the geometric center of the second conductivity type column structure; and depositing a transparent dielectric material in the cavity, wherein the deep trench is formed to pass through a portion of the transparent dielectric material, and the remaining portion of the transparent dielectric material includes the at least one transparent refractive structure. In some embodiments, the deep trench isolation structure includes a horizontally extending portion formed on the back side surface of the thinned semiconductor substrate; and the at least one transparent refractive structure is formed on the horizontally extending portion of the deep trench isolation structure. In some embodiments, a focal point of the optical lens is located on the vertical axis passing through the geometric center of the second conductivity type column structure; the method includes forming a color filter on or above the at least one transparent refractive structure; and the optical lens is formed above the color filter.

[0121] The features of several embodiments are outlined above so that those skilled in the art can better understand aspects of the present invention. Those skilled in the art should understand that they can readily use the present invention as a basis to design or modify other processes and structures for carrying out the same purposes and / or achieving the same advantages as the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present invention, and that various changes, substitutions, and alterations can be made therein without departing from the spirit and scope of the present invention.

Claims

1. An image sensor, comprising an image pixel array located on a semiconductor substrate, wherein: Each image pixel within the image pixel array includes at least one sub-pixel; Each sub-pixel includes a plurality of photovoltaic junctions, a sensing circuit, a sub-pixel optical component configured to direct incident light onto the plurality of photovoltaic junctions and including an optical lens, and at least one transparent refractive structure; Each of the plurality of photovoltaic junctions includes a corresponding first conductivity type fixed layer and a corresponding second conductivity type column structure, the first conductivity type fixed layer and the second conductivity type column structure being located between a first horizontal plane and a second horizontal plane, the first horizontal plane including the front surface of the semiconductor substrate, the sensing circuit being located on the front surface of the semiconductor substrate, the second horizontal plane including the backside surface of the semiconductor substrate, the backside surface of the semiconductor substrate being located between the first horizontal plane and the optical lens; and The at least one transparent refractive structure contacts the second conductivity type column structure at a tapered interface, and the surface of the at least one transparent refractive structure farthest from the first horizontal plane includes a horizontal plane of the at least one transparent refractive structure that is entirely within the second horizontal plane.

2. The image sensor according to claim 1, wherein: The first conductivity type fixed layer is located on the front surface of the semiconductor substrate; and The second conductivity type column structure is located on the backside surface of the semiconductor substrate.

3. The image sensor according to claim 1, wherein, Each sub-pixel includes a deep trench isolation structure that laterally surrounds and contacts each of the second conductivity type column structures.

4. The image sensor according to claim 2, wherein, The at least one transparent refractive structure includes a single transparent refractive structure that contacts a single second conductivity type column structure among the second conductivity type column structures within each sub-pixel.

5. The image sensor according to claim 4, wherein, The single transparent refractive structure includes a tapered sidewall that contacts the single second conductivity type column structure.

6. The image sensor according to claim 3, wherein, The horizontal surface of the at least one transparent refractive structure contacts a horizontal extension of the deep trench isolation structure.

7. The image sensor according to claim 3, wherein, The at least one transparent refractive structure includes a plurality of transparent refractive structures that contact a respective one of the second conductivity type column structures within each sub-pixel.

8. The image sensor according to claim 3, wherein: The vertical extension of the deep trench isolation structure laterally surrounds the at least one transparent refractive structure; and The horizontal extension of the deep trench isolation structure is located on and contacts each of the at least one transparent refractive structures.

9. The image sensor according to claim 3, wherein, Each of the at least one transparent refractive structures includes a horizontal surface and contacts the horizontal extension of the deep trench isolation structure, the horizontal surface being within a horizontal plane including the backside surface of the semiconductor substrate.

10. The image sensor according to claim 1, wherein, The at least one transparent refractive structure has a variable thickness that decreases as the lateral distance from a vertical axis passing through the focal point of the optical lens within each sub-pixel decreases.

11. An image sensor, comprising: An image pixel array located on a semiconductor substrate, wherein: Each image pixel within the image pixel array includes at least one sub-pixel; Each sub-pixel includes: A plurality of photovoltaic junctions between a front surface and a back surface of the semiconductor substrate, a sensing circuit, a sub-pixel optical component located on the back surface and configured to direct incident light onto the plurality of photovoltaic junctions and including an optical lens, and a transparent refractive structure located between the optical lens and the back surface and having a variable thickness that decreases as a lateral distance from a vertical axis passing through the focal point of the optical lens decreases; A deep trench isolation structure including a horizontally extending portion; and Each of the plurality of photovoltaic junctions includes a corresponding first conductivity type fixed layer and a corresponding second conductivity type pillar structure, the deep trench isolation structure laterally surrounds and contacts each of the second conductivity type pillar structures, and the horizontally extending portion contacts all of the horizontal surfaces of the second conductivity type pillar structures facing the optical lens.

12. The image sensor according to claim 11, wherein: The transparent refractive structure in each sub-pixel is located on the horizontally extending portion of the deep trench isolation structure, and the horizontally extending portion contacts the back surface of the semiconductor substrate.

13. The image sensor according to claim 12, wherein, A bottom surface of the transparent refractive structure contacts the horizontally extending portion of the deep trench isolation structure.

14. The image sensor according to claim 12, wherein, The transparent refractive structure includes a vertex located on a vertical axis passing through the focal point of the optical lens.

15. A method of forming an image sensor, comprising: Forming a plurality of photovoltaic junctions for sub-pixels in the semiconductor substrate by doping portions of the semiconductor substrate, wherein each of the plurality of photovoltaic junctions includes a corresponding first conductivity type fixed layer and a corresponding second conductivity type pillar structure; Forming a sensing circuit on a front surface of the semiconductor substrate; Physically exposing the second conductivity type pillar structures by thinning a back surface of the semiconductor substrate, wherein the back surface of the thinned semiconductor substrate is physically exposed; Forming at least one transparent refractive structure on the back surface of the thinned semiconductor substrate, wherein each of the at least one transparent refractive structures has a variable thickness that decreases as a lateral distance from a vertical axis passing through the geometric center of the second conductivity type pillar structure decreases, and a surface of the at least one transparent refractive structure farthest from the front surface is located in a horizontal plane including the back surface; and Forming a sub-pixel optical component including an optical lens above the at least one transparent refractive structure, wherein the sub-pixel optical component is configured to direct incident light onto the plurality of photovoltaic junctions.

16. The method according to claim 15, further comprising: Forming a deep trench by etching a portion of the thinned semiconductor substrate from the back surface in a region surrounding the second conductivity type pillar structure; And Forming a deep trench isolation structure by depositing a dielectric material in the deep trench after forming the at least one transparent refractive structure.

17. The method according to claim 16, further comprising: Forming a cavity in a region including the vertical axis passing through the geometric center of the second conductivity type pillar structure; And Deposit a transparent dielectric material in the cavity, wherein the deep trench is formed to pass through a part of the transparent dielectric material, and the remaining part of the transparent dielectric material includes the at least one transparent refractive structure.

18. A method of forming an image sensor, comprising: Forming a plurality of photovoltaic junctions for sub-pixels in the semiconductor substrate by doping portions of the semiconductor substrate, wherein each of the plurality of photovoltaic junctions includes a corresponding fixed layer of a first conductivity type and a corresponding column structure of a second conductivity type; Forming a sensing circuit on a front surface of the semiconductor substrate; Physically exposing the column structure of the second conductivity type by thinning a back surface of the semiconductor substrate, wherein a back side surface of the thinned semiconductor substrate is physically exposed; Forming a deep trench isolation structure in a region surrounding the column structure of the second conductivity type; Etching a portion of the deep trench isolation structure and a portion of the column structure of the second conductivity type in a region including a vertical axis passing through a geometric center of the column structure of the second conductivity type to form a cavity, depositing a transparent dielectric material in the cavity to form at least one transparent refractive structure on the back side surface of the thinned semiconductor substrate, wherein each of the at least one transparent refractive structures has a variable thickness that decreases as a lateral distance from the vertical axis passing through the geometric center of the column structure of the second conductivity type decreases; and Forming a sub-pixel optical assembly including an optical lens above the at least one transparent refractive structure, wherein the sub-pixel optical assembly is configured to direct incident light onto the plurality of photovoltaic junctions.

19. The method according to claim 18, wherein: The deep trench isolation structure includes a horizontally extending portion formed on the back side surface of the thinned semiconductor substrate; and The at least one transparent refractive structure is formed on the horizontally extending portion of the deep trench isolation structure.

20. The method according to claim 18, wherein: A focal point of the optical lens is located on the vertical axis passing through the geometric center of the column structure of the second conductivity type; The method includes forming a color filter on or above the at least one transparent refractive structure; And The optical lens is formed above the color filter.

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