Memory die resource management

Abstract

The present application relates to a memory die resource management. A resource manager may determine a set of die-specific resources for a memory die among the plurality of memory dies of a memory subsystem from a set of global resources for the memory dies of the memory subsystem. In some cases, the set of die-specific resources may be allocated for a read command for the memory die. The resource manager may assign a read command to a die-specific resource based on the die-specific resource being available in the set of die-specific resources, and avoid assigning the read command to the die-specific resource based on the die-specific resource being unavailable.

Description

[0001] Cross Reference

[0002] This patent application claims priority to U.S. patent application No. 16 / 818,115 of Wu et al., entitled “MEMORY DIE RESOURCE MANAGEMENT,” filed on March 13, 2020, which has been assigned to the present assignee and is expressly incorporated herein by reference in its entirety.

[0003] The technical field relates to memory die resource management. Background Art

[0004] A memory subsystem may include one or more memory devices that store data. The memory devices may be, for example, non-volatile memory devices and volatile memory devices. Generally speaking, a host system may utilize a memory subsystem to store data at the memory devices and retrieve data from the memory devices. Summary of the invention

[0005] A method is described. The method may include: determining a set of die-specific resources for a memory die in a plurality of memory dies of a memory subsystem from a set of global resources for the plurality of memory dies of a memory subsystem, the set of die-specific resources allocated for a read command for the memory die; assigning a read command to a die-specific resource in the set of die-specific resources based at least in part on the die-specific resource being available; and refraining from assigning a read command to the die-specific resource based at least in part on the die-specific resource being unavailable.

[0006] An apparatus is described. The apparatus may include a processor, a memory coupled to the processor, and instructions stored in the memory. The instructions are executable by the processor to cause the apparatus to: allocate a set of die-specific resources for a read command of a memory die of a memory subsystem, the set of die-specific resources being determined from a set of global resources for a plurality of memory dies of the memory subsystem; and determine whether to assign the read command to a die-specific resource in the set of die-specific resources based at least in part on availability of the die-specific resources.

[0007] A non-transitory computer-readable medium storing code is described. The code may include instructions executable by a processor to: determine a set of die-specific resources for a memory die in a plurality of memory dies of a memory subsystem from a set of global resources for the plurality of memory dies of a memory subsystem, the set of die-specific resources being allocated for a read command for the memory die; assign a read command to a die-specific resource in the set of die-specific resources based at least in part on the die-specific resource being available; and avoid assigning a read command to a die-specific resource based at least in part on the die-specific resource being unavailable. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The present disclosure will be more fully understood from the detailed description given below and the accompanying drawings of various embodiments of the present disclosure. However, the drawings should not be considered to limit the present disclosure to specific embodiments, but are only for explanation and understanding.

[0009] Figure 1 An example of a computing system including a memory subsystem according to some examples of the present disclosure is described.

[0010] Figure 2 A diagram of an example method for supporting memory die resource management according to some examples of the present disclosure.

[0011] Figure 3 is a block diagram of an example system that supports memory die resource management according to some examples of the present disclosure.

[0012] Figure 4 is an example diagram of supporting memory die resource management according to some examples of the present disclosure.

[0013] Figure 5 is a block diagram of an example system that supports memory die resource management according to some examples of the present disclosure. DETAILED DESCRIPTION

[0014] Aspects of the present disclosure relate to a memory die resource management. A memory subsystem may be a storage device, a memory module, or a mixture of a storage device and a memory module. Figure 1 Examples of storage devices and memory modules are described. In general, a host system may utilize a memory subsystem that includes one or more components, such as memory devices that store data. The host system may provide data for storage at the memory subsystem and may request retrieval of data from the memory subsystem.

[0015] The memory device may be a non-volatile memory device. A non-volatile memory device is a package of one or more dies. Each die may be composed of one or more planes. The planes may be grouped into logical units (LUNs). For some types of non-volatile memory devices (e.g., NAND devices), each plane is composed of a set of physical blocks. Each block is composed of a set of pages. Each page is composed of a set of memory cells. A cell is an electronic circuit that stores information. Hereinafter, a data block refers to a cell of a memory device used to store data, and may include a group of memory cells, a word line group, a word line, or an individual memory cell.

[0016] Data operations may be performed by the memory subsystem. The data operations may be operations initiated by the host. For example, the host system may initiate data operations (e.g., write, read, erase, etc.) on the memory subsystem. The host system may send access requests (e.g., write commands, read commands) to the memory subsystem to store data on a memory device at the memory subsystem and read data from a memory device on the memory subsystem.

[0017] In some systems, a set of global resources for a memory die of a memory subsystem may be determined. The set of global resources may be an instance of one or more entries of a memory die, a buffer of a memory die, or a reference queue of a memory die. In some instances, one or more entries of a memory die may be assigned to a read operation. In such embodiments, the set of global resources may be non-specific to the memory die of the memory subsystem. For example, a set of global resources for one die of a memory subsystem may also be allocated for use by different dies of the memory subsystem, or may not be allocated (e.g., not utilized or assigned to any die). For example, a read command, a write command, or an erase command may be assigned to a set of global resources based on a request received from a host system communicating with the memory subsystem. In some systems, due to the increased latency caused by assigning commands to global resources in the set of global resources, determining a set of global resources for multiple memory dies without assigning commands to the set of global resources may reduce the performance of the memory die.

[0018] Aspects of the present disclosure address the above and other deficiencies by having a memory subsystem that implements memory die resource management. For example, a set of resources in the set of global resources may be determined for each memory die of the memory subsystem or assigned to each memory die. In such embodiments, the set of resources (e.g., die-specific die) has corresponding die-specific resources for operations associated with the memory die. In some instances, the assigned die-specific resources may be assigned to a read command. In such embodiments, a resource manager of the memory subsystem or associated with the memory die may avoid assigning a write command or an erase command to an assigned resource in the set of global resources.

[0019] In some embodiments, a resource manager may receive a request for an operation on a given memory die. The resource manager may examine the command included in the request and determine whether to assign the command to a die-specific resource based on the command. The read command may be assigned to a die-specific resource based on the command type (e.g., a read command) and the available resources. For example, a read request may be received for a read operation. The resource manager may examine a reserved entry associated with a die-specific resource allocated for the read command. If the entry is idle (e.g., the command is not assigned to an entry for a set of die-specific resources), the read command may be placed in the entry. If the entry is unavailable (e.g., the command is assigned to an entry for a set of die-specific resources), the read command may be placed in another entry associated with a set of global resources.

[0020] By determining a set of die-specific resources to allocate for a read command, the overall performance of the memory subsystem can be increased. For example, when allocating resources for each memory die for a particular operation (e.g., a read operation), implementing memory die resource management can improve the overall efficiency of the memory subsystem by reducing latency of the memory die when assigning commands (e.g., read commands) to a set of global resources that are die-specific. Such techniques can cause the memory subsystem to experience improved read speeds, read operations, and improved processing times, among other things.

[0021] First, in the reference Figure 1 Features of the present disclosure are described in the context of the described computing environment. Figures 2 to 4 The features of the present disclosure are described in the context of the described methods, block diagrams, and example memory dies. These and other features of the present disclosure are further illustrated by and described with reference to a computer system, the computer system being related to the example memory die of reference. Figure 5 Memory die resource management described.

[0022] Figure 1An example of a computing system 100 including a memory subsystem 110 according to some embodiments of the present disclosure is illustrated. The memory subsystem 110 may include media such as one or more non-volatile memory devices (e.g., one or more memory devices 130), one or more volatile memory devices (e.g., memory device 140), or a combination thereof.

[0023] The memory subsystem 110 may be a storage device, a memory module, or a mixture of storage devices and memory modules. Examples of storage devices include solid-state drives (SSDs), flash drives, universal serial bus (USB) flash drives, embedded multimedia controller (eMMC) drives, universal flash storage (UFS) drives, secure digital (SD) cards, and hard disk drives (HDDs). Examples of memory modules include dual in-line memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and various types of non-volatile DIMMs (NVDIMMs).

[0024] The computing system 100 can be a computing device such as a desktop computer, a laptop computer, a network server, a mobile device, a vehicle (e.g., an airplane, drone, train, automobile, or other transportation vehicle), an Internet of Things (IoT) enabled device, an embedded computer (e.g., a computer included in a vehicle, industrial equipment, or a networked commercially available device), or such a computing device that includes a memory and a processing device.

[0025] Computing system 100 can include a host system 105 coupled with one or more memory subsystems 110. In some examples, host system 105 is coupled with memory subsystems 110 of different types. Figure 1 An example of a host system 105 coupled to a memory subsystem 110 is illustrated. As used herein, "coupled to" or "coupled with" generally refers to a connection between components, which can be an indirect communication connection or a direct communication connection (e.g., without intervening components), whether wired or wireless, including connections such as electrical connections, optical connections, magnetic connections, etc.

[0026] The host system 105 may include a processor chipset and a software stack executed by the processor chipset. The processor chipset may include one or more cores, one or more cache memories, a memory controller (e.g., an NVDIMM controller), and a storage protocol controller (e.g., a peripheral component interconnect express (PCIe) controller, a serial advanced technology attachment (SATA) controller). The host system 105 uses the memory subsystem 110, for example, to write data to the memory subsystem 110 and read data from the memory subsystem 110.

[0027] The host system 105 may be coupled to the memory subsystem 110 using a physical host interface. Examples of the physical host interface include, but are not limited to, a SATA interface, a PCIe interface, a USB interface, a Fibre Channel, a Small Computer System Interface (SCSI), a Serial Attached SCSI (SAS), a Double Data Rate (DDR) memory bus, a DIMM interface (e.g., a DIMM socket interface supporting Double Data Rate (DDR), an Open NAND Flash Interface (ONFI), Double Data Rate (DDR), Low Power Double Data Rate (LPDDR), or any other interface. The physical host interface may be used to transmit data between the host system 105 and the memory subsystem 110. When the memory subsystem 110 is coupled to the host system 105 through a PCIe interface, the host system 105 may further utilize a Non-Volatile Memory Express (NVMe) interface to access components (e.g., the memory device 130). The physical host interface may provide an interface for transferring control, address, data, and other signals between the memory subsystem 110 and the host system 105. Figure 1 Memory subsystem 110 is illustrated as an example. In general, host system 105 can access multiple memory subsystems via the same communication connection, multiple separate communication connections, and / or a combination of communication connections.

[0028] Memory devices 130, 140 may include any combination of different types of non-volatile memory devices and / or volatile memory devices. Volatile memory devices (e.g., memory device 140) may be, but are not limited to, random access memory (RAM) such as dynamic RAM (DRAM) and synchronous DRAM (SDRAM).

[0029] Some examples of non-volatile memory devices (e.g., memory device 130) include NAND-type flash memory and write-in-place memory, such as three-dimensional cross-point ("3D cross-point") memory, which is a cross-point array of non-volatile memory cells. The cross-point array of non-volatile memory can perform bit storage based on changes in body resistance in conjunction with a stackable cross-grid data access array. In addition, in contrast to many flash-based memories, cross-point non-volatile memory can perform write-in-place operations, where non-volatile memory cells can be programmed without pre-erasing the non-volatile memory cells. NAND-type flash memory includes, for example, two-dimensional NAND (2D NAND) and three-dimensional NAND (3D NAND).

[0030] Each of the memory devices 130 may include one or more memory cell arrays. One type of memory cell, for example, a single-level cell (SLC), may store one bit per cell. Other types of memory cells, such as multi-level cells (MLC), three-level cells (TLC), four-level cells (QLC), and five-level cells (PLC) may store multiple bits per cell. In some embodiments, each of the memory devices 130 may include one or more memory cell arrays, such as SLC, MLC, TLC, QLC, or any combination of such memory cell arrays. In some embodiments, a particular memory device may include an SLC portion, an MLC portion, a TLC portion, a QLC portion, or a PLC portion of a memory cell. The memory cells of the memory device 130 may be grouped into pages, which may refer to a logical unit of a memory device for storing data. For some types of memory (e.g., NAND), pages may be grouped to form blocks.

[0031] Although nonvolatile memory components such as NAND-type flash memory (e.g., 2D NAND, 3D NAND) and 3D cross-point nonvolatile memory cell arrays are described, the memory device 130 can be based on any other type of nonvolatile memory, such as read-only memory (ROM), phase change memory (PCM), self-selected memory, other chalcogenide-based memories, ferroelectric transistor random access memory (FeTRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), spin transfer torque (STT)-MRAM, conductive bridge RAM (CBRAM), resistive random access memory (RRAM), oxide-based RRAM (OxRAM), non-OR (NOR) flash memory, and electrically erasable programmable ROM (EEPROM).

[0032] The memory subsystem controller 115 (or simply the controller) may communicate with the memory device 130 to perform operations such as reading data, writing data, or erasing data at the memory device 130, and other such operations. The memory subsystem controller 115 may include hardware such as one or more integrated circuits and / or discrete components, buffer memory, or a combination thereof. The memory subsystem controller 115 may be a microcontroller, a dedicated logic circuit system (e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a digital signal processor (DSP)), or another suitable processor.

[0033] The memory subsystem controller 115 may include a processor 120 (e.g., a processing device) configured to execute instructions stored in a local memory 125. In the illustrated example, the local memory 125 of the memory subsystem controller 115 includes an embedded memory configured to store instructions for executing various processes, operations, logic flows, and routines that control the operation of the memory subsystem 110, including handling communications between the memory subsystem 110 and the host system 105.

[0034] In some examples, local memory 125 may include memory registers that store memory pointers, fetched data, etc. Local memory 125 may also include ROM for storing microcode. Figure 1 The example memory subsystem 110 in FIG. 1 has been described as including a memory subsystem controller 115, but in another example of the present disclosure, the memory subsystem 110 does not include a memory subsystem controller 115, but may rely on external control (e.g., provided by an external host or by a processor or controller separate from the memory subsystem).

[0035] In general, the memory subsystem controller 115 may receive commands or operations from the host system 105, and may convert the commands or operations into instructions or appropriate commands to achieve the desired access to the memory device 130 and / or the memory device 140. The memory subsystem controller 115 may be responsible for other operations, such as wear leveling operations, garbage collection operations, error detection and error correction code (ECC) operations, encryption operations, cache operations, and address translation between logical addresses (e.g., logical block addresses (LBA), name space) and physical addresses (e.g., physical block addresses) associated with the memory device 130. The memory subsystem controller 115 may further include a host interface circuit system to communicate with the host system 105 via a physical host interface. The host interface circuit system may convert commands received from the host system into command instructions to access the memory device 130 and / or the memory device 140, and convert responses associated with the memory device 130 and / or the memory device 140 into information for the host system 105.

[0036] The memory subsystem 110 may also include additional circuitry or components not illustrated. In some examples, the memory subsystem 110 may include a cache or buffer (e.g., DRAM) and address circuitry (e.g., row decoders and column decoders) that may receive addresses from the memory subsystem controller 115 and decode the addresses to access the memory device 130.

[0037] In some examples, memory device 130 includes a local media controller 135 that operates in conjunction with memory subsystem controller 115 to perform operations on one or more memory cells of memory device 130. An external controller (e.g., memory subsystem controller 115) may externally manage memory device 130 (e.g., perform media management operations on memory device 130). In some embodiments, memory device 130 is a managed memory device, which is a raw memory device combined with a local controller (e.g., local controller 135) to perform media management within the same memory device package. An example of a managed memory device is a managed NAND (MNAND) device.

[0038] The memory subsystem 110 includes a resource manager 150 that can determine or allocate a set of die-specific resources for a memory die (e.g., memory device 130, memory device 140, memory components of memory device 130, memory components of memory device 140). In such embodiments, a set of die-specific resources can be determined from a set of global resources for multiple memory dies of the memory subsystem 110. In some embodiments, a set of die-specific resources can be allocated for a read command for a memory die. For example, if a write request or an erase request is received, the resource manager 150 can avoid assigning the write command or the erase command based on the die-specific resources allocated for the read command for the memory die.

[0039] The resource manager 150 may assign the read command to the die-specific resource based on the die-specific resource being available. In other examples, the resource manager 150 may avoid assigning the read command to the die-specific resource based on the die-specific resource being unavailable. By determining a set of die-specific resources allocated for the read command, the resource manager 150 may preserve entries (e.g., die-specific resources) for the read command, thereby improving performance and reliability. Additionally, managing memory dies on a die-by-die basis (e.g., determining a set of die-specific resources for each memory die in a plurality of memory dies) may enable the memory subsystem to experience improved read speeds and / or improved processing times.

[0040] In some examples, the memory subsystem controller 115 includes at least a portion of a resource manager 150. For example, the memory subsystem controller 115 may include a processor 120 (e.g., a processing device) configured to execute instructions stored in the local memory 125 for performing the operations described herein. In some examples, the resource manager 150 is part of the host system 105, an application, or an operating system.

[0041] If the die-specific resource is unavailable, the resource manager 150 may determine the availability of a resource from a set of global resources. In some embodiments, the resource manager 150 may assign the read command to a resource from a set of global resources based on avoiding assigning the read command and determining the availability of the resource. Additional details about the operation of the resource manager 150 are described herein.

[0042] Figure 2 2 is a diagram of an example method 200 for supporting memory die resource management according to some examples of the present disclosure. The method 200 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, a dedicated logic, a programmable logic, a microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executed on a processing device), or a combination thereof. In some examples, the method 200 may be performed by Figure 1 The resource manager 150 of the embodiment of the present invention is executed. Although shown in a specific order or sequence, the order of the processes can be modified unless otherwise specified. Therefore, the illustrated examples should be understood as examples only, and the illustrated processes can be performed in different orders, and some processes can be performed in parallel. In addition, one or more processes can be omitted in various examples. Therefore, not all processes are required in each example. Other process flows are also possible.

[0043] At operation 205, the processing device may allocate a set of die-specific resources for a read command of a memory die of the memory subsystem. In some examples, aspects of operation 205 may be as described in reference to Figure 1 The resource manager 150 described performs.

[0044] In some examples, method 200 may include determining a set of die-specific resources for a memory die in the plurality of memory dies from a set of global resources (e.g., a global pool) for the plurality of memory dies. In some embodiments, a set of global resources for the plurality of memory dies of a memory subsystem are allocated to the plurality of memory dies prior to receiving a read command. For example, a set of die-specific resources may be allocated for a read command for a memory die prior to receiving the read command.

[0045] In some examples, the processing device may assign the read command to a reference queue (e.g., a priority queue) and transmit the read command to the transmit queue. The read command may be transmitted to the transmit queue based on issuing a read command for a read operation. In some embodiments, the reference queue and the transmit queue may each represent a clock cycle.

[0046] In some examples, method 200 may include allocating a set of die-specific resources for a read command to a memory die based on a status of a central processing unit (CPU) for the memory subsystem, such as the size of the CPU. In some embodiments, allocating a set of die-specific resources to a memory die is based on a command type, such as a read command.

[0047] In some examples, method 200 may include determining that a read command is addressed to an address of a memory die. In such embodiments, the processing device may change an operating mode of the memory die based on determining that the read command is addressed to the memory die. For example, the processing device may change an operating mode of the memory device from a programming mode to a read operating mode. In some embodiments, the operating mode may be changed before determining whether to assign the read command to a die-specific resource.

[0048] At operation 210, the processing device may determine whether to assign the read command to a die-specific resource in a set of die-specific resources based on the availability of the die-specific resources. In some examples, aspects of operation 210 may be as described in reference to Figure 1 The resource manager 150 described performs.

[0049] In some examples, method 200 may include assigning a read command to a die-specific resource based on the die-specific resource being available. In such embodiments, if the read command is not assigned to the die-specific resource, then the die-specific resource may be available. In other examples, method 200 may include avoiding assigning a read command to a die-specific resource on an unavailable die-specific resource. In such embodiments, if the read command is already assigned to the die-specific resource, then the die-specific resource may be unavailable.

[0050] In some examples, method 200 may include determining the availability of a resource from a set of global resources (e.g., a resource other than the die-specific resource) based on the die-specific resource being unavailable. In such embodiments, the processing device may assign the read command to the resource from the set of global resources based on avoiding assigning the read command to the die-specific resource. In some embodiments, the processing device may also assign the read command to the resource from the set of global resources based on determining the availability of the resource from the set of global resources. The resource may be an instance of an unallocated resource (e.g., a non-die-specific resource) from the set of global resources.

[0051] In some examples, method 200 may include receiving a write request for a write operation to a memory die and avoiding assigning the write command to a die-specific resource based on a die-specific resource in a set of die-specific resources allocated for a read command for the memory die. In some embodiments, the processing device may receive an erase request for an erase operation to a memory die and avoid assigning the erase command to a die-specific resource based on a die-specific resource in a set of die-specific resources allocated for a read command for the memory die. In such embodiments, the processing device may avoid assigning requests other than read requests based on the die-specific resources allocated for the read command. In other examples, the processing device may receive a read request for a read operation to a memory die and issue the read command after assigning the read command to a die-specific resource on the read request.

[0052] Figure 3 3 is a block diagram of an example system supporting memory die resource management according to some examples of the present disclosure. Block diagram 300 may include a memory subsystem 305 and a host system 325. Memory subsystem 305 may include a front-end manager 310, a translation manager 315, and a back-end manager 320. Translation manager 315 may be an example of a flash translation layer (FTL) manager.

[0053] The host system 325 may send (e.g., issue) a host read request, a host write request, and a host erase request or other commands to the memory subsystem 305. In some embodiments, the front end manager 310 may receive the host read, write, or erase request and process the request from the host system 325. The front end manager 310 may communicate the host read, write, or erase request from the host system 325 to the translation manager 315.

[0054] In some examples, the front end manager 310 may send (e.g., issue) internal read requests, internal write requests, and internal erase requests to the translation manager 315. In such embodiments, the front end manager 310 may be part of a garbage collection program. For example, the front end manager 310 may erase multiple pages during a single program, enabling the erasure of valid data of a block of data that was initially read into a buffer and stored by the buffer based on one or more read commands and corresponding pages issued by the memory device controller, and issuing a write command once the corresponding read command has been completed.

[0055] The translation manager 315 may determine or allocate a set of die-specific resources for a memory die in a plurality of memory dies of the memory subsystem 305. In such embodiments, a set of die-specific resources may be determined or allocated from a set of global resources for the plurality of memory dies. A set of die-specific resources may be allocated based on a command type, such as a read command. For example, the translation manager 315 may reserve a set of die-specific resources for bit commands, such as read commands for a given memory die. The translation manager 315 may identify a number of dies and may allocate a number of bit commands equal to the number of dies. In such embodiments, each die (e.g., the number of dies) may include at least one corresponding bit command that is serviced when the bit command is sent to the backend manager 320.

[0056] In some examples, a set of die-specific resources may be allocated for a read command based on the state of a central processing unit (CPU) for the memory subsystem 305. In some embodiments, the size (e.g., number) of a set of global resources (e.g., a global pool) for multiple memory dies may be based on the space of the CPU. For example, if the size of the global pool exceeds the number of spaces of the CPU, the size of the global pool may be reduced. In other examples, if the number of spaces of the CPU exceeds the size of the global pool, the size of the global pool may be increased. In some cases, the size of the global pool may be adjusted based on software resources.

[0057] In some embodiments, the translation manager 315 may receive a read request for a read operation to a memory die. The read request may be a host read request from the host system 325 or an internal read request from the front-end manager 310. In such embodiments, the translation manager 315 may issue a read command for the read operation after assigning the read command to a die-specific resource.

[0058] If the die-specific resource is available (e.g., contains no command), the translation manager 315 may assign the read command to the die-specific resource. If the die-specific resource is unavailable (e.g., contains a command), the translation manager 315 may also avoid assigning the read command to the die-specific resource. In some examples, if the die-specific resource is unavailable, the translation manager 315 may determine the availability of a different resource (e.g., non-die-specific) from a set of global resources. In such embodiments, the translation manager 315 may assign the read command to a resource from a set of global resources based on avoiding assigning the read command and determining that the resource is available.

[0059] For example, a set of global resources may dedicate resources within the resource set to read commands for each memory die. When initializing the global resources, the translation manager 315 may allocate multiple entries for read commands. When the translation manager 315 receives a read request, the number of entries for the read command may be checked to see if there are any available entries (e.g., no read commands). If the die-specific resources are not available, the translation manager 315 may check the remaining entries (e.g., entries not assigned to read commands) to assign the read command to the resources.

[0060] In other examples, the translation manager 315 may receive a write request for a write operation to the memory die. The write request may be a host write request from the host system 325 or an internal write request from the front-end manager 310. In such embodiments, the translation manager 315 may avoid assigning a write command for the write operation to die-specific resources based on the die-specific resources allocated for the read command.

[0061] In some examples, the translation manager 315 may receive an erase request for an erase operation of a memory die. The erase request may be a host erase request from the host system 325 or an internal erase request from the front-end manager 310. In such embodiments, the translation manager 315 may avoid assigning the erase command for the erase operation to die-specific resources based on the die-specific resources allocated for the read command.

[0062] The translation manager 315 may determine that the read command is addressed to the address of the memory die. In such embodiments, the translation manager 315 may change the operating mode of the memory die based on the determination that the read command is addressed to the memory die. In some embodiments, the operating mode may be changed before determining whether to assign the read command to a die-specific resource. For example, when the translation manager 315 determines that the read command is addressed to the memory die (e.g., the memory die receives an incoming read request), the memory die may operate in a programming mode. In such embodiments, the translation manager 315 may change the operating mode from the programming mode to the read operating mode before servicing the read command. The translation manager 315 may avoid communicating to the backend manager 320 that the operating mode of the memory die may be changed, but instead, the translation manager 315 may communicate to the backend manager 320 the operating mode after the determination that the read command is addressed to the memory die.

[0063] In some embodiments, the translation manager 315 may issue a read command to the back end manager 320 to perform a read operation. For example, the back end manager 320 may receive a read command from the translation manager 315 and execute the read command. The back end manager 320 may read a value from the memory die and send the value to the translation manager 315, the front end manager 310, the host system 325, or a combination thereof.

[0064] Figure 4 4 is an example diagram of supporting memory die resource management according to some examples of the present disclosure. Diagram 400 may include memory die 405-a, 405-b, and 405-c. Each memory die 405-a, 405-b, and 405-c may include priority queue 2, priority queue 1, and priority queue 0. Each priority queue may be an example of a reference queue. The diagram may also include a transmit queue, which may include entries 435, allocated entries 440, and unallocated entries 445. In some embodiments, a queue may be an example of a clock cycle.

[0065] Memory die 405-a may include commands 410-a, 415, and 420-a. Priority queue 2 may include command 410-a. In some embodiments, command 410-a may be an example of a highest priority command (e.g., a host read command). The number of commands in the reference queue may represent a number of commands that may be issued and / or allocated to a set of die-specific resources. For example, priority queue 2 may contain a single command, thereby indicating that a single command may be issued and / or allocated to a set of die-specific resources.

[0066] Priority queue 1 may include commands 415-a and 415-b. In some embodiments, commands 415-a and 415-b may each be an instance of an internal read command. In such embodiments, priority queue 1 may be a dedicated queue for read commands other than host read commands. A dedicated read queue may be assigned for each individual die (e.g., memory die 405-a). In some examples, commands 415-a and 415-b may be issued after command 410-a in priority queue 2 based on the priority of the queue. For example, the priority of the queue may be based on the type of command. For example, a host read command (e.g., command 410-a) may be a higher priority to be issued than an internal read command (e.g., command 415-a and 415-b). In some embodiments, priority queue 1 may contain three commands (e.g., commands 415-a and 415-b and command 410-a). The commands included in priority queue 1 may be assigned to a set of die-specific resources.

[0067] Priority queue 0 may include command 420-a. In some embodiments, command 420-a may be an instance of other internal commands (e.g., a write command or an erase command). In such embodiments, command 420-a may be issued after commands 415-a and 415-b in priority queue 1 based on the priority of the queue. For example, internal read commands (e.g., commands 415-a and 415-b) may be higher priority to be issued than other internal commands (e.g., command 420-a). In some examples, since allocated entry 435 is associated with a read command, the transfer queue cannot contain an allocated entry for command 420-a. In such embodiments, command 420-a may be transferred to an unallocated entry in unallocated entries 445 in the transfer queue. In some embodiments, priority queue 0 may contain five commands. In some embodiments, command 420-a may be allocated to a read command based on a set of die-specific resources and not allocated to a set of die-specific resources.

[0068] In some examples, commands 415-a and 415-b may be placed in a reference queue (e.g., priority queue 1) based on the order received from the host system. The translation manager may issue commands 415-a and 415-b, and then the translation manager may transfer each of commands 415-a and 415-b from the reference queue to an entry in a transfer queue. For example, command 415-a may be placed in entry 435-a, and command 415-b may be placed in entry 435-b. In such embodiments, commands 415-a and 415-b may be placed in the transfer queue based on an order of priority of the commands, an order in which the commands are received from the host system (e.g., an order placed in the reference queue), based on memory die 405-a, or a combination thereof.

[0069] In some embodiments, when the translation manager sends a request to the back end manager to issue a command, die-specific resources may be automatically allocated. In some examples, commands 415-a and 415-b may be removed from the transfer queue based on performing a valid read operation (e.g., when the back end manager reads a value to the front end manager or host system). In other examples, if commands 415-a and 415-b are not assigned to a transfer queue, the read operation may be pending (e.g., not completed).

[0070] Memory die 405-b may include commands 410-b, 425, and 420-b. Priority queue 2 may include command 410-b. In some embodiments, command 410-b may be an instance of a highest priority command (e.g., a host read command). The number of commands in the reference queue may represent a number of commands that may be issued and / or allocated to a set of die-specific resources. For example, priority queue 2 may contain a single command, thereby indicating that a single command may be issued and / or allocated to a set of die-specific resources.

[0071] Priority queue 1 may include commands 425-a, 425-b, and 425-c. In some embodiments, commands 425-a, 425-b, and 425-c may each be an instance of an internal read command. In such embodiments, priority queue 1 may be a dedicated queue for read commands. A dedicated read queue may be assigned for each individual die (e.g., memory die 405-b). In some examples, commands 425-a, 425-b, and 425-c may be issued after command 410-b in priority queue 2 based on the priority of the queue. For example, the priority of the queue may be based on the type of command. For example, a host read command (e.g., command 410-b) may be a higher priority to be issued than an internal read command (e.g., commands 425-a, 425-b, and 425-c). In some embodiments, priority queue 1 may contain four commands (e.g., commands 425-a, 425-b, and 425-c and command 410-b). Commands contained in priority queue 1 may be assigned to a set of die-specific resources.

[0072] Priority queue 0 may include command 420-b. In some embodiments, command 420-b may be an instance of other internal commands (e.g., a write command or an erase command). In such embodiments, command 420-b may be issued after commands 425-a, 425-b, and 425-c in priority queue 1 based on the priority of the queue. For example, internal read commands (e.g., commands 425-a, 425-b, and 425-c) may be higher priority to be issued than other internal commands (e.g., command 420-b). In some examples, since allocated entry 435 is associated with a read command, the transfer queue cannot contain an allocated entry for command 420-b. In such embodiments, command 420-b may be transmitted to an unallocated entry in unallocated entries 445 in the transfer queue. In some embodiments, priority queue 0 may contain five commands. In some embodiments, command 420-b may be allocated to a read command based on a set of die-specific resources and not allocated to a set of die-specific resources.

[0073] In some examples, commands 425-a, 425-b, and 425-c may be placed in a reference queue (e.g., priority queue 1) based on the order in which they were received from the host system. The translation manager may issue commands 425-a, 425-b, and 425-c, and then the translation manager may transfer commands 425-a, 425-b, and 425-c from the reference queue to entries in a transfer queue. For example, command 425-a may be placed in entry 435-c, command 425-b may be placed in entry 435-d, and command 425-c may be placed in entry 435-e. In such embodiments, commands 425-a, 425-b, and 425-c may be placed in the transfer queue based on an order of priority of the commands, an order in which the commands are received from the host system (e.g., an order in which they are placed in the reference queue), based on memory die 405-b, or a combination thereof.

[0074] Memory die 405-c may include commands 410-c, 430, and 420-c. Priority queue 2 may include command 410-c. In some embodiments, command 410-c may be an example of a highest priority command (e.g., a host read command). The number of commands in the reference queue may represent a number of commands that may be issued and / or allocated to a set of die-specific resources. For example, priority queue 2 may contain a single command, thereby indicating that the single command may be issued and / or allocated to a set of die-specific resources.

[0075] Priority queue 1 may include commands 430-a, 430-b, and 430-c. In some embodiments, commands 430-a, 430-b, and 430-c may each be an instance of an internal read command. In such embodiments, priority queue 1 may be a dedicated queue for read commands. A dedicated read queue may be assigned for each individual die (e.g., memory die 405-c). In some examples, commands 430-a, 430-b, and 430-c may be issued after command 410-c in priority queue 2 based on the priority of the queue. For example, the priority of the queue may be based on the type of command. For example, a host read command (e.g., command 410-c) may be a higher priority to be issued than an internal read command (e.g., command 430-a, 430-b, and 430-c). In some embodiments, priority queue 1 may contain four commands (e.g., commands 430-a, 430-b, and 430-c and command 410-c). Commands contained in priority queue 1 may be assigned to a set of die-specific resources.

[0076] Priority queue 0 may include command 420-c. In some embodiments, command 420-c may be an instance of other internal commands (e.g., a write command or an erase command). In such embodiments, command 420-c may be issued after commands 430-a, 430-b, and 430-c in priority queue 1 based on the priority of the queue. For example, internal read commands (e.g., commands 430-a, 430-b, and 430-c) may be higher priority to be issued than other internal commands (e.g., command 420-c). In some examples, since allocated entry 435 is associated with a read command, the transfer queue cannot contain an allocated entry for command 420-c. In such embodiments, command 420-c may be transmitted to an unallocated entry in unallocated entries 445 in the transfer queue. In some embodiments, priority queue 0 may contain five commands. In some embodiments, command 420-c may be allocated to a read command based on a set of die-specific resources and not allocated to a set of die-specific resources.

[0077] In some examples, commands 430-a, 430-b, and 430-c may be placed in a reference queue (e.g., priority queue 1) based on the order in which they were received from the host system. The translation manager may issue commands 430-a, 430-b, and 430-c, and then the translation manager may transfer commands 430-a, 430-b, and 430-c from the reference queue to entries in a transfer queue. For example, command 430-a may be placed in entry 435-f, command 430-b may be placed in entry 435-g, and command 430-c may be placed in entry 435-h. In such embodiments, commands 430-a, 430-b, and 430-c may be placed in the transfer queue based on an order of priority of the commands, an order in which the commands are received from the host system (e.g., an order in which they are placed in the reference queue), based on memory die 405-c, or a combination thereof.

[0078] In some embodiments, entries 435-a to 435-h may be reserved for read commands. For example, the number of entries in the transfer queue reserved for read commands may be equal to the number of memory dies. In some embodiments, the translation manager may allocate entries for die-specific resources. For example, the transfer queue may include allocated entries 440-a, 440-b, and 440-c and unallocated entries 445-a, 445-b, and 445-c. Allocated entries 440-a, 440-b, and 440-c may include entries for read commands (e.g., commands 415, 425, and 430), while unallocated entries 445-a, 445-b, and 445-c may include entries for write commands, erase commands, or no commands (e.g., command 420).

[0079] Figure 55 is a block diagram of an example system that supports memory die resource management according to some examples of the present disclosure. Computer system 500 may include an instruction set for causing a machine to perform any one or more of the techniques described herein. In some examples, computer system 500 may correspond to a host system (e.g., a reference Figure 1 The host system 105 described herein includes a memory subsystem (e.g., reference Figure 1 The memory subsystem 110 described above, coupled to the memory subsystem or utilizing the memory subsystem, or may be used to perform operations of the controller (e.g., execute an operating system to perform operations corresponding to the reference Figure 1 In some examples, the machine may be connected (e.g., using a network) to other machines in a local area network (LAN), an intranet, an extranet, and / or the Internet. The machine may operate in the capacity of a server or a client machine in a client-server network environment, or in the capacity of a peer machine in a peer-to-peer (or distributed) network environment, or as a server or a client machine in a cloud computing infrastructure or environment.

[0080] The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular phone, a network appliance, a server, a network router, a switch or a bridge, or any machine capable of executing (sequentially or otherwise) a set of instructions that specify actions to be taken by the machine. Furthermore, while a single machine is described, the term "machine" may also include any collection of machines that individually or collectively execute one (or more) sets of instructions to perform any one or more of the methodologies discussed herein.

[0081] The example computer system 500 may include a processing device 505, a main memory 510 (e.g., ROM, flash memory, DRAM such as SDRAM or Rambus DRAM (RDRAM)), etc.), a static memory 515 (e.g., flash memory, static RAM (SRAM), etc.), and a data storage system 525, which communicate with each other via a bus 545.

[0082] Processing device 505 represents one or more general purpose processing devices, such as a microprocessor, a central processing unit, etc. More specifically, the processing device can be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, or a processor that implements other instruction sets, or a processor that implements a combination of instruction sets. Processing device 505 can also be one or more special purpose processing devices, such as an ASIC, FPGA, DSP, network processor, etc. Processing device 505 is configured to execute instructions 535 for performing the operations and steps discussed herein. Computer system 500 may further include a network interface device 520 to communicate on a network 540.

[0083] The data storage system 525 may include a machine-readable storage medium 530 (also referred to as a computer-readable medium) having stored thereon one or more sets of instructions 535 or software embodying any one or more of the methods or functions described herein. The instructions 535 may also reside, completely or at least partially, within the main memory 510 and / or within the processing device 505 during execution by the computer system 500, the main memory 510 and the processing device 505 also constituting machine-readable storage media. The machine-readable storage medium 530, the data storage system 525, and / or the main memory 510 may correspond to a memory subsystem.

[0084] In one example, instructions 535 include instructions for implementing a resource manager 550 (eg, reference Figure 1 The term "machine-readable storage medium" may include any medium capable of storing or encoding a set of instructions for execution by a machine and causing the machine to perform any one or more of the methods of the present disclosure. The term "machine-readable storage medium" may include, but is not limited to, solid-state memory, optical media, and magnetic media.

[0085] Some portions of the previous detailed description have been presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means by which those skilled in the art of data processing can most effectively convey the substance of their work to other persons skilled in the art. An algorithm is here and generally considered to be a self-consistent sequence of operations that result in a desired result. An operation is one that requires physical manipulation of physical quantities. Typically (but not necessarily), these quantities take the form of electrical or magnetic signals that can be stored, combined, compared, and otherwise manipulated. It has been demonstrated that it is sometimes convenient, primarily for common reasons, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, and the like.

[0086] It should be borne in mind, however, that all of these and similar terms will be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. The present disclosure may be directed to the actions and processes of a computer system or similar electronic computing device that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system's memories or registers or other such information storage systems.

[0087] The present disclosure also relates to an apparatus for performing the operations described herein. This apparatus may be specially constructed for the desired purpose, or it may comprise a general purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk (including floppy disks, optical disks, CD-ROMs, and magnetic optical disks), ROM, RAM, EPROM, EEPROM, magnetic or optical cards, or any type of medium suitable for storing electronic instructions, each coupled to a computer system bus.

[0088] The algorithms and displays presented herein are not inherently related to any particular computer or other device. Various general purpose systems may be used in conjunction with the programs according to the teachings herein, or it may prove convenient to construct a more specialized device to perform the method. The structures of various such systems will be presented as set forth in the description below. In addition, the present disclosure is described without reference to any particular programming language. It should be appreciated that the teachings of the present disclosure as described herein may be implemented using various programming languages.

[0089] The present disclosure may be provided as a computer program product or software, which may include a machine-readable medium having stored thereon instructions that can be used to program a computer system (or other electronic device) to perform a process according to the present disclosure. A machine-readable medium includes any mechanism for storing information in a form readable by a machine (e.g., a computer). In some examples, a machine-readable (e.g., computer-readable) medium includes a machine (e.g., computer) readable storage medium, such as ROM, RAM, magnetic disk storage media, optical storage media, flash memory components, etc.

[0090] In the foregoing description, examples of the present disclosure have been described with reference to specific illustrative examples thereof. It will be apparent that various modifications may be made to the present disclosure without departing from the broader spirit and scope of the examples of the present disclosure as set forth in the appended claims. Therefore, the description and drawings should be viewed in an illustrative rather than a restrictive sense.

Claims

1. A method for memory die resource management, comprising: determining a set of die-specific resources for a memory die among a plurality of memory dies of a memory subsystem from a set of global resources for the plurality of memory dies of the memory subsystem, the set of die-specific resources being allocated for a plurality of read commands for the memory die; assigning a read command of the plurality of read commands to a die-specific resource of the set of die-specific resources based at least in part on the die-specific resource being available; refraining from assigning the read command to the die-specific resource based at least in part on the die-specific resource being unavailable; and The read command in the plurality of read commands is assigned to a resource from the set of global resources based at least in part on avoiding assigning the read command to the die-specific resource.

2. The method according to claim 1, further comprising: determining availability of the resource from the set of global resources based at least in part on the die-specific resource being unavailable, wherein Assigning the read command to the resource from the set of global resources is based at least in part on determining the availability of the resource from the set of global resources.

3. The method according to claim 1, further comprising: receiving a write request for a write operation to the memory die; and Assigning a write command for the write operation to the die-specific resource is avoided based at least in part on the die-specific resource in the set of die-specific resources being allocated for the plurality of read commands for the memory die.

4. The method according to claim 1, further comprising: receiving an erase request for an erase operation for the memory die; and Avoiding assigning an erase command for the erase operation to the die-specific resource based at least in part on the die-specific resource in the set of die-specific resources being allocated for the plurality of read commands for the memory die.

5. The method according to claim 1, further comprising: receiving a read request for a read operation for the memory die; and The read command for the read operation is issued after assigning the read command to the die-specific resources based at least in part on the read request.

6. The method according to claim 5, further comprising: assigning the read command to a reference queue; and The read command is transferred to a transfer queue based at least in part on issuing the read command for the read operation.

7. The method according to claim 1, further comprising: The set of die-specific resources for the plurality of read commands are allocated to the memory die based at least in part on a state of a central processing unit for the memory subsystem.

8. The method of claim 7, wherein allocating the set of die-specific resources to the memory die is based at least in part on a command type, the command type comprising the read command.

9. The method of claim 7, wherein the set of global resources for the plurality of memory dies of the memory subsystem are allocated to the plurality of memory dies prior to receiving the read command.

10. The method according to claim 1, further comprising: determining an address at which the read command is addressed to the memory die; and An operating mode of the memory die is changed based at least in part on determining that the read command is addressed to the memory die, wherein the operating mode of the memory die is changed before determining whether to assign the read command to the die-specific resource.

11. A memory system comprising: multiple memory components; and a processing device operatively coupled to the plurality of memory components and configured to: allocating a set of die-specific resources for a plurality of read commands for a memory die of a memory subsystem, the set of die-specific resources being determined from a set of global resources for a plurality of memory die of the memory subsystem; determining whether to assign a read command of the plurality of read commands to a die-specific resource of the set of die-specific resources based at least in part on an availability of the die-specific resource; and The read command of the plurality of read commands is assigned to the resource from the set of global resources based at least in part on the die-specific resource being unavailable.

12. The memory system of claim 11, further comprising: The processing device is used for: Resources from the set of global resources are allocated based at least in part on the resources that are specific to the die being unavailable.

13. The memory system of claim 11, further comprising: The processing device is used for: receiving a write request for a write operation to the memory die; and Assigning a write command for the write operation to any one of the set of die-specific resources is avoided based at least in part on the set of die-specific resources being allocated for the plurality of read commands.

14. The memory system of claim 11, further comprising: The processing device is used for: receiving an erase request for an erase operation on the memory die; and Assigning an erase command for the erase operation to any one of the set of die-specific resources is avoided based at least in part on the set of die-specific resources being allocated for the plurality of read commands.

15. The memory system of claim 11, further comprising: The processing device is used for: The set of die-specific resources is allocated for the plurality of read commands for the memory die based at least in part on a status of a central processing unit for the memory subsystem.

16. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to: determining a set of die-specific resources for a memory die among a plurality of memory dies of a memory subsystem from a set of global resources for the plurality of memory dies of the memory subsystem, the set of die-specific resources being allocated for a plurality of read commands for the memory die; assigning a read command of the plurality of read commands to a die-specific resource of the set of die-specific resources based at least in part on the die-specific resource being available; refraining from assigning the read command to the die-specific resource based at least in part on the die-specific resource being unavailable; and The read command in the plurality of read commands is assigned to a resource from the set of global resources based at least in part on avoiding assigning the read command to the die-specific resource.

17. The non-transitory computer-readable storage medium of claim 16, wherein the processing device is further configured to: determining availability of the resource from the set of global resources based at least in part on the die-specific resource being unavailable, wherein Assigning the read command to the resource from the set of global resources is based at least in part on determining the availability of the resource from the set of global resources.

18. The non-transitory computer-readable storage medium of claim 16, wherein the processing device is further configured to: receiving a write request for a write operation to the memory die; and Assigning a write command for the write operation to the die-specific resource is avoided based at least in part on the die-specific resource in the set of die-specific resources being allocated for the plurality of read commands for the memory die.

19. The non-transitory computer-readable storage medium of claim 16, wherein the processing device is further configured to: receiving an erase request for an erase operation on the memory die; and Avoiding assigning an erase command for the erase operation to the die-specific resource based at least in part on the die-specific resource in the set of die-specific resources being allocated for the plurality of read commands for the memory die.

20. The non-transitory computer-readable storage medium of claim 16, wherein the processing device is further configured to: The set of die-specific resources for the plurality of read commands are allocated to the memory die based at least in part on a status of a central processing unit for the memory subsystem.

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