A deep Schottky power device with buried layer structure and preparation method thereof

Abstract

The present invention provides a deep Schottky power device with a buried layer structure and a preparation method thereof. The device comprises: a substrate layer; a buffer layer arranged on the upper side of the substrate layer; at least one buried layer, the buried layer arranged on the upper side of the buffer layer, the buried layer width being smaller than the buffer layer width; a drift layer arranged on the upper side of the buffer layer, the buried layer arranged between the buffer layer and the drift layer, the drift layer being provided with at least one drift groove; at least one insulating polysilicon layer, the insulating polysilicon layer being arranged in the drift groove, the insulating polysilicon layer being provided with a polysilicon groove; at least one Schottky contact electrode, the Schottky contact electrode being arranged in the polysilicon groove; an anode arranged on the drift layer and connected to the insulating polysilicon layer and the Schottky contact electrode; a cathode connected to the lower side of the substrate layer, thereby solving the problem of excessively large device cell area.

Description

Technical Field

[0001] The invention relates to a deep Schottky power device with a buried layer structure and a preparation method thereof. Background Art

[0002] As a wide-bandgap semiconductor device, SiC Schottky barrier diodes are primarily replacing Si devices in power electronics. They suppress device leakage and increase device breakdown voltage in power electronics. Currently, commercialized SiC Schottky barrier diodes are widely used in various high-frequency switching power supplies, power factor correction, and motor drives. When used in conjunction with power MOSFETs, switching frequencies can reach 600kHz, with potential for exceeding 1MHz. Some companies are using SiC Schottky barrier diodes in place of Si fast recovery diodes in IGBT frequency conversion or inverter devices to increase profitability.

[0003] In recent years, with the continuous development of power electronics systems, higher requirements have been placed on the power devices in the systems. Due to the limitations of the materials themselves, Si-based power electronic devices can no longer meet the requirements of system applications. Silicon carbide (SiC), a representative of third-generation semiconductor materials, has many properties far superior to Si materials. SiC MOSFETs, commercialized in recent years, have great potential to replace existing IGBTs in terms of on-resistance, switching time, switching losses, and heat dissipation performance. However, due to the large bandgap of SiC materials, the turn-on voltage of the parasitic PiN diode integrated within the MOSFET is mostly around 3V, which cannot provide freewheeling for the MOSFET device itself. Therefore, in power electronics system applications such as full-bridge systems, a Schottky diode is often connected in anti-parallel as a freewheeling diode, which greatly increases the system area. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a deep Schottky power device with a buried layer structure and a preparation method thereof, so as to solve the problem that the Schottky junction area of the MOSFET device of the traditional integrated junction barrier Schottky diode is too large, resulting in an excessively large area of the entire device cell.

[0005] One of the present inventions is achieved as follows: a deep Schottky power device with a buried layer structure, comprising:

[0006] a substrate layer;

[0007] a buffer layer, the buffer layer being disposed on an upper side of the substrate layer;

[0008] at least one buried layer, the buried layer being disposed on an upper side of the buffer layer, the buried layer having a width smaller than that of the buffer layer;

[0009] a drift layer, wherein the drift layer is disposed on an upper side of the buffer layer, the buried layer is disposed between the buffer layer and the drift layer, and at least one drift groove is disposed on the drift layer;

[0010] At least one insulating polysilicon layer, wherein the insulating polysilicon layer is disposed in the drift groove and has a polysilicon groove;

[0011] at least one Schottky contact electrode, wherein the Schottky contact electrode is disposed in the polysilicon groove;

[0012] an anode disposed on the drift layer and connected to the insulating polysilicon layer and the Schottky contact electrode;

[0013] A cathode is connected to the lower side of the substrate layer.

[0014] Furthermore, the buffer layer has a thickness of 2 μm to 3 μm, and is made of N-ion-doped 4H-SiC.

[0015] Furthermore, the buried layer has a thickness of 0.1 μm to 0.2 μm, a length of 1 μm to 3 μm, and is made of P-ion doped 4H-SiC.

[0016] Furthermore, the drift layer has a thickness of 5 μm to 15 μm, and is made of N-ion-doped 4H-SiC.

[0017] Furthermore, the insulating polysilicon layer has a thickness of 0.8 μm to 1 μm and a width of 0.5 μm to 1.5 μm.

[0018] Furthermore, the material of the Schottky contact electrode is Ti / Ni / Ag metal.

[0019] Furthermore, the material of the anode is Ti / Ni / Ag metal.

[0020] Furthermore, the cathode material is Ti / Ni / Ag metal.

[0021] The second aspect of the present invention is achieved as follows: a method for preparing a deep Schottky power device with a buried layer structure, comprising the following steps:

[0022] 1) forming a buffer layer on the substrate layer by epitaxial growth;

[0023] 2) Preparing a SiO2 mask layer on the buffer layer, forming a mask pattern by photolithography and etching, and then forming a buried layer structure by ICP etching;

[0024] 3) Cleaning the implantation mask layer, re-forming a new mask layer on the surface, forming a new mask pattern by photolithography, and forming a buried layer by Al ion implantation;

[0025] 4) Activate the implanted ions by high-temperature annealing and remove the carbon film by oxidation;

[0026] 5) performing epitaxial growth on the surface of the buffer layer and the surface of the buried layer to form a drift layer;

[0027] 6) Preparing a SiC mask layer on the surface of the drift layer and forming a Schottky electrode pattern using a photolithography and etching process;

[0028] 7) Using ICP etching to form a polysilicon filling groove, and depositing an insulating polysilicon layer;

[0029] 8) Cleaning the mask, removing the mask layer, and preparing a new mask layer on the surface, and photolithographically etching the Schottky electrode pattern;

[0030] 9) etching a Schottky contact anode structure using an ICP method, and forming a Schottky contact electrode using a metal deposition process;

[0031] 10) Clean the mask layer and form thick electrodes on the back and surface by depositing metal.

[0032] The advantages of the present invention are as follows: the present invention provides a deep Schottky power device with a buried layer structure and a preparation method thereof, solves the problem that the Schottky junction area of a MOSFET device of a traditional integrated junction barrier Schottky diode is too large, resulting in an excessively large cell area of the entire device; a freewheeling function can be provided for the MOSFET device itself; the buried layer can effectively suppress anode leakage, expand the space charge region of the device, and achieve the effect of increasing the breakdown voltage of the device; and when turned on, since the buried layer has little effect on the conduction characteristics of the device, the device can obtain a larger Baliga figure of merit. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0034] Figure 1 The figure is a cross-sectional schematic diagram of a deep Schottky power device with a buried layer structure according to the present invention.

[0035] Figure 2 Schematic diagram of the preparation process of a deep Schottky power device with a buried layer structure of the present invention Figure 1 .

[0036] Figure 3 Schematic diagram of the preparation process of a deep Schottky power device with a buried layer structure of the present invention Figure 2 .

[0037] Figure 4 Schematic diagram of the preparation process of a deep Schottky power device with a buried layer structure of the present invention Figure 3 .

[0038] Figure 5 Schematic diagram of the preparation process of a deep Schottky power device with a buried layer structure of the present invention Figure 4 .

[0039] Figure 6 Schematic diagram of the preparation process of a deep Schottky power device with a buried layer structure of the present invention Figure 5 .

[0040] Figure 7 Schematic diagram of the preparation process of a deep Schottky power device with a buried layer structure of the present invention Figure 6 . DETAILED DESCRIPTION

[0041] See also Figure 1 As shown, the present invention provides a deep Schottky power device with a buried layer structure, comprising:

[0042] A substrate layer 1, which is an N+ substrate with a doping concentration of 5×10 18 cm -3 Made of SiC material, thickness 350μm;

[0043] a buffer layer 2, the buffer layer 2 being disposed on the upper side of the substrate layer 1, the buffer layer 2 having a thickness of 2 μm to 3 μm and made of N-ion-doped 4H-SiC;

[0044] At least one buried layer 3, the buried layer 3 is provided on the upper side of the buffer layer 2, the width of the buried layer 3 is smaller than the width of the buffer layer 2, the buried layer 3 has a thickness of 0.1 μm to 0.2 μm, a length of 1 μm to 3 μm, and is made of P-ion-doped 4H-SiC;

[0045] a drift layer 4, the drift layer 4 being disposed on an upper side of the buffer layer 2, the buried layer 3 being disposed between the buffer layer 4 and the drift layer 2, the drift layer 2 being provided with at least one drift groove (not shown), the drift layer 4 being 5 μm to 15 μm thick and made of N-ion-doped 4H-SiC;

[0046] At least one insulating polysilicon layer 5, the insulating polysilicon layer 5 is disposed in the drift groove, the insulating polysilicon layer 5 is provided with a polysilicon groove (not shown), the insulating polysilicon layer 5 has a thickness of 0.8 μm to 1 μm, and a width of 0.5 μm to 1.5 μm;

[0047] At least one Schottky contact electrode 6, wherein the Schottky contact electrode 6 is provided in the polysilicon groove, and the material of the Schottky contact electrode is Ti / Ni / Ag metal;

[0048] an anode 7, the anode 7 being disposed on the drift layer 4 and connected to the insulating polysilicon layer 5 and the Schottky contact electrode 6, the anode 7 being made of Ti / Ni / Ag metal;

[0049] A cathode 8 is connected to the lower side of the substrate layer 1 , and the material of the cathode 8 is Ti / Ni / Ag metal.

[0050] Its preparation method:

[0051] In the first step, a buffer layer 2 is formed on the substrate layer 1 by epitaxial growth, and the buffer layer thickness is 3 μm;

[0052] In the second step, a SiC mask layer with a thickness of 2 μm is deposited on the buffer layer 2. A mask pattern is formed by photolithography and etching. Then, the buried layer 3 structure is formed by ICP etching.

[0053] The third step is to clean the mask layer and perform Al ion implantation on the buried structure to form a 2μm thick p+ type structure with a doping concentration of 5x1018 cm-1;

[0054] The fourth step is to activate the implanted ions by high temperature annealing at 1650°C for 45 minutes.

[0055] Step 5: Epitaxial growth of SiC is performed on the surface of the buffer layer 2 and the buried layer 3 to form a drift region 4 with a thickness of 10 μm and a doping concentration of 5×10 15 cm -1 ;

[0056] Step 6: deposit a polysilicon SiC mask layer on the surface of the drift region 4 with a mask thickness of 2 μm, photolithographically etch out a mask pattern, and etch out an insulating polysilicon region by ICP.

[0057] Step 7: Deposit highly doped polysilicon by CVD method, and form polysilicon gate electrode by photolithography and etching;

[0058] Step 8: Protect the back side, remove the metal layer on the front side, etch to form the anode electrode window and Schottky contact window, deposit Schottky metal Ti and thick metal Al, form electrode patterns through photolithography and etching, and form Schottky contacts in the Schottky area through low-temperature rapid thermal annealing at 700°C for 2 minutes.

[0059] In the ninth step, a back electrode is formed on the back by depositing Ti / Ni / Ag metal.

[0060] See also Figures 2 to 7 As shown, the present invention provides a method for preparing a deep Schottky power device with a buried layer structure, comprising the following steps:

[0061] 1) forming a buffer layer 2 on the substrate layer 1 by epitaxial growth;

[0062] 2) Preparing a SiO2 mask layer on the buffer layer 2, forming a mask pattern by photolithography and etching, and then forming a buried layer structure by ICP etching;

[0063] 3) Cleaning the implantation mask layer, re-forming a new mask layer on the surface, forming a new mask pattern by photolithography, and forming a buried layer by Al ion implantation;

[0064] 4) Activate the implanted ions by high-temperature annealing and remove the carbon film by oxidation;

[0065] 5) epitaxially growing a drift layer 4 on the surface of the buffer layer 2 and the surface of the buried layer 3;

[0066] 6) A SiC mask layer is prepared on the surface of the drift layer 4, and a Schottky electrode pattern is formed by photolithography and etching;

[0067] 7) Using ICP etching to form a polysilicon filling groove, and depositing an insulating polysilicon layer 5;

[0068] 8) Cleaning the mask, removing the mask layer, and preparing a new mask layer on the surface, and photolithographically etching the Schottky electrode pattern;

[0069] 9) Using an ICP method to etch a Schottky contact anode structure, and using a metal deposition process to form a Schottky contact electrode 6;

[0070] 10) Cleaning the mask layer, and forming thick electrodes, namely, the anode 7 and the cathode 8, on the back and the surface by a metal deposition process.

[0071] Although the specific embodiments of the present invention are described above, those skilled in the art should understand that the specific embodiments described are merely illustrative and are not intended to limit the scope of the present invention. Equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present invention should be included within the scope of protection of the claims of the present invention.

Claims

1. A deep Schottky power device with a buried layer structure, characterized in that: include: a substrate layer; a buffer layer, the buffer layer being disposed on an upper side of the substrate layer; at least one buried layer, the buried layer being disposed on an upper side of the buffer layer, the buried layer having a width smaller than that of the buffer layer; a drift layer, wherein the drift layer is disposed on an upper side of the buffer layer, the buried layer is disposed between the buffer layer and the drift layer, and at least one drift groove is disposed on the drift layer; At least one insulating polysilicon layer, wherein the insulating polysilicon layer is disposed in the drift groove and has a polysilicon groove; at least one Schottky contact electrode, wherein the Schottky contact electrode is disposed in the polysilicon groove; an anode disposed on the drift layer and connected to the insulating polysilicon layer and the Schottky contact electrode; A cathode is connected to the lower side of the substrate layer.

2. The deep Schottky power device with a buried layer structure according to claim 1, characterized in that: The buffer layer has a thickness of 2 μm to 3 μm and is made of N-ion doped 4H-SiC.

3. The deep Schottky power device with a buried layer structure according to claim 1, wherein: The buried layer has a thickness of 0.1 μm to 0.2 μm, a length of 1 μm to 3 μm, and is made of P-ion doped 4H-SiC.

4. The deep Schottky power device with a buried layer structure according to claim 1, wherein: The drift layer has a thickness of 5 μm to 15 μm and is made of N-ion-doped 4H-SiC.

5. The deep Schottky power device with a buried layer structure according to claim 1, wherein: The insulating polysilicon layer has a thickness of 0.8 μm to 1 μm and a width of 0.5 μm to 1.5 μm.

6. The deep Schottky power device with a buried layer structure according to claim 1, characterized in that: The material of the Schottky contact electrode is Ti / Ni / Ag metal.

7. The deep Schottky power device with a buried layer structure according to claim 1, characterized in that: The material of the anode is Ti / Ni / Ag metal.

8. The deep Schottky power device with a buried layer structure according to claim 1, wherein: The cathode is made of Ti / Ni / Ag metal.

9. A method for preparing a deep Schottky power device with a buried layer structure, characterized in that: The steps include: 1) forming a buffer layer on the substrate layer by epitaxial growth; 2) Preparing a SiO2 mask layer on the buffer layer, forming a mask pattern by photolithography and etching, and then forming a buried layer structure by ICP etching; 3) Cleaning the implantation mask layer, re-forming a new mask layer on the surface, forming a new mask pattern by photolithography, and forming a buried layer by Al ion implantation; 4) Activate the implanted ions by high-temperature annealing and remove the carbon film by oxidation; 5) performing epitaxial growth on the surface of the buffer layer and the surface of the buried layer to form a drift layer; 6) Preparing a SiC mask layer on the surface of the drift layer and forming a Schottky electrode pattern using a photolithography and etching process; 7) Using ICP etching to form a polysilicon filling groove, and depositing an insulating polysilicon layer; 8) Cleaning the mask, removing the mask layer, and preparing a new mask layer on the surface, and photolithographically etching the Schottky electrode pattern; 9) etching a Schottky contact anode structure using an ICP method, and forming a Schottky contact electrode using a metal deposition process; 10) Clean the mask layer and form thick electrodes on the back and surface by depositing metal.

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