Universal Input Voltage Sensing System for Flyback Converters

Abstract

The present invention is entitled "Universal Input Voltage Detection System for Flyback Converter." The present invention discloses a universal input voltage detection system for a flyback converter, the flyback converter having a transformer coupled between the input and output of the flyback converter. The transformer includes a primary winding coupled to the input of the flyback converter to receive an input voltage and a secondary winding coupled to the output of the flyback converter. The universal input voltage detection system includes a controller coupled to a switch on the primary winding side of the transformer. The switch is coupled to the primary winding of the transformer and generates a current through the primary winding when the switch is turned on. The controller is configured to operate in a continuous conduction mode (CCM) or in a discontinuous conduction mode (DCM), and indirectly detects the input voltage of the flyback converter based on the current through the primary winding generated when the switch is turned on.

Description

Technical Field

[0001] The present application relates generally to power supplies, and more particularly to detecting and monitoring the magnitude and shape of an input voltage waveform to indirectly sense the input voltage of a switching power converter. Background Art

[0002] A flyback converter is designed to receive unregulated alternating current (AC) input power and provide regulated output power to a load, such as an electronic device. Typically, a low frequency AC power source (e.g., 90 volts-270 volts AC (VAC) at 50 hertz-65 hertz (Hz)) is rectified to provide an unregulated direct current (DC) power source that is input to the power conversion stage of the flyback converter. This power stage, in turn, provides regulated DC power to the load.

[0003] The rectifier converts the AC input voltage from the AC input source into an unregulated DC input voltage. The power conversion stage is coupled to receive the unregulated DC input voltage from the rectifier and then provide a regulated DC output voltage to the load. The rectifier may be a bridge rectifier that provides full-wave rectification of the AC input voltage. In addition, the unregulated DC input voltage may be filtered using a bulk capacitor that is coupled to the output of the rectifier and the input of the power conversion stage.

[0004] The power conversion stage includes a transformer that provides galvanic isolation between its primary side and its secondary side. The power conversion stage also includes a primary side switch that is used to control the primary winding current conducted by the primary winding of the transformer. A switch controller controls the on-time and off-time of the primary side switch to regulate the power delivery to the load at the secondary side of the transformer. When the primary side switch is turned on, energy from the unregulated DC input voltage is stored in the gap of the transformer, and when the primary side switch is turned off, the energy is transferred to the load. The switch controller controls the switch to be turned on or off by an on-time or an off-time, and the on-time or the off-time is adjusted at the operating frequency of the power converter according to the adopted regulation scheme (such as pulse width modulation and / or pulse frequency modulation) to regulate the DC output voltage provided to the load. Therefore, the controller can modify the on-time and off-time of the primary side switch based on a feedback signal (e.g., reflecting the output voltage) to provide a regulated DC output voltage provided to the load.

[0005] In many cases, a flyback converter is required to operate within a "universal input range" to enable global operation of electronic devices. For a given on-time and off-time of the switch, variations in the AC input can result in variations in the regulated DC output voltage provided to the load. Figure 1AAn exemplary universal AC input operating range (V IN-AC ) waveform. As mentioned above, the bridge rectifier converts the AC input V IN-AC The input voltage is converted to an unregulated DC input voltage and the bulk capacitor filters the unregulated DC input voltage. Figure 1B Shown with Figure 2 The AC input voltage V IN-AC The range corresponds to the unregulated DC input voltage operating range (V IN-DC The resulting DC input voltage of the power conversion stage is effectively reduced from the minimum value (V IN-MIN ) extends to the maximum value (V IN-MAX ).

[0006] To ensure proper operation, the flyback converter is expected to monitor the DC input voltage to the power stage. In conjunction with monitoring the DC input voltage, if the DC input voltage deviates from the specified operating range (e.g., exceeds V IN-MAX or drops below V IN-MIN ) and / or if the flyback converter has been decoupled from the AC input voltage source, additional protection and safety features may be included.

[0007] Figure 2 An exemplary block diagram of a conventional flyback converter 200 is shown, wherein the waveform of the unregulated DC input voltage 202 is similar to Figure 1B The waveform shown is consistent. As shown, the bridge rectifier 204 is coupled to the AC mains (not shown), and the input bulk capacitor 206 is coupled across the output of the bridge rectifier 204 to filter the unregulated DC input voltage 202. The unregulated DC input voltage 202 is input to a power conversion stage 208, which includes a transformer 210, a controller 212, and a primary side switch SW. The controller 212 regulates the DC output voltage 214 on the load 216 by controlling the on time and off time (e.g., duty cycle) of the primary side switch SW. The controller 212 provides a voltage sense pin V IN (“V IN The unregulated DC input voltage 202 is sensed at the V pin of the controller 212. IN Monitoring of the magnitude of the unregulated DC input voltage 202 at the pin enables detection of undervoltage conditions and AC source loss conditions (eg, due to decoupling of the AC source from the rectifier 204 ).

[0008] The undervoltage condition represents a potential damage condition for the flyback converter 200, especially when operating in an area where the AC power source is unreliable. In an undervoltage condition, the AC input voltage drops to a level below the specified operating range (e.g., 90VAC-270VAC). For example, in an area where the AC input voltage range is 90VAC to 130VAC, an undervoltage condition exists when the AC input voltage drops below 90VAC. Therefore, the unregulated DC input voltage 202 input to the power conversion stage 208 may drop below the specified operating range. Continuing to operate under an undervoltage condition may result in many undesirable results, including increased heat, component failure and damage to the components of the flyback converter 200, and damage to the load 216 caused by the loss of regulation of the regulated DC output voltage 214. Typically, the undervoltage condition is short-lived and lasts only a few AC cycles. However, when the undervoltage condition lasts for a longer period of time, the power supply may suffer permanent damage.

[0009] Unfortunately, the V IN This direct sensing of the DC input voltage 202 at the pin increases cost because the controller 212 will require high voltage circuitry to properly process the DC input voltage 202. Thus, there is a need in the art for an improved flyback power converter that does not require direct sensing of the DC input voltage. Summary of the invention

[0010] The present invention discloses a universal input voltage detection system for a flyback converter, wherein the flyback converter has a transformer coupled between an input terminal and an output terminal of the flyback converter. The transformer comprises a primary winding coupled to the input terminal of the flyback converter to receive an input voltage and a secondary winding coupled to the output terminal of the flyback converter. The universal input voltage detection system includes: a first comparator configured to assert a first comparator output signal in response to a sense resistor voltage being greater than an adaptive threshold voltage, wherein the sense resistor voltage is generated by a primary winding current through the sense resistor; a second comparator configured to assert a second comparator output signal in response to the sense resistor voltage being greater than a peak primary current threshold voltage, wherein the adaptive threshold voltage is equal to the peak primary current threshold voltage minus an offset; a voltage threshold time detector configured to determine a threshold time from the assertion of the first comparator output signal to the assertion of the second comparator output signal; and a controller for controlling cycling of a primary side switch to regulate an output voltage of the flyback converter, wherein the controller is configured to open the primary side switch in response to the assertion of the second comparator output signal; and wherein the controller is further configured during a discontinuous conduction mode to: determine a voltage gradient of the sense resistor voltage over time based on the threshold time, and determine an input voltage to the flyback converter based on the voltage gradient over time and a magnetizing inductance of a transformer of the flyback converter.

[0011] Other devices, apparatus, systems, methods, features and advantages of the present invention will or will become apparent to those skilled in the art upon reviewing the following drawings and detailed description. It is intended that all such additional devices, apparatus, systems, methods, features and advantages be included within this specification, be within the scope of the present invention, and be protected by the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The present invention may be better understood by referring to the following drawings. The components in the drawings are not necessarily drawn to scale, but emphasis is placed on illustrating the principles of the present invention. In the drawings, similar reference numerals indicate corresponding parts throughout the different views.

[0013] Figure 1A The universal AC input operating range (V IN-AC ) of a known example.

[0014] Figure 1B Shown with Figure 1A V IN-ACWaveform of a known example of an unregulated DC operating range corresponding to the range.

[0015] Figure 2 A known example of a block diagram of a flyback power supply is shown, wherein the unregulated DC voltage waveform is Figure 1B The waveforms shown are consistent.

[0016] Figure 3 An example of an implementation of a flyback power converter utilizing indirect sensing of an unregulated DC voltage is shown.

[0017] Figure 4 Exemplary operating waveforms of current through the primary side of a transformer of a flyback power converter are shown.

[0018] Figure 5 is a controller according to the present disclosure (in Figure 3 A block diagram of an example of an implementation scheme of the invention is shown in FIG.

[0019] Figure 6 A graph showing an example of waveforms associated with operation of a universal input voltage detection system according to the present disclosure.

[0020] Figure 7 is Figure 5 A block diagram of an example of an implementation of a voltage threshold time detector is shown in FIG.

[0021] Figure 8 is a method for generating a flag f according to the present disclosure ipeak The pulse and sign f imid Block diagram of the pulse subsystem.

[0022] The drawings depict various embodiments for purposes of illustration only. One skilled in the art will readily recognize from the following discussion that alternative embodiments of the structures and methods shown herein may be employed without departing from the principles of the invention described herein. DETAILED DESCRIPTION

[0023] The present invention provides a universal input voltage detection system for a flyback converter. The flyback converter includes a transformer having a primary winding connected to a primary-side power switch and a secondary winding coupled to the output of the flyback converter. The universal input voltage detection system includes a controller for controlling the cycle of the power switch. When the controller turns on the power switch, the primary winding current is conducted through the primary winding. The controller is configured to operate in a continuous conduction mode (CCM) or a discontinuous conduction mode (DCM). In both modes, the controller indirectly detects the input voltage of the flyback converter based on the primary winding current. The indirect detection of the input voltage avoids the need for relatively expensive high-voltage circuits (such as those provided by a circuit for detecting the input voltage of the flyback converter). Figure 2The dedicated voltage sensing pin V of the controller 212 is described IN The need for high voltage circuitry required to directly sense the input voltage).

[0024] Now go to Figure 3 , an exemplary flyback converter 300 (also referred to as a flyback power converter or a switching power converter) utilizing indirect sensing of a DC input voltage 302 is shown in accordance with the present disclosure. A controller 318 in the flyback converter 300 includes a universal input voltage detection system. The flyback power converter 300 includes a transformer 302 coupled between an input terminal 304 and an output terminal 306 of the flyback converter 300. The transformer 302 includes a primary winding 308 coupled to the input terminal 304 of the flyback converter 300 to receive an input voltage and a secondary winding 310 coupled to the output terminal 306 of the flyback converter 300.

[0025] Typically, an alternating current (AC) voltage signal from an AC power source (not shown) is injected into the input 304 of the flyback converter 300 and received at the rectifier 312. The rectifier 312 in turn provides a direct current (DC) input voltage on an input rail 314 to the primary winding 308 of the transformer 302. Typically, a bulk capacitor 316 is coupled from the input rail 314 to ground.

[0026] The controller 318 controls the cycle of the primary side power switch SW (e.g., MOSFET) on the primary winding side 320 of the transformer 302. The power switch SW conducts the primary winding current (as shown by arrow 322) into a sense resistor RS coupled between the power switch SW and ground. The controller 318 is configured to operate in a continuous conduction mode of operation (CCM) or a discontinuous conduction mode of operation (DCM), and is further configured to indirectly detect the input voltage 304 of the flyback converter 300 based on the waveform of the primary winding current. In order to control the off time of the power switch S2 in each switching cycle, the controller 318 detects the sense resistor voltage 324 at the node N1. The sense resistor voltage is a function of the primary winding current and the resistance R of the sense resistor. S To control the cycling of the power switch SW, the controller 312 generates a drive signal 326 .

[0027] When switch SW is turned on, power is stored in transformer 302 because diode D1 at secondary winding side 328 becomes reverse biased to prevent secondary winding current conduction. In an alternative embodiment, diode D1 can be replaced by a synchronous rectifier switching transistor to control the rectification of the secondary winding current. Then, when power switch SW is turned off during the "off" cycle, the power stored in transformer 302 is transferred across output capacitor C oTransferred to the load 330 because the diode D1 becomes forward biased (or from the turn-on of the synchronous rectifier switching transistor). During each cycle of the power switch S2, the controller 318 monitors the sense resistor voltage. When the sense resistor voltage reaches the peak primary current threshold voltage, the controller 381 turns off the power switch SW. Therefore, the peak primary current threshold voltage determines the peak primary winding current for each cycle of the power switch SW. During the pulse width modulation (PWM) operating mode, the controller 318 uses a feedback signal (not shown) derived from the output voltage 332 to determine the peak primary current threshold voltage. As the controller 318 increases or decreases the peak primary current threshold voltage, the peak primary winding current increases or decreases accordingly. In the pulse frequency mode (PFM) of operation, the peak primary current threshold voltage is fixed. In PFM operation, the controller 318 increases or decreases the switching frequency of the power switch SW to regulate the output voltage 332.

[0028] It should be noted that the controller 318 (with Figure 2 Unlike the controller 212 of FIG. 1 , FIG. 10A , FIG. 11A , and FIG. 11B , the controller 212 of FIG. 11A does not include a dedicated voltage sensing pin V for directly sensing the input voltage. IN Therefore, the controller 318 does not directly sense the input voltage. Instead, the controller 318 determines the magnitude of the input voltage 314 based on the waveform of the primary winding current to provide an indirect real-time measurement of the input voltage without the need for expensive detection equipment and circuits.

[0029] Regarding such indirect measurement of input voltage, it is known that controllers (such as controller 318) indirectly measure or determine the input voltage during a discontinuous conduction mode of operation (DCM). For example, Figure 4 Figure 2 shows some operating waveforms of the primary winding current during DCM operation. As shown in the figure, the peak primary winding current (I PK ) can be based on the T of the primary side switch SW during different cycles ON and T OFF The input voltage can then be determined indirectly from the peak current through the primary winding 308 using the following relationship:

[0030]

[0031] Here, L m is the magnetizing inductance of transformer 302, T ON is the on-time of the primary-side switch SW, and I PK is the peak value of the primary winding current 322. However, such conventional indirect determination of the input voltage is not applicable to the operation of the flyback converter 300 in a continuous conduction mode of operation (CCM), as will be further explained herein.

[0032] In order to provide CCM functionality, Figure 5 1 shows some aspects of the controller 318 for indirect measurement of input voltage during CCM operation. As shown, the controller 318 includes a PWM / PFM control module 500, which adjusts the switching frequency in PFM and the primary peak current in PWM mode, and a voltage threshold time detector 502. The voltage threshold time detector 502 is configured to measure the threshold time T imid , the threshold time is the difference between the first time when the sensing resistor voltage is equal to the adaptive threshold voltage and the second time when the sensing resistor voltage is equal to the peak primary current threshold voltage. The adaptive threshold is equal to the peak primary current threshold voltage minus the offset. imid There are three scenarios for indirectly determining the input voltage. Considering Figure 6 Some exemplary switching waveforms of the flyback converter 300 during CCM operation are shown to better understand these three scenarios. The waveforms include: Peak primary current threshold voltage (V ipk ) curve, adaptive threshold voltage (V imid ), the sense resistor voltage (V isns ) curve, the sensing resistor voltage V isns A flag signal (f ipeak ) curve, the sensing resistor voltage V isns rises to equal the adaptive threshold voltage V imid is asserted and the voltage across the sense resistor V isns A flag signal (f imid ), and the slope compensation flag signal (Slope cycle As is known in the art of flyback converters, slope compensation is performed to reduce the peak primary winding current (and thereby reduce the peak primary current threshold voltage V ipk ) for better stability. The on-time of any given cycle of the power switch SW has a maximum value or duty cycle. From the beginning of the on-time, slope compensation begins after a certain portion of the maximum on-time has expired. Then, slope compensation begins and continues until the maximum slope compensation time. Therefore, the slope compensation period is consistent with the slope compensation flag signal Slope cycle During each slope compensation cycle, the maximum sense resistor voltage V ipk According to the slope S e (which can also be specified as a descent rate) decreases.

[0033] Three scenarios occur with respect to the slope compensation cycle. In the first scenario (designated as Case 1), before the start of the slope compensation cycle, the sense resistor voltage V isns rises to a value equal to the peak primary current threshold voltage V ipk In the two remaining scenarios (designated as Case 2 and Case 3), during the slope compensation period, the sense resistor voltage V isns rises to a value equal to the peak primary current threshold voltage V ipk The difference between Case 2 and Case 3 depends on the time T of each slope compensation cycle. slope and threshold time T imid . Part T slope It starts at the beginning of the slope compensation cycle and the voltage V isns rises to a value equal to the peak primary current threshold voltage V ipk In case 2, time T slope Less than the threshold time T -imid In contrast, in case 3, time T slope Greater than the threshold time T imid .

[0034] Specifically, the slope compensation cycle is shown to start at time 604 for case 1, at time 606 for case 2, and at time 608 for case 3. The slope compensation cycle ends at times 610, 612, and 614 for case 1, case 2, and case 3, respectively. In case 1, the sense resistor voltage crosses the adaptive threshold at time 600 and reaches the peak primary current threshold voltage at time 602. In case 2, the sense resistor voltage crosses the adaptive threshold at time 618 and reaches the peak primary current threshold voltage at time 606. Finally, in case 3, the sense resistor voltage crosses the adaptive threshold at time 622 and reaches the peak primary current threshold voltage at time 620. Time threshold T imid The value of varies between these three cases, where for case 1, T imid is equal to the time difference between time 602 and time 600. In case 2, T imid is equal to the time difference between time 616 and time 618. Finally, in case 3, T imid Equal to the time difference between time 620 and time 622.

[0035] Thus, the scenario in Case 1 describes a situation where until the sense resistor voltage V isns has reached the peak primary current threshold voltage V ipk After that, the slope compensation on-time starts. Before the slope compensation on-time in Case 1, since the slope compensation has not started yet, the peak primary current threshold voltage Vipk In case 2 and case 3, the voltage V isns Reaching the peak primary current threshold voltage V ipk Previously, the slope compensation cycle on time has occurred. As discussed previously, the slope compensation T slope The length and threshold time T imid The length of is different between Case 2 and Case 3. The threshold time or period T imid The length is equal to the sign f imid When asserted, to flag f ipeak is asserted. Slope period T slope The length from the slope compensation mark Slope cyle When asserted, extends to flag f ipeak is asserted. Therefore, in Case 2, the sense resistor voltage V isns has reached the peak primary current threshold voltage V ipk , however, in case 3, the sensing resistor voltage V isns has reached the peak primary current threshold voltage V ipk Regarding Case 2 and Case 3, from the beginning of the slope compensation period (ie, time 606 and time 622), the slope distribution (reduction rate) S e Reduce the peak primary current threshold voltage V ipk When the voltage across the sensing resistor V isns Equal to the peak primary current threshold voltage V ipk The time at which the time t is t (i.e., at time 616 and time 620, respectively) is defined as T slope cycle. Figure 6 The descending slope distribution S e Shown are respectively between times 604 and 610 in case 1, between times 606 and 612 in case 2, and between times 608 and 614 in case 3.

[0036] In these examples, the adaptive threshold voltage V imid Equal to the peak primary current threshold voltage V ipk With adaptive voltage offset (V ioffset ). This relationship can be written as follows:

[0037] V ioffset =V ipk -V imid .

[0038] Sense resistor voltage V isns The voltage gradient over time is equal to the sense resistor voltage V isnsThe derivative with time (i.e. ). Thus, for case 1, the sensing resistor voltage V isns The voltage gradient over time is equal to the following:

[0039]

[0040] The voltage gradient over time Equal to the adaptive voltage offset V ioffset Divide by the threshold time T imid . For situation 2:

[0041]

[0042] The threshold time T imid Greater than the slope period T slope , and the voltage gradient over time Equal to the adaptive voltage offset V ioffset With slope period T slope Multiply by the slope distribution S e The difference is divided by the threshold time T imid . For situation 3:

[0043]

[0044] The slope period is T slope Greater than the threshold time T imid , and the voltage gradient over time Equal to the adaptive voltage offset V ioffset With threshold time T imid Multiply by the slope distribution S e The difference is divided by the threshold time T imid In general, Case 2 and Case 3 can be described by a general relationship defined as

[0045]

[0046] Where the voltage gradient over time is equal to the difference between the adaptive voltage offset and the minimum time value divided by the threshold time. The minimum time value is equal to the minimum of the slope period and the threshold time. Using these relationships, the input voltage can be calculated as the voltage gradient over time and magnetizing inductance L m The product of:

[0047]

[0048] It should be noted that the relatively large adaptive voltage offset V ioffset This usually results in better computational resolution and accuracy. However, if the adaptive voltage offset Vioffset If V is too large, the initial short-term pulse interference in the sense resistor voltage will unexpectedly cross the adaptive threshold voltage V imid For example, the sense resistor voltage has an initial short-time pulse interference 630 in case 1, a short-time pulse interference 632 in case 2, and a short-time pulse interference 634 in case 3. Therefore, the adaptive voltage offset V ioffset can be increased to achieve greater accuracy, but should not be increased so that these short-duration pulse disturbances produce the adaptive threshold voltage V imid As an example, the following method can be used based on the threshold time T imid and T on To select the adaptive voltage offset V ioffset : Default initial adaptive threshold voltage V imid Use the larger value; if T on –T imid Less than or equal to the blanking time (T blanking ), then for the adaptive threshold voltage V imid Use the smaller value; and if T on –T imid Greater than or equal to the blanking time T blanking Add the hysteresis time (T hysteresis ), then for the adaptive threshold voltage V imid Use a larger value. Similarly, T ON is the on time of the power switch SW described above. It should be noted that the presence of a blanking time after the power switch SW is turned off is a known technique so that short-time pulse interference 630, 632 and 634 does not cause the sense resistor voltage to erroneously rise above the peak primary current threshold voltage V ipk Therefore, the blanking time is extended over a relatively short period that starts when the power switch SW is turned off so that the sense resistor voltage is equal to the peak primary current threshold voltage V ipk Glitches are not taken into account in the comparison.

[0049] Go to Figure 7 , a block diagram of an exemplary voltage threshold time detector 502 according to the present disclosure is shown. The voltage threshold time detector 502 includes a threshold detector (such as a first comparator 700). The first comparator 700 is configured to determine when the sense resistor voltage reaches the adaptive threshold voltage V imid When the sensing resistor voltage reaches the adaptive threshold voltage V imid The output of the first comparator goes high. The voltage threshold time detector 502 may include a counter (not shown) that starts counting in response to the assertion of the output signal from the first comparator 700 and in response to the cycle of the clock signal to start counting the threshold time Timid The second comparator 702 compares the sensing resistor voltage with the peak primary current threshold voltage V ipk Therefore, when the sense resistor voltage rises to a value equal to the peak primary current threshold voltage V ipk When the output signal from the second comparator 702 is asserted, the counter can then complete the threshold time or period T in response to the assertion of the output signal from the second comparator 702. imid Furthermore, it should be noted that the controller 318 may also use the assertion of the second comparator output signal to control when the power switch SW is turned off in each cycle of the power switch SW.

[0050] exist Figure 8 In the present disclosure, a method for generating a flag f is shown. ipeak and the sign f imid The subsystem may be integrated into the controller 318 and may include a first threshold detector (first comparator) 800, a second threshold detector (second comparator) 802, and an offset circuit 804 coupled to the first threshold detector 800 and the second threshold detector 802.

[0051] The first threshold detector 800 is configured to compare the sense resistor voltage (324) with the peak primary current threshold voltage V iPK Similarly, the second threshold detector 802 is further used to compare the sensing resistor voltage with the adaptive threshold voltage V imid In response to receiving a binary threshold selection signal from the controller 318, the offset circuit 804 adjusts the adaptive threshold voltage V imid is set to be close in magnitude to the peak primary current threshold voltage V iPK or a low value (Vimid_S) that is close in size to the initial short-time pulse interference voltage.

[0052] The controller 318 is further configured to: imid When the difference between the two is greater than or equal to the blanking time plus the hysteresis time, the binary threshold selection signal is set to the same value as the adaptive threshold voltage T imid is set to a first value (eg, 0) corresponding to a high value (Vimid_L). The controller 318 is further configured to: imid When the difference between the two is less than or equal to the blanking time, the binary threshold selection signal is set to the same value as the adaptive threshold voltage T imid Set to a second value (eg, 1) corresponding to a low value (Vimid_S).

[0053] It should be understood that various aspects or details of the present disclosure may be changed without departing from the scope of the present disclosure. The present disclosure is not exhaustive and does not limit the claimed disclosure to the precise form disclosed. In addition, the foregoing description is for illustrative purposes only and not for limiting purposes. Based on the above description, modifications and variations are possible or may be obtained from practicing the present disclosure. The claims and their equivalents define the scope of the present disclosure. In addition, although the technology has been described in a language specific to structural features and / or method actions, it should be understood that the appended claims are not necessarily limited to the described features or actions. Instead, features and actions are described as exemplary specific implementations of such technologies.

[0054] With respect to the use of the terms "include", "comprises", "has", "contains" and variations thereof herein, such terms are intended to be inclusive in a manner similar to the term "includes", thereby acting as an open transitional term without excluding any additional or other elements. In addition, unless otherwise specifically stated, conditional language such as "may", "can", "possibly" or "can" is understood within the context to present certain examples including certain features, elements and / or steps, while other examples do not include certain features, elements and / or steps. Therefore, such conditional language is generally not intended to imply that one or more examples require certain features, elements and / or steps in any way, or that one or more examples must include logic for determining whether certain features, elements and / or steps are included or will be performed in any particular example with or without user input or prompting. Unless otherwise explicitly stated, combination words such as phrases "at least one of X, Y or Z" should be understood to present items, terms, etc. that can be X, Y or Z, or a combination thereof.

[0055] In some alternative examples of specific implementation, one or more functions marked in the box may not occur in the order marked in the accompanying drawings. For example, in some cases, depending on the functions involved, two boxes shown in succession may be executed substantially simultaneously, or sometimes these boxes may be executed in the opposite order. In addition, in addition to the boxes shown in the flow chart or block diagram, other boxes may be added. In addition, the operation of the exemplary process is shown in a separate box and summarized with reference to those boxes. These processes are shown as a logical flow of blocks, each of which can represent one or more operations that can be implemented in hardware, software or a combination thereof. In the context of software, an operation represents a computer executable instruction stored on one or more computer-readable media, which enables one or more processing units to perform the referenced operation when executed by one or more processing units. Typically, computer executable instructions include routines, programs, objects, modules, components, data structures, etc. that perform specific functions or implement specific abstract data types. The order of describing the operations is not intended to be understood as a limitation, and any number of the operations may be performed in any order, combined in any order, subdivided into multiple sub-operations and / or performed in parallel to implement the process. The process may be performed by resources associated with one or more devices (such as one or more internal or external CPUs or GPUs) and / or one or more pieces of hardware logic (such as an FPGA, DSP, or other type of accelerator).

[0056] All methods and processes described above can be embodied in a software code module executed by one or more general-purpose computers or processors and fully automated via the software code module. The code module can be stored in any type of computer-readable storage medium or other computer storage device. Alternatively, some or all methods can be embodied in dedicated computer hardware.

Claims

1. A universal input voltage detection system for a flyback converter, the universal input voltage detection system comprising: a first comparator configured to assert a first comparator output signal in response to a sense resistor voltage being greater than an adaptive threshold voltage, wherein the sense resistor voltage is generated by a primary current through the sense resistor; a second comparator configured to assert a second comparator output signal in response to the sense resistor voltage being greater than a peak primary current threshold voltage, wherein the adaptive threshold voltage is equal to the peak primary current threshold voltage minus an offset; a voltage threshold time detector configured to time a threshold time that begins with the assertion of the first comparator output signal and ends with the assertion of the second comparator output signal; as well as a controller for controlling cycling of a power switch to regulate an output voltage of the flyback converter, wherein the controller is configured to turn off the power switch in response to the assertion of the second comparator output signal; and wherein the controller is further configured during a continuous conduction mode to: determining a voltage gradient of the sense resistor voltage over time according to the threshold time, and An input voltage to the flyback converter is determined as a function of the voltage gradient over time and a magnetizing inductance of a transformer of the flyback converter.

2. The universal input voltage detection system according to claim 1, wherein the controller is further configured to: utilizing a slope compensation technique that reduces the peak primary current threshold voltage according to a slope profile during a slope compensation period; responsive to the assertion of the second comparator output signal after the start of the slope compensation period, measuring a slope time equal to a difference between the start of the slope compensation period and the assertion of the second comparator output signal; determining a minimum time value that is equal to a minimum of the slope time and the threshold time; determining a product of the minimum time value and the slope distribution; determining a difference between the offset and the product; as well as The voltage gradient over time is determined using a ratio of the difference to the threshold time. 3 . The universal input voltage detection system according to claim 2 , wherein the slope time is greater than the threshold time. 4 . The universal input voltage detection system according to claim 2 , wherein the slope time is less than the threshold time.

5. The universal input voltage detection system according to claim 1 , wherein the controller is further configured in each cycle of the power switch to: utilizing a slope compensation technique that reduces the peak primary current threshold voltage according to a slope profile during a slope compensation period; In response to the assertion of the second comparator output signal after the start of the slope compensation period, the voltage gradient over time is determined using a ratio of the offset to the threshold time. 6 . The universal input voltage detection system of claim 1 , wherein the controller is further configured to set the offset to a default value during an initial operation of the flyback converter.

7. The universal input voltage detection system of claim 6, wherein the controller is further configured to adjust and increase the offset from the default value in response to a difference between the on-time of the power switch and the threshold time being less than or equal to a blanking time.

8. The universal input voltage detection system of claim 6, wherein the controller is further configured to maintain the offset at the default value in response to a difference between the on-time of the power switch and the threshold time being greater than or equal to a blanking time plus a hysteresis time. 9 . The universal input voltage detection system of claim 2 , wherein the controller is further configured to adjust a switching frequency of the power switch during a pulse frequency operation mode.

10. The universal input voltage detection system of claim 2, wherein the controller is further configured to adjust the peak primary current threshold voltage during a pulse width modulation mode of operation.

11. The universal input voltage detection system of claim 10, wherein the controller is further configured to adjust the peak primary current threshold voltage during the pulse width modulation mode of operation in response to a feedback signal derived from the output voltage of the flyback converter.

12. A method for universal input voltage detection of a flyback converter, the method comprising: When operating the flyback converter in continuous conduction mode: turning on the power switch to conduct the primary winding current through the sense resistor, thereby generating a sense resistor voltage across the sense resistor; measuring a threshold time that begins when the sense resistor voltage is equal to an adaptive threshold voltage and ends when the sense resistor voltage is equal to a peak primary current threshold voltage, wherein the adaptive threshold voltage is equal to the peak primary current threshold voltage minus an offset; as well as determining a voltage gradient of the sense resistor voltage over time according to the threshold time; and The input voltage is determined as a product of the voltage gradient over time and the magnetizing inductance of the transformer. 13 . The method of claim 12 , further comprising turning off the power switch in response to the sense resistor voltage being equal to the peak primary current threshold voltage.

14. The method of claim 12, further comprising setting the offset to a default value during an initial operating cycle of the flyback converter.

15. The method according to claim 12, further comprising: after said turning on of said power switch, reducing said peak primary current threshold voltage according to a slope profile during a slope compensation period; as well as In response to the sense resistor voltage being equal to the peak primary current threshold voltage prior to the start of the slope compensation period, the voltage gradient over time of the sense resistor voltage is determined by dividing the offset by the threshold time.

16. The method according to claim 12, further comprising: after said turning on of said power switch, reducing said peak primary current threshold voltage according to a slope profile during a slope compensation period; in response to the sense resistor voltage being equal to the peak primary current threshold voltage after the start of the slope compensation period, measuring a slope time equal to the difference between the start of the slope compensation period and when the sense resistor voltage is equal to the peak primary current threshold voltage; determining a minimum time value that is equal to a minimum of the slope time and the threshold time; determining a product of the minimum time value and the slope distribution; determining a difference between the offset and the product; as well as The voltage gradient over time of the sense resistor voltage is determined using a ratio of the difference to the threshold time. The method of claim 16 , wherein the minimum time value is equal to the slope time. The method of claim 16 , wherein the minimum time value is equal to the threshold time.

19. The method of claim 12, further comprising increasing the offset to be greater than a default value in response to a difference between a switch-on duration of the power switch and the threshold time being less than or equal to a blanking time.

20. The method of claim 12, further comprising setting the offset equal to a default value in response to a difference between a switch-on duration of a power switch and the threshold time being greater than or equal to a blanking time plus a hysteresis time.

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