Semiconductor packaging structure and method for forming the same

Abstract

An embodiment of the present invention provides a semiconductor packaging structure and a method for forming the same. The semiconductor packaging structure includes: a carrier; a first circuit layer having a first conductive member penetrating the first circuit layer to be electrically connected to the carrier; a second circuit layer located on the same side of the carrier as the first circuit layer and having a second conductive member penetrating the second circuit layer to be electrically connected to the carrier; wherein the first circuit layer is separated from the second circuit layer in a lateral direction, and the first circuit layer is electrically connected to the second circuit layer through the carrier.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more particularly, to a semiconductor packaging structure and a method for forming the same. Background Art

[0002] With the evolution of packaging technology, various packaging structures have been innovated, and the packaging structure is becoming more and more important based on electrical properties and layout considerations.

[0003] like Figure 1 As shown, the common fan-out substrate (FOSub) is to glue the fan-out structure 12 to the substrate 14, and complete the connection between the fan-out structure 12 and the substrate 14 through the through hole. The fan-out structure 12 is similar to the substrate 14 in area. In some multi-die products, multiple dies 21 and 22 share a fan-out structure. The overall area of ​​the fan-out structure is larger than the area of ​​the die, but the partition is not easy to control in the fan-out structure process. Therefore, the area of ​​the fan-out structure is inversely proportional to the yield of the packaging structure, and the yield still has room for improvement. Summary of the invention

[0004] In view of the above problems in the related art, the present application proposes a semiconductor packaging structure and a method for forming the same.

[0005] According to one aspect of an embodiment of the present invention, a semiconductor packaging structure is provided, comprising: a carrier; a first circuit layer, having a first conductive member penetrating the first circuit layer to be electrically connected to the carrier; a second circuit layer, located on the same side of the carrier as the first circuit layer, and having a second conductive member penetrating the second circuit layer to be electrically connected to the carrier; wherein the first circuit layer is separated from the second circuit layer in the laterally direction, and the first circuit layer is electrically connected to the second circuit layer through the carrier.

[0006] In some embodiments, the semiconductor package structure further includes an adhesive layer disposed between the carrier and the first circuit layer.

[0007] In some embodiments, the first conductive element penetrates the adhesive layer.

[0008] In some embodiments, the semiconductor package structure further includes: a first die located on the first circuit layer and electrically connected to the first circuit layer.

[0009] In some embodiments, the semiconductor package structure further includes: a bottom filler located between the first die and the first circuit layer.

[0010] In some embodiments, the semiconductor package structure further includes a first die located on the first circuit layer and the second circuit layer.

[0011] In some embodiments, the first circuit layer is electrically connected to the second circuit layer through the first die.

[0012] According to another aspect of an embodiment of the present invention, a semiconductor packaging structure is provided, comprising: a carrier; a first circuit layer electrically connected to the carrier; a second circuit layer located on the same side of the carrier as the first circuit layer and laterally separated from the first circuit layer; wherein the first circuit layer is electrically connected to the second circuit layer via an electronic device.

[0013] In some embodiments, the first circuit layer is electrically connected to the second circuit layer through a carrier.

[0014] In some embodiments, the first circuit layer has a first conductive member, and the first conductive member runs through the first circuit layer.

[0015] In some embodiments, the semiconductor package structure further includes an adhesive layer disposed between the carrier and the first circuit layer.

[0016] In some embodiments, the first circuit layer has a first conductive member, and the first conductive member penetrates the first circuit layer and the adhesive layer.

[0017] In some embodiments, the semiconductor package structure further includes an underfill located between the electronic device and the first circuit layer.

[0018] In some embodiments, the electronic device is located above the first circuit layer and the second circuit layer and spans the first circuit layer and the second circuit layer.

[0019] In some embodiments, the semiconductor package structure further includes a second electronic device located on the second circuit layer.

[0020] According to another aspect of an embodiment of the present invention, a method for forming a semiconductor packaging structure is provided, including: providing a carrier; attaching a first circuit layer and a second circuit layer to the carrier, the first circuit layer and the second circuit layer being separated in a laterally direction; and forming a first conductive member and a second conductive member connected to the carrier in the first circuit layer and the second circuit layer, respectively.

[0021] In some embodiments, attaching the first circuit layer and the second circuit layer to the carrier includes: attaching the first circuit layer and the second circuit layer to the carrier via an adhesive layer.

[0022] In some embodiments, the method of forming a semiconductor package structure further includes: forming a first die on the first circuit layer and the second circuit layer.

[0023] In some embodiments, the first circuit layer is electrically connected to the second circuit layer through the first die.

[0024] In some embodiments, the method of forming a semiconductor package structure further includes: forming a second die on the second circuit layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Embodiments of the present invention may be better understood from the following detailed description when read in conjunction with the accompanying drawings. It should be emphasized that, in accordance with standard practice in the industry, the various components are not drawn to scale and are used for illustrative purposes only. In fact, the sizes of the various components may be arbitrarily increased or reduced for clarity of discussion.

[0026] Figure 1 It is a schematic diagram of the current semiconductor packaging structure.

[0027] Figure 2 is a schematic diagram of a semiconductor package structure according to an embodiment of the present invention.

[0028] Figure 3 yes Figure 2 A schematic top view of a semiconductor package structure is shown.

[0029] Figure 4 is a schematic diagram of a semiconductor package structure according to another embodiment of the present invention.

[0030] FIG. 5A to FIG. 5F is a schematic diagram of various stages of forming a semiconductor package structure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0031] The following disclosure provides many different embodiments or examples for realizing the different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present invention. Of course, these are merely examples and are not intended to limit the present invention. For example, in the following description, forming a first component above or on a second component may include an embodiment in which the first component and the second component are formed to be in direct contact, and may also include an embodiment in which an additional component may be formed between the first component and the second component so that the first component and the second component may not be in direct contact. In addition, the present invention may repeat reference numerals and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0032] Moreover, for ease of description, spatially relative terms such as "under", "beneath", "lower", "over", "upper", etc. may be used herein to facilitate description of the relationship of one element or component to another (or other) elements or components as shown in the figures. In addition to the orientation shown in the figures, the spatially relative terms are intended to include different orientations of the device in use or operation.

[0033] According to one aspect of an embodiment of the present invention, a semiconductor package structure is provided. Figure 2 Schematic diagram of a semiconductor packaging structure according to an embodiment of the present invention. Figure 2As shown, the semiconductor structure 100 includes a carrier 130 and a first circuit layer 121 located above the carrier 130. The first circuit layer 121 has a first conductive member 124 that penetrates the first circuit layer 121 to be electrically connected to the carrier 130. The second circuit layer 122 and the first circuit layer 121 are located on the same side of the carrier 130, and the second conductive member 125 that penetrates the second circuit layer 122 is electrically connected to the carrier 130. In some embodiments, the first conductive member 124 or the second conductive member 125 may be a through hole. The first circuit layer 121 and the second circuit layer 122 may be fan-out layers. The first circuit layer 121 is separated from the second circuit layer 122 in the lateral direction, and the first circuit layer 121 is electrically connected to the second circuit layer 122 through the carrier 130.

[0034] It should be understood that although Figure 2 FIG. 1 shows two circuit layers including a first circuit layer 121 and a second circuit layer 122, but the number of circuit layers may be any other number as required. In some embodiments, the area of ​​the semiconductor package structure 100 is greater than 50×50 mm. 2 , the semiconductor structure 100 may include two or more circuit layers.

[0035] In some embodiments, the adhesive layer 140 is disposed between the carrier 130 and the first circuit layer 121 and the second circuit layer 122, and the first circuit layer 121 and the second circuit layer 122 are attached to the carrier 130 through the adhesive layer 140. This attachment method can provide better electrical performance than solder ball connection.

[0036] In the semiconductor package structure 100 of the present invention, the circuit layer (such as the fan-out layer) is split into the first circuit layer 121 and the second circuit layer 122 according to the needs by using the segmentation concept, thereby reducing the area of ​​a single circuit layer and improving the yield of the circuit layer in the multi-die package structure. In addition, because the area of ​​the circuit layer is reduced, the warpage of the package structure can also be improved.

[0037] Continue to refer Figure 2 As shown, the first conductive element 124 in the first circuit layer 121 or the second conductive element 125 in the second circuit layer 122 can penetrate the adhesive layer 140 to be electrically connected to the circuit 132 in the carrier 130 .

[0038] The first tube core 111 is located on the first circuit layer 121 and is electrically connected to the first circuit layer 121. The second tube core 112 is located on the second circuit layer 122 and is electrically connected to the second circuit layer 122. The first tube core 111 and the second tube core 112 can be connected to the first circuit layer 121 and the second circuit layer 122 respectively, for example, by solder balls 149, and the bottom filler 145 is formed between the first tube core 111 and the first circuit layer 121. The area of ​​the first tube core 111 is not larger than the area of ​​the first circuit layer 121. The area of ​​the second tube core 112 is not larger than the area of ​​the second circuit layer 122. Since the area of ​​the circuit layer can be close to the size of the tube core, the cost of the dielectric material in the circuit layer can be saved, and space can be saved for the configuration of other components.

[0039] Figure 3 yes Figure 2 A schematic top view of a semiconductor package structure is shown. Figure 2 and Figure 3 As shown, in this embodiment, at a position adjacent to the interval between the first circuit layer 121 and the second circuit layer 122, the first conductive member 124 in the first circuit layer 121 and the second conductive member 125 in the second circuit layer 122 can be electrically connected through the line 132 on the carrier 130, so that signal communication can be achieved between the first tube core 111 and the second tube core 112 through the line 132 on the carrier 130.

[0040] Figure 4 is a schematic diagram of a semiconductor packaging structure according to another embodiment of the present invention. Figure 2 The embodiment shown is different in that the first die 111 (also referred to as an electronic device) is located on the first circuit layer 121 and is also located on the second circuit layer 122. The first die 111 spans the first circuit layer 121 and the second circuit layer 122. The second die 112 (also referred to as a second electronic device) is located on the second circuit layer 122. The first circuit layer 121 can be electrically connected to the second circuit layer 122 through the first die 111. By connecting the first die 111 across the first circuit layer 121 and the second circuit layer 122, the first die 111 and the second die 112 can communicate signals through the second circuit layer 122. Figure 4 Other aspects of the semiconductor package structure 100 ′ are similar to those of Figure 2 The description is similar, so it will not be repeated.

[0041] FIG. 5A to FIG. 5F Schematic diagram of various stages of forming a semiconductor package structure according to an embodiment of the present invention. Figure 5AIn the embodiment, a carrier 130, a first circuit layer 121 on a first carrier 181, and a second circuit layer 122 on a second carrier 182 are provided. A circuit layer is formed on the surface of the carrier 130. In some embodiments, the first circuit layer 121 and the second circuit layer 122 may be fan-out layers, and circuits and through holes may be formed therein. In some embodiments, the areas of the first circuit layer 121 and the second circuit layer 122 may be determined according to the area of ​​the carrier 130.

[0042] exist Figure 5B In the embodiment, the adhesive layer 140 is covered on the surface of the carrier 130. Then, as Figure 5C As shown, the first circuit layer 121 and the second circuit layer 122 are attached to the carrier 130 by the adhesive layer 140, and there is a gap 127 between the first circuit layer 121 and the second circuit layer 122. The first carrier 181 and the second carrier 182 on the first circuit layer 121 and the second circuit layer 122 are removed. Figure 5D shown.

[0043] exist Figure 5E At the first circuit layer 121 and the second circuit layer 122, for example, an opening 129 is formed by drilling technology. The opening 129 penetrates the corresponding first circuit layer 121 and the second circuit layer 122, and penetrates the adhesive layer 140 to reach the circuit 132 on the surface of the carrier 130. In addition, the first circuit layer 121 and the second circuit layer 122 have an opening 129 adjacent to the gap 127 between the first circuit layer 121 and the second circuit layer 122, and the opening 129 adjacent to the gap 127 reaches the circuit 132 on the carrier 130 below the gap 127.

[0044] exist Fig. 5F At the opening 129, for example, a conductive material is filled in the opening 129 by an electroplating process to form a first conductive member 124 in the first circuit layer 121 and a second conductive member 125 in the second circuit layer 122. Then, referring to Figure 2 As shown, for example, the first tube die 111 is connected over the first circuit layer 121 by solder balls 149, and the second tube die 112 is connected over the second circuit layer 122. An underfill is formed between the first tube die 111 and the first circuit layer 121 and between the second tube die 112 and the second circuit layer 122. The first circuit layer 121, the second circuit layer 122, the first tube die 111, and the second tube die 112 are encapsulated by a molding, thereby forming Figure 2 A semiconductor package structure 100 is shown.

[0045] The features of several embodiments are discussed above so that those skilled in the art can better understand various aspects of the present invention. Those skilled in the art should understand that they can easily use the present invention as a basis to design or modify other processes and structures for implementing the same purpose and / or achieving the same advantages as the embodiments introduced herein. Those skilled in the art should also appreciate that this equivalent construction does not deviate from the spirit and scope of the present invention, and that they can make various changes, substitutions and modifications herein without deviating from the spirit and scope of the present invention.

Claims

1. A semiconductor packaging structure, characterized in that: include: Carrier board; A first circuit layer having a first conductive member penetrating the first circuit layer to be electrically connected to the carrier; A second circuit layer, located on the first side of the carrier together with the first circuit layer, and having a second conductive member penetrating the second circuit layer to be electrically connected to the carrier; an adhesive layer, disposed between the carrier board and the first circuit layer and the second circuit layer, and the first conductive member and the second conductive member penetrate the adhesive layer, The first circuit layer is separated from the second circuit layer in the transverse direction, and at a position adjacent to the interval between the first circuit layer and the second circuit layer, the first circuit layer is electrically connected to the second circuit layer through the first conductive member, the second conductive member and the circuit above the top surface of the carrier, and at the same time, at the interval, the first conductive member and the second conductive member are connected to the conductive connecting member on the second side of the carrier through the circuit running through the carrier, wherein the first side and the second side are opposite.

2. The semiconductor package structure according to claim 1, wherein: Also includes: A first tube core is located on the first circuit layer and is electrically connected to the first circuit layer.

3. The semiconductor package structure according to claim 2, characterized in that: An area of ​​the first tube core is not greater than an area of ​​the first circuit layer.

4. The semiconductor package structure according to claim 1, wherein: Also includes: The first tube die is located on the first circuit layer and the second circuit layer.

5. A semiconductor packaging structure, characterized in that: include: Carrier board; A first circuit layer having a first conductive member extending therethrough and electrically connected to the carrier through the first conductive member; a second circuit layer, located on the first side of the carrier with the first circuit layer, having a second conductive member extending therethrough and electrically connected to the carrier through the second conductive member, and separated from the first circuit layer in a lateral direction; a first electronic device, located on the first circuit layer and the second circuit layer, Wherein, at a position adjacent to the interval between the first circuit layer and the second circuit layer, the first circuit layer is electrically connected to the second circuit layer through the first electronic device, the first conductive member and the second conductive member, and at the interval, the first conductive member and the second conductive member are connected to the conductive connection member on the second side of the carrier through a line penetrating the carrier, wherein the first side and the second side are opposite to each other, The width of the first conductive member gradually decreases in a direction toward the carrier, and the width of the through hole in the first circuit layer gradually decreases in a direction away from the carrier.

6. The semiconductor package structure according to claim 5, characterized in that: Also includes: The adhesive layer is arranged between the carrier board and the first circuit layer.

7. The semiconductor package structure according to claim 6, characterized in that: The first conductive member penetrates the adhesive layer.

8. The semiconductor package structure according to claim 5, characterized in that: Also includes: A bottom filler is located between the first electronic device and the first circuit layer.

9. The semiconductor package structure according to claim 8, characterized in that: Also includes: The second electronic device is located on the second circuit layer.

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