A composite single-crystal piezoelectric substrate and a preparation method thereof

Abstract

The present application discloses a composite single crystal piezoelectric substrate and a preparation method thereof, wherein the composite single crystal piezoelectric substrate comprises a silicon substrate layer (1), a silicon dioxide layer (2) and a single crystal piezoelectric layer (3), wherein the surface of the silicon substrate layer (1) is damaged to form a damaged layer (4), and the damaged layer (4) is in contact with the silicon dioxide layer (2). The method provided by the present application sets a high temperature process step before the formation of the damaged layer (4), and prepares the damaged layer (4) "remotely" through the silicon dioxide layer (2), so that the thickness uniformity of the silicon dioxide layer (2) is good, and the defect density in the damaged layer (4) for capturing carriers is large. The structure of the composite single crystal piezoelectric substrate is stable, and the carriers generated due to the inevitable defects on the interface between the silicon substrate layer (1) and the silicon dioxide layer (2) can be effectively captured, thereby improving the performance of the device made based on the composite single crystal piezoelectric substrate.

Description

Technical Field

[0001] This application belongs to the field of preparation of functional semiconductor materials, and particularly relates to a composite single-crystal piezoelectric substrate and a preparation method thereof. Background Art

[0002] The composite single-crystal piezoelectric substrate can exhibit good performance in surface acoustic wave filters. The composite single-crystal piezoelectric substrate includes a single-crystal piezoelectric layer, a low acoustic impedance layer, and a high acoustic impedance substrate layer stacked in sequence. The low acoustic impedance layer is mainly used to form an acoustic impedance difference with the high acoustic impedance layer, so that the energy of the acoustic wave is mainly concentrated in the single-crystal piezoelectric layer and the low acoustic impedance layer, restricting the leakage of energy. Silicon dioxide is the most commonly used material for the low acoustic impedance layer. Contrary to general piezoelectric materials, the silicon dioxide layer has a positive acoustic velocity temperature coefficient, which compensates for the frequency temperature coefficient of the piezoelectric material, thereby reducing the frequency temperature drift coefficient of the final device. The compensation effect is related to the thickness of the silicon dioxide layer. Therefore, the composite single-crystal piezoelectric substrate has two requirements for the low acoustic impedance layer: one is low acoustic wave transmission loss; the other is thickness uniformity. At the same time, silicon and silicon carbide materials have become the first choice for high acoustic impedance materials due to their mature preparation and processing industrialization levels.

[0003] In the prior art, SiO2 grown by thermal oxidation shows the best performance in the above two requirements. In addition, the composite single-crystal piezoelectric substrate generally requires that the interface roughness of each layer is less than 0.5 nm, so as to reduce the energy loss caused by the scattering of acoustic waves at each interface and avoid the distortion of the pattern caused by the diffuse reflection of the laser at the interface during subsequent lithography. However, there are many charges at the interface between the silicon dioxide layer and the silicon substrate layer of the actually manufactured composite single-crystal piezoelectric substrate. These charges can attract the carriers in the silicon substrate layer to gather at the interface, thereby forming a conductive layer at the interface between the two. This conductive layer can interact with the electromagnetic field generated during the use of the surface acoustic wave filter device, resulting in signal loss.

[0004] The prior art introduces a polysilicon layer between the silicon dioxide layer and the silicon substrate layer, and uses the lattice defects naturally existing in the polysilicon to capture carriers, thereby reducing the interference of the conductive layer on the signal. However, the introduction of polysilicon makes it very difficult to obtain a good silicon dioxide layer, and brings other problems: First, polysilicon is generally prepared by a deposition process, and the raw materials used are generally gases or liquids containing Si elements, and these raw materials are not environmentally friendly; Second, at the thermal oxidation temperature for preparing silicon dioxide, the polysilicon will recrystallize, resulting in a reduction in the effect of the polysilicon layer capturing carriers. Therefore, it is impossible to use the thermal oxidation method to fabricate high-quality silicon dioxide after preparing the polysilicon. Summary of the Invention

[0005] To solve the problems existing in the preparation of a composite single-crystal piezoelectric substrate in the prior art, the present application provides a composite single-crystal piezoelectric substrate, which includes a silicon substrate layer, a silicon dioxide layer, and a single-crystal piezoelectric layer. Among them, a damaged layer is introduced at the interface between the silicon substrate layer and the silicon dioxide layer. The damaged layer has lattice defects, which can be used to capture carriers, thereby weakening signal loss. The present application also provides a method for preparing the above composite single-crystal piezoelectric substrate. The method first prepares a silicon dioxide layer on the top surface of the silicon substrate layer by a thermal oxidation process, and then forms a damaged layer at the interface between the silicon substrate layer and the silicon dioxide layer by methods such as ion implantation or laser etching. The method provided by the present application sets the thermal oxidation process step before the preparation of the damaged layer, which can effectively avoid the influence of the thermal oxidation process on the damaged layer and improve the performance of the damaged layer in capturing carriers. In addition, the silicon dioxide layer prepared by the thermal oxidation process has good compactness and uniformity, and further, the performance of the downstream prepared device is good.

[0006] The purpose of the present application is to provide a composite single-crystal piezoelectric substrate, which sequentially includes a silicon substrate layer 1, a silicon dioxide layer 2, and a single-crystal piezoelectric layer 3. Among them, a region with a preset depth from the interface between the silicon substrate layer 1 and the silicon dioxide layer to its interior is damaged to form a damaged layer 4, and the damaged layer 4 is in contact with the silicon dioxide layer 2.

[0007] The present application provides a damaged layer with a preset thickness at the interface where the silicon substrate layer is in contact with the silicon dioxide layer. The damaged layer can capture the carriers aggregated at the interface between the two, thereby weakening the conductive layer and reducing the signal loss during the use of the surface acoustic wave filter device.

[0008] In an implementable manner, the defect density of the damaged layer 4 is at least 10 11 atoms / cm 2 , for example, 10 11 to 10 14 atoms / cm 2 , so that the damaged layer 4 can not only meet the need for capturing carriers, but also minimize the process difficulty and complexity to the greatest extent.

[0009] Optionally, the thickness of the damaged layer 4 is 300 nm to 3 μm, so as to minimize the thickness while ensuring that the damaged layer can provide sufficient carrier capture ability, thereby reducing the process complexity.

[0010] Furthermore, the damage layer 4 is formed by ion implantation or laser ablation. By using the structural characteristics of the ion implantation layer or the laser ablation layer as the damage layer, the damage layer is integrally prepared based on the silicon substrate layer and the silicon dioxide layer, thereby reducing the preparation complexity and improving the overall stability of the prepared composite single-crystal piezoelectric substrate.

[0011] In an implementable manner, the silicon dioxide layer 2 is prepared by a thermal oxidation method, making the silicon dioxide layer dense and uniform. Moreover, compared with methods such as thermal deposition, the raw materials required for the thermal oxidation process are only oxygen and water, which is more environmentally friendly.

[0012] In an implementable manner, the thickness uniformity of the silicon dioxide layer 2 is less than 2% to meet the performance requirements of the composite single-crystal piezoelectric substrate.

[0013] In an implementable manner, the composite single-crystal piezoelectric substrate is prepared by a method including the following steps:

[0014] Perform thermal oxidation treatment on the upper surface of the silicon substrate layer to generate a silicon dioxide layer;

[0015] Damage the surface where the silicon substrate layer and the silicon dioxide layer are in contact through the silicon dioxide layer to form a damage layer;

[0016] Prepare a single-crystal piezoelectric layer, and stack the single-crystal piezoelectric layer, the silicon dioxide layer, the damage layer, and the silicon substrate layer to form a composite single-crystal piezoelectric substrate.

[0017] In this application, the composite single-crystal piezoelectric substrate sequentially includes a silicon substrate layer 1, a silicon dioxide layer 2, and a single-crystal piezoelectric layer 3 from bottom to top. The "upper" in the "upper surface" has the same direction as the "upper" in the "from bottom to top".

[0018] Another object of this application is to provide a method for preparing the composite single-crystal piezoelectric substrate described in the first aspect. The method includes:

[0019] Perform thermal oxidation treatment on the upper surface of the silicon substrate layer 1 to generate a silicon dioxide layer 2;

[0020] Damage the surface where the silicon substrate layer 1 and the silicon dioxide layer are in contact through the silicon dioxide layer 2 to form a damage layer 4;

[0021] Prepare a single-crystal piezoelectric layer, and stack the single-crystal piezoelectric layer, the silicon dioxide layer, the damage layer, and the silicon substrate layer to form a composite single-crystal piezoelectric substrate.

[0022] In this application, a silicon dioxide layer is prepared on the upper surface of a silicon substrate layer by thermal oxidation. A dense and uniform silicon dioxide layer can be obtained. The obtained silicon dioxide layer has low acoustic wave transmission loss and good thickness uniformity, and it is stably combined with the silicon substrate layer. Then, ions are implanted through the silicon dioxide layer towards the interface between the silicon dioxide layer and the silicon substrate layer to prepare a damaged layer. Finally, a pre-prepared single-crystal piezoelectric layer is transferred onto the upper surface of the silicon dioxide layer by bonding, thereby avoiding the damage that the high temperature used in the process of preparing the single-crystal piezoelectric layer may cause to the composite single-crystal piezoelectric substrate along the damaged layer. This application selects the process sequence of first preparing the silicon dioxide layer by thermal oxidation and then preparing the damaged layer by ion implantation. This can not only ensure the stable structure of the damaged layer and its strong carrier capture ability, but also ensure the high quality of the silicon dioxide layer, thus effectively solving the problem of the recovery of amorphous silicon or polycrystalline silicon defects caused by high temperature in the traditional solution during the sequential preparation of amorphous silicon or polycrystalline silicon layers and silicon dioxide layers on the silicon substrate.

[0023] In an achievable manner, the uniformity of the obtained silicon dioxide layer 2 is less than 2%, so as to meet the performance requirements of the composite single-crystal piezoelectric substrate.

[0024] In an achievable manner, the damage to the surface of the silicon substrate layer 1 through the silicon dioxide layer 2 includes ion implantation and laser ablation. On the one hand, it ensures that the performance such as the acoustic wave transmission loss rate and thickness uniformity of the silicon dioxide layer 2 does not change. On the other hand, it can obtain a damaged layer with excellent carrier capture ability at the target position.

[0025] In an achievable manner, the damaged layer is prepared by ion implantation. The concentration of the ions implanted by the ion implantation method is at least 10 11 atoms / cm 2 , for example, it is 10 11 to 10 14 atoms / cm 2 , so as to achieve the defect density of the damaged layer, making the damaged layer able to meet the requirements of capturing carriers and minimizing the process difficulty and complexity to the greatest extent.

[0026] Optionally, based on the surface where the silicon substrate layer is in contact with the silicon dioxide layer, for each different product, the specific depth range of ion implantation can be specifically set according to the thickness of the damaged layer, so that the position of the damaged layer is exactly in the silicon substrate layer close to the silicon dioxide layer, ensuring that the defects formed by ion implantation can play a role in suppressing the conductivity near the interface of the silicon substrate layer, thereby reducing the signal attenuation by the conductive layer.

[0027] In another feasible way, a damaged layer is prepared by laser ablation. The wavelength of the laser used is 200nm - 1064nm; the energy density of the laser is 1J / cm 2 ~100J / cm 2 .

[0028] In one feasible way, the preparation of the single-crystal piezoelectric layer includes:

[0029] Ion implantation is performed on a single-crystal piezoelectric wafer bonded to a substrate material to form a thin film layer, an implanted layer, and a surplus layer;

[0030] The substrate is bonded to the thin film layer of the single-crystal piezoelectric wafer;

[0031] The surplus layer is peeled off from the thin film layer along the implanted layer.

[0032] In this application, ion implantation can be used to pre-prepare single-crystal piezoelectric layers such as lithium niobate and lithium tantalate, so as to transfer the piezoelectric single-crystal layer onto the silicon dioxide layer.

[0033] In the process of prefabricating the single-crystal piezoelectric layer in this application, the lattice of the single-crystal piezoelectric layer is restored, so that the single-crystal piezoelectric layer only needs to be bonded to the silicon dioxide layer and does not need to be heat-treated again after bonding. Therefore, after transferring the single-crystal piezoelectric layer onto the silicon dioxide layer, the single-crystal piezoelectric layer does not need to be heat-treated again, ensuring the stable structure of the damaged layer, and the single-crystal piezoelectric layer has a good lattice morphology.

[0034] In one feasible way, transferring the single-crystal piezoelectric layer onto the upper surface of the silicon dioxide layer may include:

[0035] Surface activation is respectively performed on the upper surface of the silicon dioxide layer and the surface of the single-crystal piezoelectric layer;

[0036] The surface-activated silicon dioxide layer is bonded to the single-crystal piezoelectric layer;

[0037] The substrate material on the single-crystal piezoelectric layer is removed.

[0038] The bonding method adopted in this application can be a bonding method that does not require high-temperature treatment in the prior art, and the substrate material carrying the single-crystal piezoelectric layer is removed after bonding, avoiding processing the rest of the composite single-crystal piezoelectric substrate, thereby ensuring the performance and structural stability of the composite single-crystal piezoelectric substrate.

[0039] Compared with the prior art, the composite single-crystal piezoelectric substrate provided by the present application has a dense and uniform silicon dioxide layer, and a damaged layer with a preset defect density is provided at a preset position of the silicon substrate layer. The damaged layer has sufficient carrier capture ability, thereby weakening the conductive layer in the composite single-crystal piezoelectric substrate and reducing signal loss caused by the conductive layer. The method for preparing the composite single-crystal piezoelectric substrate provided by the present application first prepares a silicon dioxide layer on the silicon substrate layer by a thermal oxidation method, then forms a damaged layer at the interface between the silicon substrate layer and the silicon dioxide by a penetrating method such as ion implantation or laser irradiation, and finally bonds a single-crystal piezoelectric layer on the silicon dioxide layer by a room-temperature bonding method. This method sets the high-temperature process before ion implantation / laser etching, which can not only make the silicon dioxide layer dense and uniform, but also ensure the stable structure and performance of the damaged layer, so that the finally obtained composite single-crystal piezoelectric substrate has excellent performance. Description of the Drawings

[0040] Figure 1 Shows a schematic cross-sectional structure diagram of the composite single-crystal piezoelectric substrate provided by the present application;

[0041] Figure 2 Shows a schematic flow diagram of a method for preparing the composite single-crystal piezoelectric substrate in this example.

[0042] 1 - silicon substrate layer, 2 - silicon dioxide layer, 3 - single-crystal piezoelectric layer, 003 - lithium tantalate wafer, 031 - thin film layer, 032 - implanted layer, 033 - surplus layer, 4 - damaged layer, 5 - single-crystal piezoelectric layer, 51 - silicon substrate. Detailed Description of the Embodiments

[0043] Here, the exemplary embodiments will be described in detail, and the examples are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. On the contrary, they are only examples of methods consistent with some aspects of the present invention as detailed in the appended claims.

[0044] The piezoelectric composite substrate and the preparation method thereof provided by the present application will be elaborated in detail through specific embodiments below.

[0045] Figure 1 Shows a schematic cross-sectional structure diagram of the composite single-crystal piezoelectric substrate provided by the present application, as Figure 1 shown, the composite single-crystal piezoelectric substrate sequentially includes a silicon substrate layer 1, a silicon dioxide layer 2, and a single-crystal piezoelectric layer 3.

[0046] In this example, the material for preparing the single-crystal piezoelectric layer 3 includes piezoelectric materials such as lithium niobate or lithium tantalate, and the single-crystal piezoelectric layer 3 can be any single-crystal piezoelectric layer 3 used in a composite single-crystal piezoelectric substrate in the prior art.

[0047] In this example, the single-crystal piezoelectric layer 3 can be prepared on the composite single-crystal piezoelectric substrate by a film transfer method.

[0048] In this example, the method for preparing the silicon dioxide layer is a thermal oxidation method, which makes the silicon dioxide layer dense and uniform. Moreover, compared with methods such as thermal deposition, the raw materials required for the thermal oxidation method are only oxygen and water, which is more environmentally friendly.

[0049] In this example, the thickness uniformity of the silicon dioxide layer 2 is less than 2% to meet the performance requirements of the composite single-crystal piezoelectric substrate.

[0050] As mentioned above, due to process limitations, when preparing silicon dioxide on a silicon substrate, there will be a lot of unsaturated oxidized silicon and structural defects at the silicon dioxide / silicon interface. These defects will emit carriers into the silicon substrate, enhancing the conductivity of the silicon; in addition, these defects will also cause charges to be carried near the interface, and these charges will attract carriers to concentrate in the silicon near the interface, enhancing the conductivity. Since the composite substrate is in an electromagnetic field environment during use, the carriers concentrated at the interface between the silicon substrate layer 1 and the silicon dioxide layer 2 will interact with the electromagnetic field, thereby causing signal loss; on the other hand, the additional loss will also cause the entire device to heat up; both of the above aspects will result in large losses and short lifetimes for electronic devices using traditional composite substrates.

[0051] In this example, the thickness of the silicon dioxide layer can be 100 nm to 2 μm. The applicant has found that when the silicon dioxide layer is of the above thickness, it can not only meet its function as a low-resistance layer but also ensure that the overall volume of the prepared composite single-crystal piezoelectric substrate is small, which is convenient for subsequent use.

[0052] The damage layer 4 with the ability to capture carriers provided in this example can capture the carriers formed on the surface of the silicon substrate layer 1, thereby eliminating a series of problems caused by the interface defects between the silicon substrate layer 1 and the silicon dioxide layer 2.

[0053] Since carriers often exist near the interface between the silicon substrate layer 1 and the silicon dioxide layer 2, in the traditional solution, a layer of polysilicon is prepared on the silicon substrate to capture carriers. The preparation sequence is silicon substrate - polysilicon - silicon dioxide layer. The processes for preparing the silicon dioxide layer include the deposition method and the thermal oxidation method. However, if the deposition method is used to prepare the silicon dioxide layer, the surface uniformity of the obtained silicon dioxide layer is poor, and the surface of the silicon dioxide needs to be polished, which not only increases the process complexity but also easily reduces the uniformity of the silicon dioxide. Since the oxidation rate has an orientation with respect to the silicon crystal orientation, if the thermal oxidation method is used to prepare the silicon dioxide layer, due to the polysilicon having grains of different sizes, the roughness of the final SiO2 / polysilicon oxidation interface is too large, even reaching the level of dozens of nanometers, affecting the performance of the silicon dioxide layer. Therefore, it is difficult to ensure the performance of the silicon dioxide layer by using the process methods of the existing technology.

[0054] Combined with Figure 1 As shown, in this example, the preparation sequence of the damage layer 4 is silicon substrate layer - silicon dioxide layer - damage layer. Among them, the damage layer 4 is formed by damaging the surface where the silicon substrate layer 1 and the silicon dioxide layer 2 are in contact, that is, the damage layer 4 extends from the surface where the silicon substrate layer 1 and the silicon dioxide layer 2 are in contact into the interior of the silicon substrate layer 1, so that the damage layer 4 is located at the interface between the silicon substrate layer 1 and the silicon dioxide layer 2.

[0055] In this example, by adjusting the preparation sequence of the silicon substrate layer 1, the damage layer 4, and the silicon dioxide layer 2, on the one hand, the performance of the silicon dioxide layer 2 is significantly improved, and on the other hand, the interface roughness between the silicon dioxide layer 2 and the damage layer 4 is kept at a low level, thereby ensuring the performance of the silicon dioxide layer 2. Further, it can also ensure that the damage layer 4 maintains a high defect density and has a strong carrier capture ability.

[0056] In this example, the surface and internal structure of the damage layer 4 may have defects or no obvious defects macroscopically. However, from a microscopic perspective, the lattice structure in the damage layer 4 is damaged to form holes that can be used to capture carriers.

[0057] The applicant found that the charge density in the general silicon dioxide layer 2, that is, the carrier density, is 10 10 ~10 13 atoms / cm 2 . If a good carrier capture effect is to be achieved, the defect density of the damage layer 4 needs to be much greater than the charge density in the silicon dioxide layer. For example, it can be 10 11 to 10 14 atoms / cm 2, which can not only meet the requirement of capturing carriers, but also minimize the process difficulty and complexity. It can be understood that the damaged layer 4 can also be damaged to amorphous silicon or even a porous form.

[0058] Optionally, the thickness of the damaged layer 4 is 300 nm to 3 μm, so that the thickness of the damaged layer can be minimized while ensuring that the damaged layer can provide sufficient carrier capture effect.

[0059] In an implementable manner, from the interface of the damaged layer 4 with the silicon dioxide layer 2 to its interior, the defect density gradually decreases, that is, the defect density is the largest at the interface of the damaged layer 4 and the silicon dioxide layer 2. Since carriers are mainly concentrated at the interface of the silicon dioxide layer 2 and the silicon substrate layer 1 and move within the interface, therefore, the largest defect density at the interface of the silicon dioxide layer 2 and the silicon substrate layer 1 can enable the carriers to be captured by the damaged layer 4 to the greatest extent.

[0060] Furthermore, the reduction rate of the defect density in the damaged layer 4 can be specifically set according to specific needs. For example, if the silicon substrate layer 1 is thicker, a thicker damaged layer 4 can be set; if the silicon substrate layer 1 is thinner, a thinner damaged layer 4 can be set, etc.

[0061] In this embodiment, the formation method of the damaged layer 4 may include ion implantation or laser ablation, and may also include other methods that can pass through the silicon dioxide layer 2 and directly damage the surface of the silicon substrate layer 1 on the surface of the silicon substrate layer 1 to form the damaged layer 4.

[0062] In an example, the damaged layer 4 is formed by ion implantation, and the damaged layer 4 is the ion implantation layer. The applicant has found that the ions implanted by ion implantation can break the lattice in the silicon substrate layer 1, making the ion implantation layer have many lattice defects. The lattice defects of the ion implantation layer can be used to capture the carriers on the surface of the silicon substrate layer 1, thereby avoiding the conduction of the silicon substrate layer 1. Moreover, the ion implantation method can accurately control indexes such as the position of the damaged layer 4, the defect density of the damaged layer, and the thickness of the damaged layer by accurately controlling the energy and dose of ion implantation.

[0063] The applicant has found that since the silicon dioxide layer itself is amorphous, therefore, even if the implanted ions (such as hydrogen ions, helium ions, etc.) of the foregoing concentration pass through the silicon dioxide layer 2 during ion implantation, it has almost no influence on the performance of the silicon dioxide layer 2 and there is no problem of damage. In addition, taking the implanted ion as a hydrogen ion as an example, the implanted hydrogen may form Si-H bonds with the silicon atoms in the silicon dioxide, and this bond is a stable and immovable chemical bond that will not cause secondary current. Moreover, the low-temperature annealing process after ion implantation can also make H diffuse out of the silicon dioxide, thereby weakening the influence of ion implantation on the performance of the silicon dioxide layer 2.

[0064] Specifically, in this example, the ion implantation concentration, that is, the dose of ion implantation, can be 10 10 ~10 15 ions / cm 2 , thereby forming sufficient defects.

[0065] In this example, since the thickness of the damaged layer is formed by stacking multiple ion implantation sub-layers with different depths (positions), and the depth of the ion implantation sub-layer is determined by the energy of ion implantation, therefore, the energy range of the ion implantation can be set according to the total thickness of the silicon dioxide layer and the damaged layer. The applicant has found that the above ion implantation amount is a relatively low ion implantation concentration, and the thickness of the silicon dioxide is generally several hundred nanometers to one or two micrometers. The ion energy required to penetrate this thickness of the silicon dioxide layer to reach the silicon layer can be several tens to several hundreds of keV, which is relatively easy to achieve for commonly used equipment in this field. For example, for a silicon dioxide layer with a thickness of 100 nm and a damaged layer with a thickness of 300 nm, the depth of ion implantation is 100 nm to 400 nm, and the required ion energy is 6 to 40 keV. For a silicon dioxide layer with a thickness of 2 μm and a damaged layer with a thickness of 3 μm, the depth of ion implantation is 2 μm to 5 μm, and the required ion energy is 200 to 450 keV.

[0066] Furthermore, in this example, since the carriers between the silicon substrate layer and the silicon dioxide layer interface mainly move near the interface, that is, the current caused by the carriers mainly results in lateral conduction near the interface, therefore, in this example, the ion implantation layer is attached to the silicon dioxide layer, and the ion implantation dose is the largest at the interface between the silicon dioxide layer and the silicon substrate layer, so that the damaged layer 4 has the strongest ability to capture carriers.

[0067] In another implementable manner, a damaged layer 4 is formed by laser ablation. The applicant has found that since the light transmittance and damage threshold of silicon dioxide and silicon to lasers with different wavelengths are different, therefore, a laser with a specific wavelength and a specific energy density can pass through the silicon dioxide layer 2 and irradiate on the silicon substrate layer 1. After the silicon substrate layer 1 absorbs the laser energy and is heated, the chemical bonds between atoms are broken, thereby generating lattice defects and forming a laser ablation layer. The lattice defects of the laser ablation layer can be used to capture the carriers on the surface of the silicon substrate layer 1, thereby avoiding the conduction of the silicon substrate layer 1. And the parameters such as the wavelength, energy density, irradiation time, and incident focal depth of the laser can be precisely controlled to precisely control the parameters such as the position, defect density, and thickness of the damaged layer 4.

[0068] The applicant has found that by using the structural characteristics of the ion implantation layer or the laser ablation layer to use the ion implantation layer or the laser ablation layer as the damage layer 4, the damage layer 4 can be integrally prepared based on the bonded body formed by the silicon substrate layer 1 and the silicon dioxide layer 2, so that the surface where the silicon substrate layer 1 is combined with the damage layer 4 has no obvious defects macroscopically, but has carrier capture ability, and the process complexity of preparing the damage layer 4 is low, avoiding the repair and elimination of lattice defects during the preparation of the silicon dioxide layer 2. In addition, the overall stability of the prepared composite single crystal piezoelectric substrate can be improved.

[0069] Figure 2 Figure 4 shows a schematic process flow of preparing the composite single crystal piezoelectric substrate in this example, as Figure 2 shown, the composite single crystal piezoelectric substrate in this example can be prepared according to the method including the following steps 1 to 4:

[0070] The following takes the lithium tantalate thin film as the single crystal piezoelectric layer as an example to illustrate the preparation process of the composite single crystal piezoelectric substrate provided by this application.

[0071] The general idea of preparing the composite single crystal piezoelectric substrate in this example is to first use a silicon substrate as a basis, prepare a silicon dioxide layer on the surface of the silicon substrate, then form damage to the silicon substrate through the silicon dioxide layer to form a damage layer, and control the depth of the damage to be exactly the interface between the silicon substrate and the silicon dioxide, that is, the end face of the formed damage layer is exactly located at the interface between the silicon substrate and the silicon dioxide layer, and the other side of the damage layer is located inside the silicon substrate, and then transfer the lithium tantalate thin film to the upper surface of the silicon dioxide layer. However, the existing technology solutions generally deposit polysilicon on single crystal silicon as a carrier capture layer first, and then deposit silicon dioxide as the silicon dioxide layer and lithium tantalate thin film as the single crystal piezoelectric layer on the polysilicon in sequence. However, due to the different grain sizes in the polysilicon, and it is difficult to control the surface uniformity of the deposited film layers, it is difficult to meet the requirements of downstream users. If thermal oxidation technology is used to prepare silicon dioxide on the basis of polysilicon, a regular lattice structure will be formed inside the polysilicon during the thermal oxidation process, and even single crystal silicon will be formed, resulting in the polysilicon attracting charges and reducing the ability to capture carriers.

[0072] Step 1, perform thermal oxidation treatment on the upper surface of the silicon substrate layer 1 to generate a silicon dioxide layer 2.

[0073] In this example, the silica layer can be prepared on the upper surface of the single-crystal silicon layer by thermal oxidation. The applicant has found that compared with the silica layer prepared by deposition methods, such as plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD), the silica layer prepared by thermal oxidation shows greater superiority in terms of density, uniformity, surface roughness, etc. Specifically, the silica layer prepared by thermal oxidation can directly meet the requirements for bonding with the single-crystal piezoelectric thin film, and the preparation cost of the thermal oxidation method is low and the process is simple.

[0074] In this example, the parameters used in the thermal oxidation method can be specifically set according to parameters such as the specification size of the silica layer.

[0075] Step 2, damage the surface of the silicon substrate layer 1 in contact with the silica layer through the silica layer 2 to form a damaged layer.

[0076] In this example, as described above, the damaged layer can be formed by ion implantation or laser ablation. Further, the ion beam or laser used to form the damaged layer can penetrate the silica layer to reach the target position. Since the ion beam or laser passing through will damage the lattice structure of the single-crystal silicon, a damaged layer with a high defect density can be formed. And the silica layer itself is in an amorphous state and does not involve the problem of lattice damage. Further, the thickness of the silica layer is generally much smaller than the thickness of the silicon substrate layer, making it possible for ions to penetrate the silica layer and reach the single-crystal silicon substrate layer. Further, the preparation of the damaged layer 4 can be completed under the condition of lower ion implantation energy or laser emission intensity, reducing the process difficulty.

[0077] In this example, the implanted ions or laser act on the interface between the silicon substrate layer 1 and the silica layer 2, and a damaged layer 4 is formed inside the silicon substrate layer 1.

[0078] In one embodiment, as Figure 2 shown, the ion implantation method is used to form the damaged layer, and the ion implantation concentration is at least 10 11 atoms / cm 2 , for example, the ion implantation concentration is 10 11 to 10 15 atoms / cm 2 , the applicant has found that the damaged layer formed by the above ion implantation method can not only meet the requirement of capturing carriers, but also minimize the process difficulty and complexity to the greatest extent.

[0079] Further, the thickness of the formed ion implantation layer is 300 nm to 3 μm, and the thickness is minimized while ensuring that the damaged layer can provide sufficient carrier trapping effect.

[0080] In another embodiment, a damaged layer is formed by laser ablation method ( Figure 2 not shown), and the wavelength of the used laser is 200 nm to 1064 nm; the energy density of the laser is 1 J / cm 2 ~100 J / cm 2 , so that the laser can penetrate through the silicon dioxide layer to reach the single crystal silicon surface to damage the silicon.

[0081] Step 3, prepare a single crystal piezoelectric layer 3, and stack the single crystal piezoelectric layer, the silicon dioxide layer, the damaged layer and the silicon substrate layer to form a composite single crystal piezoelectric substrate.

[0082] In this example, the single crystal piezoelectric layer can be prefabricated on another substrate, and then transferred to the silicon dioxide layer by a film transfer method, so as to obtain a composite single crystal piezoelectric substrate with stable structure, and avoid the lattice defects in the damaged layer being repaired or the silicon dioxide layer being peeled off from the silicon substrate layer along the damaged layer during the process of recovering the lattice of the single crystal piezoelectric layer, thereby improving the yield.

[0083] In this example, there is no special limitation on the method for preparing the single crystal piezoelectric layer 3, and any method for preparing a single crystal piezoelectric thin film on a substrate in the prior art can be used to prepare the single crystal piezoelectric layer 3. For example, the single crystal piezoelectric layer 3 can be prepared by ion implantation.

[0084] In this example, the single crystal piezoelectric layer can be a lithium tantalate thin film on a silicon oxide substrate, a single crystal lithium niobate thin film on a silicon oxide substrate, or other structures, such as a lithium tantalate thin film on a silicon substrate, a single crystal lithium niobate thin film on a silicon substrate, etc.

[0085] The following takes a silicon substrate-lithium tantalate thin film as an example to illustrate the preparation method of the single crystal piezoelectric layer. Specifically, the single crystal piezoelectric layer can be prepared by a method including the following steps S31 to S33:

[0086] S31, perform ion implantation on a lithium tantalate wafer 003 to form a thin film layer 031, an implantation layer 032 and a residue layer 033;

[0087] S32, bond the silicon substrate 51 to the thin film layer 031 of the lithium tantalate wafer;

[0088] S33, peel the residue layer 033 from the thin film layer 031 along the implantation layer 032, wherein the thin film layer 031 is the single crystal piezoelectric layer 3 to be transferred subsequently.

[0089] In this example, the parameters for preparing the single-crystal piezoelectric layer are not particularly limited and can be specifically set according to specific needs.

[0090] Further, after peeling off the remaining material layer, lattice recovery treatment is performed on the single-crystal piezoelectric layer to restore the lattice damage that may be caused during the ion implantation process of the single-crystal piezoelectric layer to the single-crystal state. The method of lattice recovery treatment in this example is not particularly limited. For example, the lattice of the single-crystal piezoelectric layer can be restored by an annealing method.

[0091] The process parameters of the method for preparing the single-crystal piezoelectric layer by the above ion implantation method in this example are not particularly limited, and those skilled in the art can specifically select specific parameters according to specific needs.

[0092] In this example, the lattice of the single-crystal piezoelectric layer is restored during the preparation process of the single-crystal piezoelectric layer, so that the single-crystal piezoelectric layer only needs to be bonded to the silicon dioxide layer and does not need to be heat-treated again after bonding, thereby ensuring the structural stability of the damaged layer.

[0093] Step 4: Transfer the single-crystal piezoelectric layer 3 to the upper surface of the silicon dioxide layer 2.

[0094] In this example, the single-crystal piezoelectric layer 3 and the silicon dioxide layer 2 in the semi-finished product prepared in step 2 are respectively surface-activated and then bonded. The single-crystal piezoelectric layer 3 is transferred to the silicon dioxide layer 2, and then the substrate in the single-crystal piezoelectric layer 3 is removed, and finally a composite single-crystal piezoelectric substrate is prepared.

[0095] Specifically, transferring the single-crystal piezoelectric layer 3 to the upper surface of the silicon dioxide layer 2 may include:

[0096] Surface-activate the upper surface of the silicon dioxide layer 2 and the surface of the single-crystal piezoelectric thin film in the single-crystal piezoelectric layer 3 respectively;

[0097] Bond the surface-activated silicon dioxide layer 2 and the single-crystal piezoelectric layer 3;

[0098] Remove the substrate on the single-crystal piezoelectric layer 3.

[0099] The bonding method adopted in this example can be a bonding method that does not require high-temperature treatment in the prior art, and the substrate material carrying the single-crystal piezoelectric layer is removed after bonding, so as to ensure the performance and structural stability of the composite single-crystal piezoelectric substrate.

[0100] The method for removing the substrate in the single-crystal piezoelectric layer in this example is not particularly limited, and the method for removing the substrate in the prior art can be adopted. For example, the substrate can be removed by processes such as chemical solution etching, reactive ion etching, grinding, or a combination of the above processes.

[0101] In the composite single-crystal piezoelectric substrate provided in this example, the silicon dioxide layer is prepared on the silicon substrate layer by thermal oxidation. The damage layer penetrates the silicon dioxide layer and is prepared on the surface layer of the single-crystal silicon layer. The thickness uniformity of the silicon dioxide layer in the composite single-crystal piezoelectric substrate is good, and the defect density for capturing carriers in the damage layer is large. The structure of the composite single-crystal piezoelectric substrate is stable, and it can effectively capture the carriers generated due to the inevitable defects at the interface between the silicon substrate layer and the silicon dioxide layer, thereby improving the performance of the device prepared based on the composite single-crystal piezoelectric substrate.

[0102] Furthermore, the composite single-crystal piezoelectric substrate provided in this application has a dense and uniform silicon dioxide layer, and can also provide sufficient carrier capture ability, thereby weakening the conductive thin layer in the composite single-crystal piezoelectric substrate and reducing the signal loss caused by the conductive thin layer. The method for preparing the composite single-crystal piezoelectric substrate provided in this application first prepares a silicon dioxide layer on the silicon substrate layer by thermal oxidation, and then performs ion implantation at the interface between the silicon substrate layer and the silicon dioxide layer to form a damage layer, making the silicon dioxide layer dense and uniform, and setting the high-temperature process before ion implantation, thereby ensuring the stable structure and performance of the damage layer. Finally, a single-crystal piezoelectric layer is bonded to the silicon dioxide layer by a room-temperature bonding method, further ensuring the stable structure and performance of the damage layer, and finally obtaining a composite single-crystal piezoelectric thin film with excellent performance.

[0103] In this example, a silicon dioxide layer is prepared on the upper surface of the silicon substrate layer by thermal oxidation. A dense and uniform silicon dioxide layer can be obtained at a relatively low temperature. This silicon dioxide layer has good performance and is stably combined with the silicon substrate layer. Then, ion implantation is performed through the silicon dioxide layer into the surface layer of the single-crystal silicon substrate layer to prepare a damage layer on the silicon substrate surface. Finally, the pre-prepared single-crystal piezoelectric layer is transferred to the upper surface of the silicon dioxide layer by a bonding method, thereby avoiding the possible damage to the composite single-crystal piezoelectric substrate along the ion implantation layer caused by the high temperature used in the process of preparing the single-crystal piezoelectric layer.

[0104] This example makes full use of the structural characteristics of the damage layer and the silicon dioxide layer and the characteristics of the preparation process, cleverly sets the order of the process steps, sets the high-temperature process steps before the formation of the damage layer, and prepares the damage layer "remotely through the silicon dioxide layer", taking into account the poor thermal stability of the damage layer and the need for high-temperature processes to prepare the silicon dioxide layer, avoiding the damage layer being in a high-temperature environment. Thus, a composite single-crystal piezoelectric substrate with a stable structure and excellent performance can be prepared through relatively simple process steps, ensuring the stable structure of the damage layer, effectively solving the problem of defect recovery of amorphous silicon or polycrystalline silicon layers in the traditional scheme of sequentially preparing amorphous silicon or polycrystalline silicon layers and silicon dioxide layers on the silicon substrate, and overcoming the problem of damage to the damage layer caused by high-temperature process steps, thereby ensuring the carrier capture ability of the damage layer.

[0105] Example

[0106] Example 1

[0107] Step 1: Take a 4-inch single-crystalline silicon, perform thermal oxidation treatment on its upper surface. The parameters of the thermal oxidation treatment are dry oxygen oxidation at 1000 °C to form a 300-nm-thick silicon dioxide layer, and the thickness uniformity of the silicon dioxide layer is 1.5%.

[0108] Step 2: Through the silicon dioxide layer, perform ion implantation on the surface of the single-crystalline silicon layer. The implanted ion is H + , and the ion implantation concentration is 10 11 atoms / cm 2 , and the thickness of the formed damaged layer (4) is 300 nm;

[0109] Step 3: Take a 4-inch lithium tantalate wafer, perform ion implantation into the lithium tantalate wafer to form a thin film layer, an implanted layer, and a remaining material layer. Among them, the thickness of the thin film layer is 600 nm; bond the ion-implanted lithium tantalate wafer to a silicon substrate, and bond the thin film layer to the silicon substrate; perform heat treatment on the bonded body to cause the remaining lithium tantalate layer to peel off along the implanted layer, form a lithium tantalate thin film on the silicon substrate, and then perform annealing treatment on the lithium tantalate thin film to restore its lattice morphology;

[0110] Step 4: Transfer the lithium tantalate thin film to the upper surface of the silicon dioxide, and remove the silicon substrate on the lithium tantalate thin film to obtain a composite single-crystal piezoelectric substrate.

[0111] For the composite single-crystal piezoelectric substrate obtained in Step 4 of this embodiment, the thickness uniformity of its silicon dioxide layer is better than 2%, the defect density of the damaged layer is 10 11 atoms / cm 2 , and in the use state, the resistivity of the silicon substrate layer is greater than 5000 Ω·cm.

[0112] Example 2

[0113] Step 1: Take a 6-inch single-crystalline silicon, perform thermal oxidation treatment on its upper surface. The parameters of the thermal oxidation treatment are wet oxygen oxidation at 1200 °C to form a 700-nm-thick silicon dioxide layer, and the thickness uniformity of the silicon dioxide layer is 1%;

[0114] Step 2: Through the silicon dioxide layer, perform laser ablation on the surface of the single-crystalline silicon layer. The intensity of the used laser is 20 J / cm 2 , and the thickness of the formed damaged layer (4) is 500 nm;

[0115] Step 3: Take a 6-inch lithium tantalate wafer, perform ion implantation into the lithium tantalate wafer to form a thin film layer, an implanted layer, and a remaining material layer in the lithium tantalate wafer, wherein the thickness of the thin film layer is 900 nm; bond the ion-implanted lithium tantalate wafer to a silicon substrate, and bond the thin film layer to the silicon substrate; perform heat treatment on the bonded body to cause the remaining lithium tantalate layer to peel off along the implanted layer, form a lithium tantalate thin film on the silicon substrate, and then perform annealing treatment on the lithium tantalate thin film to restore its lattice morphology;

[0116] Step 4: Transfer the lithium tantalate thin film to the upper surface of the silicon dioxide, and remove the silicon substrate on the lithium tantalate thin film to obtain a composite single-crystal piezoelectric substrate.

[0117] For the composite single-crystal piezoelectric substrate obtained in Step 4 of this embodiment, the thickness uniformity of its silicon dioxide layer is better than 2%, and the defect density of the damaged layer is 10 14 atoms / cm 2 , and in the use state, the resistivity of the silicon substrate layer is greater than 10000 Ω·cm.

[0118] Comparative example

[0119] Comparative example 1

[0120] Step 1: Take a 4-inch single-crystal silicon substrate, and deposit 1 um of polysilicon using the LPCVD method;

[0121] Step 2: Deposit a silicon dioxide layer with a thickness of 600 nm on the polysilicon using PECVD, and the thickness uniformity of the silicon dioxide layer is 3%;

[0122] Step 3: Chemically mechanically polish the silicon dioxide to achieve a smooth surface for bonding, polish the silicon dioxide to 300 nm, and the uniformity of the silicon dioxide after polishing is 6%;

[0123] Step 4: Use the method of ion implantation plus bonding to fabricate a lithium tantalate single-crystal thin film on the silicon dioxide layer obtained in Step 3, and the thickness of the thin film layer is 900 nm.

[0124] For the composite piezoelectric substrate obtained in this comparative example, the thickness uniformity of its silicon dioxide layer is less than 6%, and in the use state, due to the poor thickness uniformity of the silicon dioxide layer, the frequency temperature coefficient and the central frequency uniformity of the final device become worse.

[0125] The present application has been described in detail above in conjunction with specific embodiments and exemplary examples. However, these descriptions should not be construed as limiting the present application. Those skilled in the art understand that, without departing from the spirit and scope of the present application, various equivalent substitutions, modifications, or improvements can be made to the technical solutions and their implementation manners of the present application, and all of these fall within the scope of the present application. The protection scope of the present application shall be subject to the appended claims.

Claims

1. A composite single crystal piezoelectric substrate, characterized in that, The composite single-crystal piezoelectric substrate sequentially includes a silicon substrate layer (1), a silicon dioxide layer (2), and a single-crystal piezoelectric layer (3) from bottom to top. Among them, a region with a preset depth in the silicon substrate layer (1) is damaged from its interface with the silicon dioxide layer to its interior to form a damaged layer (4), and the damaged layer (4) is in contact with the silicon dioxide layer (2). Among them, the composite single-crystal piezoelectric substrate is prepared by the following method: performing a thermal oxidation treatment on the upper surface of the silicon substrate layer to generate a silicon dioxide layer; damaging the surface of the silicon substrate layer through the silicon dioxide layer to form a damaged layer; among them, the method for damaging the surface of the silicon substrate layer includes an ion implantation method or a laser ablation method; preparing a single-crystal piezoelectric layer, and stacking the single-crystal piezoelectric layer, the silicon dioxide layer, the damaged layer, and the silicon substrate layer to form a composite single-crystal piezoelectric substrate.

2. The composite single-crystal piezoelectric substrate according to claim 1, wherein The defect density of the damaged layer (4) is at least 10 11 / cm 2 ; and / or the thickness of the damaged layer (4) is 300 nm to 3 μm.

3. The composite single-crystal piezoelectric substrate according to claim 1, wherein the thickness uniformity of the silicon dioxide layer (2) is less than 2%.

4. The composite single-crystal piezoelectric substrate according to claim 1, wherein In the ion implantation method, the concentration of ion implantation is at least 10 11 atoms / cm 2 ; and / or In the laser ablation method, the wavelength of the laser is 200 nm to 1064 nm, and the energy density is 1 J / cm 2 ~100 J / cm 2 .

5. The composite single-crystal piezoelectric substrate according to claim 1, wherein the preparation of the single-crystal piezoelectric layer includes: performing ion implantation on a single-crystal piezoelectric wafer bonded to a substrate material to form a thin film layer, an implanted layer, and a remaining material layer; bonding the substrate to the thin film layer of the single-crystal piezoelectric wafer; peeling off the remaining material layer from the thin film layer along the implanted layer.

6. The composite single crystal piezoelectric substrate according to claim 1, wherein, Transferring the single-crystal piezoelectric layer to the upper surface of the silicon dioxide layer includes: performing surface activation on the upper surface of the silicon dioxide layer and the surface of the single-crystal piezoelectric layer respectively; bonding the surface-activated silicon dioxide layer and the single-crystal piezoelectric layer; removing the substrate material on the single-crystal piezoelectric layer.

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