Cascaded PWM Converter Control

Abstract

An electrical converter (10) includes a main converter (12) for generating a first output voltage (u 1abc ), and a converter unit (14a) for converting the first output voltage (u 1abc ) into a second output voltage (u 2abc ). A method for operating an electrical converter (10) includes: receiving a reference voltage (v * abc ) for the electrical converter (10); pulse-width modulating the reference voltage (v * abc ) at a first modulation frequency to generate a first switching signal (s 1abc ) for the main converter (12); switching the main converter (12) using the first switching signal (s 1abc ) to generate a first output voltage (u 1abc ); estimating the first output voltage (v 1abc ) from the first switching signal (s 1abc ); determining a voltage error (v * abc ) by subtracting the estimated first output voltage (v 1abc ) from the reference voltage (v * 2abc ); pulse-width modulating the voltage error (v * 2abc ) at a second modulation frequency higher than the first modulation frequency to generate additional switching signals (s 2abc , s 3abc ) for the converter unit (14a); and switching the converter unit (14a) using the additional switching signals (s 2abc , s 3abc ) to generate a second output voltage (u 2abc ).

Description

Technical Field

[0001] The invention relates to a method for operating an electrical converter and to an electrical converter. Background Art

[0002] In medium voltage applications, power converters have traditionally been operated at rather low switching frequencies in the range of a few hundred Hertz due to the high switching losses of Si-based medium voltage switches such as IGBTs and IGCTs. Recently, the introduction of SiC-based switches with high blocking voltages and possible fast switching speeds has led to expectations that these switches may also be applied in medium voltage converters in the near future.

[0003] In low voltage applications, there have been significant improvements in SiC MOSFETs with blocking voltages up to 1.7 kV. Due to the low commutation loop inductance of the 2-level half-bridge modules, very high switching speeds may be feasible and switching frequencies of around 24 kHz may become common. However, SiC modules are still more expensive compared to comparable Si IGBT modules.

[0004] US2014016380A1 describes a multi-level voltage converter, which includes a multi-point converter circuit and at least one full-bridge inverter circuit. The multi-point converter circuit is configured to convert a DC voltage into an intermediate multi-level voltage. The full-bridge inverter circuit is electrically connected in series with the multi-point converter circuit and is configured to receive the intermediate multi-level voltage to generate a multi-level output voltage corresponding to a single-phase output.

[0005] WO2018 / 172329A1 relates to an inverter, the inverter comprising a first inverter stage and a second inverter stage, the first inverter stage having a first switching frequency, the second inverter stage being connected to the first inverter stage and having a second switching frequency higher than the first switching frequency. A switching signal for the second inverter stage is generated by: calculating a voltage error by subtracting an estimated output voltage of the first inverter stage from a reference voltage for the inverter; and pulse width modulating the voltage error with a modulation frequency that is higher than the modulation frequency used to generate the switching signal for the first inverter stage.

[0006] WO2018 / 029303A1 relates to a method for controlling a two-level converter system. The method comprises: determining an output voltage reference for the converter system using a first controller stage; generating a switching command for a main converter using the first controller stage based on the output voltage reference; and generating a switching command for a floating converter unit using a second controller stage, the floating converter unit being connected to the output of the main converter. Summary of the invention

[0007] It is an object of the invention to provide an economical converter with low losses.

[0008] This object is achieved by the subject-matter of the independent claims. Further exemplary embodiments are evident from the dependent claims and the following description.

[0009] A first aspect of the invention relates to a method for operating an electrical converter. For example, the method may be performed by a controller of the electrical converter. A further aspect of the invention relates to an electrical converter adapted and / or configured for performing the method.

[0010] The electrical converter comprises a main converter for generating a first output voltage and a converter unit for converting the first output voltage into a second output voltage.

[0011] The main converter may be a two-level, three-level and / or multi-level converter that converts a DC link voltage from a DC link, which may include one or more DC link capacitors, to a first output voltage.

[0012] It has to be noted that the electrical converter may comprise further converter cells which are connected in series with each other and with the main converter.

[0013] Each such converter unit may include a first half-bridge and a second half-bridge, the first half-bridge and the second half-bridge being connected in parallel to each other via a DC link, which may include a DC link capacitor. The (first) converter unit may convert the first output voltage into a second output voltage. The second converter unit may convert the second output voltage into a third output voltage. The third converter unit may convert the third output voltage into a fourth output voltage, etc.

[0014] According to an embodiment of the invention, the method comprises: receiving a reference voltage for an electrical converter. The reference voltage may be a scalar in the case of a single-phase converter and may be a two-component vector or a three-component vector in the case of a three-phase converter. The vector may be provided in a three-phase (abc) coordinate system or in a fixed orthogonal (αβ and optionally γ) coordinate system.

[0015] The reference voltage may be provided by an external control loop, which controls, for example, the torque and / or speed of an electric machine supplied by an electric converter.

[0016] According to an embodiment of the invention, the method comprises: pulse width modulating a reference voltage with a first modulation frequency for generating a first switching signal for a main converter. The pulse width modulation may be performed by comparing a voltage reference (or a component thereof) with one or more carrier signals having a modulation frequency. When the reference voltage intersects the corresponding carrier signal, the level of the switching signal may be changed. The first switching signal may be a multi-level switching signal having as many levels as the main converter is designed to generate.

[0017] According to an embodiment of the invention, the method comprises: switching the main converter using a first switching signal to generate a first output voltage. The switching signal may be transformed into a switch position of the main converter, which is applied to a switch of the main converter.

[0018] According to an embodiment of the invention, the method comprises: estimating a first output voltage from the first switching signal. The first output voltage may be estimated by multiplying the first switching signal by half of a DC link voltage of the main converter.

[0019] According to an embodiment of the invention, the method comprises determining a voltage error by subtracting the estimated first output voltage from a reference voltage. The voltage error indicates the difference between the expected voltage (reference voltage) and the generated voltage (first output voltage), which may also be a scalar or a vector, depending on the voltage reference. The converter unit is switched in such a way as to reduce this error even more.

[0020] According to an embodiment of the present invention, the method comprises: pulse width modulating the voltage error with a second modulation frequency higher than the first modulation frequency to generate an additional switching signal for the converter unit; and switching the converter unit with the additional switching signal to generate a second output voltage.

[0021] Pulse width modulation of the voltage error (and further pulse width modulation of the voltage error as described below) may be performed as described with respect to the reference voltage. The voltage error may be compared with one or more carrier signals of the second modulation frequency, and a voltage level for the further switching signal may be determined.

[0022] The further switching signal can be used to switch the complete converter unit. In this case, the further switching signal can have two levels or three levels.

[0023] It is also possible that the additional switching signal is used to switch only one half-bridge of the converter unit. In this case, the additional switching signal can have two levels. The other half-bridge of the converter unit can be switched using the additional switching signal, which can have a different frequency than the first switching signal and the additional switching signal.

[0024] The second output voltage may be the first output voltage, optionally with the voltage of the DC link of the converter unit added or subtracted therefrom. Due to the higher switching frequency of the converter unit, the second output voltage may have a smaller second voltage error compared to the reference voltage. In this way, lower harmonics may be present in the second output voltage. Large passive filters and / or complex active filters may be avoided.

[0025] As an example, the second modulation frequency is at least five times the first modulation frequency.For example, the first modulation frequency may be lower than 500 Hz and / or the second modulation frequency may be higher than 2.5 kHz.

[0026] According to an embodiment of the present invention, when the reference voltage relates to a three-phase electrical converter, it is provided in a fixed orthogonal coordinate system (i.e., the αβ and optional γ systems) and converted into a three-phase (abc) coordinate system. The first switching signal may be generated from the reference voltage in the three-phase coordinate system, and the first output voltage may be estimated in the three-phase coordinate system.

[0027] The estimated first output voltage may be transformed into a fixed orthogonal coordinate system, and the first voltage error may be determined by subtracting the estimated first output voltage from the reference voltage in the fixed orthogonal coordinate system. In particular, when the reference voltage is provided as a two-component (αβ) vector, the voltage error may be determined without accidentally generating a common mode component.

[0028] According to an embodiment of the present invention, the reference voltage includes a common-mode reference voltage component. The common-mode (i.e., γ) component may be provided by an external control loop. The common-mode component may not only be provided with a voltage reference, but may also be added to a voltage error and / or an additional voltage error. In this way, additional purposes (such as injecting a basic voltage component in a converter unit and / or extending a linear modulation regime in order to balance converter unit capacitors of different converter units) may be achieved.

[0029] According to an embodiment of the present invention, a common mode component is added to the voltage error, which may be in a fixed orthogonal coordinate system.

[0030] According to an embodiment of the invention, the electrical converter comprises a second converter unit for converting the second output voltage into a third output voltage. The second converter unit may also be switched based on pulse width modulation (e.g. with a modulation frequency even higher than (as) the second modulation frequency). Furthermore, this third modulation frequency may be at least 5 times the second modulation frequency.

[0031] According to an embodiment of the present invention, the method further comprises: estimating a second output voltage from an additional switching signal, the additional switching signal being a second switching signal; determining a second voltage error by subtracting the estimated second output voltage from the first voltage error; pulse width modulating the second voltage error using a third modulation frequency to generate a third switching signal for the second converter unit, the third modulation frequency being higher than the second modulation frequency; and switching the second converter unit using the third switching signal to generate a third output voltage. Typically, the complete second converter unit may be switched using the second switching signal, and the complete third converter unit may be switched using the third switching signal.

[0032] According to an embodiment of the present invention, the converter unit comprises a first half-bridge for receiving a first output voltage and a second half-bridge for providing a second output voltage. As a further alternative, the half-bridges of the converter unit may be switched using different switching signals, the different switching signals being based on different modulation schemes. The first half-bridge may be switched using a second switching signal, and the second half-bridge may be switched using a third switching frequency that is higher than the second switching frequency (e.g., 5 times the second switching frequency).

[0033] According to an embodiment of the present invention, the method further comprises: generating a second switching signal from the voltage error, wherein if the voltage error is higher than 0, the second switching signal is 0, and if the voltage error is lower than 0, the second switching signal is 1; and switching the first half bridge using the second switching signal. The second switching signal can be generated using this simple pulse width modulation scheme.

[0034] According to an embodiment of the present invention, the method further includes: using an upper carrier signal to perform pulse width modulation on the voltage error to generate an upper third switching signal, and using a lower carrier signal to perform pulse width modulation on the voltage error to generate a lower third switching signal, wherein the upper carrier signal sweeps a positive voltage range and the lower carrier signal sweeps a negative voltage range; if the voltage error is higher than 0, the upper third switching signal is selected, and if the voltage error is lower than 0, the lower third switching signal is selected; and the second half bridge is switched using the selected third switching signal to generate a second output voltage.

[0035] In this way, a single converter unit can be switched with two different modulation frequencies. This can have the advantage that only the half-bridge with the higher switching frequency has to be provided with semiconductor switches with lower switching losses, such as SiC switches.

[0036] It has to be noted that different switching schemes can be combined.

[0037] It is possible that the electrical converter has a first converter unit and a second converter unit, and that the complete first converter unit is switched using a second switching signal determined from a first voltage error, and that the second converter unit is switched using a third switching signal and a fourth switching signal determined from a second voltage error, wherein the second voltage error is the difference between the first voltage error and an estimated second output voltage.

[0038] A further aspect of the invention relates to a controller for an electric converter, the controller being adapted and / or configured for performing the method as described above and in the following. A further aspect of the invention relates to a computer program which, when executed by a processor, performs the method as described above and in the following, and a further aspect of the invention relates to a computer readable medium in which such a computer program is stored.

[0039] The computer readable medium may be a floppy disk, a hard disk, a USB (Universal Serial Bus) storage device, a RAM (Random Access Memory), a ROM (Read Only Memory), an EPROM (Erasable Programmable Read Only Memory) or a FLASH memory. The computer readable medium may also be a data communication network (such as the Internet) that allows the program code to be downloaded. In general, the computer readable medium may be a non-transitory medium or a transient medium.

[0040] For example, the controller may comprise a processor and a memory, such a computer program being stored in the memory and executable by the processor.It has to be noted that the method may be at least partially performed in hardware, such as a DSP and / or an FPGA.

[0041] It has to be understood that features of the method as described above and below may be features of the computer program, the computer readable medium and the electrical converter as described above and below, and vice versa.

[0042] The electrical converter and / or the main converter may be a medium voltage converter, ie a converter which may be adapted to handle voltages exceeding 1 kV.

[0043] The electrical converter may further comprise a controller, which is adapted to perform the method as described above and below, such that the main converter is switched by a first switching signal modulated with a first modulation frequency and such that at least one converter unit is switched by a further switching signal modulated with a second modulation frequency.

[0044] According to an embodiment of the invention, the main converter is a two-level converter. The switching signal for the two-level converter may have two levels, such as 0 and 1. For example, the two-level converter may include a half-bridge connected in parallel with the DC link.

[0045] According to an embodiment of the present invention, the main converter is a three-level converter. A switching signal for the three-level converter may have three levels, such as -1, 0, and 1.

[0046] For example, the main converter may be a three-level neutral point clamped converter which may include two series-connected half-bridges connected in parallel with a split DC link and the midpoints connected via a third half-bridge. The midpoint of the third half-bridge may be connected to the midpoint of the split DC link.

[0047] According to an embodiment of the invention, the main converter is a three-level T-type converter comprising a half-bridge connected in parallel to the split DC link. The midpoint of the half-bridge is connectable to the midpoint of the split DC link via a bidirectional switch.

[0048] According to an embodiment of the invention, an electrical converter comprises a converter unit having a first half-bridge and a second half-bridge. The first half-bridge and the second half-bridge are connected to each other via a DC link. All converter units of the converter can be designed in this way. The half-bridge may comprise two semiconductor switches, which are connected in series.

[0049] According to an embodiment of the invention, the first half-bridge of the converter unit is switched using the second switching signal and the second half-bridge of the converter is switched using the third switching signal. It is possible that the first half-bridge is switched using a lower switching frequency than the second half-bridge. This may be advantageous when the switching of the second half-bridge has lower switching losses than the switching of the first half-bridge.

[0050] According to an embodiment of the present invention, the first half-bridge includes Si semiconductor switches (such as IGBTs and / or IGCTs) and / or the second half-bridge includes SiC semiconductor switches (such as MOSFETs). With this design, the lower switching losses of SiC semiconductor switches can be utilized.

[0051] According to an embodiment of the present invention, the electrical converter comprises a first converter unit and a second converter unit, each of the first converter unit and the second converter unit comprising a first half-bridge and a second half-bridge, the first half-bridge and the second half-bridge being connected to each other via a DC link. It is also possible that the electrical converter comprises converter units connected in series, which are switched using switching signals of different frequencies. The first converter unit may be switched using the second switching signal, and the second converter unit may be switched using a third switching signal, the third switching signal having a higher switching frequency than the second switching signal. This may be advantageous when the switching of the third converter unit has lower switching losses compared to the switching of the second half-bridge.

[0052] According to an embodiment of the invention, the first converter unit comprises (only) Si semiconductor switches and the second converter unit comprises (only) SiC semiconductor switches.

[0053] According to an embodiment of the invention, the main converter is a three-phase converter having three main converter phase outputs, wherein at least one converter unit is connected to each main converter output and provides a converter unit phase output. At each phase output of the main converter, one or more serially connected converter units may be connected. The serially connected converter units of each phase may be switched with different switching frequencies as described above and below.

[0054] In this case, the reference voltage, the voltage error(s), the switching signal, etc. may be vectors having components in each phase.

[0055] According to an embodiment of the invention, the converter unit phase output is connected to a passive filter. The passive filter and / or the sine filter may include, for example, an inductor connected to the output via a star connection or a delta connection and / or a capacitor interconnected to the output. Due to the increased switching frequency, low-cost passive filters may be used because their components may have lower inductance and / or capacitance. The reduced cost of the passive filter may overcompensate for the increased cost of the SiC semiconductor switch.

[0056] According to an embodiment of the invention, the converter unit phase output is connected to an electric machine having three galvanically separated windings, which are connected via a further converter. At high switching frequencies, such an electric drive can have relatively low switching losses. The further converter can also be designed with SiC switches.

[0057] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] The subject matter of the invention will be explained in more detail hereinafter with reference to exemplary embodiments, which are illustrated in the drawings.

[0059] Figure 1 An electrical converter according to an embodiment of the invention is schematically shown.

[0060] Figure 2A Schematically showing the Figure 1 The main converter of the electrical converter.

[0061] Figure 2B Schematically showing the Figure 1 Another type of electrical converter is the main converter.

[0062] Figure 2C Schematically showing the Figure 1 Another type of electrical converter is the main converter.

[0063] Figure 3A Schematically showing the Figure 1 A converter unit of an electrical converter.

[0064] Figure 3B Schematically showing the Figure 1 Another type of converter unit of an electrical converter.

[0065] Figure 4 An electrical converter according to a further exemplary embodiment of the invention is schematically shown.

[0066] Figure 5A Schematically showing the Figure 4 The main converter of the electrical converter.

[0067] Figure 5B Schematically showing the Figure 4 Another type of electrical converter is the main converter.

[0068] Figure 5C Schematically showing the Figure 4 Another type of electrical converter is the main converter.

[0069] Fig. 6A Schematically shows the connection to Figure 4 Filters for electrical converters.

[0070] Figure 6B Schematically shows the connection to Figure 4 The motor of the electric converter.

[0071] Figure 7 Shown is a simplified diagram illustrating a controller and a method for controlling an electric converter according to an embodiment of the invention.

[0072] Figure 8 Shown is a simplified diagram with output voltages generated by an electrical converter according to an embodiment of the invention.

[0073] Fig. 9 Shown is a simplified diagram illustrating a controller and a method for controlling an electric converter according to further embodiments of the invention.

[0074] Fig.10 Shown is a simplified diagram illustrating a controller and a method for controlling an electric converter according to further embodiments of the invention.

[0075] Fig.11 Show more detailed diagram Fig.10A schematic diagram of a part of .

[0076] The reference symbols used in the drawings and their meanings are listed in summary form in the list of reference symbols. In principle, identical components are provided with the same reference symbols in the drawings. DETAILED DESCRIPTION

[0077] Figure 1 An electrical converter 10 is shown which consists of a main converter 12 and converter units 14a, 14b, 14c connected in series. It is possible that the converter 10 comprises only one converter unit 14a, two converter units 14a, 14b as well as more than three converter units.

[0078] The electrical converter 10 further comprises a controller or modulator 16 which generates switching signals s1 , s2 , s3 , s4 , s5 for the main converter 12 and the respective converter units 14 a , 14 b , 14 c .

[0079] When the main converter is switched by the switching signal s1, the main converter generates a first output voltage u1, for example, from a DC voltage. The first output voltage u1 is supplied to the first converter unit 14a, and when the first converter unit 14a is switched by the switching signal s2, the first converter unit 14a generates a second output voltage u2. The second output voltage u2 is supplied to the second converter unit 14b, and when the second converter unit 14b is switched by the switching signal s3, the second converter unit 14b generates a third output voltage u3.

[0080] As will be described below, the switching signals s1, s2, s3, s4, s5 may be generated using pulse width modulation, wherein the modulation frequency for the switching signals may be increased. In this way, the frequency of the output voltages u1, u2, u3, u4 may also be increased.

[0081] Figure 1 The converter unit 14c can be switched by two switching signals s4, s5, as shown in FIG. Figure 5C The third output voltage u3 may be supplied to the third converter unit 14c, and when the third converter unit 14c is switched by the switching signals s4, s5, the third converter unit 14c generates a fourth output voltage u4.

[0082] It must be noted that converter unit 14a and / or 14b can be omitted and the main converter 12 can be directly connected to converter unit 14c, which is supplied by two switching signals s4, s5. It is also possible that one or more converter units are connected to converter unit 14c on the side opposite to the main converter 12.

[0083] Figure 2AAn example of a main converter 12 is shown. The main converter 12 may be a two-level converter having a single DC link 18 consisting of series-connected capacitors 20. The DC link 18 is connected in parallel with a half-bridge 22 consisting of two series-connected semiconductor switches 24. The output of the main converter 12 is provided by a midpoint 26 between the switches 24.

[0084] Figure 2B Further examples of the main converter 12 are shown in the form of a three-level neutral point piloted converter and / or a T-type converter. Figure 2B The main converter 12 is supplemented by Figure 2B The main converter 12 in EMBODIMENT 1 has a split DC link 18 , wherein a midpoint 28 of the DC link 18 is connected to a midpoint 26 of the half-bridge 22 via a bidirectional switch 30 .

[0085] Figure 2C The main converter 12 is shown in the form of a three-level active neutral point clamped converter. Two series-connected half-bridges 22 are connected in parallel to the split DC link and provide the output 32 of the converter between them. The midpoints 26 of the half-bridges are connected to each other via a third half-bridge 22, which is directly connected to the midpoint 28 of the DC link 18.

[0086] Figure 3A Converter units 14a, 14b, 14c are shown, which include a first half-bridge 34a, a DC link 38 (with a capacitor 40) and a second half-bridge 34b connected in parallel. The midpoint 40a of the first half-bridge 34a may be connected to the output of the main converter 12 or to a previous converter unit. The midpoint 40b of the second half-bridge 34b may be connected to a subsequent converter unit or may provide the output of the electrical converter 10.

[0087] The switches 24' of the half bridges 34a, 34b may comprise Si-based semiconductor switches, such as Si IGBTs or Si IGCTs. The main converter 12 may also have switches 24 of this type. However, it is also possible that all switches 24' of the switches 24' of the converter units 14a, 14b, 14c comprise SiC-based semiconductor switches, such as SiC MOSFETs.

[0088] Figure 3B A converter unit 14c is shown, which has Figure 3A The converter units of FIG. 34 have the same circuit design, however, wherein the switches 24 ′ of the first half-bridge 34 a comprise Si-based semiconductor switches and the switches 24 ″ of the second half-bridge 34 b comprise SiC-based semiconductor switches. Figure 3A The converter unit 14c may consist of two modules and / or may be regarded as a hybrid unit.

[0089] Figures 1 to 2C The single-phase power converter 10 is involved. Figures 4 to 6B A three-phase electrical converter 10 is involved.

[0090] Figure 4 Corresponds to Figure 1 And an electrical converter 10 is shown, comprising a main converter 12 having three-phase outputs. Three series-connected converter units 14a, 14b, 14c are connected to each of these outputs.

[0091] for Figure 4 The controller 16 generates switching signals s for the phases a, b, c of the main converter 12 and the corresponding converter units 14a, 14b, 14c of the corresponding phases. 1abc 、s 2abc 、s 3abc 、s 4abc 、s 5abc The corresponding output voltage is u 1abc 、u 2abc 、u 3abc 、u 4abc .

[0092] Figure 5A Corresponds to Figure 2A And a main converter is shown which is a three-phase two-level converter having three half-bridges 22 connected in parallel to the DC link 18 .

[0093] Figure 5B Corresponds to Figure 2B And a main converter is shown, which is a three-phase three-level neutral point pilot-controlled converter and / or a T-type converter, and the three-phase three-level neutral point pilot-controlled converter and / or the T-type converter has three Figure 2B As shown in the circuits described, the three circuits are connected in parallel to the split DC link 18 .

[0094] Figure 5C Corresponds to Figure 2C And a main converter is shown, which is a three-phase three-level active neutral point clamped converter, and the three-phase three-level active neutral point clamped converter has three Figure 2C As shown in the circuits described, the three circuits are connected in parallel to the split DC link 18 .

[0095] Fig. 6AIt is shown that a passive filter 42 may be connected between the electrical converter 10 and the load 44. The passive filter 42 may include an inductor 46 interconnecting the electrical converter 10 and the load 44 in each phase. Furthermore, the passive filter 42 may include a capacitor 48, which connects the phases to each other, for example via a star connection.

[0096] In general, using the approach described herein, the main converter 12 can be designed to operate at a low switching frequency, since it does not have to perform active damping of the filter 42. For example, active damping can be accomplished using the converter units 14a, 14b, 14c.

[0097] Due to the high switching frequency of the SiC half-bridge, the filter 42 can be designed with a higher resonant frequency, requiring smaller passive components. In particular, the converter side inductance can be significantly reduced. Inductors commonly used in dv / dt filters or EMC filter circuits can be sufficient to build a sine filter.

[0098] Smaller filter capacitors 48 are less likely to cause problems related to disturbances to the load 44 , such as self-excitation in the case of use with a motor or excitation of grid harmonics in the case of a grid connection.

[0099] Figure 6B An electric machine 50 with three galvanically separated windings 52 is shown to be connectable to the electric converter 10. On the side opposite to the electric converter 10, the windings 52 can be connected via a further converter 54, which can be, for example, Figure 5A The two-level converter 54 may include a SiC switch 24".

[0100] Figure 7 Shown is a simplified diagram illustrating the controller 16 and the method for controlling the electrical converter 10 as described with respect to the previous figures.

[0101] In order to achieve very low harmonic distortion, the method uses a modulation technique, which can be called "sequential filtering" or "repetitive filtering". The switching signal s obtained by the sequence of different switching frequencies 1abc 、s 2abc 、s 3abc The method is used to obtain. In the following, vector-valued signals are considered, and scalar signals are not considered. All quantities in the following have components about phases a, b and c. In the case of scalars, only one component must be considered, and for example the switching signals would be s1, s2, s3.

[0102] Three switch signals 1abc 、s 2abc 、s 3abcProduced by low frequency pulse width modulation stage 56a, medium frequency pulse width modulation stage 56b and high frequency pulse width modulation stage 56c.

[0103] Low frequency switching signal 1abc Applied to the main converter 12, the low frequency switching signal s 1abc A carrier signal of 50-250 Hz can be used to generate it.

[0104] Medium frequency switching signal 2abc Applied to the first converter unit 14a, the intermediate frequency switching signal s 2abc It can be generated using a 350-1kHz carrier signal.

[0105] High frequency switching signal 3abc Applied to the second converter unit 14b, the high frequency switching signal s 3abc A carrier signal of about 20 kHz can be used for generation.

[0106] Further pulse width modulation stages may be included for the further converter unit 14c. In the following it is assumed that the converter 10 has two stages of converter units 14a, 14b.

[0107] As already mentioned, it is advantageous to use different types of semiconductor switches 24, 24', 24" in different converter stages and filter stages. For example, in the main converter 12, semiconductor switches 24 with a high blocking voltage, relatively high switching losses and preferably low conduction losses may be used, such as IGCTs or high-voltage IGBTs. It is advantageous to operate these switches 24 at a low switching frequency, such as 50-250 Hz.

[0108] In the first converter unit 14a, Si-based IGBTs may be used with a medium switching frequency of about 350 Hz-1 kHz. In the second converter unit 14b, SiC-based switches 24' may be used, achieving a high switching frequency of about 20 kHz. Using such a high switching frequency for the second converter unit 14b allows the design of an LC sinusoidal filter 42 with a very small and low-cost inductor 46. The corresponding resonant frequency f res Can be designed up to 6kHz. If required, the current control bandwidth can be very high and active damping can be easily achieved.

[0109] Back to Figure 7 , the controller 16 receives the three-phase reference voltage v about phases a, b and c * abc . Reference voltage v * abc During steady-state operation, the reference voltage v * abcUsually a sinusoidally varying quantity.

[0110] Reference voltage v * abc Divided by the total DC link voltage v of the main converter 12 1dc half of , in order to scale it. The resulting three-phase modulated signal u * 1abc Then it can be scaled to the range [-1 1] 3 It is fed to the first pulse width modulation stage 56a which generates a three-phase switching signal s 1abc , the three-phase switching signal s 1abc In case of a three-level main converter 12 may have levels / values ​​- 1, 0 and -1. The low frequency modulation stage 56a may operate at very low pulse counts, for example with fundamental frequency switching or with pulse width modulation with low pulse counts.

[0111] The three-phase terminal voltage of the main converter 12 is u 1abc This voltage can be based on the DC link voltage v 1dc (For example, by setting the switch signal s 1abc Multiply by the DC link voltage v 1dc Half of the reference voltage v * abc With the estimated main converter voltage v 1abc The difference between is the (first) voltage error v * 2abc =v * 1abc -v 1abc .

[0112] Voltage error v * 2abc The capacitor voltage v across the first converter unit 14a 2dc The second pulse width modulation stage 56b generates a three-phase switching signal s having levels -1, 0 and 1 for the switch 24' in the first converter unit 14a. 2abc .

[0113] It is also possible that the second pulse width modulation stage 56b distributes the switching signal evenly to the two half-bridges 34a, 34b of the converter cell 14a. This can be done, for example, by using two carriers for modulation of the converter cell switches 24'. The carriers can be phase-shifted by 180°.

[0114] The switching frequencies of the two half-bridges 34a, 34b in the converter unit 14a may be equal, and the switching losses may be evenly distributed between the two half-bridges 34a, 34b.

[0115] The three-phase terminal voltage after the first converter unit 14a is u 2abc This voltage is relative to the first voltage u 1abc The difference can again be based on the DC link voltage v of the first converter unit 14a 2dc (For example, by setting the switch signal s 2abc Multiply by the DC link voltage v 2dc ) to measure or reconstruct. The first voltage error v * 2abc and the second estimated converter unit voltage v 2abc The difference between the two is the second voltage error v * 3abc =v * 2abc -v 2abc .

[0116] The second voltage error v * 3abc The capacitor voltage v of the second converter unit 14b is 3dc The third pulse width modulation stage 56c generates a three-phase switching signal s having levels -1, 0 and 1 for the switch 24' in the second converter unit 14b. 3abc .

[0117] The purpose of the third modulation stage may be to almost remove the third voltage error v * 3abc The principle may be the same as for the second modulation stage, thereby generating a three-phase switching signal s having components -1, 0 and 1 for the switch 24' in the second converter unit 14b. 3abc .

[0118] exist Figure 7 In the reference voltage v * abc and voltage error v * 2abc 、v * 3abc Divide by the scalar quantity to obtain the modulated signal u * 1abc 、u * 2abc 、u * 3abc These scalar quantities may be different from the nominal (or actual) DC link voltage. For example, if the DC link voltage v of the first converter unit 14a is 2dc is quite small, then use a value greater than v 2dc The value of u is scaled * 2abcIt is advantageous to avoid that the second pulse width modulation stage 56b enters the non-linear modulation range. The corresponding increase in the residual error can be compensated by the subsequent third pulse width modulation stage 56c.

[0119] Figure 8 shows the switching signal s with scaling 1a 、s 2a 、s 3a and the modulation signal u * a (i.e. the scaled reference voltage v * a In addition, the sum of the scaled switching signals is shown, which can be compared with the original modulation signal u * a In comparison, all signals are shown within one fundamental period of the voltage.

[0120] Figure 7 The controller shown in FIG. 1 can be designed to minimize the differential mode voltage error and the common mode voltage error, which is the reference voltage v * abc The output voltage u at the terminals of the second converter unit 14b 2abc The difference between.

[0121] exist Fig. 9 , a controller 16 is shown which can be designed to minimize only the differential mode component of this error by considering the voltage error in a fixed orthogonal (αβ) coordinate system.

[0122] Reference voltage v * αβ can be provided in a fixed orthogonal (αβ) coordinate system and transformed into a three-phase (abc) coordinate system by an inverse Clarke transformation (performed by block 58a). After that, it can be represented by Figure 7 is processed as described, and the pulse width modulation stage 56 can generate a first switching signal s 1abc The estimated voltage v 1abc The Clarke transformation (performed by block 58b) can be used to transform back to the fixed orthogonal (αβ) coordinate system, and the voltage error v * 2αβ The reference voltage v * αβ Subtract the estimated voltage v from 1αβ to be sure.

[0123] With respect to the second pulse width modulation stage 56b, the same transformation may be performed.

[0124] It is also possible that the common mode component v * γ 、v *2γ 、v * 2γ is added to each modulation stage 56a, 56b, 56c in order to achieve additional purposes, such as injecting a fundamental voltage component in the converter cells 14a, 14b or extending the linear modulation range in order to balance the converter cell DC link 38.

[0125] In particular, the reference voltage v * αβ Can include common mode component v * γ , the common mode component v * γ Provided by an external controller. In addition, the common-mode component v * 2γ can be added to the first voltage error v * 2αβ and / or common mode component v * 3γ can be added to the second voltage error v * 3αβ .

[0126] Fig.10 and Fig.11 The controller 16 and the half-bridge of the converter unit 14c are described using different switching signals s 2abc 、s 3abc To switch method. Fig.10 and Fig.11 An example involves the main converter 12 being Figure 3B For one or more additional converter units 14a between the main converter 12 and the converter unit 14c, more pulse width modulation stages 56b may be provided as described with respect to Figure 7 and Fig. 9 is applied to the controller 16 as described.

[0127] The converter unit 14c may be a hybrid converter unit having different types of semiconductor switches 24', 24", wherein the half-bridges 34a, 34b are operated at different switching frequencies. For example, one half-bridge 34a may be driven by a switching signal s 2abc The Si-based switch 24 ′ is used to operate at a first frequency (eg, a medium switching frequency), and the second half-bridge 34 b can be driven by a switching signal s 3abc SiC based switches 24" are used for operation at higher switching frequencies.

[0128] about Fig.10 , the first low frequency pulse width modulation stage 56a may be as described with respect to Fig. 9 (or alternatively about Figure 7) is designed as described in the above. The pulse width modulation stage 56d generates two switching signals s 2abc 、s 3abc The modulation signal u * 2abc An asymmetrical modulation process is used to distribute the power unevenly between the two half-bridges 34a, 34b. Fig.11 Describes a component.

[0129] The modulation process of the pulse width modulation stage 56d can be implemented by using two phase stacked (disposition) carriers. * 2a In the upper part (u * >=0), the switching signal s for the intermediate frequency half bridge 34a 2a is set to 0 (voltage applied); if it is in the lower half (u * <0), the signal is set to 1 (minus voltage) (see block 66).

[0130] For modulation of the high frequency half bridge 34b, the modulation signal u * 2a Compared with the high-frequency triangular carrier waveform. If the modulating signal u * 2a Because (u * >=0) and exceeds the carrier 60 in the upper part, or if the modulation signal u * 2a Because (u * <0) and exceeds the carrier 60 in the lower half, the switching signal s 3a is set to 1. Otherwise, the switch signal s 3a is set to 0. This can be achieved by generating two switching signals 62 from the carrier signal 60 and selecting the appropriate one using a selector 64. * 2a In the upper part (u * >=0), the selector 64 selects the first signal 62, or when the modulation signal u * 2a In the lower part (u * <0), the selector 64 selects the second signal 62 .

[0131] While the invention has been illustrated and described in the drawings and the foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments may be understood and implemented by a person skilled in the art and practicing the claimed invention from a study of the drawings, the disclosure and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. A single processor or controller or other unit may perform the functions of several items recited in a claim. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. Any reference signs in the claims should not be interpreted as limiting the scope.

Claims

1. A method for operating an electrical converter (10), The electrical converter (10) comprises a device for generating a first output voltage (u 1abc ) of the main converter (12) and for converting the first output voltage (u 1abc ) is converted into the second output voltage (u 2abc ), wherein the electrical converter (10) comprises a first converter unit (14a) for converting the second output voltage (u 2abc ) is converted into a third output voltage (u 3abc ), wherein the first converter unit (14a) comprises a second converter unit (14b) for receiving the first output voltage (u 1abc ) and a first half bridge (34a) for providing the second output voltage (u 2abc ) of the second half bridge (34b); The method comprises: Receiving a reference voltage (v * abc ); The reference voltage (v * abc ) is pulse width modulated to generate a first switching signal (s) for the main converter (12) 1abc ); Using the first switch signal (s 1abc ) switches the main converter (12) to generate the first output voltage (u 1abc ); From the first switch signal (s 1abc ) determines the estimated first output voltage (v 1abc ); By taking the reference voltage (v * abc ) minus the estimated first output voltage (v 1abc ) to determine the first voltage error (v * 2abc ); The first voltage error (v * 2abc ) is pulse width modulated to generate a second switching signal (s) for the first converter unit (14a) 2abc ); The second switch signal (s 2abc ) switches the first converter unit (14a) to generate the second output voltage (u 2abc ); From the second switch signal (s 2abc ) determines the estimated second output voltage (v 2abc ); By using the first voltage error (v * 2abc ) minus the estimated second output voltage (v 2abc ) to determine the second voltage error (v * 3abc ); The second voltage error (v * 3abc ) is pulse width modulated to generate a third switching signal (s) for the second converter unit (14b) 3abc ); Using the third switch signal (s 3abc ) switches the second converter unit (14b) to generate the third output voltage (u 3abc ); The method further comprises: From the first voltage error (v * 2abc ) generates the second switching signal (s 2abc ), where if the first voltage error (v * 2abc ) is higher than 0, then the second switch signal (s 2abc ) is 0, and if the first voltage error (v * 2abc ) is lower than 0, the second switch signal (s 2abc ) is 1; The second switch signal (s 2abc ) switching the first half bridge (34a); The first voltage error (v * 2abc ) is pulse width modulated to generate an upper third switch signal, and a lower wave signal (60) is used to modulate the first voltage error (v * 2abc ) performs pulse width modulation to generate a lower third switching signal, wherein the upper carrier signal scans a positive voltage range, and the lower carrier signal scans a negative voltage range; If the first voltage error (v * 2abc ) is higher than 0, the upper third switch signal is selected, and if the first voltage error (v * 2abc ) is lower than 0, the lower third switch signal is selected; The selected third switch signal (s 3abc ) switches the second half bridge (34b) to generate the second output voltage (u 2abc ).

2. The method according to claim 1, in, The second modulation frequency is at least 5 times the first modulation frequency.

3. The method according to claim 1 or 2, in, The reference voltage (v * abc ) is provided in a fixed orthogonal coordinate system (αβ) and is transformed into a three-phase coordinate system (abc); The first switch signal (s 1abc ) from the reference voltage (v * abc ) is generated, and the first output voltage (v 1abc ) is estimated in the three-phase coordinate system (abc); The estimated first output voltage (v 1abc ) is transformed into the fixed orthogonal coordinate system (αβ); The first voltage error (v * 2abc ) by converting the reference voltage (v * abc ) minus the estimated first output voltage (v 1abc ) to determine.

4. The method according to claim 3, in, The reference voltage (v * abc ) includes a common-mode reference voltage component (v*γ).

5. A controller (16) for an electrical converter, The controller (16) is adapted to perform the method of any one of the preceding claims 1-4.

6. An electrical converter (10), comprising: Main converter (12); at least one converter unit; wherein the first converter unit (14a) and the second converter unit (14b) each include a first half-bridge (34a) and a second half-bridge (34b), wherein the first half-bridge (34a) and the second half-bridge (34b) are connected to each other via a DC link (38); A controller (16) adapted to execute the method according to any one of claims 1 to 4, so that the main converter (12) is switched by a first switching signal (s) modulated by a first modulation frequency. 1abc ) to switch, and causing the at least one converter unit to be switched by a further switching signal modulated with a second modulation frequency; The first converter unit (14a) uses a second switching signal (s 2abc ) to switch; The second converter unit (14b) uses a third switching signal (s 3abc ) to switch; wherein the electrical converter (10) comprises a third converter unit (14c) having a first half-bridge (34a) and a second half-bridge (34b), the first half-bridge (34a) and the second half-bridge (34b) being connected to each other via a DC link (38); The first half-bridge (34a) in the third converter unit (14c) uses the second switching signal (s 2abc ) to switch; The second half-bridge (34b) in the third converter unit (14c) uses the third switching signal (s 3abc ) to turn it on or off.

7. An electrical converter (10) as claimed in claim 6, wherein: The main converter is one of the following: Two-level converter; Three-level neutral point clamped converter; Three-level T-type converter.

8. An electrical converter (10) as claimed in claim 6 or 7, in, The first half-bridge (34a) comprises a Si semiconductor switch; Wherein, the second half-bridge (34b) comprises a SiC semiconductor switch.

9. An electrical converter (10) according to any one of claims 6 to 7, in, The first converter unit (14a) comprises a Si semiconductor switch; Wherein, the second converter unit (14b) comprises a SiC semiconductor switch.

10. An electrical converter (10) according to any one of claims 6 to 7, wherein the main converter (12) is a three-phase converter having three main converter phase outputs (a, b, c); At least one converter cell is connected to each main converter output and provides a converter cell phase output.

11. An electrical converter (10) as claimed in claim 10, wherein the converter unit phase output is connected to a passive filter (42); or The converter unit phase output is connected to an electric machine (50) having three galvanically separated windings (52), which are connected via a further converter (54).

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