Task scheduling method, device and electronic equipment

Abstract

The present invention relates to the technical field of distributed system task processing, and in particular to a task scheduling method, device and electronic device. The method comprises: splitting a task into a task block set N = {1, 2, 3 ... n}; wherein n is a positive integer greater than or equal to 2; wherein one task block corresponds to a thread; and sequentially driving n threads to sequentially distribute the task blocks corresponding to the n threads to n application nodes. The solution provided by the present application can realize comprehensive and reliable support for batch asynchronous task-type services based on distributed application nodes.

Description

Technical Field

[0001] The present invention relates to the technical field of distributed system task processing, and in particular to a task scheduling method, device and electronic equipment. Background Art

[0002] The core system of a bank is at the core of the entire IT architecture of the bank. It undertakes the most core accounting function and provides basic support for bank deposits, loans, payments, customers and other businesses. With the continuous development of banking business, higher requirements are put forward for the high concurrent processing and response capabilities, massive data batch processing capabilities, and expansion capabilities of the core system of the bank. Under the background of "autonomy and controllability" and "cost reduction and efficiency improvement", with the continuous maturity of open source technologies such as JAVA language, distributed architecture based on open source technology has become the choice of more and more core systems of banks and Internet financial systems. At present, the implementation of batch processing and asynchronous task scheduling mechanisms is mostly based on open source frameworks, such as Quartz, AirFlow, or based on underlying databases, such as Oracle, to provide basic scheduling capabilities. The scheduling system mainly undertakes the functions of request acceptance and direct distribution. The distribution of tasks is generally based on the message queue mechanism and sent to different threads of the local machine or different machines for execution. In terms of deployment, centralized deployment is adopted in combination with applications, or independent deployment is adopted by the scheduling system and batch processing system. However, the current asynchronous scheduling framework for batch processing tasks has at least one of the following problems:

[0003] 1. In the existing asynchronous task scheduling solutions, the scheduling nodes are more responsible for task extraction and simple distribution. They are unable to perceive the results of the task execution themselves and are unable to cope with more complex real-time asynchronous batch request scenarios, such as online batch requests. Each request includes multiple processing steps. Each step is essentially an asynchronous processing task, and the processing result of the previous step determines the execution strategy of the subsequent steps.

[0004] 2. In a distributed database environment, batch data is mostly stored in separate databases and nodes. To improve processing performance, the scheduling system needs to split a batch task into multiple subtasks based on data sharding for concurrent processing and summarize the processing results. This process needs to be transparent to the outside world. Currently, there is no mature solution for splitting subtasks for asynchronous scheduling tasks.

[0005] 3. Under the distributed architecture, abnormal scenarios are more complex and frequent. Accepted asynchronous requests may be lost in scenarios such as node crashes, resulting in the inability to continue processing the original tasks. Summary of the invention

[0006] The purpose of this application is to solve at least one of the above technical defects. The technical solution adopted by this application is as follows:

[0007] In a first aspect, an embodiment of the present application discloses a task scheduling method, wherein the task is an asynchronous task, and the method comprises:

[0008] Split the task into a set of task blocks N = {1, 2, 3…n}; where n is a positive integer greater than or equal to 2; one task block corresponds to one clue;

[0009] The order-driven n threads sequentially distribute the task blocks corresponding to the n clues to the n application nodes; wherein the application nodes are used to execute the task blocks distributed thereto.

[0010] Furthermore, the order driving n threads to distribute the task blocks corresponding to the n clues to the n application nodes in order includes:

[0011] After driving the n-1th thread to allocate the n-1th task block corresponding to the n-1th clue to the corresponding application node, release the n-1th thread resource;

[0012] Within time T, the nth thread is driven to distribute the nth task block corresponding to the nth thread to the corresponding application node.

[0013] Furthermore, when the time T is less than a preset threshold, the method further includes:

[0014] Registering the nth subtask block into the cache after releasing the n-1th thread resource;

[0015] Within time T, the nth thread is driven to distribute the nth task block registered in the cache to the corresponding application node.

[0016] Furthermore, when the time T is greater than a preset threshold, the method further includes:

[0017] After releasing the n-1th thread resource, register the identification information of the nth subtask block into the cache;

[0018] Within time T, drive the nth thread to read the nth task block according to the identification information of the nth task block registered in the cache;

[0019] The nth thread distributes the read nth task block to the corresponding application node.

[0020] Furthermore, the method further comprises:

[0021] Before driving the nth thread to assign the nth task block, a logical statement is used to determine whether the task has been executed;

[0022] When driving the nth thread to distribute the nth task block to the corresponding application node, the logic statement that has been executed is no longer executed.

[0023] Furthermore, the method further comprises:

[0024] Set the memory guarantee model to record the task logic statements that cannot be executed by the nth thread;

[0025] When the nth thread determines that the unexecuted task logic statement is a task logic statement that cannot be executed, the nth thread re-executes all logic statements of the task.

[0026] Furthermore, the method further comprises:

[0027] Threads are allocated according to the number of the application nodes.

[0028] In a second aspect, an embodiment of the present application provides a task scheduling device, the device comprising: a splitting module and a scheduling module, wherein:

[0029] The splitting module is used to split the task into a set of task blocks N = {1, 2, 3 ... n}; wherein n is a positive integer greater than or equal to 2; wherein one task block corresponds to one clue;

[0030] The scheduling module is used to sequentially drive n threads to sequentially distribute task blocks corresponding to n clues to n application nodes; wherein the application nodes are used to execute the task blocks distributed thereto.

[0031] In a third aspect, an embodiment of the present application provides an electronic device, including a processor and a memory;

[0032] The memory is used to store operation instructions;

[0033] The processor is used to execute the method described in any of the above embodiments by calling the operation instruction.

[0034] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the method described in any of the above embodiments is implemented.

[0035] The embodiment of the present application provides a task scheduling scheme to split the task into a set of task blocks N = {1, 2, 3...n}; wherein n is a positive integer greater than or equal to 2; wherein one task block corresponds to a clue; and the order drives n threads to sequentially distribute the task blocks corresponding to the n clues to n application nodes. An interrupt / reentry mechanism is also designed in the process of scheduling and distributing task blocks to avoid consuming a large amount of thread resources due to long-term blocking operations of asynchronous task applications. The distributed architecture adopted in the present application is more flexible in expansion and has better processing performance, and can cope with high-concurrency real-time asynchronous processing requests of the core system of the bank. In addition, an interrupt reentry and memory mechanism is designed to realize the splitting of asynchronous tasks into subtasks. At the same time, the optional instance of the present application supports an asynchronous task persistence mechanism, which can help the core business system of the bank to realize comprehensive and reliable support for batch asynchronous task-type businesses based on distributed application nodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in describing the embodiments of the present application are briefly introduced below.

[0037] Figure 1 A flowchart of a task scheduling method provided in an embodiment of the present application;

[0038] Figure 2 A schematic diagram of a task scheduling device provided in an embodiment of the present application;

[0039] Figure 3 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be interpreted as limiting the present invention.

[0041] Those skilled in the art can understand that, unless specifically stated, the singular forms "one", "an", "said" and "the" used herein may also include plural forms, wherein "first", "second", etc. are only used to distinguish and define objects for the purpose of introducing the scheme clearly, and do not limit the objects themselves. Of course, the objects defined by "first" and "second" may be the same terminal, device, user, etc., or the same type of terminal, device and user. It should be further understood that the term "including" used in the specification of the present application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or their groups. The term "and / or" used here includes all or any unit and all combinations of one or more associated listed items. In addition, it should be understood that in the embodiments of the present application, "at least one" refers to one or more, and "multiple" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, a and b, a and c, b and c, or a, b and c, where a, b, c can be single or plural.

[0042] The following introduces some concepts, terms or devices that may be used in the following embodiments or used to assist in explaining the technical solutions of the embodiments:

[0043] Figure 1 A schematic diagram of a task scheduling process provided by an embodiment of the present application is shown, wherein the task is an asynchronous task, such as Figure 1 As shown, the method may mainly include:

[0044] S101, split the task into a task block set N = {1, 2, 3 ... n}; wherein n is a positive integer greater than or equal to 2; wherein one task block corresponds to one clue, and the clue is allocated according to the number of the application nodes.

[0045] A thread is the smallest unit of an asynchronous task when it is running. An asynchronous task object contains one or more asynchronous task thread objects. Each thread object has its own context memory. At any time, an asynchronous task object will only run based on one of the asynchronous task thread objects, which is the current thread. A program can have multiple execution threads running at the same time. A thread is an execution thread in a program. The execution of each task is composed of specific execution logic, and statements are used to define or identify the execution logic.

[0046] S102 , sequentially driving n threads to sequentially distribute task blocks corresponding to n clues to n application nodes; wherein the application nodes are used to execute the task blocks distributed thereto.

[0047] The task scheduling scheme of the embodiment of the present application can utilize a multi-thread mechanism to split an asynchronous task into multiple task blocks and submit them concurrently from the scheduling system to the distributed application cluster for processing. The concurrent submission here is actually a pseudo multi-threaded concurrency, which is actually a single thread. This is because all task blocks of a task are submitted to the distributed application cluster (the application cluster is composed of multiple application nodes, and the application node is the smallest unit in the application cluster that is specifically used to process task blocks). If the application cluster processes faster, there will be batch responses of multiple task blocks within a certain period of time, that is, there will be multiple re-entry actions, and at the same time, the same asynchronous task can only be executed based on one thread.

[0048] In a further embodiment of the present application, the sequentially driving n threads to sequentially distribute task blocks corresponding to n clues to n application nodes includes:

[0049] Step 1: After driving the n-1th thread to allocate the n-1th task block corresponding to the n-1th clue to the corresponding application node, release the n-1th thread resource;

[0050] Step 2: Within time T, drive the nth thread to distribute the nth task block corresponding to the nth clue to the corresponding application node.

[0051] The design of steps 1 and 2 of the embodiment of the application is based on the interruption link of the interruption / reentry mechanism designed because the asynchronous task application consumes a large amount of thread resources by blocking operations (communication IO, file IO, etc.) for a long time. Interruption / reentry means that the application can be interrupted during operation (in Java, interruption can be achieved by throwing an exception) to release thread resources. At some point thereafter, a new thread is used to call the previous entry method of the application again, and the application can restore the context of the thread when it was interrupted and continue to run from the interruption point.

[0052] In the embodiment of the present application, before driving the nth thread to assign the nth task block, it is necessary to determine the logical statement that the task has been executed; when driving the nth thread to assign the nth task block to the corresponding application node, the logical statement that has been executed is no longer executed. Take the asynchronous task application composed of statement 1, statement 2 (communication IO operation blocked for a long time, supporting interruption / reentry), and statement 3 as an example. When the application is executed in thread 1 for the first time, it will throw an interrupt exception when statement 2 is executed and be captured by the framework layer. The framework layer then executes the post-interruption processing logic (usually asynchronous initiation of a request that will cause the thread to be blocked for a long time, or an operation that plays a role in task control). After the execution is completed, the resources of thread 1 are released. Secondly, at some point thereafter, the corresponding action of statement 2 is completed and a response is returned. The framework will use a new thread 2 to reschedule the application and enter execution from the previous entry (while restoring the context when the application was interrupted). When statement 1 is executed, it is found that statement 1 has been executed and skipped. Execution continues to statement 2. It is found that statement 2 has also been executed and a response has been returned. The action of statement 2 (the communication IO operation that has been blocked for a long time) will no longer be executed and the response returned by the operation will be directly processed. Execution continues to statement 3. It is found that statement 3 has not been executed, so statement 3 will be executed until the end, releasing thread 2 resources.

[0053] In specific application scenarios, in addition to the need for long-term blocking operations to be implemented in an interrupt / reentrant manner, some operations that play a role in task control may also need to be implemented in an interrupt / reentrant manner. For example, the execution of an asynchronous task application needs to meet a certain condition before it can be executed (such as some online batch transactions need to obtain a token before they can be executed, which corresponds to the operation of obtaining a token), or the execution timing needs to be controlled within a certain time period (such as online batch time period interception, which corresponds to the operation of setting an alarm to remind you when the time comes). Of course, during the actual operation process, whether the asynchronous task application needs to be interrupted / reentered depends on the specific application scenario. In a specific embodiment of the present application, the interrupt / reentry mechanism during the operation of the asynchronous task application has two implementation modes depending on whether the interrupt is persistent:

[0054] (1) When the time T is less than a preset threshold, that is, when the interrupt is non-persistent, the implementation method of reentry includes:

[0055] Step 1: register the nth subtask block into the cache after releasing the n-1th thread resource;

[0056] Step 2: Within time T, drive the nth thread to distribute the nth task block registered in the cache to the corresponding application node.

[0057] Interrupt non-persistence is applicable to scenarios where task block allocation scheduling may be interrupted, and task processing has high processing performance requirements but does not need to ensure reliability, such as: end-of-day batch scheduling tasks. In this mode, asynchronous tasks will register and update the ATR table (asynchronous task registration table) status at the beginning and end of the operation; the status of asynchronous task objects during the operation is maintained in a HashTable cache that registers asynchronous task objects, and is deleted from the cache after the operation ends. In order to ensure the stability of the operation of the asynchronous task system, the upper limit of the number of asynchronous tasks that can be processed in the HashTable cache can be limited (the upper limit default value is 2000).

[0058] (2) When the time T is greater than a preset threshold, i.e., when the persistence is interrupted, the implementation method of reentry includes:

[0059] Step 1: register the identification information of the nth subtask block into the cache after releasing the n-1th thread resource;

[0060] Step 2: within time T, drive the nth thread to read the nth task block according to the identification information of the nth task block registered in the cache;

[0061] Step 3: The nth thread distributes the read nth task block to the corresponding application node.

[0062] Interrupt persistence is suitable for tasks where block scheduling may be interrupted. Asynchronous tasks can make appropriate sacrifices in processing performance but must ensure certain reliability, such as online batch scheduling tasks. In this mode, in addition to operating the ATR table at the beginning and end of the operation, the asynchronous task object's state will be serialized into an XML message format and updated to the ATR table whenever it is interrupted. The framework supports directly updating XML messages to the ATR table. If the message is large, it also supports compressing the XML message before updating it to the ATR table (Compressible, compression switch, is a system-level parameter, configured in the attribute-value format in the asynchronous task processor tag in the file. If the switch is turned on, the framework will compress the XML message of the asynchronous task object and then update it to the ATR table when persisting after the asynchronous task is interrupted. When reentering, it supports decompressing the message from the database first and then deserializing the message to obtain the asynchronous task object).

[0063] In an embodiment of the present application, the method further sets a memory guarantee model to record the task logic statements that cannot be executed by the nth thread; when the nth thread determines that the unexecuted task logic statement is a task logic statement that cannot be executed, the nth thread re-executes all the logic statements of the task. That is, in the processing of the same asynchronous task application request, the logic in the interface of the application after interruption and re-entry will be repeatedly called. For the logic that cannot be repeatedly executed, we need to remember it. Memory guarantee makes the steps that cannot be executed again when re-entering no longer executed, including but not limited to: it is impossible to guarantee that the same processing result can be obtained when executing the step at different times (for example, obtaining the system time, and the execution value at different times will also be different), or when executing the step again, the relevant data status will be unacceptably changed (for example, when executing the step for the first time, the log status of a certain job log table is updated to the processing status, and the subsequent processing logic updates it to the completed status, and when executing the step again, it is updated to the processing status), or a large amount of resources will be consumed when executing the step (such as compressing this CPU resource-intensive step), etc. The above-mentioned memory guarantee is realized by setting a memory model design, and the memory model mainly includes:

[0064] (1) Memory class, which is the base class of all specific memory classes. The memory object is used to correspond to an executed step that needs to be remembered and record the processing result of the step. If the result returned by the processing result identification file is false, it means that the step has been executed and cannot be executed again. If the result returned is true, it means that the step will be executed for the first time.

[0065] The MemoryRegister class is used to register a group of memory objects, and the memory register object itself is registered on the thread. The memory register object is used to save and restore all memory objects corresponding to the steps that need to be remembered that have been executed during the processing of a specific asynchronous task request (thread).

[0066] All the blocks of the tasks in the above embodiment of the present application are handled by the distributed application cluster. If the processing speed is fast, there will be multiple batch responses within a certain period of time, that is, there will be multiple reentry actions, and the same asynchronous task can only be executed based on one thread at the same time, so it is necessary to synchronize the concurrent execution actions of the same asynchronous task. The framework layer synchronizes the concurrent execution actions of the same asynchronous task from two levels (assuming that a Resume reentry call is understood as an event trigger of the asynchronous task):

[0067] The first layer is to queue the events of the same asynchronous task after they are handed over to the worker thread pool and before the worker thread pool actually executes the events (without calling the BeginProcess or Resume interface).

[0068] The second layer is to perform concurrent synchronization control (mainly to deal with the failure of the first layer of control) when the worker thread pool actually executes the event (calls BeginProcess or Resume) after the same asynchronous task event is handed over to the worker thread pool.

[0069] Based on the above application embodiment, the task timeout period can be set to use the Clock service to execute re-entry to implement the timeout mechanism. The use of task timeout check and retry operation can improve the high availability of the task scheduling solution.

[0070] In an optional embodiment, heartbeat detection may be performed on the application cluster based on the above embodiment, that is, the network and service status of the application nodes may be detected regularly to determine whether to allocate task blocks to abnormal application nodes.

[0071] based on Figure 1 The task scheduling method shown in the figure, on the other hand, the embodiment of the present application provides a task scheduling device, the device is as follows Figure 2 As shown, the device may include: the device includes: 201 splitting module and 202 scheduling module, wherein,

[0072] The splitting module 201 is used to split the task into a set of task blocks N = {1, 2, 3 ... n}; wherein n is a positive integer greater than or equal to 2; wherein one task block corresponds to one clue;

[0073] The scheduling module 202 is used to sequentially drive n threads to sequentially distribute task blocks corresponding to n clues to n application nodes; wherein the application nodes are used to execute the task blocks distributed thereto.

[0074] It can be understood that the above-mentioned components of the task scheduling device in this embodiment have the function of realizing Figure 1 The functions of the corresponding steps of the method in the embodiment shown in . The function can be implemented by hardware, or by hardware executing the corresponding software. The hardware or software includes one or more modules or systems corresponding to the above functions. The above modules and systems can be software and / or hardware, and the above modules and systems can be implemented separately or integrated with multiple modules and systems. For the functional description of the above modules and systems, please refer to Figure 1 The corresponding description of the method in the embodiment shown in , therefore, the beneficial effects that can be achieved can refer to the beneficial effects of the corresponding method provided above, which will not be repeated here.

[0075] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the specific structure of the task scheduling device. In other embodiments of the present application, the task scheduling device may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0076] An embodiment of the present application provides an electronic device, including a processor and a memory;

[0077] A memory, used for storing operation instructions;

[0078] The processor is used to execute the task scheduling method provided in any embodiment of the present application by calling an operation instruction.

[0079] As an example, Figure 3 A schematic diagram of the structure of an electronic device applicable to the embodiment of the present application is shown. Figure 3 As shown, the electronic device 300 includes: a processor 301 and a memory 303. Among them, the processor 301 and the memory 303 are connected, such as being connected through a bus 302. Optionally, the electronic device 300 may also include a transceiver 304. It should be noted that in actual applications, the transceiver 304 is not limited to one. It is understandable that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the specific structure of the electronic device 300. In other embodiments of the present application, the electronic device 300 may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware. Optionally, the electronic device may also include a display screen 305 for displaying images, or receiving user operation instructions when necessary.

[0080] The processor 301 is applied in the embodiment of the present application to implement the method shown in the above method embodiment. The transceiver 304 may include a receiver and a transmitter. The transceiver 304 is applied in the embodiment of the present application to implement the function of the electronic device of the embodiment of the present application communicating with other devices when executed.

[0081] Processor 301 may be a CPU (Central Processing Unit), a general purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It may implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. Processor 301 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0082] The processor 301 may also include one or more processing units, for example, the processor 301 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processor (NPU). Among them, different processing units may be independent devices or integrated into one or more processors. Among them, the controller may be the nerve center and command center of the electronic device 300. The controller may generate an operation control signal according to the instruction opcode and the timing signal to complete the control of fetching and executing instructions. A memory may also be set in the processor 301 for storing instructions and data. In some embodiments, the memory in the processor 301 is a high-speed cache memory. The memory may store instructions or data that the processor 301 has just used or circulated. If the processor 301 needs to use the instruction or data again, it may be directly called from the memory. Repeated access is avoided, the waiting time of the processor 301 is reduced, and the efficiency of the system is improved.

[0083] The processor 301 can run the task scheduling method provided in the embodiment of the present application to reduce the user's operation complexity, improve the intelligence of the terminal device, and enhance the user experience. The processor 301 can include different devices. For example, when the CPU and GPU are integrated, the CPU and GPU can cooperate to execute the task scheduling method provided in the embodiment of the present application. For example, part of the algorithm in the task scheduling method is executed by the CPU, and the other part of the algorithm is executed by the GPU to obtain faster processing efficiency.

[0084] The bus 302 may include a path to transmit information between the above components. The bus 302 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The bus 302 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 3 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0085] The memory 303 may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory), or may include a high-speed random access memory, or may include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), or other optical disk storage, optical disk storage (including compressed optical disk, laser disk, optical disk, digital versatile disk, Blu-ray disk, etc.), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to this.

[0086] Optionally, the memory 303 is used to store application code for executing the solution of the present application, and the execution is controlled by the processor 301. The processor 301 is used to execute the application code stored in the memory 303 to implement the task scheduling method provided in any embodiment of the present application.

[0087] The memory 303 can be used to store computer executable program codes, which include instructions. The processor 301 executes various functional applications and data processing of the electronic device 300 by running the instructions stored in the memory 303. The memory 303 may include a program storage area and a data storage area. Among them, the program storage area may store the code of the operating system, application program, etc. The data storage area may store data created during the use of the electronic device 300 (such as images, videos, etc. collected by the camera application), etc.

[0088] The memory 303 may also store one or more computer programs corresponding to the task scheduling method provided in the embodiment of the present application. The one or more computer programs are stored in the above-mentioned memory 303 and are configured to be executed by the one or more processors 301. The one or more computer programs include instructions, and the above-mentioned instructions can be used to execute each step in the above-mentioned corresponding embodiment.

[0089] Of course, the code of the task scheduling method provided in the embodiment of the present application can also be stored in an external memory. In this case, the processor 301 can run the code of the task scheduling method stored in the external memory through the external memory interface, and the processor 301 can control the running task scheduling process.

[0090] The display screen 305 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 300 may include 1 or N display screens 305, where N is a positive integer greater than 1. The display screen 305 can be used to display information input by a user or information provided to a user and various graphical user interfaces (GUI). For example, the display screen 305 can display photos, videos, web pages, or files.

[0091] The electronic device provided in the embodiment of the present application is applicable to any embodiment of the above method. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, which will not be repeated here.

[0092] An embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the task scheduling method shown in the above method embodiment is implemented.

[0093] The computer-readable storage medium provided in the embodiment of the present application is applicable to any embodiment of the above-mentioned method. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, which will not be repeated here.

[0094] The embodiment of the present application also provides a computer program product, which, when executed on a computer, enables the computer to execute the above-mentioned related steps to implement the method in the above-mentioned embodiment. The computer program product provided in the embodiment of the present application is applicable to any embodiment of the above-mentioned method, and therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, which will not be repeated here.

[0095] The task scheduling scheme disclosed in the above embodiment of the present application is achieved by splitting the task into a set of task blocks N = {1, 2, 3…n}; wherein n is a positive integer greater than or equal to 2; wherein one task block corresponds to a thread; and n threads are sequentially driven to sequentially distribute the task blocks corresponding to the n threads to n application nodes; wherein the application nodes are used to execute the task blocks assigned to them.

[0096] The above contents are only specific implementation methods of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, and can also make some improvements and modifications. These changes, substitutions, improvements and modifications should also be considered to be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A task scheduling method, characterized in that: The task is an asynchronous task, and the method includes: Split the task into a set of task blocks N = {1, 2, 3…n}; where n is a positive integer greater than or equal to 2; one task block corresponds to one clue; The order drives n threads to sequentially distribute the task blocks corresponding to the n clues to n application nodes; wherein the application nodes are used to execute the task blocks distributed to them; The order driving n threads to distribute the task blocks corresponding to the n clues to the n application nodes in order includes: After driving the n-1th thread to allocate the n-1th task block corresponding to the n-1th clue to the corresponding application node, release the n-1th thread resource; Within time T, drive the nth thread to distribute the nth task block corresponding to the nth clue to the corresponding application node; The method further comprises: Before driving the nth thread to assign the nth task block, a logical statement is used to determine whether the task has been executed; When driving the nth thread to allocate the nth task block to the corresponding application node, the logic statement that has been executed is no longer executed; The method further comprises: When an interruption occurs, the memory guarantee model is set to record the task logic statements that are not executed by the nth thread; When re-recording, the memory guarantee model prevents steps that cannot be executed again from being executed. The nth thread re-executes all logical statements of the task.

2. The task scheduling method according to claim 1, characterized in that: When the time T is less than a preset threshold, the method further includes: Registering the nth subtask block into the cache after releasing the n-1th thread resource; Within time T, the nth thread is driven to distribute the nth task block registered in the cache to the corresponding application node.

3. The task scheduling method according to claim 1, characterized in that: When the time T is greater than a preset threshold, the method further includes: After releasing the n-1th thread resource, register the identification information of the nth subtask block into the cache; Within time T, drive the nth thread to read the nth task block according to the identification information of the nth task block registered in the cache; The nth thread distributes the read nth task block to the corresponding application node.

4. The task scheduling method according to any one of claims 1 to 3, characterized in that: The method further comprises: Threads are allocated according to the number of the application nodes.

5. A task scheduling device, characterized in that: The device comprises: a splitting module and a scheduling module, wherein: The splitting module is used to split the task into a set of task blocks N = {1, 2, 3 ... n}; wherein n is a positive integer greater than or equal to 2; wherein one task block corresponds to one clue; The scheduling module is used to sequentially drive n threads to sequentially distribute task blocks corresponding to n clues to n application nodes, including: after driving the n-1th thread to distribute the n-1th task block corresponding to the n-1th clue to the corresponding application node, releasing the n-1th thread resource; Within time T, driving the nth thread to assign the nth task block corresponding to the nth clue to the corresponding application node; wherein the application node is used to execute the assigned task block; The device also includes: Before driving the nth thread to assign the nth task block, a logical statement is used to determine whether the task has been executed; When driving the nth thread to allocate the nth task block to the corresponding application node, the logic statement that has been executed is no longer executed; When an interruption occurs, the memory guarantee model is set to record the task logic statements that are not executed by the nth thread; When re-recording, the memory guarantee model prevents steps that cannot be executed again from being executed. The nth thread re-executes all logical statements of the task.

6. An electronic device, characterized in that: including a processor and a memory; The memory is used to store operation instructions; The processor is used to execute the method according to any one of claims 1 to 4 by calling the operation instruction.

7. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 4 is implemented.

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