Digital power amplifier system with anti-interference closed-loop control

Abstract

The present invention provides a digital power amplifier system with anti-interference closed-loop control, the digital power amplifier system comprising: a single-ended analog signal generating circuit connected in sequence, a signal transmission anti-interference and isolation circuit, a pulse width modulation amplification filtering and signal acquisition circuit, an A / D conversion chip, a low voltage differential signal interface and an isolation circuit. The digital power amplifier system of the present invention converts and processes the input signal by introducing a cross-board isolation circuit, thereby improving the anti-interference ability of the signal transmission at the input end of the digital power amplifier; the present invention collects the voltage and current signals output by the power amplifier by building a signal acquisition and conditioning circuit, and feeds back the digital signal to the input end through an analog / digital conversion chip and a high-speed digital differential interface, thereby realizing high-reliability data transmission and quantitative data feedback, dynamically adjusting the signal amplitude at the input side of the power amplifier, and realizing closed-loop control of the output signal.

Description

Technical Field

[0001] The invention belongs to the field of power amplification systems, and in particular relates to an anti-interference closed-loop controlled digital power amplification system. Background Art

[0002] Existing power amplifiers can be of several types, including Class A, Class B, Class AB and Class D. Among them, when the Class D digital power amplifier is working, the output stage MOS tube is in a fully turned on or off state, and its switching frequency is usually between 200KHz and 1MHz, which is much higher than the frequency of the input signal, reducing the time of entering the linear amplification working area of ​​the MOS tube and causing the problem of low power amplifier conversion efficiency. Compared with mature audio power amplifiers such as Class A, Class B, and Class AB, Class D power amplifiers have higher conversion efficiency, greater output power and lower distortion rate. Class D digital power amplifiers are mainly composed of modules such as pulse width modulation (PWM), switch amplification, and output filtering.

[0003] Due to limitations such as system architecture, existing Class D digital power amplifier systems in the industrial control field usually divide the signal generating circuit and the power amplifier circuit (or power amplifier) ​​that generate the analog input signal into two circuit boards. The two boards then transmit signals via a signal transmission interface circuit board. The analog input signal of the digital power amplifier system is easily distorted by external electromagnetic interference during long-distance transmission between the signal generating circuit and the power amplifier.

[0004] Since there is currently no efficient way to accurately collect and quantitatively analyze the voltage and current output by the power amplifier, overcurrent, overload and other faults are prone to occur at the output end of the power amplifier. Summary of the invention

[0005] In view of the above problems, the present invention provides a digital power amplification system with anti-interference closed-loop control.

[0006] The digital power amplification system of the present invention with anti-interference closed-loop control comprises:

[0007] The signal transmission anti-interference and isolation circuit (SL), the pulse width modulation amplification filtering and signal acquisition circuit (PL), the A / D conversion chip (GL7), and the low voltage differential signal interface and isolation circuit (LI) are connected in sequence.

[0008] Furthermore, the invention comprises an analog signal generating circuit (ML), a transmission interface circuit (CL) and a power amplifier (GL) which are independent of each other in hardware.

[0009] in,

[0010] The power amplifier (GL) comprises the pulse width modulation amplification filtering and signal acquisition circuit (PL) and an A / D conversion chip (GL7);

[0011] The signal transmission anti-interference and isolation circuit (SL) is used as a first cross-board isolation circuit to connect the analog signal generating circuit (ML), the transmission interface circuit (CL) and the power amplifier (GL);

[0012] The low voltage differential signal interface and isolation circuit (LI) is used as a second cross-board isolation circuit to connect the analog signal generating circuit (ML), the transmission interface circuit (CL) and the power amplifier (GL).

[0013] further,

[0014] The signal transmission anti-interference and isolation circuit (SL) comprises a first isolation transformer (ML4), a first part of the transmission interface circuit (CL), a second isolation transformer (GL1), which are connected in sequence.

[0015] in,

[0016] The first isolation transformer (ML4) is arranged in the analog signal generating circuit (ML);

[0017] The second isolation transformer (GL1) is arranged in the power amplifier (GL).

[0018] further,

[0019] The output end of the first isolation transformer (ML4) is connected to the input end of the second isolation transformer (GL1) through the first part of the transmission interface circuit (CL),

[0020] and

[0021] A capacitor (C1) is provided at the input end of the first isolation transformer (ML4) for isolating a DC component in a signal transmitted to the first isolation transformer (ML4);

[0022] A capacitor is provided between the first isolation transformer (ML4) and the second isolation transformer (GL1), for isolating a DC component in a signal transmitted from the first isolation transformer (ML4) to the second isolation transformer (GL1);

[0023] The output end of the second isolation transformer (GL1) is provided with a capacitor for isolating a DC component in a signal output by the second isolation transformer (GL1).

[0024] further,

[0025] A capacitor (C4) and a capacitor (C5) which are independently arranged are provided between the first isolation transformer (ML4) and the second isolation transformer (GL1);

[0026] The output end of the second isolation transformer (GL1) is provided with a capacitor (C8) and a capacitor (C9) which are independently arranged.

[0027] further,

[0028] The pulse width modulation amplification filtering and signal acquisition circuit (PL) is arranged in the power amplifier (GL),

[0029] The pulse width modulation amplification filtering and signal acquisition circuit (PL) comprises: a class D power amplifier chip (GL2), an LC low-pass filter (GL3), a current sensor (GL4), a third isolation transformer (GL5), a signal filtering circuit (GL6), a current recovery circuit (I1), an output voltage recovery circuit (I2),

[0030] in,

[0031] The second isolation transformer (GL1), the class D power amplifier chip (GL2), the LC low-pass filter (GL3), the current sensor (GL4) and the third isolation transformer (GL5) are connected in sequence;

[0032] The LC low-pass filter (GL3) is connected to a third isolation transformer (GL5);

[0033] The current sensor (GL4), the current recovery circuit (I1) and the signal filtering circuit (GL6) are connected in sequence;

[0034] The third isolation transformer (GL5), the output voltage recovery circuit (I2) and the signal filtering circuit (GL6) are connected in sequence.

[0035] further,

[0036] The third isolation transformer (GL5) is connected to a load.

[0037] further,

[0038] The low voltage differential signal interface and isolation circuit (LI) comprises a second isolation module (GL8), a second part of the transmission interface circuit (CL) and a first isolation module (ML5) connected in sequence,

[0039] in,

[0040] The second isolation module (GL8) is arranged in the power amplifier (GL);

[0041] The first isolation module (ML5) is arranged in the analog signal generating circuit (ML).

[0042] Furthermore, it also includes:

[0043] A single-ended analog signal generating circuit (DL), wherein the single-ended analog signal generating circuit (DL) is connected to the first isolation transformer (ML4).

[0044] Furthermore, it also includes: a CPU (ML1),

[0045] The CPU (ML1) is connected to the single-ended analog signal generating circuit (DL) and the low voltage differential signal interface and isolation circuit (LI).

[0046] further,

[0047] The CPU (ML1) is connected to the first isolation module (ML5).

[0048] The digital power amplifier system of the present invention improves the anti-interference ability of signal transmission at the input end of the digital power amplifier by introducing a signal transmission anti-interference and isolation circuit, a pulse width modulation amplification filtering and signal acquisition circuit, a low voltage differential signal interface and an isolation circuit, realizes high-reliability data transmission and quantitative data feedback, can dynamically adjust the signal amplitude at the input side of the power amplifier, and realizes closed-loop control of the output signal.

[0049] The present invention adopts a Class D digital power amplifier chip circuit with highly integrated PWM hardware circuit and switching amplifier circuit. Compared with the existing Class D power amplifier circuit designed by discrete components, it can achieve higher circuit integration, save circuit board card space, and improve system reliability. The system structure setting adopted by the present invention for converting single-ended analog signals into differential analog signals and transmitting them improves the anti-interference ability of long-distance cross-board analog signal transmission, and has inter-board signal isolation, thereby improving the reliability and stability of the system. The present invention adopts LVDS interface to significantly improve the stability and anti-interference ability of inter-board digital signal transmission. The present invention adopts the method of collecting the output voltage and current signals of the power amplifier, which can form feedback on the input signal of the power amplifier, dynamically adjust the input signal amplitude, reduce the probability of overcurrent, overvoltage and other failures on the load side of the power amplifier, and improve the reliability of the power amplifier.

[0050] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0052] Figure 1 A schematic diagram of the structure of a digital power amplification system with anti-interference closed-loop control according to an embodiment of the present invention is shown;

[0053] Figure 2 A schematic diagram of the structure of a signal transmission anti-interference and isolation circuit according to an embodiment of the present invention is shown;

[0054] Figure 3 A schematic diagram of the structure of a pulse width modulation amplification filtering and signal acquisition circuit according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0056] Figure 1 The structure diagram of the digital power amplification system of the anti-interference closed-loop control of the present invention is shown. Figure 1The physical meaning of each mark symbol is as follows: ML: analog signal generation circuit, ML1: CPU, ML2: direct digital frequency synthesizer (DDS) circuit, ML3: current / voltage conversion circuit, ML4: first isolation transformer, ML5: first isolation module, CL: transmission interface circuit, GL: power amplifier, GL1: second isolation transformer, GL2: Class D power amplifier chip, GL3: LC low-pass filter, GL4: current sensor, GL5: third isolation transformer, GL6: signal filtering circuit, GL7: A / D conversion chip, GL8: second isolation module, DL: single-ended Analog signal generation circuit, SL: signal transmission anti-interference and isolation circuit, PL: pulse width modulation (PWM) amplification filtering and signal acquisition circuit, LI: low voltage differential signal (LVDS) interface and isolation circuit, S1: single-ended analog signal, S2: first differential analog signal, S3: second differential analog signal, S4: first analog signal, S5: first digital signal, S6: third digital signal, S7: fifth digital signal, S8: second analog signal, S9: second digital signal, S10: fourth digital signal, S11: sixth digital signal, I1: current recovery circuit, I2: output voltage recovery circuit. Figure 1 The arrows in the figure indicate the direction of signal transmission.

[0057] Depend on Figure 1 It can be seen that the digital power amplifier system structure of the present invention mainly includes an analog signal generating circuit ML, a transmission interface circuit CL and a power amplifier GL which are isolated from each other in hardware. The analog signal generating circuit ML, the transmission interface circuit CL and the power amplifier GL are respectively arranged on their own isolated and independent boards or circuit boards. The analog signal generating circuit ML includes a CPU ML1, a DDS circuit ML2, a current / voltage conversion circuit ML3, a first isolation transformer ML4, and a first isolation module ML5. The power amplifier GL includes a second isolation transformer GL1, a class D power amplifier chip GL2, an LC low-pass filter GL3, a current sensor GL4, a third isolation transformer GL5, a signal filtering circuit GL6, an A / D conversion chip GL7, and a second isolation module GL8.

[0058] See also Figure 1It can be known that the digital power amplification system structure of the present invention includes: a single-ended analog signal generation circuit DL, a signal transmission anti-interference and isolation circuit SL, a PWM amplification filtering and signal acquisition circuit PL, and an LVDS interface and isolation circuit LI. Among them, the single-ended analog signal generation circuit DL includes a DDS circuit ML2 and a current / voltage conversion circuit ML3; the signal transmission anti-interference and isolation circuit SL includes a first isolation transformer ML4, a first part of a transmission interface circuit CL, and a second isolation transformer GL1; the PWM amplification filtering and signal acquisition circuit PL includes a class D power amplifier chip GL2, an LC low-pass filter GL3, a current sensor GL4, a third isolation transformer GL5, and a signal filtering circuit GL6; the LVDS interface and isolation circuit LI includes a second isolation module GL8, a second part of the transmission interface circuit CL, and a first isolation module ML5.

[0059] In the digital power amplification system structure of the present invention, the CPU ML1, the DDS circuit ML2, the current / voltage conversion circuit ML3, and the first isolation transformer ML4 are connected in sequence. The first isolation transformer ML4 is connected to the second isolation transformer GL1 through the first part of the transmission interface circuit CL. The second isolation transformer GL1, the class D power amplifier chip GL2, the LC low-pass filter GL3, the current sensor GL4, and the third isolation transformer GL5 are connected in sequence, and the LC low-pass filter GL3 is connected to the third isolation transformer GL5. The current sensor GL4 is connected to the signal filter circuit GL6 through the current recovery circuit I1, and the third isolation transformer GL5 is connected to the signal filter circuit GL6 through the output voltage recovery circuit I2. The signal filter circuit GL6, the A / D conversion chip GL7, and the second isolation module GL8 are connected in sequence. The second isolation module GL8 is connected to the first isolation module ML5 through the second part of the transmission interface circuit CL, and the first isolation module ML5 is connected to the CPU ML1.

[0060] In the digital power amplification system structure of the present invention, the current / voltage conversion circuit ML3 in the single-ended analog signal generation circuit DL sends the single-ended analog signal S1 to the first isolation transformer ML4 in the signal transmission anti-interference and isolation circuit SL. The single-ended analog signal S1 is isolated and processed by the first isolation transformer ML4 for signal conversion to become the first differential analog signal S2. The first differential analog signal S2 is isolated and processed by the second isolation transformer GL1 for signal conversion to become the second differential analog signal S3. The signal filtering circuit GL6 receives the output voltage recovery signal of the output voltage recovery circuit I2 and sends out the first analog signal S4 (i.e., the filtered output voltage recovery signal). The signal filtering circuit GL6 also receives the output current recovery signal of the current recovery circuit I1 and sends out the second analog signal S8 (i.e., the filtered output current recovery signal). The first analog signal S4 is converted into the first digital signal S5 by the A / D conversion chip GL7, and the second analog signal S8 is converted into the second digital signal S9 by the A / D conversion chip GL7. The first digital signal S5 is isolated by the second isolation module GL8 to become the third digital signal S6, and the second digital signal S9 is isolated by the second isolation module GL8 to become the fourth digital signal S10. The third digital signal S6 is isolated by the first isolation module ML5 to become the fifth digital signal S7 and sent to the CPU ML1, and the fourth digital signal S10 is isolated by the first isolation module ML5 to become the sixth digital signal S11 and sent to the CPU ML1. Among them, the single-ended analog signal S1 is converted into the second differential analog signal S3 through the first isolation transformer ML4 and the second isolation transformer GL1, which improves the anti-interference ability of the system signal transmission. At the same time, the single-ended analog signal S1 in the analog signal generating circuit ML and the second differential analog signal S3 in the power amplifier GL are isolated by the first isolation transformer ML4 and the second isolation transformer GL1, which plays an isolation role.

[0061] exist Figure 1 In the example, starting from the A / D conversion chip GL7, it passes through the second isolation module GL8, the transmission interface circuit CL, the first isolation module ML5, and finally reaches the CPU ML1. The connection between the devices is arranged according to the differential signal routing, and the differential signal is transmitted.

[0062] Figure 1 The invention comprises two cross-board isolation circuits, the first cross-board isolation circuit is a signal transmission anti-interference and isolation circuit SL, and the second cross-board isolation circuit is an LVDS interface and isolation circuit LI. The signal transmission anti-interference and isolation circuit SL realizes the conversion of single-ended analog signals to differential analog signals and the transmission of differential analog signals in the digital power amplification system structure of the present invention. Figure 2 The figure shows the structure diagram of the signal transmission anti-interference and isolation circuit SL. Figure 2As shown, the signal transmission anti-interference and isolation circuit SL includes: a first isolation transformer ML4, a first part of the transmission interface circuit CL, and a second isolation transformer GL1. The signal transmission anti-interference and isolation circuit SL is connected to the class D power amplifier chip GL2.

[0063] Depend on Figure 2 It can be seen that after the single-ended analog signal S1 is input from the input side of the first isolation transformer ML4, the output side of the first isolation transformer ML4 outputs a pair of differential analog signals FSK_P_1 and FSK_N_1. After the signal isolation and certain voltage amplitude ratio transformation on both sides of the primary and secondary sides of the first isolation transformer ML4, and the DC interference signal isolation through capacitors C4 and C5, the single-ended analog signal S1 is converted into differential analog signals FSK_P_1 and FSK_N_1 through the first isolation transformer ML4. The differential analog signals FSK_P_1 and FSK_N_1 are transmitted across the board to the input side of the second isolation transformer GL1 of the power amplifier GL through the transmission interface circuit CL. The second isolation transformer GL1 then converts the differential analog signals FSK_P_1 and FSK_N_1 into differential analog signals FSKP+ and FSKN- and outputs them from the output side of the second isolation transformer GL1. The differential analog signals FSKP+ and FSKN- are isolated from the DC interference signals by capacitors C8 and C9 and then input into the INPUT_A and INPUT_B pins of the class D power amplifier chip GL2 as the input signals of the class D power amplifier chip GL2.

[0064] The function of the signal transmission anti-interference and isolation circuit SL is to convert the single-ended analog signal S1 in the analog signal generating circuit ML into the first differential analog signal S2, and improve the anti-interference ability of the first differential analog signal S2 in cross-board transmission. At the same time, the first isolation transformer ML4 plays an isolation role between the single-ended analog signal S1 and the first differential analog signal S2. When the single-ended analog signal generating circuit DL is abnormal, or the external environment causes severe interference with the S1 signal transmission circuit with a high amplitude, it may affect the transmission signal of the board circuit on the primary side (i.e., the input side) of the first isolation transformer ML4, and even damage the board where the ML circuit is located, but it will not affect the function and performance of the secondary side (i.e., the output side) of ML4 and other circuit boards. The second isolation transformer GL1 also plays an isolation role, isolating the first differential analog signal S2 (i.e., differential analog signals FSK_P_1 and FSK_N_1) and the second differential analog signal S3 (i.e., differential analog signals FSKP+ and FSKN-), that is, the second isolation transformer GL1 isolates the signal input to the power amplifier GL from the circuit board where the power amplifier GL is located. Even if the first differential analog signal S2 is distorted and introduces interference during data transmission, it will not affect the secondary side (i.e., output side) of the second isolation transformer GL1. The board and circuit functions and performance will not be affected. C1, C4, C5, C8, and C9 can isolate the DC component in the data transmission line to avoid damage to the function and performance of the corresponding transmission circuit due to interference from the DC component. Capacitor C1 is arranged on the input side of the first isolation transformer ML4 in the analog signal generating circuit ML. Capacitors C4 and C5 are arranged between the first isolation transformer ML4 and the second isolation transformer GL1. Capacitors C8 and C9 are arranged on the output side of the second isolation transformer GL1.

[0065] Figure 3 The figure shows the structure diagram of the PWM amplification filtering and signal acquisition circuit PL in the digital power amplification system structure of the present invention. The PWM amplification filtering and signal acquisition circuit PL includes: a class D power amplifier chip GL2, an LC low-pass filter GL3, a current sensor GL4, a third isolation transformer GL5, a signal filtering circuit GL6, a current recovery circuit I1, and an output voltage recovery circuit I2. The third isolation transformer GL5 can be connected to an external load.

[0066] like Figure 3As shown, the class D power amplifier chip GL2 performs power amplification processing on the received input signals FSKP+ and FSKN- to obtain and output differential analog signals FSKP+1 and FSKN-1. The differential analog signals FSKP+1 and FSKN-1 are received by the LC low-pass filter GL3 and filtered to obtain and output differential analog signals FSKP+2 and FSKN-2. The differential analog signals FSKP+2 and FSKN-2 are transmitted to the input side of the third isolation transformer GL5. The current sensor GL4 is connected in series to the line for transmitting the FSKP+2 signal between GL3 and GL5. The current sensor GL4 senses the output current of the power amplifier based on this, and the sensing result is recorded as a single-ended analog signal ICHECK, which is transmitted to the current recovery circuit I1. The third isolation transformer GL5 performs isolation and voltage transformation processing on the differential analog signals FSKP+2 and FSKN-2 to obtain a single-ended analog signal VCHECK, which is transmitted to the output voltage recovery circuit I2. The current recovery circuit I1 and the output voltage recovery circuit I2 respectively perform current recovery and output voltage recovery on the single-ended analog signals received by each other, and obtain the output current recovery signal and the output voltage recovery signal respectively. In the PWM amplification filtering and signal acquisition circuit PL, the class D power amplifier chip GL2 and the LC low-pass filter GL3 are used to successively amplify and filter the second differential analog signal S3 to obtain differential analog signals FSKP+2 and FSKN-2; the current sensor GL4 is used to accurately collect the current output and filtered by the class D power amplifier chip GL2 (i.e., the power amplifier output current); the third isolation transformer GL5 is used to perform signal isolation between the class D power amplifier chip GL2 and the load; the signal filtering circuit GL6 filters the output current recovery signal and the output voltage recovery signal.

[0067] The anti-interference closed-loop controlled digital power amplifier system realizes the collection of output current and output voltage, and can dynamically adjust the output power of the power amplifier as the connected load impedance changes, so that load changes do not affect the output power of the power amplifier, and has higher performance and configuration flexibility.

[0068] Figure 1The LVDS interface and isolation circuit LI in the embodiment include a second isolation module GL8 and a first isolation module ML5 which are set across the board through the transmission interface circuit CL (i.e., the LVDS interface). The second isolation module GL8 isolates the first digital signal S5 and the third digital signal S6, and also isolates the second digital signal S9 and the fourth digital signal S10. The first digital signal S5 and the second digital signal S9 adopt a differential routing method, and the third digital signal S6 and the fourth digital signal S10 adopt a differential routing method. The first isolation module ML5 isolates the third digital signal S6 and the fifth digital signal S7, and also isolates the fourth digital signal S10 and the sixth digital signal S11. The fifth digital signal S7 and the sixth digital signal S11 adopt a differential routing method. The LVDS interface and isolation circuit LI are transmitted across the board through the LVDS interface, which improves the anti-interference ability of the signal in long-distance cross-board transmission.

[0069] The cross-board isolation circuit of the present invention realizes the cross-board transmission of system signals, which can:

[0070] (1) Realize modular design of single-function circuits, that is, modularize the signal generation circuit, isolation transmission interface, power amplifier circuit, and output voltage and current signal recovery to adapt to different application scenarios. For example, a signal generation circuit with a single function can be matched with other types of power amplifier circuits, and vice versa.

[0071] (2) Break through the space design limitation and use a single circuit board to realize all the functions required by the system. The circuit board occupies a large space, which makes the application of the circuit board easily restricted by space; if the space is limited, the corresponding functions and performance that a single circuit board can achieve will also be limited. Modularize the functions required by the system, design multiple circuit boards, and then use the "building blocks" method to combine the circuit boards of each function to realize the functions required by the system. This can improve the scalability of the system design within a limited space, making the system more functional and more powerful. Even under the condition that a single circuit board and a modular multi-circuit board achieve the same functions and performance, the modular multi-circuit board configuration is more flexible and saves space than a single circuit board. It expands the application scope of the system and facilitates the flexible application of the system.

[0072] (3) Save maintenance costs. When a single circuit board is used to implement functions such as signal generation, power amplification, output filtering, and signal recovery, the signal does not need to be isolated when it is transmitted between different functional circuits. Therefore, when a part of the circuit fails or is damaged, it is likely to damage other electronic devices and board cables in the circuit board. Therefore, the maintainability of a single circuit board is poor, and replacing a single circuit board will increase the maintenance cost of the system. This is also the significance of using functional modularization, designing multiple circuit boards, and isolating the data transmission across each circuit board.

[0073] The dual closed-loop control process of the digital power amplifier system of the present invention is as follows: CPU ML1 accurately collects and quantitatively analyzes the output voltage and current of the power amplifier, and then controls the S1 signal amplitude required for the output to achieve closed-loop control of the system, thereby reducing the probability of overcurrent, overload and other faults occurring at the output end of the power amplifier. The digital power amplifier system of the present invention collects the voltage and current signals output by the power amplifier by building a signal acquisition and conditioning circuit, and feeds back the digital signals to the input end through an analog / digital conversion chip and a high-speed digital differential interface, thereby achieving highly reliable data transmission and quantitative data feedback, dynamically adjusting the signal amplitude on the input side of the power amplifier, and achieving closed-loop control of the output signal.

[0074] The present invention adopts a Class D power amplifier chip circuit with highly integrated PWM hardware circuit and switching amplifier circuit. Compared with the existing Class D power amplifier circuit designed with discrete components, it can achieve higher circuit integration, save circuit board card space, and improve system reliability. The method of converting single-ended analog signals into differential analog signals and transmitting them adopted by the present invention improves the anti-interference ability of long-distance cross-board analog signal transmission, and has inter-board signal isolation, thereby improving the reliability and stability of the system. The present invention adopts the LVDS interface to significantly improve the stability and anti-interference ability of inter-board digital signal transmission. The present invention adopts the method of collecting the output voltage and current signals of the power amplifier, which can form feedback on the input signal of the power amplifier, dynamically adjust the input signal amplitude, reduce the probability of overcurrent, overvoltage and other failures on the load side of the power amplifier, and improve the reliability of the power amplifier.

[0075] Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent substitutions for some of the technical features therein; and these modifications or substitutions do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. Anti-interference closed-loop control digital power amplifier system, characterized in that: include: An analog signal generating circuit (ML), a transmission interface circuit (CL) and a power amplifier (GL) which are independent of each other in hardware; a signal transmission anti-interference and isolation circuit (SL), a pulse width modulation amplification filtering and signal acquisition circuit (PL), an A / D conversion chip (GL7), a low voltage differential signal interface and isolation circuit (LI) which are connected in sequence; a single-ended analog signal generating circuit (DL); wherein, The power amplifier (GL) comprises the pulse width modulation amplification filtering and signal acquisition circuit (PL) and an A / D conversion chip (GL7); The signal transmission anti-interference and isolation circuit (SL) and the low voltage differential signal interface and isolation circuit (LI) are both cross-board isolation circuits, wherein the signal transmission anti-interference and isolation circuit (SL) is used as a first cross-board isolation circuit to connect the analog signal generating circuit (ML), the transmission interface circuit (CL) and the power amplifier (GL); the low voltage differential signal interface and isolation circuit (LI) is used as a second cross-board isolation circuit to connect the analog signal generating circuit (ML), the transmission interface circuit (CL) and the power amplifier (GL); The signal transmission anti-interference and isolation circuit (SL) comprises a first isolation transformer (ML4), a first part of the transmission interface circuit (CL), and a second isolation transformer (GL1) connected in sequence; The low voltage differential signal interface and isolation circuit (LI) comprises a second isolation module (GL8), a second part of the transmission interface circuit (CL) and a first isolation module (ML5) connected in sequence; The single-ended analog signal generating circuit (DL) is connected to the first isolation transformer (ML4) The pulse width modulation amplification filtering and signal acquisition circuit (PL) is arranged in the power amplifier (GL), The pulse width modulation amplification filtering and signal acquisition circuit (PL) comprises: a class D power amplifier chip (GL2), an LC low-pass filter (GL3), a current sensor (GL4), a third isolation transformer (GL5), a signal filtering circuit (GL6), a current recovery circuit (I1), an output voltage recovery circuit (I2), in, The second isolation transformer (GL1), the class D power amplifier chip (GL2), the LC low-pass filter (GL3), the current sensor (GL4) and the third isolation transformer (GL5) are connected in sequence; The LC low-pass filter (GL3) is connected to a third isolation transformer (GL5); The current sensor (GL4), the current recovery circuit (I1) and the signal filtering circuit (GL6) are connected in sequence; The third isolation transformer (GL5), the output voltage recovery circuit (I2) and the signal filtering circuit (GL6) are connected in sequence.

2. The anti-interference closed-loop controlled digital power amplifier system according to claim 1, characterized in that: The first isolation transformer (ML4) is arranged in the analog signal generating circuit (ML); The second isolation transformer (GL1) is arranged in the power amplifier (GL).

3. The anti-interference closed-loop controlled digital power amplifier system according to claim 2, characterized in that: The output end of the first isolation transformer (ML4) is connected to the input end of the second isolation transformer (GL1) through the first part of the transmission interface circuit (CL), and A capacitor (C1) is provided at the input end of the first isolation transformer (ML4) for isolating a DC component in a signal transmitted to the first isolation transformer (ML4); A capacitor is provided between the first isolation transformer (ML4) and the second isolation transformer (GL1), for isolating a DC component in a signal transmitted from the first isolation transformer (ML4) to the second isolation transformer (GL1); The output end of the second isolation transformer (GL1) is provided with a capacitor for isolating a DC component in a signal output by the second isolation transformer (GL1).

4. The anti-interference closed-loop controlled digital power amplifier system according to claim 3, characterized in that: A capacitor (C4) and a capacitor (C5) which are independently arranged are provided between the first isolation transformer (ML4) and the second isolation transformer (GL1); The output end of the second isolation transformer (GL1) is provided with a capacitor (C8) and a capacitor (C9) which are independently arranged.

5. The anti-interference closed-loop controlled digital power amplifier system according to claim 2, characterized in that: The third isolation transformer (GL5) is connected to a load.

6. The digital power amplifier system with anti-interference closed-loop control according to claim 2 or 5, characterized in that: The second isolation module (GL8) is arranged in the power amplifier (GL); The first isolation module (ML5) is arranged in the analog signal generating circuit (ML).

7. The anti-interference closed-loop controlled digital power amplifier system according to claim 6, characterized in that: Also includes: CPU (ML1), The CPU (ML1) is connected to the single-ended analog signal generating circuit (DL) and the low voltage differential signal interface and isolation circuit (LI).

8. The anti-interference closed-loop controlled digital power amplifier system according to claim 7, characterized in that: The CPU (ML1) is connected to the first isolation module (ML5).

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