Signal detection module and device, display panel, and display device

Abstract

The present application discloses a signal detection module and device, a display panel, and a display device, and relates to the field of fingerprint recognition technology. The control line and the output signal line in the signal detection module extend along a first direction, and the input signal line extends along a second direction. Therefore, the output signal line will not intersect with the control line, but only with the input signal line. In this way, the coupling capacitance generated by the output signal line and other signal lines can be reduced, and the noise of the recognition signal transmitted by the output signal line can be reduced, thereby improving the recognition effect.

Description

Technical Field

[0001] The present application relates to the field of signal recognition technology, and in particular to a signal detection module and device, a display panel, and a display device. Background Art

[0002] The signal recognition device may have a signal recognition function to identify the identity of the user.

[0003] In the related art, the signal recognition device may include a recognition electrode and a signal recognition circuit connected to the recognition electrode. For example, the signal recognition device is a fingerprint signal recognition device. When a user places a finger close to the recognition electrode of the signal recognition device, the signal recognition circuit can determine the position of the detected ridges and valleys based on the capacitance value formed by the ridges and valleys of the user's fingerprint obtained from the recognition electrode and the recognition electrode, thereby completing fingerprint recognition.

[0004] However, in the related art, the signal obtained by the signal recognition circuit from the recognition electrode has large noise, and the recognition effect is poor. Summary of the invention

[0005] The present application provides a signal detection module and device, a display panel, and a display device, which can solve the problem of poor recognition effect in the related art. The technical solution is as follows:

[0006] In one aspect, a signal detection module is provided, the signal detection module comprising:

[0007] A substrate substrate, and at least one detection circuit, a switch circuit, a control line, an input signal line, and an output signal line located on the substrate substrate, at least one of the detection circuits comprising an identification electrode and a switch circuit;

[0008] The switch circuit is electrically connected to the identification electrode, the control line, the input signal line and the output signal line respectively, and the switch circuit is used to load the driving signal provided by the input signal line to the identification electrode and output the fingerprint identification signal generated by the identification electrode to the output signal line under the control of the switch signal provided by the control line;

[0009] The control line and the output signal line both extend along a first direction, the input signal line extends along the second direction, and the first direction intersects with the second direction.

[0010] Optionally, the switch circuit includes: a first switch transistor and a second switch transistor; the control line includes: a first control sub-line and a second control sub-line;

[0011] The gate of the first switch transistor is electrically connected to the first control sub-line, the first electrode of the first switch transistor is electrically connected to the input signal line, and the second electrode of the first switch transistor is electrically connected to the identification electrode;

[0012] A gate of the second switch transistor is electrically connected to the second control sub-line, a first electrode of the second switch transistor is electrically connected to the identification electrode, and a second electrode of the second switch transistor is electrically connected to the output signal line.

[0013] Optionally, the shape of the identification electrode is a rectangle;

[0014] The first control sub-line is close to the first side of the identification electrode relative to the second side of the identification electrode, and the second control sub-line is close to the second side of the identification electrode relative to the first side of the identification electrode;

[0015] The second side of the identification electrode is opposite to the first side of the identification electrode.

[0016] Optionally, the first switch transistor further includes a first active layer, and the first active layer extends along the first direction;

[0017] The second switch transistor further includes a second active layer extending along the second direction.

[0018] Optionally, the orthographic projection of the input signal line on the base substrate does not overlap with the orthographic projection of the identification electrode on the base substrate;

[0019] The orthographic projection of the output signal line on the base substrate does not overlap with the orthographic projection of the identification electrode on the base substrate.

[0020] Optionally, an orthographic projection of the output signal line on the substrate does not overlap with an orthographic projection of the control line on the substrate.

[0021] Optionally, at least part of the input signal lines and at least part of the output signal lines are located in the same layer, and there is a gap between the input signal lines and the output signal lines located in the same layer.

[0022] Optionally, the signal detection module further includes: a connection structure;

[0023] The connection structure and the input signal line are located in different layers; the input signal line includes: a first sub-line segment and a second sub-line segment; a portion of the output signal line is located between the first sub-line segment and the second sub-line segment, and there is a gap between the output signal line and the first sub-line segment and the second sub-line segment; one end of the connection structure is electrically connected to the first sub-line segment, and the other end of the connection structure is electrically connected to the second sub-line segment;

[0024] Alternatively, the connection structure and the output signal line are located in different layers; the output signal line includes: a third sub-segment and a fourth sub-segment; a portion of the input signal line is located between the third sub-segment and the fourth sub-segment, and there is a gap between the input signal line and the third sub-segment and the fourth sub-segment; one end of the connection structure is electrically connected to the third sub-segment, and the other end of the connection structure is electrically connected to the fourth sub-segment.

[0025] Optionally, when the connection structure and the input signal line are located in different layers, and the input signal line includes a first sub-segment and a second sub-segment, an orthographic projection of the connection structure on the base substrate at least partially overlaps with an orthographic projection of the output signal line on the base substrate;

[0026] When the connection structure and the output signal line are located in different layers and the output signal line includes a third sub-segment and a fourth sub-segment, the orthographic projection of the connection structure on the base substrate at least partially overlaps with the orthographic projection of the input signal line on the base substrate.

[0027] Optionally, the identification electrode is made of a transparent metal material.

[0028] Optionally, the signal detection module further includes: a first insulating layer and a second insulating layer;

[0029] The switch circuit, the first insulating layer, the input signal line, the second insulating layer, and the identification electrode are stacked in sequence in a direction away from the base substrate, and the output signal line and the input signal line are located in the same layer;

[0030] The first insulating layer has a first via hole, the second insulating layer has a second via hole, and the switch circuit is electrically connected to the identification electrode through the first via hole and the second via hole.

[0031] Optionally, the second insulating layer includes: a first sub-insulating layer and a second sub-insulating layer stacked in sequence in a direction away from the base substrate; the signal detection module further includes: a first shielding layer located between the first sub-insulating layer and the second sub-insulating layer, the first shielding layer includes a first part and a second part arranged at intervals, and the first part is used to shield the signal transmitted by the input signal line from the signal transmitted by the identification electrode;

[0032] Wherein, the switch circuit is electrically connected to the identification electrode through the first via hole, the second via hole and the second part.

[0033] Optionally, the first insulating layer includes: a third sub-insulating layer and a fourth sub-insulating layer stacked in sequence in a direction away from the base substrate; the signal detection module further includes: a second shielding layer located between the third sub-insulating layer and the fourth sub-insulating layer, the second shielding layer includes a third portion and a fourth portion arranged at intervals, and the third portion is used to shield the signal transmitted by the input signal line from the signal transmitted by the switch circuit;

[0034] Wherein, the switch circuit is electrically connected to the identification electrode through the first via hole, the second via hole, the second part and the fourth part.

[0035] On the other hand, a signal recognition device is provided, the signal recognition device comprising: a control circuit, a drive circuit, a signal recognition circuit, and the signal detection module as described in the above aspect;

[0036] The control circuit is electrically connected to the control line in the signal detection module, and is used to provide a switch signal for the control line;

[0037] The driving circuit is electrically connected to the input signal line in the signal detection module, and is used to provide a driving signal for the input signal line;

[0038] The signal recognition circuit is electrically connected to the output signal line in the signal detection module, and is used to receive the recognition signal transmitted by the output signal line and perform recognition based on the recognition signal.

[0039] Optionally, the signal detection module and the signal identification circuit are arranged along a first direction, and the signal detection module and the driving circuit are arranged along a second direction, and the first direction intersects with the second direction.

[0040] In yet another aspect, a display panel is provided, the display panel comprising: a display substrate and the signal recognition device as described in the above aspect;

[0041] The display substrate has a display area, and at least part of the detection circuit of the signal detection module in the signal recognition device is located in the display area.

[0042] In another aspect, a display device is provided, comprising: a power supply component and the display panel as described in the above aspect;

[0043] The power supply component is used to supply power to the display panel.

[0044] The beneficial effects of the technical solution provided by this application include at least:

[0045] The present application provides a signal detection module and device, a display panel, and a display device, wherein the control line and the output signal line in the signal detection module extend along a first direction, and the input signal line extends along a second direction. Therefore, the output signal line will not intersect with the control line, but will only intersect with the input signal line. This can reduce the coupling capacitance generated by the output signal line and other signal lines, thereby reducing the noise of the identification signal transmitted by the output signal line, and improving the identification effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0047] Figure 1 is a structural schematic diagram of a signal detection module provided in an embodiment of the present application;

[0048] Figure 2 yes Figure 1 The equivalent circuit diagram of the signal detection module shown;

[0049] Figure 3 This is a schematic diagram of the principle of fingerprint recognition provided by an embodiment of the present application;

[0050] Figure 4 is a structural schematic diagram of another signal detection module provided in an embodiment of the present application;

[0051] Figure 5 yes Figure 4 The cross-sectional view of the signal detection module shown along the AA direction;

[0052] Figure 6 is a structural schematic diagram of another signal detection module provided in an embodiment of the present application;

[0053] Figure 7 yes Figure 6The cross-sectional view of the signal detection module shown along the BB direction;

[0054] Figure 8 It is a signal transmission schematic diagram of a signal detection module provided in an embodiment of the present application;

[0055] Fig. 9 is a schematic diagram of the structure of a switching transistor provided in an embodiment of the present application;

[0056] Fig.10 is a signal transmission schematic diagram of another signal detection module provided in an embodiment of the present application;

[0057] Fig.11 This is a signal transmission schematic diagram of another signal detection module provided in an embodiment of the present application;

[0058] Fig.12 is a top view of a signal detection module provided in an embodiment of the present application;

[0059] Fig.13 is a structural schematic diagram of a signal recognition device provided in an embodiment of the present application;

[0060] Fig.14 is an equivalent circuit diagram of a signal recognition device provided in an embodiment of the present application;

[0061] Fig.15 is an equivalent circuit diagram of another signal recognition device provided in an embodiment of the present application;

[0062] Fig.16 is a structural schematic diagram of a display panel provided in an embodiment of the present application;

[0063] Fig.17 It is a structural schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0064] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0065] Figure 1 is a schematic diagram of the structure of a signal detection module provided in an embodiment of the present application. Figure 1 It can be seen that the signal detection module 10 may include: a substrate 101, and at least one detection circuit 102, a control line 103, an input signal line 104 and an output signal line 105 located on the substrate 101. The at least one detection circuit 102 includes an identification electrode 1021 and a switch circuit 1022.

[0066] Optionally, the signal detection module 10 may include a plurality of detection circuits 102 , and the plurality of detection circuits 102 are arranged in an array.

[0067] Figure 2 yes Figure 1 The equivalent circuit diagram of the signal detection module shown in FIG. Figure 1 and Figure 2 The switch circuit 1022 can be electrically connected to the identification electrode 1021, the control line 103, the input signal line 104 and the output signal line 105 respectively. The switch circuit 1022 is used to load the driving signal transmitted by the input signal line 104 to the identification electrode 1021 and output the identification signal generated by the identification electrode 1021 to the output signal line 105 under the control of the switch signal provided by the control line 103.

[0068] The control line 103 and the output signal line 105 both extend along a first direction X, and the input signal line 104 extends along a second direction Y. The first direction X and the second direction Y intersect.

[0069] In the embodiment of the present application, since the control line 103 and the output signal line 105 both extend along the first direction X, the output signal line 105 will not intersect with the control line 103. However, the output signal line 105 extends along the first direction X, the input signal line 104 extends along the second direction Y, and the first direction X intersects with the second direction Y, so the output signal line 105 will intersect with the input signal line 104. As a result, no coupling capacitance is generated between the output signal line 105 and the control line 103, and the output signal line 105 will only generate coupling capacitance with the input signal line 104. Compared with the solution in which the output signal line 105 generates coupling capacitance with both the control line 103 and the input signal line 104, the solution provided in the embodiment of the present application can reduce the coupling capacitance generated between the output signal line 105 and other signal lines, thereby reducing the noise of the identification signal transmitted by the output signal line 105, and improving the identification effect.

[0070] In summary, the present application provides a signal detection module, in which the control line and the output signal line in the signal detection module extend along the first direction, and the input signal line extends along the second direction. Therefore, the output signal line will not intersect with the control line, but will only intersect with the input signal line. This can reduce the coupling capacitance generated by the output signal line and other signal lines, thereby reducing the noise of the identification signal transmitted by the output signal line, and improving the identification effect.

[0071] Optionally, the signal detection module can be a fingerprint signal detection module. Accordingly, the identification electrode 1021 can be a fingerprint identification electrode, and the identification signal can be a fingerprint identification signal. Therefore, the solution provided in the embodiment of the present application can reduce the noise of the fingerprint identification signal transmitted by the output signal line 105, and improve the effect of fingerprint identification. Of course, the signal detection module can also be other signal detection modules, for example, it can be a palmprint signal detection module. Accordingly, the identification electrode 1021 can be a palmprint identification electrode, and the identification signal can be a palmprint identification signal. The embodiment of the present application does not limit the type of the signal detection module, and the embodiment of the present application takes the signal detection module as a fingerprint signal detection module as an example for explanation.

[0072] In the embodiment of the present application, since the control line 103 and the output signal line 105 both extend along the first direction X, and the input signal line 104 extends along the second direction Y, and the first direction X intersects with the second direction Y, the input signal line 104 intersects with both the control line 103 and the output signal line 105. Therefore, coupling capacitance is generated between the input signal line 104 and the control line 103, and between the input signal line 104 and the output signal line 105. However, after the input signal line 104 receives the driving signal, it will first load the driving signal to the identification electrode 1021, so the identification electrode 1021 will have a certain buffering effect on the driving signal (for example, because Q = C*V. Q is the charge, C is the coupling capacitance between the input signal line 104 and the output signal line 105, and V is the voltage of the driving signal provided by the driving circuit to the input signal line 104. If the voltage V of the driving signal provided by the driving circuit to the input signal line 104 is a fixed value, then since the coupling capacitance C between the input signal line 104 and the output signal line 105 is also a fixed value, the charge Q can also be a fixed value). Therefore, even if the driving signal transmitted from the input signal line 104 to the identification electrode 1021 has a certain amount of noise, the noise will not have a significant impact on the fingerprint recognition signal output from the identification electrode 1021 to the output signal line 105, and can ensure the stable output of the fingerprint recognition signal of the output signal line 105, thereby ensuring the effect of fingerprint recognition.

[0073] Optionally, the orthographic projection of the output signal line 105 on the base substrate 101 may not overlap with the orthographic projection of the control line 103 on the base substrate 101. This can avoid the generation of coupling capacitance between the output signal line 105 and the control line 103.

[0074] Optionally, the material of the identification electrode 1021 may be a transparent metal material. Of course, the material of the identification electrode 1021 may also be other opaque metal materials. This embodiment of the application does not limit this.

[0075] refer to Figure 1 and Figure 2It can be seen that the switch circuit 1022 may include: a first switch transistor 10221 and a second switch transistor 10222. The control line 103 may include: a first control sub-line 1031 and a second control sub-line 1032.

[0076] The gate of the first switch transistor 10221 is electrically connected to the first control sub-line 1031, the first electrode of the first switch transistor 10221 is electrically connected to the input signal line 104, and the second electrode of the first switch transistor 10221 is electrically connected to the identification electrode 1021. The gate of the second switch transistor 10222 is electrically connected to the second control sub-line 1032, the first electrode of the second switch transistor 10222 is electrically connected to the identification electrode 1021, and the second electrode of the second switch transistor 10222 is electrically connected to the output signal line 105.

[0077] The first switch transistor 10221 is used to be turned on or off under the control of the switch signal provided by the first control sub-line 1031. When the first switch transistor 10221 is turned on, the first switch transistor 10221 can load the driving signal transmitted by the input signal line 104 to the identification electrode 1021. The second switch transistor 10222 is used to be turned on or off under the control of the switch signal provided by the second control sub-line 1032. When the second switch transistor 10222 is turned on, the second switch transistor 10222 can output the identification signal generated by the identification electrode 1021 to the output signal line 105.

[0078] In the case where the first switch transistor 10221 loads the driving signal provided by the input signal line 104 to the identification electrode 1021 , if the user's finger approaches the identification electrode 1021 , the identification electrode 1021 can generate a fingerprint identification signal.

[0079] Optionally, the following Table 1 shows the coupling capacitance between the input signal line 104 and the output signal line 105 , the coupling capacitance between the first control sub-line 1031 and the input signal line 104 , and the coupling capacitance between the second control sub-line 1032 and the input signal line 104 .

[0080] Table 1

[0081] Coupling capacitance between input signal line and output signal line 2.34 femtofarads (fF) Coupling capacitance between the first control sub-line and the input signal line 2.06fF The coupling capacitance between the second control sub-line and the input signal line 2.34fF

[0082] Among them, each coupling capacitor shown in the above Table 1 is a coupling capacitor at an overlap. For example, the orthographic projection of the input signal line 104 on the substrate 101 and the orthographic projection of the output signal line 105 on the substrate 101 may have multiple overlapping areas. Each overlapping area can form a coupling capacitor, and the capacitance value of the coupling capacitor is 2.34. The orthographic projection of the first control sub-line 1031 on the substrate 101 and the orthographic projection of the input signal line 104 on the substrate 101 may have multiple overlapping areas. Each overlapping area can form a coupling capacitor, and the capacitance value of the coupling capacitor is 2.06. The orthographic projection of the second control sub-line 1032 on the substrate 101 and the orthographic projection of the input signal line 104 on the substrate 101 may have multiple overlapping areas. Each overlapping area can form a coupling capacitor, and the capacitance value of the coupling capacitor is 2.34.

[0083] That is, for the output signal line 105, the more overlapping areas with other signal lines, the greater the coupling capacitance formed. Therefore, the solution provided in the embodiment of the present application can reduce the coupling capacitance generated by the output signal line 105 and other signal lines by making the output signal line 105 intersect only with the input signal line 104 but not with the control line 103, thereby reducing the noise of the identification signal transmitted by the output signal line 105 and improving the identification effect.

[0084] Optionally, the fingerprint recognition signal can be used to indicate the capacitance value of the capacitor formed between the user's finger and the recognition electrode 1021. Since the distance between the ridges and valleys of the user's fingerprint and the recognition electrode 1021 is different, the capacitance value of the capacitor formed by the ridges and valleys of the user's fingerprint and the recognition electrode 1021 is different. Therefore, the signal recognition circuit can determine the position of the detected ridges and valleys based on the capacitance value of the capacitor formed by the ridges and valleys of the user's fingerprint and the recognition electrode 1021, and complete fingerprint recognition. In this implementation, the signal detection module 10 is a capacitive fingerprint detection module.

[0085] In an embodiment of the present application, the detection circuit 102 may further include another identification electrode arranged opposite to the identification electrode 1021, and a photoelectric material layer located between the two identification electrodes. The driving signal input by the input signal line 104 is a low-level electrical signal, and the other identification electrode is connected to a high-level electrical signal. That is, the identification electrode 1021, the photoelectric material layer and the other identification electrode can form a photoelectric sensor. The signal detection module may be an optical fingerprint detection module. At least one detection circuit includes a photoelectric sensor, and the light reflected by the pattern to be identified is incident on the photoelectric sensor, and the photoelectric sensor converts the light signal into an electrical signal. The size of the driving signal provided by the input signal line 104 to the identification electrode 1021 can be adjusted, so that the voltage difference between the two identification electrodes can be set larger, which helps to improve the detection accuracy of the optical fingerprint detection module.

[0086] Figure 3 This is a schematic diagram of the principle of fingerprint recognition provided by an embodiment of the present application. Figure 3 This principle schematic diagram only illustrates the base substrate 101, the identification electrode 1021, the first film layer a between the base substrate 101 and the identification electrode 1021 (such as the switch circuit 1022 and the insulating layer, etc.), and the second film layer b (such as the cover) of the identification electrode 1021 away from the base substrate 101.

[0087] When the user's finger is close to the identification electrode 1021 (for example, when the user's finger is in contact with the second film layer b), the distance between the ridge in the fingerprint and the identification electrode 1021 is small, and the distance between the valley in the fingerprint and the identification electrode 1021 is large. Therefore, the capacitance value of the capacitor between the ridge and the identification electrode 1021 is small, and the capacitance value of the capacitor between the valley and the identification electrode 1021 is large.

[0088] Optionally, the capacitance Cr of the capacitor between the ridge and the identification electrode 1021 satisfies:

[0089]

[0090] The capacitance value Cv of the capacitor between the valley and the identification electrode 1021 satisfies:

[0091]

[0092] In the above formula (1) and the above formula (2), A is the area of ​​the identification electrode 1021, d1 is the thickness of the second film layer b, d2 is the distance between the valley and the side of the second film layer b away from the base substrate 101, ε1 is the dielectric constant of the second film layer b, ε2 is the dielectric constant of the medium (air) between the valley and the second film layer b, and / / is used to indicate series connection. The capacitance values ​​of the capacitors formed by the ridges and valleys of the user's fingerprint and the identification electrode 1021 are different in magnitude, so the signal recognition circuit can determine the positions of the detected ridges and valleys based on the capacitance values ​​of the capacitors formed by the ridges and valleys of the user's fingerprint and the identification electrode 1021, and complete fingerprint recognition.

[0093] refer to Figure 1 , the shape of the identification electrode 1021 may be rectangular. For example, the shape of the identification electrode 1021 is square, and the size of the identification electrode 1021 may be 50 μm (micrometer) × 50 μm. Of course, the shape of the identification electrode 1021 may also be other shapes (such as circular), and the size may also be other sizes, which is not limited in the embodiment of the present application.

[0094] Optionally, the first control subline 1031 is close to the first side of the identification electrode 1021 relative to the second side of the identification electrode 1021. The second control subline 1032 is close to the second side of the identification electrode 1021 relative to the first side of the identification electrode 1021. The second side of the identification electrode 1021 is opposite to the first side of the identification electrode 1021.

[0095] Optionally, when the shape of the identification electrode 1021 is rectangular, the extension direction of the first side of the identification electrode 1021 may be parallel to the extension direction of the second side of the identification electrode 1021. For example, the extension direction of the first side and the extension direction of the second side of the identification electrode 1021 are both the first direction X.

[0096] It should be noted that the extension direction of the first side of the identification electrode 1021 can be parallel to the extension direction of the second side of the identification electrode 1021, which may mean that the extension direction of the first side of the identification electrode 1021 does not intersect with the extension direction of the second side of the identification electrode 1021, or the extension direction of the first side of the identification electrode 1021 intersects with the extension direction of the second side of the identification electrode 1021, and the angle between the extension direction of the first side of the identification electrode 1021 and the extension direction of the second side of the identification electrode 1021 is less than the angle threshold. That is, the extension direction of the first side of the identification electrode 1021 can be parallel to the extension direction of the second side of the identification electrode 1021, which may mean that the extension direction of the first side of the identification electrode 1021 can be strictly parallel to the extension direction of the second side of the identification electrode 1021 (the shape of the identification electrode 1021 is a rectangle), or the extension direction of the first side of the identification electrode 1021 can be approximately parallel to the extension direction of the second side of the identification electrode 1021 (the shape of the identification electrode 1021 is approximately rectangular). Optionally, the angle threshold may range from 0° (degrees) to 10°.

[0097] The first control sub-line 1031 being close to the first side of the identification electrode 1021 relative to the second side of the identification electrode 1021 may mean that: the distance between the first control sub-line 1031 and the first side of the identification electrode 1021 is smaller than the distance between the first control sub-line 1031 and the second side of the identification electrode 1021. The second control sub-line 1032 being close to the second side of the identification electrode 1021 relative to the first side of the identification electrode 1021 may mean that: the distance between the second control sub-line 1032 and the second side of the identification electrode 1021 is smaller than the distance between the second control sub-line 1032 and the first side of the identification electrode 1021.

[0098] Correspondingly, since the first switch transistor 10221 is electrically connected to the first control sub-line 1031 and the second switch transistor 10222 is electrically connected to the second control sub-line 1032, the first switch transistor 10221 is close to the first control sub-line 1031 relative to the second control sub-line 1032, and the second switch transistor 10222 is close to the second control sub-line 1032 relative to the first control sub-line 1031.

[0099] Optional, reference Figure 1 , the orthographic projection of the first control subline 1031 on the base substrate 101 partially overlaps with the orthographic projection of the identification electrode 1021 on the base substrate 101. In addition, the first control subline 1031 may be collinear with the first side of the identification electrode 1021. The orthographic projection of the second control subline 1032 on the base substrate 101 partially overlaps with the orthographic projection of the identification electrode 1021 on the base substrate 101. In addition, the second control subline 1032 may be collinear with the second side of the identification electrode 1021.

[0100] The first control subline 1031 may be collinear with the first side of the identification electrode 1021, which may mean that the orthographic projection of the first control subline 1031 on the base substrate 101 and the orthographic projection of the first side of the identification electrode 1021 on the base substrate 101 are located on the same straight line. The second control subline 1032 may be collinear with the second side of the identification electrode 1021, which may mean that the orthographic projection of the second control subline 1032 on the base substrate 101 and the orthographic projection of the second side of the identification electrode 1021 on the base substrate 101 are located on the same straight line.

[0101] Of course, the orthographic projection of the first control subline 1031 on the base substrate 101 may not overlap with the orthographic projection of the identification electrode 1021 on the base substrate 101, and the first control subline 1031 may not be collinear with the first side of the identification electrode 1021. The orthographic projection of the second control subline 1032 on the base substrate 101 may not overlap with the orthographic projection of the identification electrode 1021 on the base substrate 101, and the second control subline 1032 may not be collinear with the second side of the identification electrode 1021. This embodiment of the present application does not limit this.

[0102] In the examples of this application, refer to Figure 1 , the orthographic projection of the input signal line 104 on the base substrate 101 does not overlap with the orthographic projection of the identification electrode 1021 on the base substrate 101. The orthographic projection of the output signal line 105 on the base substrate 101 does not overlap with the orthographic projection of the identification electrode 1021 on the base substrate 101. Thus, it is possible to avoid the generation of coupling capacitance between the input signal line 104 and the identification electrode 1021, and between the output signal line 105 and the identification electrode 1021, and to ensure the reliability of the signals transmitted in the input signal line 104 and the output signal line 105, thereby ensuring the effect of identification.

[0103] In the embodiment of the present application, at least part of the input signal line 104 and at least part of the output signal line 105 are located in the same layer, and there is a gap between the input signal line 104 and the output signal line 105 located in the same layer. Optionally, the input signal line 104 and the output signal line 105 are located in the same layer, so that the input signal line 104 and the output signal line 105 can be prepared by the same patterning process, thereby simplifying the preparation process of the signal detection module. In addition, since there is a gap between the input signal line 104 and the output signal line 105, the effectiveness of the signal transmission between the input signal line 104 and the output signal line 105 can be ensured.

[0104] Figure 4 It is a structural schematic diagram of another signal detection module provided in an embodiment of the present application. Figure 5 yes Figure 4 The cross-sectional view of the signal detection module along the AA direction is shown. Figure 4and Figure 5 The signal detection module 10 may further include: a connection structure 106 .

[0105] As an optional implementation, the connection structure 106 and the input signal line 104 may be located at a different layer. Figure 5 In the embodiment, the connection structure 106 and the input signal line 104 are respectively located on two sides of an insulating layer c.

[0106] Among them, reference Figure 4 and Figure 5 , the input signal line 104 at least includes a first sub-segment 1041 and a second sub-segment 1042. A portion of the output signal line 105 is located between the first sub-segment 1041 and the second sub-segment 1042, and there is a gap between the output signal line 105 and the first sub-segment 1041 and the second sub-segment 1042. One end of the connection structure 106 is electrically connected to the first sub-segment 1041, and the other end of the connection structure 106 is electrically connected to the second sub-segment 1042. For example, the insulating layer c located between the connection structure 106 and the input signal line 104 may have a via hole, one end of the connection structure 106 is electrically connected to the first sub-segment 1041 through the via hole, and the other end of the connection structure 106 is electrically connected to the second sub-segment 1042 through the via hole. Therefore, the electrical connection between the first sub-segment 1041 and the second sub-segment 1042 is achieved by setting the connection structure 106, ensuring signal transmission in the input signal line 104.

[0107] Optional, reference Figure 4 and Figure 5 Since the connection structure 106 needs to connect the first sub-segment 1041 and the second sub-segment 1042 located on both sides of the output signal line 105, the orthographic projection of the connection structure 106 on the base substrate 101 at least partially overlaps with the orthographic projection of the output signal line 105 on the base substrate 101.

[0108] As another optional implementation, the connection structure 106 and the output signal line 105 may be located in a different layer. Figure 6 It is a structural diagram of another signal detection module provided in an embodiment of the present application. Figure 7 yes Figure 6 The cross-sectional view of the signal detection module along the BB direction is shown. Figure 6 and Figure 7 , the connection structure 106 and the output signal line 105 are respectively located on two sides of an insulating layer c.

[0109] The output signal line 105 at least includes a third sub-segment 1051 and a fourth sub-segment 1052. A portion of the input signal line 104 is located between the third sub-segment 1051 and the fourth sub-segment 1052, and there is a gap between the input signal line 104 and the third sub-segment 1051 and the fourth sub-segment 1052. One end of the connection structure 106 is electrically connected to the third sub-segment 1051, and the other end of the connection structure 106 is electrically connected to the fourth sub-segment 1052. For example, the insulating layer c located between the connection structure 106 and the input signal line 104 may have a via hole, and one end of the connection structure 106 is electrically connected to the third sub-segment 1051 through the via hole, and the other end of the connection structure 106 is electrically connected to the fourth sub-segment 1052 through the via hole. Therefore, the electrical connection between the third sub-segment 1051 and the fourth sub-segment 1052 is achieved by setting the connection structure 106, thereby ensuring signal transmission in the output signal line 105.

[0110] Optional, reference Figure 6 and Figure 7 Since the connection structure 106 needs to connect the third sub-segment 1051 and the fourth sub-segment 1052 located on both sides of the input signal line 104, the orthographic projection of the connection structure 106 on the base substrate 101 at least partially overlaps with the orthographic projection of the input signal line 104 on the base substrate 101.

[0111] In the embodiment of the present application, the connection structure 106 and the control line 103 may be located in the same layer, and the connection structure 106 and the control line 103 may be prepared by using the same patterning process.

[0112] In the embodiment of the present application, the first switch transistor 10221 may further include a first active layer, and the first active layer may extend along the first direction X. The second switch transistor 10222 may further include a second active layer, and the second active layer may extend along the second direction Y.

[0113] Figure 8 Schematic diagram of signal transmission of a signal detection module provided in an embodiment of the present application. Figure 8 The signal detection module 10 may further include a first insulating layer 107 and a second insulating layer 108. The switch circuit 1022, the first insulating layer 107, the input signal line 104, the second insulating layer 108, and the identification electrode 1021 are stacked in sequence in a direction away from the base substrate 101. The first insulating layer 107 has a first via hole, the second insulating layer 108 has a second via hole, and the switch circuit 1022 is electrically connected to the identification electrode 1021 through the first via hole and the second via hole. Figure 8 The signal detection module 10 may further include a cover plate 109 . The cover plate 109 is located on a side of the identification electrode 1021 away from the base substrate 101 , and is used to encapsulate the identification electrode 1021 .

[0114] Optional, reference Figure 8 , the first sub-segment 1041 of the input signal line 104 transmits the received driving signal to the second sub-segment 1042 of the input signal line 104 through the connection structure 106. Afterwards, the first switch transistor 10221 is turned on under the control of the switch signal provided by the first control sub-line 1031, and the second sub-segment 1042 can transmit the driving signal to the identification electrode 1021 through the first switch transistor 10221. The second switch transistor 10222 is turned on under the control of the switch signal provided by the second control sub-line 1032, and the identification electrode 1021 transmits the generated identification signal to the output signal line 105 through the second switch transistor 10222.

[0115] Fig. 9 is a schematic diagram of the structure of a switch transistor provided in an embodiment of the present application. Fig. 9 It can be seen that the switch transistor e may include a gate (gate, G) e1, a gate insulating layer e2, an active layer e3, and a source-drain layer e4 stacked in sequence in a direction away from the substrate 101. The source-drain layer e4 includes a source (source, S) e41 and a drain (drain, D) e42 arranged at intervals, and the source e41 and the drain e42 are both electrically connected to the active layer e3.

[0116] in, Fig. 9 The switch transistor e shown can be the first switch transistor 10221 in the switch circuit 1022, or can be the second switch transistor 10222 in the switch circuit 1022. In the embodiment of the present application, the first electrode can be a drain, the second electrode can be a source, or the first electrode can be a source and the second electrode can be a drain. In the case of using transistors with opposite polarities or the case where the current direction changes during circuit operation, the functions of the "source" and the "drain" are sometimes interchanged. Therefore, in the embodiment of the present application, the "source" and the "drain", the "first electrode" and the "second electrode" can be interchanged.

[0117] Optional, Fig. 9 The switch transistor shown is a bottom gate structure. Of course, the first switch transistor 10221 and the second switch transistor 10222 in the switch circuit 1022 may also be a top gate structure, which is not limited in the present embodiment. In addition, the structures of the first switch transistor 10221 and the second switch transistor 10222 may be the same, thereby improving the preparation efficiency of the signal detection module.

[0118] In the examples of this application, refer to Fig. 9 There may be an insulating layer f between the switch transistor e and the identification electrode 1021 (the insulating layer f may include the above Figure 8). Since the switch transistor e needs to be electrically connected to the identification electrode 1021, and the thickness of the insulation layer f between the switch transistor e and the identification electrode 1021 is relatively thick, if a via hole is directly provided in the insulation layer f to connect the switch transistor e and the identification electrode 1021, the insulation layer f is easily broken, thereby affecting the yield of the signal detection module.

[0119] Therefore, reference Fig. 9 A signal transfer layer g may also be provided between the switch transistor e and the identification electrode 1021. For example, there is an insulating layer f1 between the switch transistor e and the signal transfer layer g, and there is another insulating layer f2 between the signal transfer layer g and the identification electrode 1021, and both insulating layers are provided with vias. The switch transistor e and the signal transfer layer g are electrically connected through the vias in the insulating layer f1 between them, and the signal transfer layer and the identification electrode 1021 are electrically connected through the vias in the insulating layer f2 between them.

[0120] It should be noted that Fig. 9 , three identification electrodes 1021 are shown. The switch transistor e is electrically connected to the second identification electrode 1021 of the three identification electrodes 1021. There is a gap between the first identification electrode 1021 and the second identification electrode 1021, and there is a gap between the second identification electrode 1021 and the third identification electrode 1021.

[0121] In the examples of this application, preparation Fig. 9The preparation process of the switching transistor e shown may include: forming a gate film on one side of the substrate 101 by an evaporation process; patterning the gate film to obtain a gate e1; forming a gate insulating layer e2 on the side of the gate e1 away from the substrate 101 (for example, forming the gate insulating layer e2 on the side of the gate e1 away from the substrate 101 by an evaporation process); forming an active film on the side of the gate insulating layer e2 away from the substrate 101 (for example, forming the active film on the side of the gate insulating layer e2 away from the substrate 101 by an evaporation process); patterning the active film to obtain an active layer e3; forming a source-drain film on the side of the active layer away from the substrate 101 (for example, forming the source-drain film on the side of the active layer away from the substrate 101 by an evaporation process); patterning the source-drain film to obtain a source electrode e41 and a drain electrode e42; forming an insulating layer f1 on the side of the source electrode e41 and the drain electrode e42 away from the substrate 101 (for example, forming the active film on the side of the gate insulating layer e2 away from the substrate 101 by an evaporation process); An insulating layer f1 is formed on the side of the source electrode e41 and the drain electrode e42 away from the base substrate 101 by using an evaporation process; a via is formed in the insulating layer f1 (for example, an etching process is used); a signal transfer layer g is formed on the side of the insulating layer f1 away from the base substrate 101 (for example, a signal transfer layer g is formed on the side of the insulating layer f1 away from the base substrate 101 by using an evaporation process), so that the signal transfer layer f is electrically connected to the drain electrode e42 through the via in the insulating layer f1; another insulating layer f2 is formed on the side of the signal transfer layer g away from the base substrate 101 (for example, another insulating layer f2 is formed on the side of the signal transfer layer g away from the base substrate 101 by using an evaporation process); a via is formed in the other insulating layer f2 (for example, a via is formed in the other insulating layer f2 by using an etching process); an identification electrode 1021 is formed on the side of the other insulating layer f2 away from the base substrate 101, so that the identification electrode 1021 is electrically connected to the signal transfer layer g through the via in the other insulating layer f2.

[0122] Optionally, the thickness of the substrate 101 may be 20 μm, and the material may be polyimide (PI). The thickness of the gate insulating layer e2 may be 20 nm (nanometers), and the material may be aluminum oxide (Al 2 O 3). The material of the active layer e3 may be silicon (Si). The materials of the source e41 and the drain e42 may include titanium (Ti) and aluminum (Al). For example, the source e41 and the drain e42 may each include a titanium layer, an aluminum layer, and a titanium layer stacked in sequence in a direction away from the base substrate 101. The material of the signal transfer layer g may be a metal, for example, silver (Ag). Of course, the thickness of the base substrate 101 and the thickness of the gate insulating layer e2 may also be other thicknesses, the material of the base substrate, the thickness and material of the gate insulating layer e2, the material of the active layer e3, and the materials of the source e42 and the drain e42 may also be other materials, and the embodiments of the present application are not limited to this.

[0123] Fig.10 is a signal schematic diagram of another signal detection module provided in an embodiment of the present application. Fig.10 The second insulating layer 108 may include a first sub-insulating layer 1081 and a second sub-insulating layer 1082 sequentially stacked in a direction away from the base substrate 101. The signal detection module 10 further includes: a first shielding layer 110 located between the first sub-insulating layer 1081 and the second sub-insulating layer 1082.

[0124] The first shielding layer 110 may include a first portion 1101 and a second portion 1102 that are spaced apart. The first portion 1101 may be located between the first sub-insulating layer 1081 and the second sub-insulating layer 1082, that is, between the first input signal line 104 and the identification electrode 1021, so the first portion 1101 may be used to shield the signal transmitted by the input signal line 104 from the signal transmitted by the identification electrode 1021. Furthermore, the output signal line 105 may be located in the same layer as the input signal line 104, so the first portion 1101 may also be used to shield the signal transmitted by the output signal line 105 from the identification electrode 1021. At the same time, the first portion 1101 may also be used to prevent the user's finger from directly generating an inductive capacitance with the input signal line 104 and the output signal line 105, thereby ensuring the accuracy of fingerprint recognition.

[0125] In addition, the switch circuit 1022 can be electrically connected to the identification electrode 1021 through the first via hole of the first insulating layer 107, the second via hole of the second insulating layer 108, and the second portion. Accordingly, the second via hole of the second insulating layer 108 can include a first sub-via hole of the first sub-insulating layer 1081 and a second sub-via hole of the second sub-insulating layer 1082. Fig.10 The switch circuit 1022 is electrically connected to the identification electrode 1021 through the first via hole, the first sub-via hole, the second part 1102 and the second sub-via hole in sequence.

[0126] Fig.11 Schematic diagram of another signal detection module provided in an embodiment of the present application. Fig.11The first insulating layer 107 may include: a third sub-insulating layer 1071 and a fourth sub-insulating layer 1072 sequentially stacked in a direction away from the base substrate 101. The signal detection module 10 further includes: a second shielding layer 111 located between the third sub-insulating layer 1071 and the fourth sub-insulating layer 1072.

[0127] The second shielding layer 111 may include a third portion 1111 and a fourth portion 1112 that are spaced apart. The third portion 1111 may be located between the input signal line 104 and the switch circuit, and may be used to shield the signal transmitted by the input signal line 104 from the signal transmitted by the switch circuit 1022.

[0128] As a possible situation, when the connecting structure 106 and the input signal line 104 are located in different layers, and the input signal line 104 includes a first sub-segment 1041 and a second sub-segment 1042 (the output signal line 105 and the input signal line 104 are located in the same layer), the third part 1111 can also be used to shield the signal transmitted by the output signal line 105 and the signal transmitted by the connecting structure 106.

[0129] As another possible situation, when the connecting structure 106 and the output signal line 105 are located in different layers, and the output signal line 105 includes a third sub-segment 1051 and a fourth sub-segment 1052 (the input signal line 104 and the output signal line 105 are located in the same layer), the third part 1111 can also be used to shield the signal transmitted by the input signal line 104 and the signal transmitted by the connecting structure 106.

[0130] In addition, the switch circuit 1022 can be electrically connected to the identification electrode 1021 through the first via hole of the first insulating layer 107, the second via hole of the second insulating layer 108, the second part and the fourth part. Accordingly, the first via hole of the first insulating layer 107 can include a third sub-via hole of the third sub-insulating layer 1071 and a fourth sub-via hole of the first sub-insulating layer 1081. Fig.11 The switch circuit 1022 is electrically connected to the identification electrode 1021 through the third sub-via, the fourth part 1112, the fourth sub-via, the first sub-via, the second part 1102 and the second sub-via in sequence.

[0131] In an embodiment of the present application, the first shielding layer 110 and the second shielding layer 111 can both be prepared by an evaporation process. The materials of the first shielding layer 110 and the second shielding layer 111 can both be metals to achieve the function of shielding signals. Optionally, the materials of the first shielding layer 110 and the second shielding layer 111 can both include titanium (Ti) and aluminum (Al). For example, the first shielding layer 110 and the second shielding layer 111 can both include a first titanium layer, an aluminum layer, and a second titanium layer stacked in sequence in a direction away from the base substrate 101. Of course, the first shielding layer 110 and the second shielding layer 111 can also include other materials, which are not limited in the embodiment of the present application.

[0132] It should be noted that, since the second portion of the first shielding layer 110 and the fourth portion of the second shielding layer 111 are located between the switch circuit 1022 and the identification electrode 1021, the second portion of the first shielding layer 110 and the fourth portion of the second shielding layer 111 can both be Fig. 9 The signal transfer layer g is shown. That is, the first part of the first shielding layer 110 and the third part of the second shielding layer 111 can both be used to shield signals, and the second part of the first shielding layer 110 and the fourth part of the second shielding layer 111 can realize the transition of the via hole in the insulating layer.

[0133] It should be noted that the second shielding layer 111 may also include only the third portion but not the fourth portion. That is, the second shielding layer 111 may only play a role in shielding signals.

[0134] For example, as a possible situation, when the connection structure 106 and the input signal line 104 are located in different layers, and the input signal line 104 includes a first sub-segment 1041 and a second sub-segment 1042 (the output signal line 105 and the input signal line 104 are located in the same layer), the third part can be located between the output signal line 105 and the connection structure 106, and is used to shield the signal transmitted by the output signal line 105 from the signal transmitted by the connection structure 106.

[0135] As another possible situation, when the connecting structure 106 and the output signal line 105 are located in different layers, and the output signal line 105 includes a third sub-segment 1051 and a fourth sub-segment 1052 (the input signal line 104 and the output signal line 105 are located in the same layer), the third part can be located between the input signal line 104 and the connecting structure 106 to shield the signal transmitted by the input signal line 104 and the signal transmitted by the connecting structure 106.

[0136] Fig.12 It is a top view of a signal detection module provided in an embodiment of the present application. Fig.12, the first shielding layer 110 is shown, and the first portion 1101 and the second portion 1102 included in the first shielding layer 110. Optionally, the shape of the second shielding layer 111 may be the same as that of the first shielding layer 110, for example, the shape of the third portion of the second shielding layer 111 may be the same as that of the first portion of the first shielding layer 110, and the shape of the fourth portion of the second shielding layer 111 may be the same as that of the second portion of the first shielding layer 110. Fig.12 In order to clearly illustrate the first shielding layer 110, the second shielding layer 111 is not illustrated. Of course, the shape of the second shielding layer 111 can also be different from the shape of the first shielding layer 110, as long as the second shielding layer 111 includes a third part and a fourth part separated by a gap, and the third part shields the signal, and the fourth part realizes the transition of the insulating layer.

[0137] Optional, reference Fig.12 , the shape of the second portion 1102 of the first shielding layer 110 may be an octagon. Of course, the shape of the second portion 1102 of the first shielding layer 110 may also be other shapes, which is not limited in the embodiment of the present application.

[0138] In the embodiments of the present application, Fig.12 The via h1 can be a via in the third sub-insulating layer 1071 between the switching transistor and the second shielding layer 111, the via h2 can be a via in the fourth sub-insulating layer 1072 between the first shielding layer 110 and the second shielding layer 111 and the first sub-insulating layer 1081, and the via h3 can be a via in the second sub-insulating layer 1082 between the second shielding layer 111 and the identification electrode 1021.

[0139] It should be noted that the embodiments of the present application provide Figure 4 , Figure 6 as well as Fig.12 Four signal detection modules 10 are shown in each case to illustrate the positional relationship between the plurality of signal detection modules 10 .

[0140] In an embodiment of the present application, the following Table 2 can be a schematic diagram of the film layer when the first shielding layer and the second shielding layer are not provided. Referring to Table 2, the signal detection module 10 may also include a barrier layer (barrier), a first buffer layer (buffer) and a second buffer layer (buffer). Among them, the film layers shown from bottom to top in Table 2 represent the film layers from bottom to top in the signal detection module 10. The unit of the film layer thickness is angstrom (A), the unit of the dielectric constant is 1, and the unit of the resistance is ohm / square (ohm / sq).

[0141] Table 2

[0142]

[0143]

[0144] In an embodiment of the present application, the following Table 3 may be a schematic diagram of the film layers when a first shielding layer and a second shielding layer are provided. Referring to Table 3, the signal detection module 10 may further include a barrier layer, a first buffer layer, and a second buffer layer. Among them, the film layers shown from bottom to top in Table 3 represent the film layers from bottom to top in the signal detection module 10. The unit of the film layer thickness is angstrom (A), the unit of the dielectric constant is 1, and the unit of the resistance is ohm / square (ohm / sq).

[0145] Table 3

[0146]

[0147] In the embodiment of the present application, the third sub-insulating layer 1071 in the first insulating layer 107 may be a planarization layer (PLN), and the fourth sub-insulating layer 1072 may be an inter-level dielectric (ILD). The first sub-insulating layer 1081 in the second insulating layer 108 may include a passivation layer (PVX) and a planarization layer, and the second sub-insulating layer 1082 may be a planarization layer.

[0148] Optionally, the material of the planar layer may include organic materials such as resin. The materials of the passivation layer and the interlayer dielectric layer may include one or more inorganic oxides such as SiNx (silicon nitride), SiOx (silicon oxide) and SiOxNy (silicon oxynitride).

[0149] In summary, the present application provides a signal detection module, in which the control line and the output signal line in the signal detection module extend along the first direction, and the input signal line extends along the second direction. Therefore, the output signal line will not intersect with the control line, but will only intersect with the input signal line. This can reduce the coupling capacitance generated by the output signal line and other signal lines, thereby reducing the noise of the identification signal transmitted by the output signal line, and improving the identification effect.

[0150] Fig.13 It is a structural schematic diagram of a signal recognition device provided in an embodiment of the present application. Fig.14 is an equivalent circuit diagram of a signal recognition device provided in an embodiment of the present application. Fig.13 and Fig.14 It can be seen that the signal recognition device 01 may include: a control circuit 20, a drive circuit 30, a signal recognition circuit 40, and the signal detection module 10 provided in the above embodiment.

[0151] Among them, the control circuit 20 can be electrically connected to the control line 103 in the signal detection module 10, and is used to provide a switch signal for the control line 103. The drive circuit 30 can be electrically connected to the input signal line 104 in the signal detection module 10, and is used to provide a drive signal for the input signal line. The signal recognition circuit 40 can be electrically connected to the output signal line 105 in the signal detection module 10, and is used to receive the recognition signal transmitted by the output signal line, and to perform recognition based on the recognition signal.

[0152] Optionally, the signal detection module 10 and the signal identification circuit 40 are arranged along a first direction X, and the signal detection module 10 and the driving circuit 30 are arranged along a second direction Y. The first direction X and the second direction Y intersect.

[0153] Among them, the arrangement of the signal detection module 10 and the signal identification circuit 40 along the first direction X may mean that: the signal detection module 10 may include two sides extending along the second direction Y, and the signal identification circuit 40 is located on any one of the two sides of the signal detection module 10 extending along the second direction Y. The arrangement of the signal detection module 10 and the driving circuit 30 along the second direction Y may mean that: the signal detection module 10 may include two sides extending along the first direction X, and the driving circuit 30 is located on any one of the two sides of the signal detection module 10 extending along the first direction X.

[0154] Fig.15 is an equivalent circuit diagram of another signal recognition device provided in an embodiment of the present application. Fig.15 It can be seen that the control circuit 20 may include multiple clock controllers. In the clock controller, > is a clock interface, D is an input interface, and Q1 and Q2 are both output interfaces. The clock controller may be electrically connected to the timing port C1 and the switch signal port S1. The switch signal port S1 may output a switch signal to the gate of the first switch transistor 10221 or the gate of the second switch transistor 10222 in the signal detection module under the control of the timing port C1 to control the conduction or disconnection of the first switch transistor 10221 and the second switch transistor 10222.

[0155] refer to Fig.15 It can also be seen that the drive circuit 40 may include multiple clock controllers, multiple transistors M1 and multiple transistors M2. The > in the clock controller is a clock interface, D is an input interface, and Q1 and Q2 are both output interfaces. The clock controller can be electrically connected to the timing port C1 and the signal port S1. The gate of the transistor M1 is electrically connected to the output interface Q2 of the timing controller, the first electrode of the transistor M1 is electrically connected to the input signal line 104 and the first electrode of the transistor M2, and the second electrode of the transistor M1 is electrically connected to the ground port GND. The gate of the transistor M2 is electrically connected to the output interface Q1 of the timing controller, and the second electrode of the transistor M2 is electrically connected to the drive signal input port TX.

[0156] The signal port S2 of the clock controller can output a switch signal to the gate of the transistor M1 or the gate of the transistor M2 under the control of the timing port C2 to control the on or off of the transistors M1 and M2. When the clock controller controls the transistor M2 to be on and the transistor M1 to be off, the drive signal input port TX can transmit the drive signal to the input signal line 104 through the transistor M2. When the clock controller controls the transistor M1 to be on and the transistor M2 to be off, the ground port GND can transmit the ground signal to the input signal line 104 through the transistor M1, that is, clear the signal in the input signal line 104.

[0157] Fig.16 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application. Fig.16 It can be seen that the display panel 00 may include a display substrate 02 and a signal recognition device 01 as provided in the above embodiment. The display substrate 02 may have a display area, and at least part of the signal detection module 10 in the signal recognition device 01 may be located in the display area, so as to realize fingerprint recognition of the display area of ​​the display substrate 02.

[0158] Optionally, the material of the identification electrode 1021 in the signal detection module 10 may be a transparent metal material. Therefore, when the signal detection module 10 is located in the display area, it will not affect the normal display of the display area.

[0159] Fig.17 is a schematic diagram of the structure of a display device provided in an embodiment of the present application. Fig.17 It can be seen that the display device may include a power supply component 11 and a display panel 00 provided in the above embodiment. The power supply component 11 may be used to supply power to the display panel 00 .

[0160] Optionally, the display device may be an external touch display device, an oncell (touch screen embedded between the filter layer and polarizer of the display panel) touch display device, or a 3D touch display device. Of course, the display device may also be other touch display devices, which are not limited in the embodiments of the present application.

[0161] Optionally, the display device can be an OLED display device, a quantum dot light emitting diode (QLED) display device, electronic paper, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame or a navigator, or any other product or component with a display function and a fingerprint recognition function.

[0162] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A signal detection module, characterized in that: The signal detection module comprises: A substrate substrate, and at least one detection circuit, a control line, an input signal line, and an output signal line located on the substrate substrate, at least one of the detection circuits including an identification electrode and a switch circuit; The switch circuit is electrically connected to the identification electrode, the control line, the input signal line and the output signal line respectively, and the switch circuit is used to load the driving signal provided by the input signal line to the identification electrode and output the identification signal generated by the identification electrode to the output signal line under the control of the switch signal provided by the control line; The control line and the output signal line both extend along a first direction, the input signal line extends along a second direction, and the first direction intersects with the second direction.

2. The signal detection module according to claim 1, characterized in that: The switch circuit includes: a first switch transistor and a second switch transistor; the control line includes: a first control sub-line and a second control sub-line; The gate of the first switch transistor is electrically connected to the first control sub-line, the first electrode of the first switch transistor is electrically connected to the input signal line, and the second electrode of the first switch transistor is electrically connected to the identification electrode; A gate of the second switch transistor is electrically connected to the second control sub-line, a first electrode of the second switch transistor is electrically connected to the identification electrode, and a second electrode of the second switch transistor is electrically connected to the output signal line.

3. The signal detection module according to claim 2, characterized in that: The shape of the identification electrode is rectangular; The first control sub-line is close to the first side of the identification electrode relative to the second side of the identification electrode, and the second control sub-line is close to the second side of the identification electrode relative to the first side of the identification electrode; The second side of the identification electrode is opposite to the first side of the identification electrode.

4. The signal detection module according to claim 2, characterized in that: The first switch transistor further includes a first active layer, and the first active layer extends along the first direction; The second switch transistor further includes a second active layer extending along the second direction.

5. The signal detection module according to any one of claims 1 to 4, characterized in that: The orthographic projection of the input signal line on the base substrate does not overlap with the orthographic projection of the identification electrode on the base substrate; The orthographic projection of the output signal line on the base substrate does not overlap with the orthographic projection of the identification electrode on the base substrate.

6. The signal detection module according to any one of claims 1 to 4, characterized in that: The orthographic projection of the output signal line on the base substrate does not overlap with the orthographic projection of the control line on the base substrate.

7. The signal detection module according to any one of claims 1 to 4, characterized in that: At least part of the input signal lines and at least part of the output signal lines are located in the same layer, and there is a gap between the input signal lines and the output signal lines located in the same layer.

8. The signal detection module according to claim 7, characterized in that: The signal detection module further includes: a connection structure; The connection structure and the input signal line are located in different layers; the input signal line includes: a first sub-line segment and a second sub-line segment; a portion of the output signal line is located between the first sub-line segment and the second sub-line segment, and there is a gap between the output signal line and the first sub-line segment and the second sub-line segment; one end of the connection structure is electrically connected to the first sub-line segment, and the other end of the connection structure is electrically connected to the second sub-line segment; Alternatively, the connection structure and the output signal line are located in different layers; the output signal line includes: a third sub-segment and a fourth sub-segment; a portion of the input signal line is located between the third sub-segment and the fourth sub-segment, and there is a gap between the input signal line and the third sub-segment and the fourth sub-segment; one end of the connection structure is electrically connected to the third sub-segment, and the other end of the connection structure is electrically connected to the fourth sub-segment.

9. The signal detection module according to claim 8, characterized in that: In the case where the connection structure and the input signal line are located in different layers, and the input signal line includes a first sub-segment and a second sub-segment, an orthographic projection of the connection structure on the base substrate at least partially overlaps with an orthographic projection of the output signal line on the base substrate; When the connection structure and the output signal line are located in different layers and the output signal line includes a third sub-segment and a fourth sub-segment, the orthographic projection of the connection structure on the base substrate at least partially overlaps with the orthographic projection of the input signal line on the base substrate.

10. The signal detection module according to any one of claims 1 to 4, characterized in that: The identification electrode is made of a transparent metal material.

11. The signal detection module according to any one of claims 1 to 4, characterized in that: The signal detection module further includes: a first insulating layer and a second insulating layer; The switch circuit, the first insulating layer, the input signal line, the second insulating layer, and the identification electrode are stacked in sequence in a direction away from the base substrate, and the output signal line and the input signal line are located in the same layer; The first insulating layer has a first via hole, the second insulating layer has a second via hole, and the switch circuit is electrically connected to the identification electrode through the first via hole and the second via hole.

12. The signal detection module according to claim 11, characterized in that: The second insulating layer includes: a first sub-insulating layer and a second sub-insulating layer stacked in sequence in a direction away from the base substrate; the signal detection module also includes: a first shielding layer located between the first sub-insulating layer and the second sub-insulating layer, the first shielding layer includes a first part and a second part arranged at intervals, the first part is used to shield the signal transmitted by the input signal line from the signal transmitted by the identification electrode; Wherein, the switch circuit is electrically connected to the identification electrode through the first via hole, the second via hole and the second part.

13. The signal detection module according to claim 12, characterized in that: The first insulating layer includes: a third sub-insulating layer and a fourth sub-insulating layer stacked in sequence in a direction away from the base substrate; the signal detection module also includes: a second shielding layer located between the third sub-insulating layer and the fourth sub-insulating layer, the second shielding layer includes a third portion and a fourth portion arranged at intervals, the third portion is used to shield the signal transmitted by the input signal line from the signal transmitted by the switch circuit; Wherein, the switch circuit is electrically connected to the identification electrode through the first via hole, the second via hole, the second part and the fourth part.

14. A signal recognition device, characterized in that: The identification device comprises: a control circuit, a drive circuit, a signal identification circuit, and a signal detection module as claimed in any one of claims 1 to 13; The control circuit is electrically connected to the control line in the signal detection module, and is used to provide a switch signal for the control line; The driving circuit is electrically connected to the input signal line in the signal detection module, and is used to provide a driving signal for the input signal line; The signal recognition circuit is electrically connected to the output signal line in the signal detection module, and is used to receive the recognition signal transmitted by the output signal line and perform signal recognition based on the recognition signal.

15. The signal recognition device according to claim 14, characterized in that: The signal detection module and the signal identification circuit are arranged along a first direction, and the signal detection module and the driving circuit are arranged along a second direction, and the first direction intersects with the second direction.

16. A display panel, characterized in that: The display panel comprises: a display substrate and a signal recognition device as claimed in claim 14 or 15; The display substrate has a display area, and at least part of the detection circuit of the signal detection module in the signal recognition device is located in the display area.

17. A display device, characterized in that: The display device comprises: a power supply component and a display panel as claimed in claim 16; The power supply component is used to supply power to the display panel.

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