Power conversion system, method and program for controlling power conversion system

Abstract

The present disclosure solves the problem of reducing the influence of power ripple caused by an AC power supply or an AC load without using a smoothing capacitor. The power conversion system (10) according to the present disclosure includes a first circuit (1), a second circuit (2) and a third circuit (3). The first external terminal (113, 114) of the first circuit (1) is electrically connected to the AC power supply or the AC load. The first internal terminal (111, 112), the second internal terminal (211, 212) and the third internal terminal (341, 342) of the power conversion system (10) are electrically connected to the same connection unit (8). The second circuit (2) controls the current or power input to the second circuit (2) itself or output from the second circuit (2) itself so that the current or power is synchronized with the power ripple caused by the AC power supply or the AC load electrically connected to the first circuit (1).

Description

Technical Field

[0001] The present disclosure relates generally to a power conversion system, a method and a program for controlling the power conversion system, and more particularly to a power conversion system for unidirectionally or bidirectionally converting electric power, a method and a program for controlling such a power conversion system. Background Art

[0002] Patent document 1 discloses a power converter (power conversion system) that can be connected to a solar power generation panel. The power converter of patent document 1 is configured to convert DC power into AC power, and includes a DC / DC converter and a DC / AC converter. The DC / AC converter is connected to the DC / DC converter via an intermediate bus. An intermediate smoothing capacitor is connected to the intermediate bus.

[0003] The power converter of Patent Document 1 requires a smoothing capacitor (intermediate capacitor) to reduce the influence of ripples caused by an AC power grid connected to the DC / AC converter.

[0004] Reference List

[0005] Patent Literature

[0006] Patent Document 1: WO 2017 / 068814 A1 Summary of the invention

[0007] Therefore, an object of the present disclosure is to provide a power conversion system, a method for controlling the power conversion system, and a program, all of which are configured or designed to reduce the influence of power ripple caused by an AC power source or an AC load without using any smoothing capacitor.

[0008] A power conversion system according to one aspect of the present disclosure includes a first circuit and a second circuit, and DC power is transmitted between a first internal terminal of the first circuit and a second internal terminal of the second circuit. The first circuit includes a first internal terminal and a first external terminal, and the first external terminal is electrically connected to an AC power source or an AC load. The second circuit includes a second internal terminal and a second external terminal. The power conversion system also includes a third circuit. The third circuit includes at least a third internal terminal. In the power conversion system, the first internal terminal, the second internal terminal, and the third internal terminal are electrically connected to the same connection unit. The second circuit controls the current or power input to or output from the second circuit itself so that the current or power is synchronized with the power ripple caused by the AC power source or the AC load. The AC power source or the AC load is electrically connected to the first circuit.

[0009] A method for controlling a power conversion system according to another aspect of the present disclosure is designed to control a power conversion system including a first circuit, a second circuit, and a third circuit. The power conversion system transmits DC power between a first internal terminal of the first circuit and a second internal terminal of the second circuit. In the power conversion system, the first internal terminal, the second internal terminal, and the third internal terminal are electrically connected to the same connection unit. The first circuit includes a first internal terminal and a first external terminal, and the first external terminal is electrically connected to an AC power source or an AC load. The second circuit includes a second internal terminal and a second external terminal. The third circuit includes at least a third internal terminal. The method for controlling the power conversion system includes: causing the second circuit to control a current or power input to or output from the second circuit itself, so that the current or power is synchronized with a power ripple caused by an AC power source or an AC load. The AC power source or the AC load is electrically connected to the first circuit.

[0010] A program according to still another aspect of the present disclosure is designed to cause a computer system to execute the method for controlling the above-mentioned power conversion system. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a circuit diagram showing a structure of a power conversion system according to an exemplary embodiment;

[0012] Figure 2 is a waveform diagram showing how the power conversion system operates;

[0013] Figure 3A-3D shows the waveform used when only the third circuit bears the power ripple caused in the power conversion system;

[0014] Figure 4A-4D shows waveforms used when the second circuit and the third circuit bear power ripple caused in the power conversion system;

[0015] Figure 5A-5D shows the waveform used when only the second circuit bears the power ripple caused in the power conversion system;

[0016] Figure 6 showing waveforms of current, voltage and power in a first circuit of a power conversion system;

[0017] Fig. 7A and Figure 7B is a circuit diagram showing a structure of a primary side circuit of a third circuit as a constituent element of a power conversion system according to a first modification of the exemplary embodiment of the present invention;

[0018] Figure 8 is a circuit diagram showing a structure of a secondary side circuit of a third circuit of the power conversion system; and

[0019] Figure 9A-9D is a circuit diagram showing a structure of a snubber circuit used in a power conversion system according to a second modification of the exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0020] (Example)

[0021] (1) Overview

[0022] Reference Figure 1 An overview of a power conversion system 10 according to an exemplary embodiment is described.

[0023] The power conversion system 10 according to the embodiment is used for connecting multiple pairs (in Figure 1 In the example shown, there are four pairs of first DC terminals T11 and T12, a pair of second DC terminals T21 and T22, and a pair of AC terminals T31 and T32, such as a system for performing power conversion. Figure 1 As shown. A solar cell 70 is electrically connected to each pair of first DC terminals T11, T12. A storage battery 80 is electrically connected to the second DC terminals T21, T22. A power grid 90 is electrically connected to the AC terminals T31, T32. As used herein, "power grid" refers to an overall system that allows a power supplier such as a power company to supply power to a customer's powered device.

[0024] The power conversion system 10 according to this embodiment converts the DC power supplied from at least one of the solar cell 70 or the storage battery 80 into AC power having a single phase, and outputs (transmits) the AC power to the grid 90. In addition, the power conversion system 10 also converts the AC power supplied from the grid 90 into DC power, and outputs the DC power to the storage battery 80.

[0025] In other words, when the solar cell 70 generates electricity or the storage battery 80 discharges electricity, the power conversion system 10 converts the DC power supplied from the solar cell 70 and the storage battery 80 into AC power, and outputs the AC power to the grid 90. In this case, each of the solar cell 70 and the storage battery 80 functions as a "DC power source", and the grid 90 functions as a "single-phase AC load (AC load)". On the other hand, when the storage battery 80 is charging, the power conversion system 10 converts the AC power supplied from the grid 90 into DC power, and outputs the DC power to the storage battery 80. In this case, the storage battery 80 functions as a "DC load", and the grid 90 functions as a "single-phase AC power source (AC power source)".

[0026] like Figure 1As shown, the power conversion system 10 according to this embodiment includes a first circuit 1 and a second circuit 2, and transmits DC power between first internal terminals 111, 112 of the first circuit 1 and second internal terminals 211, 212 of the second circuit 2. The first circuit 1 includes first internal terminals 111, 112 and first external terminals 113, 114, and the first external terminals 113, 114 are electrically connected to the power grid 90 (used as an AC power source or an AC load). The second circuit 2 includes second internal terminals 211, 212 and second external terminals 213, 214.

[0027] like Figure 1 As shown, the power conversion system 10 also includes a third circuit 3. The third circuit 3 includes at least third internal terminals 341, 342. In the power conversion system 10, the first internal terminals 111, 112, the second internal terminals 211, 212 and the third internal terminals 341, 342 are electrically connected to the same connection unit 8. The second circuit 2 controls the current or power input to or output from the second circuit 2 itself so that the current or power is synchronized with the power ripple caused by the power grid 90 electrically connected to the first circuit 1. As used herein, "power ripple" refers to the power obtained by subtracting the effective power from the instantaneous power. That is, "power ripple" refers to the difference power between the instantaneous power and the effective power.

[0028] As described above, in the power conversion system 10 according to the embodiment, the second circuit 2 controls the current or power input to or output from the second circuit 2 itself so that the current or power is synchronized with the power ripple caused by the power grid 90. This allows the second circuit 2 to bear at least a part of the power ripple caused by the power grid 90. Therefore, even without using any smoothing capacitor, the influence of the power ripple on the third circuit 3 can be reduced.

[0029] In the following description of the exemplary embodiments, the power conversion system 10 will be described as being introduced into a non-residential facility, such as an office building, a hospital, a commercial facility, or a school.

[0030] In particular, in recent years, there has been an increasing trend for companies or individuals to "sell electricity" by causing the power obtained from a distributed power source (e.g., a solar cell 70, a storage battery 80, or a fuel cell) to flow back to a commercial power grid. The sale of electricity is achieved by connecting the distributed power source to the commercial power grid. When the grid connection is made, the power generated by the distributed power source is converted into power suitable for the commercial power grid by using a power conversion system 10 called a "power conditioner." The power conversion system 10 according to this embodiment can be used, for example, as a power conditioner to convert DC power into single-phase AC power between the solar cell 70 and the storage battery 80 as a distributed power source and the power grid 90, and vice versa.

[0031] (2) Structure

[0032] Next, we will refer to Figure 1 The structure of the power conversion system 10 according to this embodiment is described.

[0033] like Figure 1 As shown, the power conversion system 10 according to this embodiment includes a first circuit 1, a second circuit 2 and a third circuit 3. The power conversion system 10 is used for Figure 1 In the example shown, there is a system that performs power conversion between four pairs of first DC terminals T11, T12, a pair of second DC terminals T21, T22, and a pair of AC terminals T31, T32. A solar cell 70 as a DC power source is electrically connected to each pair of first DC terminals T11, T12. A storage battery 80 used as a DC power source or a DC load is electrically connected to the second DC terminals T21, T22. A power grid 90 used as a single-phase AC power source or a single-phase AC load is electrically connected to the AC terminals T31, T32.

[0034] The power conversion system 10 also includes a plurality of (for example, Figure 1 In the example shown, there are four) fourth circuits 4, filter circuits 5, control circuits 6, buffer circuits 7, and connection units 8. The power conversion system 10 may also include a plurality of pairs of first DC terminals T11, T12, a pair of second DC terminals T21, T22, and a pair of AC terminals T31, T32. Alternatively, the plurality of pairs of first DC terminals T11, T12, a pair of second DC terminals T21, T22, and a pair of AC terminals T31, T32 do not necessarily belong to the constituent elements of the power conversion system 10. In addition, as used herein, a "terminal" does not necessarily have to be a component that connects, for example, an electric wire, but may also be, for example, a lead of an electronic component or a portion of a conductor included in a circuit board.

[0035] (2.1) First Circuit

[0036] The first circuit 1 may be, for example, a DC / AC converter. Specifically, the first circuit 1 may be a single-phase inverter circuit for converting a DC voltage between terminals 81 and 82 (described later) into an AC voltage having a rectangular waveform. Figure 1 As shown, the first circuit 1 includes four first switch elements Q11 - Q14 connected together in a bridge. In addition, the first circuit 1 also includes two first internal terminals 111 , 112 and two first external terminals 113 , 114 .

[0037] Each of the first switching elements Q11-Q14 can be, for example, a depletion type n-channel metal oxide semiconductor field effect transistor (MOSFET). The first switching element Q11 having a higher potential is electrically connected in series with the first switching element Q12 having a lower potential between the terminals 81 and 82. The first switching element Q13 having a higher potential is electrically connected in series with the first switching element Q14 having a lower potential between the terminals 81 and 82. That is, between the terminals 81 and 82, the series circuit of the first switching elements Q11 and Q12 and the series circuit of the first switching elements Q13 and Q14 are electrically connected in parallel with each other.

[0038] Each of the first switching elements Q11-Q14 includes a parasitic diode having an anode electrically connected to a source of an associated one of the first switching elements Q11-Q14 and a cathode electrically connected to a drain of an associated one of the first switching elements Q11-Q14.

[0039] The drain of each of the first switching elements Q11, Q13 having a higher potential is electrically connected to the terminal 81 via the first internal terminal 111. The source of each of the first switching elements Q12, Q14 having a lower potential is electrically connected to the terminal 82 via the first internal terminal 112. In addition, the source of the first switching element Q11 having a higher potential is electrically connected to the drain of the first switching element Q12 having a lower potential. Similarly, the source of the first switching element Q13 having a higher potential is electrically connected to the drain of the first switching element Q14 having a lower potential.

[0040] The first switching elements Q11 - Q14 are turned on and off in response to first drive signals Sig9 - Sig12 supplied from the control circuit 6 , respectively.

[0041] (2.2) Second Circuit

[0042] The second circuit 2 may be, for example, a DC / DC converter. Specifically, the second circuit 2 may be a boost chopper circuit for boosting the DC voltage provided from the plurality of fourth circuits 4. In addition, the second circuit 2 may also be a bidirectional chopper circuit. Figure 1 As shown, the second circuit 2 includes a capacitor C2, an inductor L1 and two second switch elements Q21, Q22. In addition, the second circuit 2 also includes two second internal terminals 211, 212 and two second external terminals 213, 214.

[0043] The capacitor C2 is electrically connected between two fourth internal terminals 411, 412 (described later) via two second external terminals 213, 214. In other words, the capacitor C2 is electrically connected to the plurality of fourth circuits 4 via the two second external terminals 213, 214 and the two fourth internal terminals 411, 412. The capacitor C2 may be, for example, an electrolytic capacitor. The capacitor C2 has the ability to stabilize the voltage between the second external terminals 213, 214. Alternatively, the capacitor C2 does not have to be one of the constituent elements of the second circuit 2.

[0044] Each of the second switching elements Q21, Q22 may be, for example, a depletion-type n-channel MOSFET. The second switching element Q21 having a higher potential is electrically connected in series with the second switching element Q22 having a lower potential between the terminals 81, 82. That is, the series circuit of the second switching elements Q21, Q22 is electrically connected between the terminals 81, 82.

[0045] Each of the second switching elements Q21, Q22 includes a parasitic diode having an anode electrically connected to a source of an associated one of the second switching elements Q21, Q22 and a cathode electrically connected to a drain of an associated one of the second switching elements Q21, Q22.

[0046] The drain of the second switching element Q21 having a higher potential is electrically connected to the terminal 81 via the second internal terminal 211. The source of the second switching element Q22 having a lower potential is electrically connected to the terminal 82 via the second internal terminal 212. In addition, the source of the second switching element Q21 having a higher potential is electrically connected to the drain of the second switching element Q22 having a lower potential.

[0047] The second switching elements Q21 , Q22 are turned on and off in response to second drive signals Sig13 , Sig14 supplied from the control circuit 6 , respectively.

[0048] A first terminal of the inductor L1 is electrically connected to the second external terminal 213. A second terminal of the inductor L1 is electrically connected to a connection node between the second switching elements Q21, Q22.

[0049] (2.3) Third Circuit

[0050] The third circuit 3 may be, for example, a DC / DC converter. Figure 1 As shown, the third circuit 3 includes a capacitor C1, a transformer 33 and eight third switch elements Q31-Q38. The third circuit 3 also includes two third internal terminals 341, 342 and two third external terminals 343, 344.

[0051] The capacitor C1 is electrically connected between the two second DC terminals T21 and T22 via the two third external terminals 343 and 344. In other words, the capacitor C1 is connected to the battery 80 via the two third external terminals 343 and 344 and the two second DC terminals T21 and T22. The capacitor C1 may be, for example, an electrolytic capacitor. The capacitor C1 has the ability to stabilize the voltage between the second DC terminals T21 and T22. Alternatively, the capacitor C1 does not have to be one of the constituent elements of the third circuit 3.

[0052] Each of the third switching elements Q31-Q38 may be, for example, a depletion-type n-channel MOSFET. The third switching element Q31 is electrically connected in series with the third switching element Q32 between the two ends of the capacitor C1. The third switching element Q33 is electrically connected in series with the third switching element Q34 between the two ends of the capacitor C1. That is, the series circuit of the third switching elements Q31 and Q32 and the series circuit of the third switching elements Q33 and Q34 are electrically connected in parallel between the two ends of the capacitor C1.

[0053] The third switch element Q35 is electrically connected in series with the third switch element Q36 between the terminals 81 and 82. The third switch element Q37 is electrically connected in series with the third switch element Q38 between the terminals 81 and 82. That is, the series circuit of the third switch elements Q35 and Q36 and the series circuit of the third switch elements Q37 and Q38 are electrically connected in parallel between the terminals 81 and 82.

[0054] Each of the third switching elements Q31-Q38 includes a parasitic diode having an anode electrically connected to a source of an associated one of the third switching elements Q31-Q38 and a cathode electrically connected to a drain of an associated one of the third switching elements Q31-Q38.

[0055] The drain of each of the third switching elements Q31, Q33 having a higher potential is electrically connected to the second DC terminal T21 via the third external terminal 343. The source of each of the third switching elements Q32, Q34 having a lower potential is electrically connected to the second DC terminal T22 via the third external terminal 344. The source of the third switching element Q31 having a higher potential is electrically connected to the drain of the third switching element Q32 having a lower potential. The source of the third switching element Q33 having a higher potential is electrically connected to the drain of the third switching element Q34 having a lower potential.

[0056] The drain of each of the third switching elements Q35, Q37 having a higher potential is electrically connected to the terminal 81 via the third internal terminal 341. The source of each of the third switching elements Q36, Q38 having a lower potential is electrically connected to the terminal 82 via the third internal terminal 342. The source of the third switching element Q35 having a higher potential is electrically connected to the drain of the third switching element Q36 having a lower potential. The source of the third switching element Q37 having a higher potential is electrically connected to the drain of the third switching element Q38 having a lower potential.

[0057] The third switching elements Q31 - Q38 are turned on and off in response to third drive signals Sig1 - Sig8 supplied from the control circuit 6 , respectively.

[0058] The transformer 33 includes a primary winding 331 and a secondary winding 332 that are magnetically coupled together. A first terminal of the primary winding 331 is electrically connected to a connection node between the third switching elements Q31 and Q32, and a second terminal thereof is electrically connected to a connection node between the third switching elements Q33 and Q34. A first terminal of the secondary winding 332 is electrically connected to a connection node between the third switching elements Q35 and Q36, and a second terminal thereof is electrically connected to a connection node between the third switching elements Q37 and Q38. For example, the primary winding 331 and the secondary winding 332 may have a turns ratio of 1:1. For example, the turns ratio of the primary winding 331 and the secondary winding 332 may be arbitrarily changed according to, for example, the specifications of the power conversion system 10.

[0059] The third circuit 3 receives the voltage between both ends of the battery 80 as an input voltage via the second DC terminals T21, T22. In the following description, the circuit including the third switching elements Q31-Q34 and the primary winding 331 of the transformer 33 will be referred to as the "primary side circuit 31" hereinafter, and the circuit including the third switching elements Q35-Q38 and the secondary winding 332 of the transformer 33 will be referred to as the "secondary side circuit 32" hereinafter.

[0060] In the third circuit 3 , the third switching elements Q31 - Q34 of the primary side circuit 31 are turned on and off, thereby converting the input voltage into a radio frequency AC voltage having a rectangular waveform of, for example, 20 kHz, and applying (supplying) the AC voltage to the primary winding 331 .

[0061] In the third circuit 3, the third switching elements Q35-Q38 of the secondary side circuit 32 are turned on and off, thereby converting the AC voltage having positive and negative polarities and a rectangular waveform and generated on the secondary winding 332 into a DC voltage having a positive polarity, and outputting the DC voltage between the two terminals 81, 82 of the connection unit 8. In this case, a voltage is provided between the terminals 81, 82 so that, of the two terminals 81, 82, the terminal 81 has a higher potential (positive pole), and the terminal 82 has a lower potential (negative pole).

[0062] Alternatively, a capacitor may be electrically connected between the drain and source of each of the third switching elements Q31-Q34. In this case, the capacitor resonates with the primary winding 331, thereby achieving soft switching of the third switching elements Q31-Q38. Alternatively, a capacitor may be electrically connected to the primary winding 331 in parallel.

[0063] (2.4) Fourth Circuit

[0064] Each of the plurality of fourth circuits 4 may be, for example, a DC / DC converter. Specifically, each of the fourth circuits 4 is implemented as a boost chopper circuit for boosting a DC voltage provided from the solar cell 70. Figure 1 As shown, each of the fourth circuits 4 includes two capacitors C41, C42, one inductor L41 and two fourth switching elements Q41, Q42. In addition, each of the fourth circuits 4 also includes two fourth internal terminals 411, 412 and two fourth external terminals 413, 414.

[0065] The capacitor C41 is electrically connected between the two first DC terminals T11 and T12 via the two fourth external terminals 413 and 414. In other words, the capacitor C41 is electrically connected to the solar cell 70 via the two fourth external terminals 413 and 414 and the two first DC terminals T11 and T12. The capacitor C41 may be, for example, an electrolytic capacitor. The capacitor C41 has the ability to stabilize the voltage between the first DC terminals T11 and T12. Alternatively, the capacitor C41 does not have to be one of the constituent elements of the fourth circuit 4.

[0066] The capacitor C42 is electrically connected between the two second external terminals 213, 214 via the two fourth internal terminals 411, 412. In other words, the capacitor C42 is electrically connected to the second circuit 2 via the two fourth internal terminals 411, 412 and the two second external terminals 213, 214. The capacitor C42 may be, for example, an electrolytic capacitor. The capacitor C42 has the ability to stabilize the voltage between the fourth internal terminals 411, 412. Alternatively, the capacitor C42 does not have to be one of the constituent elements of the fourth circuit 4.

[0067] Each of the fourth switch elements Q41, Q42 may be, for example, a depletion-type n-channel MOSFET. The fourth switch element Q41 having a higher potential is electrically connected in series with the fourth switch element Q42 having a lower potential between both ends of the capacitor C42. That is, the series circuit of the fourth switch elements Q41, Q42 is electrically connected between both ends of the capacitor C42.

[0068] Each of the fourth switching elements Q41, Q42 includes a parasitic diode having an anode electrically connected to a source of an associated one of the fourth switching elements Q41, Q42 and a cathode electrically connected to a drain of an associated one of the fourth switching elements Q41, Q42.

[0069] The drain of the fourth switching element Q41 having a higher potential is electrically connected to the first terminal (high potential terminal) of the capacitor C42. The source of the fourth switching element Q42 having a lower potential is electrically connected to the second terminal (i.e., the negative terminal) of the capacitor C42. In addition, the source of the fourth switching element Q41 having a higher potential is electrically connected to the drain of the fourth switching element Q42 having a lower potential.

[0070] The fourth switching elements Q41 , Q42 are turned on and off in response to fourth drive signals Sig15 , Sig16 supplied from the control circuit 6 , respectively.

[0071] The first terminal of the inductor L41 is electrically connected to the fourth external terminal 413. The second terminal of the inductor L41 is electrically connected to the connection node between the fourth switching elements Q41 and Q42. Please note that in the following description, when there is no need to particularly distinguish the first drive signal Sig9-Sig12, the second drive signal Sig13, Sig14, the third drive signal Sig1-Sig8 and the fourth drive signal Sig15, Sig16 from each other, these drive signals will be collectively referred to as "drive signals Sig1-Sig16" hereinafter.

[0072] In the following description of the power conversion system 10 according to this embodiment, it is assumed that the plurality of fourth circuits 4 are accommodated in a single housing (boost box). However, the plurality of fourth circuits 4 do not have to be accommodated in a single housing. Therefore, the plurality of fourth circuits 4 may be accommodated in their respective housings.

[0073] (2.5) Filter circuit

[0074] The filter circuit 5 smoothes the AC voltage having a rectangular waveform and supplied from the first circuit 1. Thus, the AC voltage having a rectangular waveform and supplied from the first circuit 1 is converted into an AC voltage having a sinusoidal waveform and an amplitude corresponding to its pulse width.

[0075] Specifically, the filter circuit 5 includes a plurality of (for example, Figure 1 In the example shown, there are two) inductors L51, L52 and capacitor C51. The first terminal of the inductor L51 is electrically connected to the connection node between the first switching elements Q11 and Q12 via the first external terminal 113, and the second terminal thereof is electrically connected to the AC terminal T31. The first terminal of the inductor L52 is electrically connected to the connection node between the first switching elements Q13 and Q14 via the first external terminal 114, and the second terminal thereof is electrically connected to the AC terminal T32. The capacitor C51 is electrically connected between the AC terminals T31 and T32.

[0076] In other words, the connection node between the first switching elements Q11 and Q12 is electrically connected to the AC terminal T31 via the inductor L51. The connection node between the first switching elements Q13 and Q14 is electrically connected to the AC terminal T32 via the inductor L52.

[0077] (2.6) Control circuit

[0078] The control circuit 6 is implemented as, for example, a microcomputer including a processor and a memory. That is, the control circuit 6 is implemented as a computer system including a processor and a memory. The computer system performs the functions of the control circuit 6 by causing the processor to execute an appropriate program. The program may be pre-stored in the memory. Alternatively, the program may also be downloaded via a telecommunication line such as the Internet, or distributed after being stored in a non-transitory storage medium such as a memory card.

[0079] The control circuit 6 is configured to control each of the first circuit 1, the second circuit 2, the third circuit 3 and the plurality of fourth circuits 4. The control circuit 6 outputs first drive signals Sig9-Sig12 for driving the first switching elements Q11-Q14, respectively, to the first circuit 1. The control circuit 6 outputs second drive signals Sig13, Sig14 for driving the second switching elements Q21, Q22, respectively, to the second circuit 2. The control circuit 6 outputs third drive signals Sig1-Sig8 for driving the third switching elements Q31-Q38, respectively, to the third circuit 3. The control circuit 6 outputs fourth drive signals Sig15, Sig16 for driving the fourth switching elements Q41, Q42, respectively, to each of the fourth circuits 4. Each of the drive signals Sig1-Sig16 is a PWM signal, which is a binary signal that switches between a high level (exemplary effective value) and a low level (exemplary invalid value).

[0080] (2.7) Buffer circuit

[0081] The snubber circuit 7 is electrically connected to the terminals 81 , 82 . That is, the snubber circuit 7 is electrically connected to the transformer 33 of the third circuit 3 .

[0082] The buffer circuit 7 is a regenerative buffer circuit for absorbing electric energy from the terminals 81, 82 of the connection unit 8 and injecting (regenerating) the electric energy into the terminals 81, 82. When the bus voltage between the terminals 81, 82 exceeds the first clamp value, the buffer circuit 7 absorbs part of the electric energy exceeding the first clamp value from the terminals 81, 82, thereby clamping the upper limit value of the bus voltage at the first clamp value. In addition, when the bus voltage becomes lower than the second clamp value (< the first clamp value), the buffer circuit 7 injects (regenerates) electric energy into the terminals 81, 82, thereby clamping the lower limit value of the bus voltage at the second clamp value.

[0083] like Figure 1 As shown, the buffer circuit 7 includes a plurality of (for example, Figure 1 In the example shown, two) diodes D1, D2, a resistor R1 and a plurality of (e.g., Figure 1 In the example shown, there are two) capacitors C71 and C72. Diode D1 is electrically connected in series with capacitor C71 between terminals 81 and 82. Diode D2 is electrically connected in series with capacitor C72 between terminals 81 and 82. The anode of diode D1 is electrically connected to terminal 81, and its cathode is electrically connected to terminal 82 via capacitor C71. The anode of diode D2 is electrically connected to terminal 82 via capacitor C72, and its cathode is electrically connected to terminal 81. That is, diodes D1 and D2 are connected in opposite directions between terminals 81 and 82. Resistor R1 is electrically connected between the connection node of diode D1 and capacitor C71 and the connection node of diode D2 and capacitor C72.

[0084] In the buffer circuit 7, when the bus voltage exceeds the first clamping value, the electric energy absorbed from the terminals 81, 82 is stored in the capacitor C71. The electric energy stored in the capacitor C71 is transferred to the capacitor C72 via the resistor R1. If the bus voltage is lower than the second clamping value, the electric energy stored in the capacitor C72 is regenerated at the terminals 81, 82 via the diode D2.

[0085] (2.8) Connection unit

[0086] like Figure 1As shown, the first circuit 1 is electrically connected to the connection unit 8 via the first internal terminals 111, 112. In addition, the second circuit 2 is also electrically connected to the connection unit 8 via the second internal terminals 211, 212. In addition, the third circuit 3 is also electrically connected to the connection unit 8 via the third internal terminals 341, 342. In other words, the first internal terminals 111, 112 of the first circuit 1, the second internal terminals 211, 212 of the second circuit 2, and the third internal terminals 341, 342 of the third circuit 3 are all electrically connected to the same connection unit 8. That is, in the power conversion system 10 according to the present embodiment, the first circuit 1, the second circuit 2, and the third circuit 3 are electrically connected on the DC side.

[0087] like Figure 1 As shown, the connection unit 8 includes terminals 81, 82. In addition, the secondary side circuit 32 of the third circuit 3 operates so that the voltage at the terminal 81 is positive relative to the terminal 82 (i.e., the terminal 81 is allowed to have a higher potential than the terminal 82). Electrically connected to the connection unit 8 is the above-mentioned buffer circuit 7.

[0088] (3) Operation

[0089] Next, we will refer to Figure 2-5D How the power conversion system 10 according to this embodiment operates is described.

[0090] (3.1) Basic operations

[0091] First, refer to Figure 2 The basic operation of the power conversion system 10 according to the present embodiment is described.

[0092] The power conversion system 10 according to the present embodiment converts (transmits) power bidirectionally between multiple pairs of first DC terminals T11, T12, second DC terminals T21, T22 and AC terminals T31, T32. That is, the power conversion system 10 has an inverter mode and a converter mode as its two operating modes. As used herein, the inverter mode refers to a mode in which the DC power supplied to multiple pairs of first DC terminals T11, T12 and second DC terminals T21, T22 is converted into single-phase AC power, and then the single-phase AC power is output through the AC terminals T31, T32. The converter mode in this article refers to a mode in which the single-phase AC power supplied to the AC terminals T31, T32 is converted into DC power, and then the DC power is output through the second DC terminals T21, T22.

[0093] In other words, the inverter mode herein refers to a mode in which a voltage drop is caused between the AC terminals T31 and T32 in the same direction as the direction in which the current flows through the grid 90, that is, a mode in which voltage and current of the same polarity are generated. On the other hand, the converter mode herein refers to a mode in which a voltage drop is caused between the AC terminals T31 and T32 in the opposite direction to the direction in which the current flows through the grid 90, that is, a mode in which voltage and current of opposite polarity are generated.

[0094] In the following description, the case where the power conversion system 10 operates in the inverter mode to convert DC power into single-phase AC power with a frequency of 50 Hz or 60 Hz is described as an example. In addition, in the following description, the case where the driving frequency of the second switching elements Q21, Q22 is 40 kHz, the driving frequency of the third switching elements Q31-Q38 is 20 kHz, and the driving frequency of the fourth switching elements Q41, Q42 is 10 kHz is described as an example.

[0095] Figure 2 is a waveform diagram showing how the power conversion system 10 according to the present embodiment operates in the inverter mode. Figure 2 In the figure, the horizontal axis indicates time. Figure 2 , the respective waveforms of the third drive signals Sig1-Sig4, the third drive signals Sig5-Sig8 and the output voltage VT are shown in order from top to bottom. As used herein, the output voltage VT refers to the voltage generated between the two ends of the secondary winding 332 of the transformer 33.

[0096] For the drive signals Sig1-Sig8, Figure 2 In FIG. 1 , their high level is represented by “H”, and their low level is represented by “L”. Each of the third switching elements Q31-Q38 is turned on when its associated drive signal Sig1-Sig8 is at a high level, and is turned off when its associated drive signal Sig1-Sig8 is at a low level.

[0097] The control circuit 6 controls each of the fourth circuits 4 so that its fourth switching elements Q41, Q42 are alternately turned on and off. When the fourth switching element Q41 is turned on and the fourth switching element Q42 is turned off, a voltage with a positive polarity is applied between the fourth internal terminals 411, 412. On the other hand, when the fourth switching element Q41 is turned off and the fourth switching element Q42 is turned on, the electric energy generated by the solar cell 70 is stored in the inductor L41 via the fourth switching element Q42. The output voltage of each of the fourth circuits 4 is applied between the second external terminals 213, 214 of the second circuit 2.

[0098] The control circuit 6 controls the second circuit 2 so that its second switching elements Q21, Q22 are alternately turned on and off. When the second switching element Q21 is turned on and the second switching element Q22 is turned off, a voltage with a positive polarity is applied between the second internal terminals 211, 212. On the other hand, when the second switching element Q21 is turned off and the second switching element Q22 is turned on, the electric energy supplied from the plurality of fourth circuits 4 is stored in the inductor L1 via the second switching element Q22.

[0099] The control circuit 6 controls the third switching elements Q31-Q34 of the third circuit 3 so that positive and negative voltages are alternately applied to the primary winding 331. In addition, the control circuit 6 controls the third switching elements Q35-Q38 so that the voltage at the terminal 81 is positive relative to the terminal 82.

[0100] Specifically, when the third switch elements Q31 and Q34 are turned on, the control circuit 6 turns off the third switch elements Q32 and Q33. When the third switch elements Q31 and Q34 are turned off, the control circuit 6 turns on the third switch elements Q32 and Q33. In this case, the control circuit 6 controls the third switch elements Q31-Q34 with the same duty ratio. In this embodiment, the duty ratio of the third switch elements Q31-Q34 is set to 0.5 (substantially 50%).

[0101] In addition, the control circuit 6 controls the third switching elements Q31 - Q34 so that the radio frequency AC voltage is supplied to the primary winding 331 and the secondary winding 332 , and also controls the third switching elements Q35 - Q38 so that the voltage having the positive polarity is supplied to the terminals 81 , 82 .

[0102] Specifically, the control circuit 6 operates to repeatedly go through first to fourth modes to be described below.

[0103] In the first mode, the control circuit 6 outputs the third drive signals Sig1-Sig8 to the third circuit 3, so that the third switch elements Q31, Q34, Q35, Q38 are turned on, and the third switch elements Q32, Q33, Q36, Q37 are turned off. In addition, in the first mode, the control circuit 6 outputs the second drive signals Sig13, Sig14 to the second circuit 2, so that the second switch element Q21 is turned on, and the second switch element Q22 is turned off. As a result, a voltage with a positive polarity is provided (applied) to the terminals 81, 82.

[0104] In the second mode, the control circuit 6 outputs the first drive signal Sig9-Sig12 to the first circuit 1, so that the first switch elements Q12 and Q14 with a lower potential are turned off, and the first switch elements Q11 and Q13 with a higher potential are turned on. This changes the operation mode to the first circulation mode in which the current circulates in the first circuit 1.

[0105] In addition, in the second mode, the control circuit 6 outputs the second drive signals Sig13 and Sig14 to the second circuit 2, so that the second switch element Q21 with a higher potential is turned off, and the second switch element Q22 with a lower potential is turned on. This changes the operation mode to the second circulation mode in which the current circulates in the second circuit 2. At this time, the third switch elements Q31-Q38 of the third circuit 3 are all turned off.

[0106] In the third mode, the control circuit 6 outputs the third drive signal Sig1-Sig8 to the third circuit 3, so that the third switch elements Q32, Q33, Q36, Q37 are turned on, and the third switch elements Q31, Q34, Q35, Q38 are turned off. In addition, in the third mode, the control circuit 6 outputs the second drive signal Sig13, Sig14 to the second circuit 2, so that the second switch element Q21 is turned on, and the second switch element Q22 is turned off. As a result, a voltage with a positive polarity is provided (applied) to the terminals 81, 82.

[0107] In the fourth mode, the control circuit 6 outputs the first drive signal Sig9-Sig12 to the first circuit 1, so that the first switch elements Q12 and Q14 with a lower potential are turned on, and the first switch elements Q11 and Q13 with a higher potential are turned off. This changes the operation mode to the first circulation mode in which the current circulates in the first circuit 1.

[0108] In addition, in the fourth mode, the control circuit 6 outputs the second drive signals Sig13 and Sig14 to the second circuit 2, so that the second switch element Q21 with a higher potential is turned off, and the second switch element Q22 with a lower potential is turned on. This changes the operation mode to the second circulation mode in which the current circulates in the second circuit 2. At this time, the third switch elements Q31-Q38 of the third circuit 3 are all turned off.

[0109] The control circuit 6 repeatedly performs the operation in the order of the first, second, third and fourth modes. As a result, a voltage having a positive polarity is supplied (applied) to the terminals 81, 82 (connection unit 8).

[0110] In the third circuit 3, by controlling the third switching elements Q31-Q38 as described above, an output voltage VT having a rectangular waveform is applied between both ends of the secondary winding 332 of the transformer 33 (see Figure 2 Specifically, the waveform W1 of the output voltage VT includes a rising range W11, a falling range W13 and a flat range W12. Figure 2As shown, in the rising range W11, the output voltage VT increases (changes) proportionally from the first potential VT1 to the second potential VT2 (>VT1) higher than the first potential VT1. Figure 2 As shown, in the falling range W13, the output voltage VT decreases (changes) proportionally from the second potential VT2 to the first potential VT1. Figure 2 As shown, in the flat range W12, the output voltage VT is maintained at the first potential VT1 or the second potential VT2. In addition, in the power conversion system 10 according to this embodiment, a DC voltage corresponding to the flat range W12 of the output voltage VT generated between both ends of the secondary winding 332 is applied (supplied) to the terminals 81, 82 of the connection unit 8.

[0111] That is, the power conversion system 10 according to this embodiment allows a DC voltage corresponding to the flat range W12 of the output voltage VT to be generated in the connection unit 8, so that the first circuit 1 and the second circuit 2 can be connected to the DC side even without using any smoothing capacitor. As used herein, if the waveform range is "flat", the entire waveform range can naturally be flat, but it can also have slight changes at least partially. Therefore, even if the flat range W12 of the waveform W1 of the output voltage VT has some slight changes, the flat range W12 can also be considered to be flat in this article.

[0112] (3.2) Ripple control

[0113] If the grid 90 as a single-phase AC power source or a single-phase AC load is connected to the first circuit 1 as in the power conversion system 10 according to this embodiment, the power ripple caused by the grid 90 may affect the second circuit 2 and the third circuit 3 electrically connected to the first circuit 1 on the DC side. In this case, the AC power provided by the grid 90 needs to have a power factor greater than 0.95, and therefore, the pulsation frequency of the AC power is twice the commercial frequency.

[0114] In this case, for example, if the second circuit 2 electrically connected to the solar cell 70 is performing maximum power point tracking (MPPT), a constant current is output from the second circuit 2. This causes power ripples caused by the grid 90 to be input to the third circuit 3. These power ripples can be reduced by connecting a capacitor having a large capacitance to the input portion (i.e., between the terminals 81, 82) of the third circuit 3. However, in this case, the capacitor should increase its capacitance within the commercial frequency range, which is a problem.

[0115] Figure 3A-3D 1 shows a waveform obtained in the case where the second circuit 2 is performing constant current control (ie, when only the third circuit 3 bears the power ripple caused by the first circuit 1). Figure 3A-3D, the horizontal axis indicates time. Figure 3A The waveforms of the first output current I1 , the second output current I2 , and the third output current I3 are shown. Figure 3B The waveforms of the first, second and third voltages V1 , V2 , V3 across the capacitors C51 , C2 , C1 are shown. Figure 3C The enlarged view shows Figure 3B A portion of the waveform is shown. Figure 3D Waveforms of the first power P1, the second power P2, and the third power P3 are shown. The first output current I1 is the current output from the first circuit 1 to the power grid 90. The second output current I2 is the current output from the second circuit 2 to the terminal 81. The third output current I3 is the current output from the storage battery 80 to the third circuit 3. The first voltage V1 is the voltage between the two ends of the capacitor C51 of the filter circuit 5. The second voltage V2 is the voltage between the two ends of the capacitor C2 of the second circuit 2. The third voltage V3 is the voltage between the two ends of the capacitor C1 of the third circuit 3.

[0116] from Figure 3A It can be seen that the second circuit 2 is performing constant current control and the second output current I2 is constant. On the other hand, the third output current I3 is affected by the power ripple and changes synchronously with the power ripple of the output of the first circuit 1. In addition, from Figure 3B and Figure 3C It can be seen that the second and third voltages V2 and V3 between the two ends of the capacitors C2 and C1 are substantially constant. As a result, although the second power P2 is substantially constant, the third power P3 changes synchronously with the first power P1 (see Figure 3D ). That is, in this case, only the third circuit 3 is affected by the power ripple. Note that if current control can be performed on the third circuit 3, the influence of the power ripple on the third circuit 3 can be reduced. However, in reality, the third circuit 3 does not include an inductor (except for the transformer 33), so current control cannot be performed. For the third circuit 3, the instantaneous power (third power) P3 includes ripples, but the third voltage V3 between both ends of the capacitor C1 is a DC voltage. As a result, the third output current I3 includes ripples.

[0117] In this case, a maximum allowable current is defined for the battery 80, and the maximum allowable current varies depending on, for example, the remaining capacity (hereinafter referred to as "SOC") of the battery 80, the degree of degradation (hereinafter referred to as "SOH"), and the temperature of the battery 80. In general, if the SOC is less than 20% or equal to or greater than 80%, or if the temperature of the battery 80 is high, the maximum allowable current becomes lower. Therefore, in this case, if the ripple current is superimposed on the third output current I3, the maximum allowable current of the battery 80 will be exceeded, which will eventually cause the allowable power of the battery 80 to decrease.

[0118] In addition, unless the power factor of the first circuit 1 is equal to 1, the phase of the first output current I1 will deviate from the phase of the first voltage V1 between the two ends of the capacitor C51. For example, if the power factor of the first circuit 1 is 0, there will be a 90-degree phase shift between the first output current I1 and the first voltage V1 between the two ends of the capacitor C51 (see Figure 6 ). Therefore, if the power factor of the first circuit 1 changes, the power ripple of the first circuit 1 needs to be considered to control the second output current I2 or the second power P2 of the second circuit 2.

[0119] Therefore, in the structure in which the first circuit 1 connected to the grid 90 and the third circuit 3 connected to the storage battery 80 are connected on the DC side as in the power conversion system 10 according to the embodiment, the influence of the power ripple on the third circuit 3 is appropriately reduced. The power conversion system 10 according to the embodiment controls the second output current I2 of the second circuit 2 to reduce the influence of the power ripple on the third circuit 3. In other words, the power conversion system 10 according to the embodiment is configured to make the second circuit 2 and the third circuit 3 bear the power ripple caused by the grid 90.

[0120] Specifically, Figure 4A As shown, the control circuit 6 controls the on / off state of the second switching elements Q21, Q22 so that the second output current I2 changes with the power ripple of the first circuit 1. In other words, the control circuit 6 controls the on / off state of the second switching elements Q21, Q22 so that the first output current I1 and the second output current I2 are synchronized with each other. In this case, the amplitude of the second output current I2 is obtained as the product of the amplitude of the first output current I1 and the contribution coefficient. As used herein, "contribution coefficient" refers to the ratio of the power ripple caused by the power grid 90 borne by the second circuit 2, and has a value falling within the range of 0 to 1. If the contribution coefficient is 0, the second circuit 2 does not bear the power ripple caused by the power grid 90, and therefore only the third circuit 3 bears the power ripple. On the other hand, if the contribution coefficient is 1, only the second circuit 2 bears the power ripple caused by the power grid 90, and the third circuit 3 does not bear the power ripple. If the contribution coefficient is 0.5, the second circuit 2 and the third circuit 3 bear the power ripple caused by the power grid 90 on average. Figure 4A-4D In the example shown, the contribution factor is 0.5.

[0121] As described above, controlling the second output current I2 enables the second circuit 2 to bear at least a portion of the power ripple caused by the power grid 90, thereby allowing the third circuit 3 to have a lower power ripple contribution coefficient. Figure 4AAs shown, the ripple of the third circuit 3 is reduced, thereby reducing the possibility that the third output current I3 exceeds the maximum allowable current of the battery 80, thereby suppressing the decrease in the allowable power of the battery 80. Figure 4D As shown, making the second circuit 2 bear the power ripple of the first circuit 1 allows reducing the variation of the third power P3.

[0122] Figure 5A-5D The waveform obtained in the case where the second circuit 2 bears 100% of the power ripple caused by the grid 90 is shown. Figure 5A As shown, the second output current I2 of the second circuit 2 changes with the power ripple of the first circuit 1. On the other hand, the third output current I3 of the third circuit 3 hardly changes. Figure 5B and Figure 5C As shown in FIG. 1 , the second voltage V2 between the two ends of the capacitor C2 varies with the power ripple of the first circuit 1. On the other hand, the third voltage V3 between the two ends of the capacitor C1 hardly changes. As a result, Figure 5D As shown, the third power P3 hardly changes, while the second power P2 changes with the power ripple of the first circuit 1. That is, in this case, only the second circuit 2 bears the power ripple of the first circuit 1.

[0123] Figure 5D The results of control performed using the input current under the assumption that the input voltage of the second circuit 2 and the third circuit 3 is a perfect DC voltage with no ripple at all are shown. However, in reality, as Figure 5B and Figure 5C As shown, the pulsating component is superimposed on the input voltage, thus generating a pulsating component different from the theory on the input current and input power. However, by providing additional smoothing capacitors for the input capacitors C1, C2 or the connecting unit 8 of the second circuit 2 and the third circuit 3 to increase their capacitance, the pulsating component can be reduced (theoretically reduced to 0). In addition, the pulsation is caused by the power ripple on the AC side. Therefore, by monitoring and controlling the power ripple so that the power ripple on the input and output ends is zero, the power ripple on the input and output ends is allowed to be reduced to zero without unnecessarily increasing the capacitance of the capacitor. This allows reducing the capacitance of the input capacitors C1, C2 of the second circuit 2 and the third circuit 3 or the capacitance of the capacitor of the connecting unit 8. Therefore, even if the connecting unit 8 of this embodiment does not include a capacitor, this advantage can be achieved.

[0124] If the SOC of the storage battery 80 is equal to or greater than 20% and equal to or less than 80%, the second circuit 2 appropriately controls the second output current I2 so that the third circuit 3 has a larger power ripple sharing ratio than the second circuit 2. That is, in this case, the contribution coefficient is appropriately less than 0.5. If the SOC of the storage battery 80 is equal to or greater than 20% and equal to or less than 80%, the maximum allowable current is relatively increased, thereby allowing the third circuit 3 to have a larger sharing ratio than the second circuit 2. In addition, setting the sharing ratio of the third circuit 3 to a value larger than the sharing ratio of the second circuit 2 allows the influence of the power ripple on the second circuit 2 to be reduced, so that the control is closer to the MPPT control.

[0125] On the other hand, if the SOC of the storage battery 80 is less than 20% or greater than 80%, the second circuit 2 appropriately controls the second output current I2 so that the third circuit 3 has a smaller power ripple sharing ratio than the second circuit 2. That is, in this case, the contribution coefficient is appropriately greater than 0.5. As described above, if the SOC of the storage battery 80 is less than 20% or greater than 80%, the maximum allowable current is relatively reduced. Therefore, the decrease in the allowable power of the storage battery 80 can be suppressed by increasing the sharing ratio of the second circuit 2 to the power ripple.

[0126] It can be seen that the second circuit 2 controls the second output current I2 so that the ratio of the power ripple shared by the third circuit 3 when the remaining capacity of the battery 80 is less than 20% or greater than 80% is smaller than the ratio of the power ripple shared by the third circuit 3 when the remaining capacity of the battery 80 is equal to or greater than 20% and equal to or less than 80%.

[0127] Meanwhile, if a fourth circuit 4 electrically connected to the second circuit 2 is provided in the power conversion system 10 according to the embodiment, the second circuit 2 appropriately controls the second output current I2 so that the power ripple sharing ratio of the second circuit 2 is greater than the sum of the power ripple sharing ratio of the third circuit 3 and the power ripple sharing ratio of the fourth circuit 4. This configuration allows the power ripple sharing ratio of the third circuit 3 and the fourth circuit 4 to be reduced. In particular, when the fourth circuit 4 is caused to perform constant current control so that the power ripple sharing ratio of the fourth circuit 4 becomes zero, MPPT control can be performed while reducing the influence of the power ripple on the third circuit 3.

[0128] In addition, Figure 4DIn the example shown, the second power P2 of the second circuit 2 varies within a range above zero. Alternatively, the second power P2 can also be varied to cross zero by increasing the contribution coefficient. Still alternatively, the second power P2 can also be varied to cross zero and become negative by further increasing the contribution coefficient. In this embodiment, the second circuit 2 is implemented as a synchronous rectifier boost chopper circuit. Therefore, when the second power P2 is a negative value, the second output current I2 is constant with respect to Figure 1 Flow in the opposite direction as shown.

[0129] Furthermore, if the second circuit 2 is implemented as a bidirectional chopper circuit as in this embodiment, negative power can be output. Therefore, for example, even if the output power of the plurality of fourth circuits 4 is zero, the power ripple of the first circuit 1 can still be borne by allowing the sink current to flow to the second circuit 2.

[0130] Figure 6 1 shows waveforms of a first voltage V1 between both ends of a capacitor C51, a first output current I1, and a first power P1 of a first circuit 1 in a power conversion system 10 according to this embodiment. Figure 6 In the example shown, the power factor of the first circuit 1 is zero. If the power factor of the first circuit 1 changes, the phase of the first output current I1 is offset relative to the phase of the first voltage V1 between the two ends of the capacitor C51, and the phase of the first power P1 is also offset accordingly. Therefore, when the power factor of the first circuit 1 changes, the first output current I1 is in phase with the first power P1. Therefore, the second output current I2 or the second power P2 of the second circuit 2 can be controlled with reference to the waveform of the first output current I1. Alternatively, the second output current I2 or the second power P2 can be controlled with reference to the waveform of the first power P1. On the other hand, for example, if a distorted waveform appears in the first voltage V1 between the two ends of the capacitor C51, a distorted waveform also appears in the first power P1, but a distorted waveform does not appear in the first output current I1. In view of these considerations, the power conversion system 10 according to this embodiment appropriately controls the second output current I2 (or the second power P2) by referring to the waveform of the first power P1.

[0131] (4) Variant

[0132] Please note that the above embodiment is only one of the exemplary embodiments of the various embodiments of the present disclosure and should not be interpreted as limiting. On the contrary, the embodiment can be easily modified in various ways depending on design choices or any other factors without departing from the scope of the present disclosure. Optionally, the functions of the power conversion system 10 can also be implemented as, for example, a method for controlling the power conversion system 10, a computer program, or a non-transitory storage medium storing the computer program.

[0133] The method for controlling a power conversion system 10 according to one aspect is designed to control a power conversion system 10 including a first circuit 1, a second circuit 2, and a third circuit 3. The power conversion system 10 transmits DC power between first internal terminals 111, 112 of the first circuit 1 and second internal terminals 211, 212 of the second circuit 2. In the power conversion system 10, the first internal terminals 111, 112, the second internal terminals 211, 212, and the third internal terminals 341, 342 are electrically connected to the same connection unit 8. The first circuit 1 includes first internal terminals 111, 112 and first external terminals 113, 114, and the first external terminals 113, 114 are electrically connected to a power grid 90 (used as an AC power source or an AC load). The second circuit 2 includes second internal terminals 211, 212 and second external terminals 213, 214. The third circuit 3 includes at least third internal terminals 341, 342. The method for controlling the power conversion system 10 includes causing the second circuit 2 to control the current or power input to or output from the second circuit 2 itself so that the current or power is synchronized with the power ripple caused by the power grid 90 electrically connected to the first circuit 1.

[0134] A program according to another aspect is designed to cause a computer system to execute the above-described method for controlling the power conversion system 10. Next, modifications of the above-described exemplary embodiment will be listed one by one.

[0135] In the power conversion system 10 according to the present disclosure, its control circuit 6, for example, includes a computer system. The computer system may include a processor and a memory as main hardware components. The functions of the power conversion system 10 according to the present disclosure can be performed by causing the processor to execute a program stored in the memory of the computer system. The program may be pre-stored in the memory of the computer system. Alternatively, the program may also be downloaded via a telecommunications line, or distributed after being recorded in some non-temporary storage media such as a memory card, an optical disk, or a hard disk drive (any of which is readable by a computer system). The processor of the computer system may be implemented as a single or multiple electronic circuits, including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). These electronic circuits may be integrated on a single chip or distributed on multiple chips, as appropriate. These multiple chips may be integrated in a single device or distributed in multiple devices without restriction.

[0136] In addition, in the above-described embodiment, a plurality of constituent elements of the power conversion system 10 are housed in a single housing. However, this is not a necessary structure of the power conversion system 10. Alternatively, these constituent elements of the power conversion system 10 may be distributed in a plurality of different housings. Still alternatively, at least some functions of the power conversion system 10 (e.g., functions of the control circuit 6) may also be implemented as a server system or a cloud computing system.

[0137] (4.1) First variant

[0138] In the above embodiment, the third circuit 3 is implemented as a converter circuit including a full-bridge primary-side circuit 31 and a secondary-side circuit 32. Alternatively, as Fig. 7A and Figure 7B As shown, the third circuit 3 may include a primary side circuit 31A or a primary side circuit 31B instead of the primary side circuit 31. Figure 8 As shown, the third circuit 3 may include a secondary side circuit 32A instead of the secondary side circuit 32. That is, the third circuit 3 may include one of the primary side circuits 31, 31A, 31B and one of the secondary side circuits 32, 32A. In other words, the third circuit 3 may be a combination of one of the primary side circuits 31, 31A, 31B and one of the secondary side circuits 32, 32A. Fig. 7A , Figure 7B and Figure 8 A power conversion system 10 according to a first modification is described. Note that the power conversion system 10 according to the first modification has the same structure as the power conversion system 10 according to the embodiment except for the third circuit 3. Therefore, any constituent elements of the first modification having the same functions as the counterparts of the above-described embodiment will be denoted by the same reference numerals as the counterparts, and descriptions thereof will be omitted herein.

[0139] The power conversion system 10 according to the first modification includes a first circuit 1, a second circuit 2, and a third circuit 3. In addition, the power conversion system 10 also includes a plurality of fourth circuits 4, a filter circuit 5, a control circuit 6, a buffer circuit 7, and a connection unit 8. Furthermore, the power conversion system 10 also includes a plurality of pairs of first DC terminals T11, T12, a pair of second DC terminals T21, T22, and a pair of AC terminals T31, T32.

[0140] like Fig. 7A As shown, the primary side circuit 31A of the third circuit 3 includes two third switching elements Q51 and Q52 and a primary winding 333 .

[0141] Each of the third switching elements Q51, Q52 may be, for example, a depletion-type n-channel MOSFET. Each of the third switching elements Q51, Q52 includes a parasitic diode. The anode of the parasitic diode of each of the third switching elements Q51, Q52 is electrically connected to the source of the associated one of the third switching elements Q51, Q52, and the cathode thereof is electrically connected to the drain of the associated one of the third switching elements Q51, Q52.

[0142] The primary winding 333 is electrically connected to the capacitor C1 via the third switching elements Q51, Q52. The primary winding 333 can be implemented as, for example, a series circuit of two windings L31, L32, whose connection node is the primary side center tap CT1. That is, the two windings L31, L32 are electrically connected in series to form the primary winding 333. The primary side center tap CT1 is electrically connected to the higher potential terminal of the capacitor C1 (i.e., close to the second DC terminal T21).

[0143] The third switching element Q51 is electrically connected in series with the winding L31 between the two ends of the capacitor C1. The third switching element Q52 is electrically connected in series with the winding L32 between the two ends of the capacitor C1. In other words, the series circuit of the third switching element Q51 and the winding L31 and the series circuit of the third switching element Q52 and the winding L32 are electrically connected in parallel between the second DC terminals T21 and T22.

[0144] The drain of the third switching element Q51 is electrically connected to the primary side center tap CT1 via the winding L31. The drain of the third switching element Q52 is electrically connected to the primary side center tap CT1 via the winding L32. The sources of the third switching elements Q51 and Q52 are electrically connected to the second DC terminal T22 with a lower potential (i.e., the negative side).

[0145] At the same time, if Figure 7B As shown, the primary side circuit 31B of the third circuit 3 includes two third switching elements Q55 and Q56, a capacitor C31 and a winding L35.

[0146] Each of the third switching elements Q55, Q56 may be, for example, a depletion-type n-channel MOSFET. Each of the third switching elements Q55, Q56 includes a parasitic diode. The anode of the parasitic diode of each of the third switching elements Q55, Q56 is electrically connected to the source of the associated one of the third switching elements Q55, Q56, and the cathode thereof is electrically connected to the drain of the associated one of the third switching elements Q55, Q56.

[0147] The third switch element Q55 having a higher potential is electrically connected in series with the third switch element Q56 having a lower potential between both ends of the capacitor C1. That is, the series circuit of the third switch elements Q55 and Q56 is electrically connected between both ends of the capacitor C1.

[0148] The drain of the third switching element Q55 having a higher potential is electrically connected to the second DC terminal T21 having a higher potential. The source of the third switching element Q56 having a lower potential is electrically connected to the second DC terminal T22 having a lower potential. In addition, the source of the third switching element Q55 having a higher potential is electrically connected to the drain of the third switching element Q56 having a lower potential.

[0149] A first terminal of the winding L35 is electrically connected to a connection node between the third switching elements Q55 and Q56. A second terminal of the winding L35 is electrically connected to a second DC terminal T22 having a lower potential via a capacitor C31.

[0150] like Figure 8 As shown, the secondary side circuit 32A of the third circuit 3 includes two third switching elements Q53 and Q54 and a secondary winding 334 .

[0151] Each of the third switching elements Q53, Q54 may be, for example, a depletion-type n-channel MOSFET. Each of the third switching elements Q53, Q54 includes a parasitic diode. The anode of the parasitic diode of each of the third switching elements Q53, Q54 is electrically connected to the source of the associated one of the third switching elements Q53, Q54, and the cathode thereof is electrically connected to the drain of the associated one of the third switching elements Q53, Q54.

[0152] The secondary winding 334 is electrically connected between the terminals 81 and 82 via the third switching elements Q53 and Q54. The secondary winding 334 can be implemented as, for example, a series circuit of two windings L33 and L34, whose connection node is the secondary side center tap CT2. That is, the two windings L33 and L34 are electrically connected in series to form the secondary winding 334. The secondary side center tap CT2 is electrically connected to the terminal 81.

[0153] The third switching element Q53 is electrically connected in series with the winding L33 between the terminals 81 and 82. The third switching element Q54 is electrically connected in series with the winding L34 between the terminals 81 and 82. In other words, the series circuit of the third switching element Q53 and the winding L33 and the series circuit of the third switching element Q54 and the winding L34 are electrically connected in parallel between the terminals 81 and 82.

[0154] The drain of the third switching element Q53 is electrically connected to the secondary side center tap CT2 via the winding L33. The drain of the third switching element Q54 is electrically connected to the secondary side center tap CT2 via the winding L34. The sources of the third switching elements Q53 and Q54 are electrically connected to the terminal 82 with a lower potential (i.e., the negative side).

[0155] Even when any of these primary side circuits 31A, 31B and secondary side circuit 32A is used, a DC voltage can be generated between terminals 81, 82. Therefore, the first circuit 1 and the second circuit 2 can be electrically connected on the DC side without connecting a smoothing capacitor between terminals 81, 82.

[0156] (4.2) Second variant

[0157] The power conversion system 10 may include any one of the snubber circuits 7A-7D instead of the snubber circuit 7. Figure 9A-9D A power conversion system 10 according to a second modification is described. Note that the power conversion system 10 according to the second modification has the same structure as the power conversion system 10 according to the above-described embodiment, except for the snubber circuits 7A-7D. Therefore, any constituent elements of the second modification having the same functions as the counterparts of the above-described embodiment will be denoted by the same reference numerals as the counterparts, and descriptions thereof will be omitted herein.

[0158] The power conversion system 10 according to the second modification includes a first circuit 1, a second circuit 2, and a third circuit 3. In addition, the power conversion system 10 further includes a plurality of fourth circuits 4, a filter circuit 5, a control circuit 6, any one of buffer circuits 7A-7D, and a connection unit 8. Furthermore, the power conversion system 10 further includes a plurality of pairs of first DC terminals T11, T12, a pair of second DC terminals T21, T22, and a pair of AC terminals T31, T32.

[0159] like Fig.9A As shown, the buffer circuit 7A includes a diode D1, a resistor R1 and a capacitor C71. The diode D1 is electrically connected in series with the capacitor C71 between the terminals 81 and 82. The anode of the diode D1 is electrically connected to the terminal 81, and the cathode thereof is electrically connected to the terminal 82 via the capacitor C71. The resistor R1 is electrically connected between the anode and cathode of the diode D1. In the buffer circuit 7A, the electric energy stored in the capacitor C71 is consumed by the resistor R1.

[0160] like Fig. 9B As shown, the snubber circuit 7B includes a diode D1, a resistor R1, a capacitor C71, and a switching element Q71. The diode D1 is electrically connected in series with the capacitor C71 between the terminals 81 and 82. The anode of the diode D1 is electrically connected to the terminal 81, and the cathode thereof is electrically connected to the terminal 82 via the capacitor C71. The first terminal of the resistor R1 is electrically connected to the connection node between the diode D1 and the capacitor C71, and the second terminal thereof is electrically connected to the terminal 82 via the switching element Q71. In this snubber circuit 7B, when the switching element Q71 is turned on, the electric energy stored in the capacitor C71 is consumed by the resistor R1.

[0161] like Fig. 9C As shown, the buffer circuit 7C includes a plurality of (for example, Fig. 9C In the example shown, two) diodes D1, D2, an inductor L71, a plurality of (for example, Fig. 9C In the example shown, two) capacitors C71, C72, and a plurality of (eg, Fig. 9CIn the example shown, there are two) switching elements Q71 and Q72. The diode D1 is electrically connected in series with the capacitor C71 between the terminals 81 and 82. The diode D2 is electrically connected in series with the capacitor C72 between the terminals 81 and 82. The anode of the diode D1 is electrically connected to the terminal 81, and its cathode is electrically connected to the terminal 82 via the capacitor C71. The anode of the diode D2 is electrically connected to the terminal 82 via the capacitor C72, and its cathode is electrically connected to the terminal 81. That is, the diodes D1 and D2 are connected in mutually opposite directions between the terminals 81 and 82. The first terminal of the inductor L71 is electrically connected to the connection node between the diode D1 and the capacitor C71 via the switching element Q71, and the second terminal thereof is electrically connected to the connection node between the diode D2 and the capacitor C72. The switching element Q72 is electrically connected between the terminal 82 and the connection node between the switching element Q71 and the inductor L71. In this buffer circuit 7C, a step-down chopper circuit is formed by the switching elements Q71, Q72 and the inductor L71. In this snubber circuit 7C, the voltage between both ends of the capacitor C71 is lowered by turning on and off the switching elements Q71, Q72, and electric energy corresponding to the lowered voltage between both ends of the capacitor C71 is stored in the capacitor C72.

[0162] like Fig.9D As shown, the buffer circuit 7D includes a plurality of (for example, Fig.9D In the example shown, two) diodes D1, D2, a resistor R1, a plurality of (e.g., Fig.9D In the example shown, two) capacitors C71, C72 and a switching element Q71 are provided. A diode D1 is electrically connected in series with the capacitor C71 between terminals 81 and 82. A diode D2 is electrically connected in series with the capacitor C72 between terminals 81 and 82. The anode of the diode D1 is electrically connected to the terminal 81, and its cathode is electrically connected to the terminal 82 via the capacitor C71. The anode of the diode D2 is electrically connected to the terminal 82 via the capacitor C72, and its cathode is electrically connected to the terminal 81. That is, the diodes D1 and D2 are connected in mutually opposite directions between the terminals 81 and 82. The first terminal of the resistor R1 is electrically connected to the connection node between the diode D1 and the capacitor C71, and the second terminal thereof is electrically connected to the connection node between the diode D2 and the capacitor C72 via the switching element Q71. In this buffer circuit 7D, when the switching element Q71 is turned on, the electric energy stored in the capacitor C71 is stored in the capacitor C72 via the resistor R1.

[0163] Even in the buffer circuits 7A to 7D, when the bus voltage Vbus between the terminals 81 and 82 exceeds the first clamp value, a portion of the electric energy exceeding the first clamp value is absorbed from the terminals 81 and 82, thereby clamping the upper limit value of the bus voltage at the first clamp value. In addition, in the buffer circuits 7C and 7D, when the bus voltage becomes lower than the second clamp value (< the first clamp value), electric energy is injected (regenerated) into the terminals 81 and 82, thereby clamping the lower limit value of the bus voltage at the second clamp value.

[0164] Therefore, providing power conversion system 10 with any of snubber circuits 7A- 7D (rather than snubber circuit 7 ) may reduce the possibility of generating ringing or surge voltage in power conversion system 10 .

[0165] (4.3) Other variants

[0166] Other modifications of the above-described embodiment will be listed one by one.

[0167] The embodiments mainly describe the operation in the inverter mode. However, almost the same description also applies to the operation in the converter mode.

[0168] In addition, in the above-described embodiment, the power conversion system 10 has two operating modes, i.e., the inverter mode and the converter mode. However, this is not a necessary feature of the power conversion system 10. Alternatively, the power conversion system 10 may have only the inverter mode as its operating mode, or only the converter mode as its operating mode. In other words, the power conversion system 10 does not have to be configured to convert power bidirectionally, but may also be configured to convert power only unidirectionally.

[0169] Optionally, each of the first switching elements Q11-Q14, the second switching elements Q21, Q22, the third switching elements Q31-Q38, and the fourth switching elements Q41, Q42 may be connected to an external diode instead of a parasitic diode. In addition, each of the first switching elements Q11-Q14, the second switching elements Q21, Q22, the third switching elements Q31-Q38, and the fourth switching elements Q41, Q42 need not be a MOSFET, but may be, for example, an npn-type insulated gate bipolar transistor. In this case, the diode is electrically connected between the emitter and the collector of the bipolar transistor in a direction in which a current is allowed to flow in a direction opposite to the current flowing through the switching element when the switching element is turned on.

[0170] Furthermore, the control circuit 6 is not necessarily a microcomputer, and may be implemented as, for example, a central processing unit (CPU), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or any other appropriate type of circuit.

[0171] Optionally, the buffer circuits 7, 7A, 7B, 7C, 7D may be omitted. In addition, in the above embodiment, the buffer circuit 7 is connected between the terminals 81, 82 and the first circuit 1. Alternatively, the buffer circuits 7, 7A, 7B, 7C, 7D may also be connected, for example, between the second circuit 2 and the terminals 81, 82 or between the third circuit 3 and the terminals 81, 82.

[0172] Alternatively, the connection unit 8 may include a smoothing capacitor.

[0173] Furthermore, in the above-described embodiment, the power grid 90 electrically connected to the first circuit 1 is a single-phase AC power grid. Alternatively, the power grid 90 may also be a three-phase AC power grid having a U phase, a V phase, and a W phase. In this case, when the three phases are balanced, no ripple is caused. On the other hand, when the three phases are unbalanced, ripples are caused. However, since the ripples caused when the three phases are unbalanced are smaller than the ripples caused in the single-phase case, the influence of the ripples can be more effectively reduced.

[0174] In addition, in the above-mentioned embodiment, the second circuit 2 and the fourth circuit 4 are both synchronous rectification boost chopper circuits. Alternatively, the second circuit 2 and the fourth circuit 4 may also be asynchronous rectification boost chopper circuits. Still alternatively, the second circuit 2 and the fourth circuit 4 may also be insulating boost chopper circuits. Still alternatively, the second circuit 2 may also be a buck chopper circuit for reducing the DC voltage that has been boosted by the fourth circuit 4, or a boost / buck chopper circuit for increasing and decreasing the DC voltage provided by the fourth circuit 4.

[0175] Furthermore, in the above-described embodiment, four fourth circuits 4 are connected to the second circuit 2. Alternatively, one, two, three, or even five or more fourth circuits 4 may be connected to the second circuit 2. Still alternatively, the fourth circuit 4 may also be omitted. That is, the solar cell 70 may be directly connected to the second circuit 2.

[0176] Furthermore, in the above-described embodiment, the third circuit 3 is a DC / DC converter. Alternatively, the third circuit 3 may also be a storage battery 80. This eliminates the need to control the third circuit 3. In addition, since a converter circuit is not required, the size of the power conversion system 10 may also be reduced. Still alternatively, the third circuit 3 may also be a non-insulated DC / DC converter such as a chopper circuit.

[0177] Furthermore, in the above-described embodiment, the voltage source that provides the DC voltage to the fourth circuit 4 is the solar cell 70. However, the voltage source need not be the solar cell 70, but may be, for example, a battery or a fuel cell. Alternatively, the voltage source may also be implemented as, for example, a converter circuit that can be used as a DC voltage source.

[0178] Furthermore, in the above-described embodiment, the voltage source that provides the DC voltage to the third circuit 3 is the battery 80. However, the voltage source need not be the battery 80, but may be, for example, a solar cell or a fuel cell. Alternatively, the voltage source may also be implemented as, for example, a converter circuit that can be used as a DC voltage source.

[0179] Furthermore, in the above-described embodiment, the power grid 90 is connected to the first circuit 1. Alternatively, a circuit, a load device, a motor, or any other suitable device may be connected to the first circuit 1 as long as the device receives an AC voltage as an input voltage.

[0180] (Summary)

[0181] As can be seen from the foregoing description, the power conversion system (10) according to the first aspect includes a first circuit (1) and a second circuit (2), and transmits DC power between a first internal terminal (111, 112) of the first circuit (1) and a second internal terminal (211, 212) of the second circuit (2). The first circuit (1) includes a first internal terminal (111, 112) and a first external terminal (113, 114), and the first external terminal (113, 114) is electrically connected to an AC power source or an AC load. The second circuit (2) includes a second internal terminal (211, 212) and a second external terminal (213, 214). The power conversion system (10) also includes a third circuit (3). The third circuit (3) includes at least a third internal terminal (341, 342). In the power conversion system (10), the first internal terminal (111, 112), the second internal terminal (211, 212) and the third internal terminal (341, 342) are electrically connected to the same connection unit (8). The second circuit (2) controls the current or power input to or output from the second circuit (2) itself so that the current or power is synchronized with the power ripple caused by the AC power source or the AC load. The AC power source or the AC load is electrically connected to the first circuit (1).

[0182] According to this aspect, the second circuit (2) controls the current or power input to or output from the second circuit (2) itself so that the current or power is synchronized with the power ripple caused by the AC power supply or the AC load. This allows the second circuit (2) to bear at least a part of the power ripple caused by the AC power supply or the AC load. Therefore, even without using any smoothing capacitor, the influence of the power ripple on the third circuit (3) can be reduced.

[0183] In a power conversion system (10) according to the second aspect that can be implemented in combination with the first aspect, a third circuit (3) includes a switching element (Q31-Q38) and a transformer (33) electrically connected to the switching element (Q31-Q38). The third circuit (3) is configured to provide an output voltage (VT) between both ends of a secondary winding (332) of the transformer (33) via the switching element (Q31-Q38) and the transformer (33). The secondary winding (332) is electrically connected to a third internal terminal (341, 342). The output voltage (VT) has a waveform (W1) including a rising range (W11), a falling range (W13), and a flat range (W12). In the rising range (W11), the output voltage (VT) changes from a first potential (VT1) to a second potential (VT2) higher than the first potential (VT1). In the falling range (W13), the output voltage (VT) changes from the second potential (VT2) to the first potential (VT1). In the flat range (W12), the output voltage (VT) is maintained at the first potential (VT1) or the second potential (VT2).

[0184] This aspect allows the first circuit (1) and the second circuit (2) to be connected on the DC side without using a smoothing capacitor.

[0185] In the power conversion system (10) according to the third aspect which can be implemented in combination with the first or second aspect, the third circuit (3) includes a converter circuit (e.g., a primary side circuit 31 and a secondary side circuit 32) that performs DC-DC conversion on a DC voltage provided by a storage battery (80). When the charge level of the storage battery (80) is equal to or greater than 20% and equal to or less than 80%, the second circuit (2) controls the current or power so that the third circuit (3) shares a greater proportion of the power ripple than the second circuit (2) shares the power ripple.

[0186] This aspect can reduce the impact of power ripple on the second circuit (2).

[0187] In the power conversion system (10) according to the fourth aspect which can be implemented in combination with the first or second aspect, the third circuit (3) includes a converter circuit (e.g., a primary side circuit 31 and a secondary side circuit 32) that performs DC-DC conversion on a DC voltage provided by a storage battery (80). When the charge level of the storage battery (80) is lower than 20% or higher than 80%, the second circuit (2) controls the current or power so that the third circuit (3) shares less power ripple than the second circuit (2).

[0188] This aspect can reduce the impact of power ripple on the third circuit (3).

[0189] In a power conversion system (10) according to a fifth aspect that can be implemented in combination with the first or second aspect, the third circuit (3) includes a converter circuit (e.g., a primary side circuit 31 and a secondary side circuit 32) that performs DC-DC conversion on a DC voltage provided by a storage battery (80). The second circuit (2) controls the current or power so that the first sharing ratio is less than the second sharing ratio. The first sharing ratio is the sharing ratio of the third circuit (3) to the power ripple when the power level of the storage battery (80) is less than 20% or greater than 80%. The second sharing ratio is the sharing ratio of the third circuit (3) to the power ripple when the power level of the storage battery (80) is greater than or equal to 20% and less than or equal to 80%.

[0190] In this regard, a decrease in the allowable power of the storage battery (80) can be suppressed by reducing the first sharing ratio.

[0191] According to a sixth aspect, which can be implemented in combination with any one of the first to fifth aspects, the power conversion system (10) further includes a fourth circuit (4) electrically connected in series with the second circuit (2). The second circuit (2) controls current or power so that a share ratio of the second circuit (2) to the power ripple is greater than a sum of a share ratio of the third circuit (3) to the power ripple and a share ratio of the fourth circuit (4) to the power ripple.

[0192] This aspect can reduce the power ripple in the third circuit (3) and the fourth circuit (4).

[0193] In the power conversion system (10) according to the seventh aspect which can be implemented in combination with the first or second aspect, the third circuit (3) is a storage battery (80).

[0194] According to this aspect, there is no need to control the third circuit (3). In addition, since a converter circuit is not required, the overall size of the power conversion system (10) can be reduced.

[0195] According to the eighth aspect, which can be implemented in combination with any one of the first to seventh aspects, the power conversion system (10) includes a plurality of first circuits (1) and a plurality of second circuits (2), one of the plurality of first circuits being the first circuit (1), and one of the plurality of second circuits being the second circuit (2). The specific second circuit (2) controls the current or power input to or output from the specific second circuit (2) itself so that the current or power is synchronized with the sum of power ripples caused by a plurality of AC power sources or a plurality of AC loads. The plurality of AC power sources or the plurality of AC loads are electrically connected to the plurality of first circuits (1). The AC power source is one of the plurality of AC power sources. The AC load is one of the plurality of AC loads. The specific second circuit (2) is at least one second circuit (2) among the plurality of second circuits (2).

[0196] This aspect allows the specific second circuit (2) to bear at least a portion of the power ripple caused by the AC power source or the AC load. Therefore, even without using any smoothing capacitor, the influence of the power ripple on the third circuit (3) can be reduced.

[0197] A method for controlling a power conversion system (10) according to a ninth aspect is designed to control a power conversion system (10) comprising a first circuit (1), a second circuit (2) and a third circuit (3). The power conversion system (10) transmits DC power between a first internal terminal (111, 112) of the first circuit (1) and a second internal terminal (211, 212) of the second circuit (2). In the power conversion system (10), the first internal terminal (111, 112), the second internal terminal (211, 212) and the third internal terminal (341, 342) are electrically connected to the same connection unit (8). The first circuit (1) comprises a first internal terminal (111, 112) and a first external terminal (113, 114), and the first external terminal (113, 114) is electrically connected to an AC power source or an AC load. The second circuit (2) comprises a second internal terminal (211, 212) and a second external terminal (213, 214). The third circuit (3) comprises at least a third internal terminal (341, 342). The method for controlling the power conversion system (10) includes causing the second circuit (2) to control the current or power input to or output from the second circuit (2) itself so that the current or power is synchronized with the power ripple caused by an AC power source or an AC load electrically connected to the first circuit (1).

[0198] According to this aspect, the second circuit (2) controls the current or power input to or output from the second circuit (2) itself so that the current or power is synchronized with the power ripple caused by the AC power supply or the AC load. This allows the second circuit (2) to bear at least a part of the power ripple caused by the AC power supply or the AC load. Therefore, even without using any smoothing capacitor, the influence of the ripple on the third circuit (3) can be reduced.

[0199] The program according to the tenth aspect is designed to cause a computer system to execute the method for controlling a power conversion system (10) according to the ninth aspect.

[0200] According to this aspect, the second circuit (2) controls the current or power input to or output from the second circuit (2) itself so that the current or power is synchronized with the power ripple caused by the AC power supply or the AC load. This allows the second circuit (2) to bear at least a part of the power ripple caused by the AC power supply or the AC load. Therefore, even without using any smoothing capacitor, the influence of the ripple on the third circuit (3) can be reduced.

[0201] Note that the constituent elements according to the second to eighth aspects are not essential constituent elements for the power conversion system (10) but may be omitted as appropriate.

[0202] Reference numerals list

[0203] 1 First Circuit

[0204] 111, 112 First internal terminal

[0205] 113, 114 First external terminal

[0206] Q11-Q14 First switch element

[0207] 2 Second Circuit

[0208] 211, 212 Second internal terminal

[0209] 213, 214 Second external terminal

[0210] Q21, Q22 Second switch element

[0211] 3 Third Circuit

[0212] 33 Transformer

[0213] 341, 342 Third internal terminal

[0214] 343, 344 Third external terminal

[0215] Q31-Q38 Third switch element (switching element)

[0216] 6 Control Circuit

[0217] 8 Connection unit

[0218] 10 Power conversion system

[0219] I2 Second output current (current)

[0220] VT Output voltage

[0221] VT1 first potential

[0222] VT2 Second potential

[0223] W1 output voltage waveform

[0224] W11 Rising Range

[0225] W12 Flat Range

[0226] W13 descent range.

Claims

1. A power conversion system, comprising: A first circuit includes a first internal terminal and a first external terminal, and the first external terminal is electrically connected to an AC power source or an AC load; as well as a second circuit including a second internal terminal and a second external terminal, The power conversion system is configured to transmit DC power between the first internal terminal of the first circuit and the second internal terminal of the second circuit, The power conversion system further includes a third circuit, the third circuit including at least a third internal terminal, The first internal terminal, the second internal terminal and the third internal terminal are electrically connected to the same connection unit, The third circuit includes a switching element and a transformer electrically connected to the switching element, the third circuit being configured to provide an output voltage between both ends of a secondary winding of the transformer via the switching element and the transformer, The second circuit is configured to control current or power input to or output from the second circuit itself so that the current or the power is synchronized with a power ripple caused by the AC power source or the AC load, which is electrically connected to the first circuit.

2. The power conversion system according to claim 1, wherein The secondary winding is electrically connected to the third internal terminal, and The waveform of the output voltage includes: a rising range, wherein the output voltage changes from a first potential to a second potential higher than the first potential; a falling range, wherein the output voltage changes from the second potential to the first potential; and A flat range, wherein the output voltage is maintained at the first potential or the second potential.

3. The power conversion system according to claim 1 or 2, wherein The third circuit includes a converter circuit configured to perform DC-DC conversion on a DC voltage supplied from a battery, and The second circuit is configured to: when the battery power is equal to or greater than 20% and equal to or less than 80%, control the current or the power so that the third circuit's share of the power ripple is greater than the second circuit's share of the power ripple.

4. The power conversion system according to claim 1 or 2, wherein The third circuit includes a converter circuit configured to perform DC-DC conversion on a DC voltage supplied from a battery, and The second circuit is configured to: when the power level of the battery is lower than 20% or higher than 80%, control the current or the power so that the third circuit's share of the power ripple is smaller than the second circuit's share of the power ripple.

5. The power conversion system according to claim 1 or 2, wherein The third circuit includes a converter circuit configured to perform DC-DC conversion on a DC voltage supplied from a battery, and The second circuit is configured to control the current or the power so that when the battery charge is less than 20% or greater than 80%, the third circuit's share of the power ripple is less than the third circuit's share of the power ripple when the battery charge is equal to or greater than 20% and equal to or less than 80%.

6. The power conversion system according to claim 1 or 2, further comprising a fourth circuit electrically connected in series with the second circuit, wherein The second circuit is configured to control the current or the power so that a share ratio of the second circuit to the power ripple is greater than a sum of a share ratio of the third circuit to the power ripple and a share ratio of the fourth circuit to the power ripple.

7. The power conversion system according to claim 1 or 2, wherein The third circuit is a battery.

8. The power conversion system according to claim 1 or 2, comprising a plurality of first circuits and a plurality of second circuits, one of the plurality of first circuits is the first circuit, and one of the plurality of second circuits is the second circuit, wherein A specific second circuit as at least one of the plurality of second circuits is configured to control a current or power input to or output from the specific second circuit itself so that the current or the power is synchronized with a sum of power ripples caused by a plurality of AC power sources or a plurality of AC loads electrically connected to the plurality of first circuits, the AC power source being one of the plurality of AC power sources, and the AC load being one of the plurality of AC loads.

9. A method for controlling a power conversion system, the power conversion system comprising: A first circuit includes a first internal terminal and a first external terminal, and the first external terminal is electrically connected to an AC power source or an AC load; a second circuit including a second internal terminal and a second external terminal; as well as a third circuit including at least a third internal terminal, The power conversion system is configured to transmit DC power between the first internal terminal of the first circuit and the second internal terminal of the second circuit, The first internal terminal, the second internal terminal and the third internal terminal are electrically connected to the same connection unit, The third circuit includes a switching element and a transformer electrically connected to the switching element, the third circuit being configured to provide an output voltage between both ends of a secondary winding of the transformer via the switching element and the transformer, The method includes causing the second circuit to control a current or power input to or output from the second circuit itself so that the current or the power is synchronized with a power ripple caused by the AC power source or the AC load, the AC power source or the AC load being electrically connected to the first circuit.

10. A computer program product comprising a computer program which, when executed by one or more processors, implements the steps of the method for controlling a power conversion system according to claim 9.

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