Subdivision method using recursive subdivision of triangles

Abstract

The present disclosure relates to a subdivision method using recursive subdivision of triangles. A subdivision method is described using subdivision factors defined for each vertex of a patch that can be a quadrilateral, triangle, or isoline. The method is implemented in a computer graphics system and involves comparing the vertex subdivision factors with a threshold. If the vertex subdivision factor of the left or right vertex defining an edge of the initial patch exceeds the threshold, the edge is subdivided by the addition of a new vertex that divides the edge into two parts and two new patches are formed. A new vertex subdivision factor is calculated for each vertex in each of the newly formed patches, both of which include the newly added vertex. The method is then repeated for each of the newly formed patches until none of the vertex subdivision factors exceed the threshold.

Description

[0001] This application is a divisional application of the application with the filing date of June 6, 2016, application number 201610392316.9, and invention name "Subdivision method using recursive subdivision of triangles". Background

[0002] Subdivision is a technique in computer graphics for dividing a set of surfaces representing objects in a scene into multiple smaller and simpler patches (referred to as primitives), typically triangles, which are easier to render. The resulting subdivided surface is usually an approximation of the original surface, but the accuracy of this approximation can be improved by increasing the number of primitives generated, which usually results in smaller primitives. The amount of subdivision / refinement is typically determined by the level of detail (LOD). Thus, an increasing number of primitives are generally used where a higher level of detail is required, for example because the object is closer to the viewer and / or the object has a more complex shape. However, the use of a larger number of triangles increases the processing power required to render the scene.

[0003] Generally, the patch is subdivided into triangular primitives. The patch is square or triangular in shape (i.e., quadrilateral or triangular) and can be bent to conform to the surface of the object it represents (and can thus be referred to as a "surface patch") and / or to enable displacement mapping to be applied. However, the refinement is not performed on the bent patch but instead is performed in the domain of the patch (e.g., as if the patch were planar rather than defined by, for example, a polynomial equation). The domain of the patch can be defined according to (u, v) parameters and is referred to as the "parametric space". This means that the subdivision process is independent of any curvature present in the final surface.

[0004] Subdivision can be performed in advance (e.g., to compute multiple different views of a scene at different levels of detail and / or from different viewpoints) or can be performed on the fly (e.g., to provide continuous or view-dependent levels of detail). With some existing subdivision methods, the user may experience unwanted visual artifacts where, although the requested level of detail changes smoothly, the resulting subdivision changes in a discontinuous manner.

[0005] The embodiments described below are provided only as examples and are not limitations on implementations that solve any or all of the disadvantages of known methods and apparatuses for performing subdivision.

[0006] Overview

[0007] This overview is provided to introduce a selected concept in a simplified form, which is further described below in the detailed description. This overview is not intended to identify the key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0008] Describes a subdivision method using subdivision factors defined for each vertex of a patch, where the patch can be a quadrilateral, triangle, or contour line. The method is implemented in a computer graphics system and involves comparing the vertex subdivision factors with a threshold. If the vertex subdivision factor of the left vertex or the right vertex of an edge defining the initial patch exceeds the threshold, the edge is subdivided by adding a new vertex that divides the edge into two parts and two new patches are formed. The new vertex subdivision factors are calculated for each vertex in each newly formed patch, where both patches include the newly added vertex. Then the method is repeated for each newly formed patch until none of the vertex subdivision factors exceed the threshold.

[0009] A first aspect provides a method of performing subdivision in a computer graphics system, the method comprising: for an initial patch including a left vertex and a right vertex connected by an edge and defined in a domain space: comparing the vertex subdivision factor of the left vertex and the vertex subdivision factor of the right vertex with a threshold; in response to determining that neither the vertex subdivision factor of the left vertex nor the vertex subdivision factor of the right vertex exceeds the threshold, outputting data describing the initial patch; and in response to determining that either the vertex subdivision factor of the left vertex or the vertex subdivision factor of the right vertex exceeds the threshold, forming a new vertex that divides the edge into two parts, calculating the vertex subdivision factor of the new vertex, splitting the initial patch to form a first new patch including the left vertex and the new vertex and a second new patch including the right vertex and the new vertex, and reducing the vertex subdivision factor of each vertex in each newly formed patch.

[0010] The new vertex may bisect the edge.

[0011] The method may further comprise: repeating the method using each newly formed patch as the initial patch. Repeating the method for each newly formed patch used as the initial patch may comprise: repeating the method for each newly formed patch used as the initial patch until the vertex subdivision factors of the left vertex and the right vertex in each patch do not exceed the threshold.

[0012] Calculating the vertex subdivision factor of the new vertex may comprise: calculating the average of the vertex subdivision factors of the left vertex and the right vertex; and setting the vertex subdivision factor of the new vertex equal to the calculated average. The average of the vertex subdivision factors of the left vertex and the right vertex may be given by:

[0013] MEAN(LEFT.TF,RIGHT.TF)=MIN(AVG(LEFT.TF,RIGHT.TF),MIN(LEFT.TF,RIGHT.TF)+INTERVAL)

[0014] where LEFT.TF is the vertex subdivision factor of the left vertex, RIGHT.TF is the vertex subdivision factor of the right vertex, AVG() is the arithmetic mean of the values within the parentheses, MIN() is the minimum value in the list of values within the parentheses, and INTERVAL is a predefined parameter.

[0015] Reducing the vertex subdivision factor of each vertex in each newly formed patch may include reducing each vertex subdivision factor by a predefined parameter INTERVAL. The parameter INTERVAL may be 0.5.

[0016] The threshold may be equal to zero.

[0017] The initial patch may be an isoline patch defined by two vertices, the two vertices including a left vertex and a right vertex.

[0018] The initial patch may be a triangular patch, and where the triangular patch is an ordered set of three vertices: a top vertex, a right vertex, and a left vertex. The divided patch may be the parent patch of two newly formed patches, and where the first new patch is an ordered set of three vertices: the top vertex that is the new vertex added to the parent patch; the right vertex that is the left vertex of the parent patch; and the left vertex that is the top vertex of the parent patch; and where the second new patch is an ordered set of three vertices: the top vertex that is the new vertex added to the parent patch; the right vertex that is the top vertex of the parent patch; and the left vertex that is the right vertex of the parent patch.

[0019] The method - where the initial patch is a triangular patch - may further include: receiving an input patch; and generating one or more initial patches from the input patch; and repeating the method for each of the multiple initial patches. The input patch may be a triangular patch having three vertices, and where generating one or more initial patches may include: comparing the vertex subdivision factor of each of the three vertices with a threshold; in response to determining that none of the vertex subdivision factors exceed the threshold, outputting data describing the input patch; and in response to determining that at least one vertex subdivision factor exceeds the threshold, forming a new vertex at the center of the triangle, calculating the vertex subdivision factor of the new vertex, dividing the input patch to form three initial patches, each initial patch being a triangular patch with the new vertex as the top vertex, and reducing the vertex subdivision factor of each vertex in each newly formed initial patch. The new vertex may be formed at the centroid of the triangle. The three vertices of the input patch may be a top vertex, a left vertex, and a right vertex, and the following formula may be used to calculate the vertex subdivision factor of the new vertex at the center of the triangle:

[0020] MID.TF = MEAN(TOP.TF, LEFT.TF, RIGHT.TF)

[0021] Where MID.TF is the vertex subdivision factor of the new vertex, TOP.TF is the vertex subdivision factor of the upper vertex, LEFT.TF is the vertex subdivision factor of the left vertex, and RIGHT.TF is the vertex subdivision factor of the right vertex, and MEAN() is the average value of the values within the parentheses.

[0022] The MEAN(TOP.TF, LEFT.TF, RIGHT.TF) can be calculated using the following formula:

[0023] MEAN(TOP.TF, LEFT.TF, RIGHT.TF) = MIN(AVG(TOP.TF, LEFT.TF, RIGHT.TF), MIN(TOP.TF, LEFT.TF, RIGHT.TF) + INTERVAL)

[0024] Where AVG() is the arithmetic mean of the values within the parentheses, MIN() is the minimum value in the list of values within the parentheses, and INTERVAL is a predefined parameter.

[0025] The input patch can be a quadrilateral patch with four vertices, and generating one or more initial patches may include: forming a new vertex at the center of the quadrilateral patch; calculating the vertex subdivision factor of the new vertex; dividing the input patch to form four initial patches, each initial patch being a triangular patch with the new vertex as the upper vertex; and reducing the vertex subdivision factor of each vertex in each newly formed initial patch.

[0026] The input patch can be a quadrilateral patch with four vertices and a center subdivision factor, and generating one or more initial patches may include: adding five new vertices to divide the input patch into four sub - input quadrilateral patches; calculating the vertex subdivision factor of each of the five newly added vertices; reducing the vertex subdivision factor of each vertex in the four newly formed sub - input patches; and for each sub - input patch: forming a new vertex at the center of the quadrilateral patch; calculating the vertex subdivision factor of the new vertex; dividing the input patch to form four initial patches, each initial patch being a triangular patch with the new vertex as the upper vertex; and reducing the vertex subdivision factor of each vertex in each newly formed initial patch.

[0027] The input patch can be a triangular patch with three vertices and a center subdivision factor, and generating one or more initial patches therefrom may include: adding four new vertices to subdivide the input patch into three sub-input quadrilateral patches; calculating the vertex subdivision factor for each of the four newly added vertices; reducing the vertex subdivision factor of each vertex in the three newly formed sub-input patches; and for each sub-input patch: forming a new vertex at the center of the quadrilateral patch; calculating the vertex subdivision factor of the new vertex; dividing the input patch to form four initial patches, each initial patch being a triangular patch with the new vertex as the upper vertex; and reducing the vertex subdivision factor of each vertex in each newly formed initial patch.

[0028] The four vertices of the input patch can be the upper left vertex, the upper right vertex, the lower left vertex, and the lower right vertex, and the vertex subdivision factor of the new vertex at the center of the quadrilateral can be calculated using the following formula:

[0029] MID.TF = MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF)

[0030] where MID.TF is the vertex subdivision factor of the new vertex, TLEFT.TF is the vertex subdivision factor of the upper left vertex, TRIGHT.TF is the vertex subdivision factor of the upper right vertex, BLEFT.TF is the vertex subdivision factor of the lower left vertex, BRIGHT.TF is the vertex subdivision factor of the lower right vertex, and MEAN() is the average value of the values within the parentheses.

[0031] The following formula can be used to calculate MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF):

[0032] MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) = MIN(AVG(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF), MIN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) + INTERVAL)

[0033] where AVG() is the arithmetic mean of the values within the parentheses, MIN() is the minimum value in the list of values within the parentheses, and INTERVAL is a predefined parameter.

[0034] Reducing the vertex subdivision factor of each vertex in each newly formed initial patch may include reducing each vertex subdivision factor by a predefined parameter INTERVAL.

[0035] A second aspect provides a hardware subdivision unit including hardware logic configured to, for an initial patch including a left vertex and a right vertex connected by an edge and defined in a domain space: compare the vertex subdivision factor of the left vertex and the vertex subdivision factor of the right vertex with a threshold; in response to determining that neither the vertex subdivision factor of the left vertex nor the vertex subdivision factor of the right vertex exceeds the threshold, output data describing the initial patch; and in response to determining that either the vertex subdivision factor of the left vertex or the vertex subdivision factor of the right vertex exceeds the threshold, form a new vertex that divides the edge into two parts, calculate the vertex subdivision factor of the new vertex, divide the initial patch to form a first new patch including the left vertex and the new vertex and a second new patch including the right vertex and the new vertex, and reduce the vertex subdivision factor of each vertex in each newly formed patch.

[0036] Wherein, the new vertex bisects the edge.

[0037] The hardware logic may also be configured to repeat the operation of the hardware logic using the newly formed patch as the initial patch.

[0038] Wherein, the hardware logic is configured to repeat the operation of the hardware logic for each newly formed patch serving as the initial patch until the vertex subdivision factors of the left vertex and the right vertex in each patch do not exceed the threshold.

[0039] The hardware logic configured to calculate the vertex subdivision factor of the new vertex may include hardware logic configured to perform the following operations: calculate the average of the vertex subdivision factors of the left vertex and the right vertex; and set the vertex subdivision factor of the new vertex equal to the calculated average.

[0040] Wherein, the average of the vertex subdivision factors of the left vertex and the right vertex is given by the following formula:

[0041] MEAN(LEFT.TF,RIGHT.TF)=MIN(AVG(LEFT.TF,RIGHT.TF),MIN(LEFT.TF,RIGHT.TF)+INTERVAL)

[0042] Where LEFT.TF is the vertex subdivision factor of the left vertex, RIGHT.TF is the vertex subdivision factor of the right vertex, AVG() is the arithmetic mean of the values within the parentheses, MIN() is the minimum value in the list of values within the parentheses, and INTERVAL is a predefined parameter.

[0043] Wherein, the hardware logic configured to reduce the vertex subdivision factor of each vertex in each newly formed patch includes reducing each vertex subdivision factor by a predefined parameter INTERVAL.

[0044] The initial patch can be an isocontour patch defined by two vertices (a left vertex and a right vertex).

[0045] The initial patch can be a triangular patch, and the triangular patch is an ordered set of three vertices: a top vertex, a right vertex, and a left vertex. The divided patch can be the parent patch of two newly formed patches, and the first new patch is an ordered set of three vertices: the top vertex that is the new vertex added to the parent patch; the right vertex that is the left vertex of the parent patch; and the left vertex that is the top vertex of the parent patch; and the second new patch is an ordered set of three vertices: the top vertex that is the new vertex added to the parent patch; the right vertex that is the top vertex of the parent patch; and the left vertex that is the right vertex of the parent patch.

[0046] The hardware tessellation unit may further include hardware logic configured to perform the following operations: receive an input patch; generate one or more initial patches from the input patch; and repeat the operations of the hardware logic for each of the multiple initial patches.

[0047] The input patch can be a triangular patch having three vertices, and the hardware logic configured to generate one or more initial patches may include hardware logic configured to perform the following operations: compare the vertex tessellation factor of each of the three vertices with a threshold; in response to determining that none of the vertex tessellation factors exceeds the threshold, output data describing the input patch; and in response to determining that at least one vertex tessellation factor exceeds the threshold, form a new vertex at the center of the triangular patch, calculate the vertex tessellation factor of the new vertex, divide the input patch to form three initial patches, each initial patch being a triangular patch with the new vertex as the top vertex, and reduce the vertex tessellation factor of each vertex in each newly formed initial patch.

[0048] The input patch can be a quadrilateral patch having four vertices, and the hardware logic configured to generate one or more initial patches may include hardware logic that performs the following operations: form a new vertex at the center of the quadrilateral patch; calculate the vertex tessellation factor of the new vertex; divide the input patch to form four initial patches, each initial patch being a triangular patch with the new vertex as the top vertex; and reduce the vertex tessellation factor of each vertex in each newly formed initial patch.

[0049] The input patch can be a quadrilateral patch having four vertices and a center subdivision factor, and the hardware logic configured to generate one or more initial patches can include hardware logic configured to perform the following operations: adding five new vertices to subdivide the input patch into four sub-input quadrilateral patches; calculating the vertex subdivision factor for each of the five newly added vertices; reducing the vertex subdivision factor for each vertex in the four newly formed sub-input quadrilateral patches; and for each sub-input quadrilateral patch: forming a new vertex at the center of each sub-input quadrilateral patch; calculating the vertex subdivision factor for the new vertex; dividing each sub-input quadrilateral patch to form four initial patches, each initial patch being a triangular patch having the new vertex as the upper vertex; and reducing the vertex subdivision factor for each vertex in each of the newly formed initial patches.

[0050] The input patch can be a triangular patch having three vertices and a center subdivision factor, and the hardware logic configured to generate one or more initial patches can include hardware logic configured to perform the following operations: adding four new vertices to subdivide the input patch into three sub-input quadrilateral patches; calculating the vertex subdivision factor for each of the four newly added vertices; reducing the vertex subdivision factor for each vertex in the three newly formed sub-input quadrilateral patches; and for each sub-input quadrilateral patch: forming a new vertex at the center of each sub-input quadrilateral patch; calculating the vertex subdivision factor for the new vertex; dividing each sub-input quadrilateral patch to form four initial patches, each initial patch being a triangular patch having the new vertex as the upper vertex; and reducing the vertex subdivision factor for each vertex in each of the newly formed initial patches.

[0051] A third aspect provides a graphics processing unit including the hardware subdivision unit as set forth above.

[0052] A further aspect provides a non-transitory computer-readable storage medium having stored thereon computer-executable program code which, when executed, causes at least one processor to perform the method as set forth above, a graphics processing unit including the hardware subdivision unit as set forth above, a computer-readable storage medium having encoded thereon computer-readable program code defining the hardware subdivision unit as set forth above, and a computer-readable storage medium having encoded thereon computer-readable program code defining a hardware subdivision unit configured to perform the method as set forth above.

[0053] As will be apparent to the skilled person, the preferred features may be combined as appropriate and may be combined with any aspect of the invention.

[0054] Brief Description of the Drawings

[0055] Embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, in which:

[0056] Figure 1 show the results using various known subdivision methods;

[0057] Figure 2 is a schematic diagram showing examples of different results obtained using prior art methods with edge subdivision factors and the methods described herein with vertex subdivision factors;

[0058] Figure 3 show various examples of exemplary results obtained using the improved subdivision method described herein;

[0059] Figure 4 show additional exemplary results obtained using the improved subdivision method described herein;

[0060] Figure 5 is a flowchart of the improved subdivision method;

[0061] Figure 6 is a schematic diagram showing various input patches and showing Figure 5 the preprocessing stage of the method;

[0062] Figure 7 is for triangular input patches Figure 5 the flowchart of the preprocessing stage of the method;

[0063] Figure 8 is for quadrilateral input patches Figure 5 the flowchart of the preprocessing stage of the method;

[0064] Figure 9 is a flowchart of recursively applying the algorithm to each of the three or four triangular patches output by the preprocessing stage or to the input contour patch;

[0065] Figure 10 is a schematic diagram showing a triangle illustrating Figure 9 the method;

[0066] Figure 11 is a schematic diagram showing a triangle illustrating the improved subdivision method described herein;

[0067] Figure 12 is an example of the improved subdivision method described herein;

[0068] Figure 13 is a schematic diagram showing the categories of triangles that can be produced using the improved subdivision method described herein;

[0069] Figure 14 show a comparison between the results obtained using the improved subdivision method described herein and known subdivision methods;

[0070] Figure 15 is another example flowchart of an improved subdivision method and is a variation of the Figure 5 method shown;

[0071] Figure 16 is a schematic diagram showing the Figure 15 method;

[0072] Figure 17 is Figure 15 a flowchart of an additional preprocessing stage of the

[0073] Figure 18 shows an example result obtained using the Figure 15 method;

[0074] Figure 19 is a schematic diagram of an exemplary GPU pipeline; and

[0075] Figure 20 shows various components of an exemplary computing-based device that can be implemented as any form of computing and / or electronic device and can be configured to implement the improved subdivision methods described herein.

[0076] Common reference numerals are used throughout the drawings to indicate like features. Detailed Description

[0077] The embodiments of the present invention are described below only by way of example. These examples represent the best ways currently known to the applicant for practicing the present invention, although they are not the only ways in which the present invention can be implemented. The description sets forth the functions of the examples and the order of steps for constructing and operating the examples. However, the same or equivalent functions and orders can be implemented by different examples.

[0078] There are a variety of known subdivision methods that use an edge subdivision factor (TF), which defines each edge of a patch (e.g., a quadrilateral or triangle) and determines how many times the edge (and thus the patch) should be subdivided. Figure 1 shows how the triangles produced thereby differ when using different edge subdivision factors, but the same subdivision factor for each edge.

[0079] In Figure 1 the first four examples (a)-(d) show:

[0080] (a) Integer division, with edge TF = 3 for all four edges

[0081] (b) Integer division, with edge TF = 4 for all four edges

[0082] (c) Power-of-two integer division, with edge TF = 3 for all four edges

[0083] (d) Quadratic power integer division, for all four sides, side TF = 4

[0084] Using integer division and quadratic power integer division, the vertices along each side are always evenly spaced; however, unwanted visual artifacts (such as those explained below) are very likely to occur where the subdivision level changes and the triangles are not very small, but making the polygons so small is undesirable when small polygons incur additional rendering overhead. This effect is particularly dynamic for quadratic power integer division because the step size can be much larger.

[0085] In Figure 1 the last four examples (e)-(h) in show (different from examples (a)-(d)) a fractional division method that produces vertices at varying offsets:

[0086] e) Odd fractional division, for all four sides, side TF = 3.0

[0087] f) Odd fractional division, for all four sides, side TF = 4.0

[0088] g) Even fractional division, for all four sides, side TF = 3.0

[0089] h) Even fractional division, for all four sides, side TF = 4.0

[0090] When choosing a subdivision method, other considerations include not only the number of triangles produced for a given combination of edge subdivision settings (since the rendering cost of the subdivided model depends in part on the number of triangles), but also the aspect ratio of those triangles. In general, a graphics system (software or hardware) will render an "equilateral" triangle that implies the minimum perimeter-to-area ratio for a given screen area (i.e., screen pixels) faster than it will render a (long and thin) triangle with the same area but a higher perimeter-to-area ratio. Additionally, when values (such as the result of shading) are calculated at vertices and then interpolated across triangles, triangles with a more equilateral shape should result in fewer artifacts.

[0091] Another consideration is the complexity of the algorithm for the pattern used to generate the triangles. If the algorithm can be kept simple and / or regular (e.g., without many "special cases" that need to be handled differently), this can reduce the hardware or software implementation cost.

[0092] The last desirable consideration is rotational / reflection symmetry in the subdivision pattern. For example, it would be preferred to use a quadrilateral patch defined with vertices given in, say, clockwise order ABCD and appropriate subdivision factors to produce the same final triangle mesh as an "equivalent" quadrilateral with vertices listed as BCDA. Some existing subdivision schemes do not guarantee this property (e.g., see in Figure 1in the "odd" subdivision method in examples (e) and (f).

[0093] In this description, a surface patch refers to a generally finite N - dimensional surface (or in the case of an isoline, an N - dimensional curve segment) that is the result of applying a parametric mapping function to a bounded 2D domain, which is a quadrilateral or a triangle (or in the case of an isoline, a 1D line segment). The resulting surface or isoline can be considered N - dimensional because it can include not only the 3 (or 4) dimensions for Cartesian (or homogeneous) space positioning, but also other parameters such as texture coordinates. As described above, surface patches can be bent to conform to the surface of the object they represent and / or have displacement mapping applied. However, subdivision (i.e., the re - division of patches) is not performed in "natural space" (i.e., it is not performed on the bent surface patches) but instead in the domain space (which can also be called the parametric space or parameter space), where any position in the domain can be described by two coordinates (u, v) called domain - space coordinates, which means that the subdivision process is independent of any curvature present in the final surface.

[0094] An improved subdivision method is described herein, and when describing this subdivision method, the term "patch" is used to refer to an ordered set of two, three, or four vertices (for isolines, triangles, or quadrilaterals respectively) that form the boundaries of a domain. The term "domain" thus refers to the two - dimensional space bounded by the vertices of the patch. The term "vertex" is generally used to describe a position plus other attributes, where these attributes vary depending on the context. For example, input control points and output vertices from a domain shader include 3D position plus other parameters such as normal, tangent, texture, etc., while vertices within the subdivider (i.e., vertices used within the subdivision method) include domain - space coordinates and vertex subdivision factors. These vertices within the subdivider are thus not the same as the input control points or the resulting N - dimensional vertices that form the final triangles.

[0095] An improved subdivision method is described herein that does not use edge subdivision factors but instead uses subdivision factors defined for each corner vertex of a quadrilateral or triangle or each end vertex of an isoline. These subdivision factors are called "vertex subdivision factors" to distinguish them from the edge subdivision factors used in the known methods described above. As described in detail below, when any vertex subdivision factor of a patch exceeds a specified threshold, subdivision (i.e., the re - division of the patch) occurs. When new vertices are added, these divide the edges into two parts (where in various examples, these two parts can be equal, such that the edge is bisected), and the method acts recursively on triangular patches.

[0096] The improved subdivision method described herein addresses one or more (and in various examples, all) of the following problems that occur in known subdivision methods:

[0097] · Snapping - A large number of finely divided effects that appear instantaneously. This can not only cause temporary visual artifacts in the animation, but also lead to discontinuous rendering times. This is especially a problem for "power-of-two" methods (such as examples (c) and (d) in Figure 1 ).

[0098] · Tearing - The subdivision of edges at the boundaries needs to be consistent to avoid T-junctions. After applying displacement mapping, any T-junctions will almost certainly result in the appearance of cracks through which the viewer can see through the object.

[0099] · Floating - Moving the positions of vertices in the domain space according to the subdivision factor of the vertices results in geometric structures that appear to shimmer or "float" when the amount of displacement changes.

[0100] · Under- / Over-subdivision - For example, a subdivision factor of 32 requires the edges to be subdivided into 32 segments. Less than this can result in the mesh not being refined enough to model the scene. More than this can result in the mesh being too refined and using too much computation.

[0101] · Skinny triangles - Rendering skinny triangles can result in more aliasing artifacts and be computationally expensive because the rendering cost of a triangle depends not only on its screen pixel area but also, to some extent, on the length of its perimeter in screen pixels. Therefore, rendering a patch represented by N "near-equilateral" triangles is usually more efficient than the same patch represented by N "long and skinny" triangles, especially when the skinny triangles disappear as the LOD changes and are essentially redundant. Therefore, the method described below aims to maximize the square root of the minimum area-to-perimeter ratio (RootArea toPerimeter Ratio).

[0102] · Space / Time Complexity - Any subdivision method should ideally be simple and highly parallel and minimize the time and space complexity (i.e., the time taken to perform the rendering and the amount of storage required to implement the algorithm). It must also not add too many bits to the size of the vertices, as this increases the memory requirements. Space and time complexity also affect the physical area of the hardware required to perform the subdivision.

[0103] Specifying the TF at the corners of the patch results in fewer sudden changes in the size and shape of the resulting triangles within the subdivided patch because the splitting of the edges is not fixed (i.e., to the value specified by the edge TF), but instead is determined by the vertex TF at each end of the edge, and smoothly changes not only along the original edge (in the 1D direction in parametric space) to produce a gradual transition between subdivision levels, but also, in combination with other TFs, allows it to change smoothly across the patch in the 2D direction. This is illustrated graphically in Figure 2 .Figure 2 It shows the difference between the subdivision factors defined at the edges (illustrated as 202) and the subdivision factors defined at the corners (or vertices, illustrated as 204) in the domain space using known methods. The first figure 202 shows the result of the defined quadratic power across the edges in the case of two quadrilaterals with edge subdivision factors of 2 and 4. The second figure 204 uses the method described below and vertex subdivision factors of 2 (for vertices 206, 208) and 4 (for vertices 210 - 216).

[0104] In Figure 3 and Figure 4 additional examples with various integer and fractional subdivision factors for quadrilateral and triangular patches are shown. Note that, for comparison purposes only, in the examples, the given digital vertex subdivision factors approximately equally adopt the base - 2 logarithm of the factors in known edge - based subdivision schemes. The text below each example shows the vertex subdivision factors in the following order: for quadrilateral patches (upper - left, upper - right, lower - left, lower - right) and for triangular patches (top, lower - left, lower - right). From these examples, it can be seen that there is a gradual transition between the subdivision levels within the patch, no long - thin triangles are created, and the vertices are placed at their final positions in the domain space and do not move when the LOD increases (they only appear or disappear at fixed positions in the domain space).

[0105] As described below, together with the vertex - based subdivision factors, this improved subdivision method minimizes (or eliminates) unwanted visual artifacts because each vertex (e.g., each new vertex added as part of the subdivision into triangles) is always added at its final position in the domain space. As a result, when the level of detail (and thus the TF) changes, the vertices do not "slide" across the surface as in some prior arts, which can cause floating / wobbling artifacts.

[0106] Figure 5 is a flowchart of the improved subdivision method. The method starts when a patch (referred to as the input patch) is fed into the subdivider. The subdivider (which can be a hardware subdivider) receives the input patch (block 502), where this input patch can be a triangular patch 602, a quadrilateral patch 604, or a contour patch 606, as Figure 6 shown. Although the quadrilateral patch 606 is a square in the domain space (vertices are (0,0), (1,0), (0,1), and (1,1)), the shape it represents in the natural space (i.e., within a 3D or 2D environment) can be a different shape. As mentioned above, the subdivision is performed in the domain space rather than in the natural space.

[0107] If the input patch is a triangular patch or a quadrilateral patch, the patch undergoes a "preprocessing" phase (block 504) before the subdivision algorithm is recursively applied to the triangular patches (block 506) within the input patch. The preprocessing phase is used to ensure that the subdivision is independent of orientation, and thus, contour patches 606 are not required (since the algorithm works symmetrically and so there is no orientation dependence of any resulting subdivisions).

[0108] If the input patch is a triangular patch 602, the preprocessing phase (block 504) outputs either a triangular patch 602 (which is the same as the input triangular patch and where no subdivision is required) or three triangular patches 608 - 610. If the input patch is a quadrilateral patch 604, the preprocessing phase (block 504) outputs four triangular patches 612 - 615. If the input patch is a contour patch, no preprocessing is required (for the reasons stated above) and the subdivision algorithm is recursively applied to the input contour patch (block 508).

[0109] Figure 7 - 10 The stages of the improved subdivision method are shown in more detail. The method as described uses the following notations:

[0110] ·THRES – The threshold for subdivision, which can be set, for example, to 0.0 or 0.5, where the vertex TF is the value of the amount of subdivision to the base - 2 logarithm.

[0111] ·VERTEX.TF – The subdivision factor for a vertex, which can be any real number (although in various examples, any negative value can be forced to zero so that the subdivision factor is a non - negative real number). In various examples, the vertex TF is at least 0.0 (no subdivision) and at most 6.0 (maximum subdivision), where the value of the amount of subdivision to the base - 2 logarithm, for example, a subdivision factor of 5.0 corresponds to 32 refinements. However, in other examples, the maximum vertex TF can exceed 6.0 (or 64 where the base - 2 logarithm is not used).

[0112] ·INTERVAL – A non - zero amount by which VERTEX.TF decreases after each iteration, which can be set, for example, to 0.5, where the vertex TF is the value of the amount of subdivision to the base - 2 logarithm.

[0113] ·MEAN() – A symmetric function that gives the "average" of two, three, or four vertex subdivision factors. This can be the arithmetic mean or an alternative function, and one such alternative function is described in more detail below.

[0114] For the purposes of the following description, the vertex TF is the amount of the base-2 logarithm subdivision; however, it will be recognized that it can optionally be written as its actual full value, and in such a case, the calculation of the vertex TF and the values of the parameters THRES and INTERVAL set forth below will be modified accordingly. However, because hardware implementation is much faster where the base-2 logarithm is used, in an example where the input to the subdivider includes the actual vertex TF (rather than using the base-2 logarithm), the input vertex TF can be converted to the base-2 logarithm before implementing the improved subdivision method described herein.

[0115] Figure 7 is a flowchart of the preprocessing stage 504 of the triangular input patch 602, and as Figure 6 shown, the vertices of the triangular patch can be labeled "TOP", "RIGHT", and "LEFT". Which vertex is "up" is an arbitrary choice, and this preprocessing stage ensures that the algorithm is rotationally and reflectively symmetric (i.e., such that the same subdivision result is achieved regardless of the order in which the vertices are considered in this preprocessing stage).

[0116] As Figure 7 described, when the triangular patch (TOP, RIGHT, LEFT) 602 is fed into the subdivider and any vertex subdivision factor is greater than the threshold, THRES (a "yes" in block 702) subdivision occurs. A new vertex 616, denoted as "MID", is formed at the center of the triangle (e.g., at the centroid) (block 704), and the vertex TF of the new MID vertex is calculated (in block 706) as:

[0117] MID.TF = MEAN(TOP.TF, LEFT.TF, RIGHT.TF) (1)

[0118] where MID.TF is the vertex TF of the MID vertex, TOP.TF is the vertex TF of the TOP vertex, LEFT.TF is the vertex TF of the LEFT vertex, and RIGHT.TF is the vertex TF of the RIGHT vertex. All four subdivision factors (i.e., TOP.TF, LEFT.TF, RIGHT.TF, and MID.TF) are then decreased by the parameter INTERVAL (i.e., by subtracting INTERVAL, where the base-2 logarithm notation is used) because some subdivision has occurred (block 708).

[0119] Three triangular patches (MID, RIGHT, LEFT) 610, (MID, LEFT, TOP) 609, and (MID, TOP, RIGHT) 608 are then formed (block 710), and it is these triangular patches that are subdivided (in block 506) using the subdivision algorithm described below.

[0120] If none of the vertex subdivision factors is greater than the threshold THRES (the "no" in block 702), then no subdivision occurs. In this case, the patch simply passes through the subdivider as a primitive (block 712) so that the method does not over-subdivide.

[0121] Figure 8 is a flowchart of the preprocessing stage 504 of the quadrilateral input patch 604, and as Figure 6 shown, the vertices of the quadrilateral patch can be labeled "TLEFT (or top left)", "TRIGHT (or top right)", "BRIGHT (or bottom right)", and "BLEFT (or bottom left)". Which vertices are "up" and which are "down" is an arbitrary choice, and this preprocessing stage ensures that the algorithm is rotationally and reflectively symmetric (i.e., such that the same subdivision result is achieved regardless of the order in which the vertices are considered in this preprocessing stage).

[0122] As Figure 8 described, when the quadrilateral patch (TLEFT, TRIGHT, BLEFT, BRIGHT) 604 is fed into the subdivider, a new vertex 618 denoted "MID" is formed at the center of the quadrilateral, i.e., at the domain space coordinates (0.5, 0.5) (block 804), and the vertex TF of the new MID vertex is calculated (in block 806) as:

[0123] MID.TF = MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) (2)

[0124] where MID.TF is the vertex TF of the MID vertex, TLEFT.TF is the vertex TF of the TLEFT vertex, etc. All five subdivision factors (i.e., TLEFT.TF, TRIGHT.TF, BRIGHT.TF, BLEFT.TF, and MID.TF) are then decreased by the parameter INTERVAL (i.e., by subtracting INTERVAL, where a base-2 logarithm notation is used) because some subdivision occurs (block 808).

[0125] Four triangular patches (MID, TLEFT, TRIGHT) 612, (MID, TRIGHT, BRIGHT) 613, (MID, BRIGHT, BLEFT) 614, and (MID, BLEFT, TLEFT) 615 are then formed (block 810), and it is these triangular patches that are subdivided (in block 506) using the subdivision method described below.

[0126] Figure 9is a flowchart of recursively applying an algorithm to each of the three or four triangular patches output by a preprocessing stage, and this can be referred to Figure 10 The triangle shown. As Figure 10 shown, a triangular patch is an ordered set of three vertices (TOP, RIGHT, LEFT) in a clockwise direction. Note that the first vertex is always the "TOP" vertex, and for the initial triangular patch (as output by the preprocessing stage), this "TOP" vertex corresponds to the "MID" vertices 608, 618 added during preprocessing (blocks 704, 804).

[0127] As Figure 9 shown, given a triangular patch 1000 (which is the initial patch 900 in the first iteration), subdivision occurs if and only if the following holds:

[0128] LEFT.TF > THRES or RIGHT.TF > THRES (3)

[0129] where LEFT.TF is the vertex TF of the LEFT vertex, and RIGHT.TF is the vertex TF of the RIGHT vertex ("yes" in block 902).

[0130] If LEFT.TF > THRES or RIGHT.TF > THRES ("yes" in block 902), then a new vertex MID 1002 is formed (in block 904), which divides the edge LEFT->RIGHT into two parts in the domain space (indicated by arrow 1004). The vertex subdivision factor of the new MID vertex is then calculated (in block 906) as:

[0131] MID.TF = MEAN(LEFT.TF, RIGHT.TF) (4)

[0132] where MID.TF is the vertex TF of the MID vertex, LEFT.TF is the vertex TF of the LEFT vertex, and RIGHT.TF is the vertex TF of the RIGHT vertex. For the sake of agreement, the vertices LEFT and RIGHT of the edge where MID is subdivided are denoted as the "father" of MID.

[0133] In many cases, the new vertex MID is added as the bisector of the edge LEFT->RIGHT in the domain space. However, in other cases, the new vertex MID can be added at a position on the edge LEFT->RIGHT in the domain space but not necessarily bisect it exactly. In various cases, the position of MID along the edge can be weighted, for example, using the vertex TF of the parent vertices.

[0134] Two sub-triangle patches (MID, LEFT, TOP) 1006 and (MID, TOP, RIGHT) 1008 are formed (blocks 908 and 910), and all subdivision factors in each of the triangle patches 1006, 1008 are decreased by the parameter INTERVAL (block 912, i.e., by subtracting INTERVAL, where base-2 logarithmic notation is used). The method then recurses on each of these patches. When the method is executed on the triangle patches created in block 908 or block 910, the "TOP" vertex corresponds to the "MID" vertex 1002 that was added (in block 904) to create the patch, and the "TOP" vertex of the parent patch will be different (e.g., patch 1000 can be considered the father of patches 1006 and 1008, and the "TOP" vertex 1010 of 1000 is different from the "TOP" vertex 1002 of each of patches 1006 and 1008).

[0135] If no subdivision occurs at any stage ("no" in block 902), the primitive (which is a patch) is added to the buffer (block 914), e.g., to an index buffer.

[0136] As described above, Figure 9 the method is applied to each of the three or four triangle patches produced by the preprocessing stage (block 504) and recursively applied to any patches created by the subdivision of those initial patches.

[0137] Because the vertex subdivision factors are finite and INTERVAL is constant and non-zero, eventually all vertex subdivision factors (in all triangle patches) will be at most THRES and the process will terminate.

[0138] As can be seen in Figure 10 the most recently added MID vertex is the vertex in these two patches that are formed (in blocks 908 and 910), and in these two patches, this vertex is considered the "TOP" vertex. When recursing into two sub-patches, the current value of the vertex subdivision factor of the most recently added MID vertex must be used. In an example implementation that can be ensured by duplicating vertex TFs for each sub-patch or having a final step to the algorithm, where for any patch and after recursing on its two sub-patches, each vertex TF is incremented by the parameter INTERVAL.

[0139] In Figure 9 the same algorithm used in can also be applied to contour patches (in block 508), although as described above, no preprocessing is required, and in the case of contour patches, the algorithm is applied to lines (i.e., contours and sub-contours) rather than triangles as can be referenced Figure 6 as described.

[0140] If the isocontour patch (LEFT, RIGHT) 606 is fed into the subdivider (as the initial patch 900), then if LEFT.TF or RIGHT.TF is higher than THRES (the "yes" in block 902), the line is subdivided. If LEFT.TF or RIGHT.TF is higher than THRES (the "yes" in block 902), then a new MID vertex 620 is added that subdivides (e.g., bisects) the LEFT->RIGHT isocontour 606 in domain space (block 904). The vertex TF of the most recently added MID vertex is calculated (in block 906) as:

[0141] MID.TF = MEAN(LEFT.TF, RIGHT.TF) (5)

[0142] where MID.TF is the vertex TF of the MID vertex, LEFT.TF is the vertex TF of the LEFT vertex, and RIGHT.TF is the vertex TF of the RIGHT vertex.

[0143] The addition of the MID vertex 620 divides the original isocontour 606 into two sub-isocontours 622, 624 (formed in blocks 908 and 910), and each vertex TF is decreased by 2*INTERVAL (in block 912, i.e., by subtracting 2*INTERVAL, where a base-2 logarithmic notation is used) - note that this decreases the vertex TF faster than the correct amount for subdivision of a triangular patch. The method then recurses on each of these sub-isocontours and terminates when all vertex subdivision factors are at most THRES.

[0144] The improved subdivision method described above uses the MEAN() function. While this can be the arithmetic mean of the vertex subdivision factors in some cases, which would result in a smooth introduction of geometry when moving from one vertex to another, such a function will often result in T-junctions occurring and thus breakage for certain values of the vertex TF (e.g., when the difference in vertex TF across the patch is quite extreme). Therefore, in many cases, the following alternative function is used for MEAN():

[0145] MEAN(TF1, TF2, …) = MIN(AVG(TF1, TF2, …), MIN(TF1, TF2, …) + INTERVAL) (6)

[0146] where AVG() is the arithmetic mean of the list of values within the parentheses (e.g., vertex TF1, vertex TF2, … in the example above), and MIN() is the minimum value in the list of values within the parentheses (e.g., vertex TF1, vertex TF2, … in the example above).

[0147] The MEAN() function given above is the function that ensures the closest arithmetic mean without breaks, and this can be shown as described below.

[0148] As described above, T-junctions within a subdivision can cause breaks, and it may therefore be desirable to ensure that no T-junctions can occur within the interior of a domain or along an edge shared by two domains. The improved subdivision method described herein ensures this by guaranteeing that the subdivision of any edge is uniquely defined by the subdivision factors of the end vertices of the edge (and not by others). Thus, if an edge is shared by two domains (i.e., two adjacent domains), the domains share its two end vertices (and their vertex subdivision factors), and the same subdivision will result.

[0149] As described above, subdivision occurs only when the end vertex subdivision factor exceeds a threshold, so no additional subdivision can occur. The only possible problem is if, due to the level of previous subdivisions not occurring earlier, the subdivision does not occur when it should, and therefore, to avoid this problem, the following condition must be satisfied (which refers to the triangular patch 1000 with vertices marked as shown in Figure 10 ):

[0150] The required subdivision on the TOP->LEFT edge implies the subdivision that occurs on the LEFT->RIGHT edge

[0151] i.e., (TOP.TF>THRES or LEFT.TF>THRES)

[0152] =>(LEFT.TF+INTERVAL>THRES or RIGHT.TF+INTERVAL>THRES)

[0153] This condition, without loss of generality, considers only the left-hand side due to symmetry.

[0154] It can then be shown that the MEAN() function specified above satisfies this condition:

[0155] Case 1: If LEFT.TF>THRES then LEFT>TF+INTERVAL>THRES

[0156] Case 2: TOP.TF>THRES has the following two sub-cases:

[0157] Case 2.1 (TOP is the middle vertex of the patch as shown in the patch 1000 in Figure 10 and this corresponds to vertex 616 or 618 in Figure 6 ), i.e., TOP.TF = MEAN(LEFT.TF, RIGHT.TF,...)), thus

[0158] THRES<TOP.TF

[0159] = MIN(AVG(LEFT.TF, RIGHT.TF, …), MIN(LEFT.TF, RIGHT.TF, …) + INTERVAL)

[0160] <= MIN(LEFT.TF, RIGHT.TF, …) + INTERVAL

[0161] <= LEFT.TF + INTERVAL

[0162] Therefore, LEFT.TF + INTERVAL > THRES.

[0163] Case 2.2 (TOP is generated by the subdivision of LEFT and is an end vertex, as shown in the Figure 11 patch 1100 in, where TOP 1102 is generated by the subdivision of the edge LEFT -> OTHER, i.e., TOP.TF = MEAN(LEFT.TF, …)), so

[0164] THRES < TOP.TF

[0165] = MIN(AVG(LEFT.TF, …), MIN(LEFT.TF, …) + INTERVAL)

[0166] <= MIN(LEFT.TF, …) + INTERVAL

[0167] <= LEFT.TF + INTERVAL

[0168] Therefore, LEFT.TF + INTERVAL > THRES.

[0169] In case 2.2, the same logic can be applied to TOP.TF = MEAN(RIGHT.TF, …) (which corresponds to the reflection shown in the Figure 11 to obtain RIGHT.TF + INTERVAL > THRES as desired. It should also be noted that the choice of the function is optimal because any function that exceeds the minimum plus INTERVAL will not always satisfy these inequalities. Therefore, the MEAN() function cannot be any function closer to the arithmetic mean.

[0170] By using the base - 2 logarithm notation and an example of subdividing the quadrilateral 1202 with THRES = 0.0 and INTERVAL = 0.5 and subdivision factors (2, 1, 1, 1) as shown in the Figure 12 to further describe the improved subdivision method. In the pre - processing stage (blocks 504 and Figure 8) In it, an intermediate vertex 1204 with a subdivision factor of 1.25 (the arithmetic mean calculated in block 806) is added (in block 804). Four triangular patches are formed (in block 810), with the intermediate vertex as the upper vertex of each patch, and each TF is reduced by 0.5 (in block 808, which can be performed before or after block 810), as shown in the second example 1206 in Figure 12 as shown.

[0171] In the first recursion on each triangular patch (blocks 506 and Figure 9 ), each lower edge is subdivided (in block 902 because 0.5 is higher than the threshold THRES = 0.0), and four new vertices (with new vertex TF) and eight new patches are formed (in blocks 904 - 910), as shown in the third example 1208 in Figure 12 as shown. All subdivision factors are then reduced by 0.5 - the value of INTERVAL (in block 912) as shown in the fourth example 1210 in Figure 12 as shown.

[0172] In the next recursion on each of the eight triangular patches, each lower edge of each of the eight patches is subdivided (in block 902 because 0.25 is higher than THRES) by adding new vertices, calculating the vertex TF of those new vertices, and forming 16 new patches as shown in the fifth example 1212 in Figure 12 as shown. All subdivision factors are then reduced by 0.5 again (in block 912), and in another recursion, the last two subdivisions are performed (as shown in the last example 1214 in Figure 12 as shown), where only the top - left vertex subdivision factor (0.5) is higher than the threshold. After this step, all vertex subdivision factors are at most 0 (and as Figure 12 shown, the vertex TF can be negative) and the process terminates.

[0173] Because the improved subdivision method described above processes each patch independently, it can be implemented with a high degree of parallelism. As with any subdivision method, vertices shared along the domain boundary can be cached so that they are not replicated. Since the method is recursive, the amount of chip (e.g., silicon) space and required memory is minimal. The following outlines example requirements:

[0174]

[0175]

[0176] The additional vertex members required by the proposed method are the fixed-point subdivision factors for each input vertex. M is the current size of the output vertex buffer, and α() is some function of M, depending on how the buffer is constructed. α() is generally some number between log(M) and M.

[0177] As described above, when rendering equilateral triangles or those triangles with a high square root of the area-to-perimeter ratio, the minimum number of loops to be rendered is achieved. Similarly, worst-case performance occurs when the square root of the area-to-perimeter ratio vanishes, e.g., as the triangle deteriorates. For a given triangle patch with side lengths a, b, and c, the proposed method produces at most four different categories of triangles (up to similarity) A (with sides in the ratio a:b:c), B (with sides in the ratio a:d:c / 2), C (with sides in the ratio d:b:c / 2), and D (with sides in the ratio a / 2:b / 2:d), as Figure 13 shown. In the case where the patch is an isosceles (i.e., a = b), then B is similar to C, and thus there are only three categories. If the patches are all isosceles and at right angles at the top vertex, there is complete similarity (i.e., only a single category of triangles). In all cases, the number of triangle categories is finite; thus the minimum square root of the area-to-perimeter ratio is bounded and cannot vanish unless the patch itself deteriorates. In contrast, many known subdivision methods have no lower bound on the square root of the area-to-perimeter ratio, and triangles that actually vanish occur in large numbers.

[0178] Figure 14 shows a comparison between the results obtained using the improved subdivision method described herein and a known subdivision method - odd-fraction splitting (as described above with reference to Figure 1 ). Eight separate comparisons 1401 - 1408 are shown, and for each comparison, the result obtained using the improved subdivision method is shown on the left, while the result obtained using odd-fraction splitting is shown on the right.

[0179] As shown in the first comparison 1401, the improved subdivision method starts with two more primitives than odd-fraction splitting to ensure that the subdivision is independent of orientation. As described above, these four triangle primitives are generated in the preprocessing stage (block 504). The subdivision using the algorithm in the improved subdivision method (in block 506) starts by dividing two patches into similar triangles, as shown in the second comparison 1402. In contrast, in odd-fraction splitting (shown on the right), the subdivision starts by adding 12 new thin triangles and then adding many more triangles, all of the new thin triangles being almost redundant (since they are so thin that almost the entire domain consists of just two primitives, as clearly visible in the second comparison 1402, which means that these thin triangles do not add any detail to most of the domain after shifting), as shown in comparison 1403.

[0180] As shown in subsequent comparisons 1403 - 1408, the improved subdivision method continues to add similar triangles of half the area to approximate the increase in the subdivision factor. The odd - fraction subdivision continues to add overly many initially redundant thin triangles to achieve the same effect. The improved subdivision method introduces vertices that do not move in the domain space. Instead, in the odd - fraction subdivision, vertices start on top of the old vertices and grow outwards into the appropriate positions, and thus, the geometry looks wavy. The improved subdivision method stabilizes within the cross - shaped pattern as shown in the final comparison 1408, while the odd - fraction subdivision continues to add entire rows and columns of vertices at each odd LOD / TF, which in turn moves all vertices in the domain space.

[0181] It may sometimes be desirable to allow the user to specify the center TF of a patch, which is different from the corner vertex TFs of the center of the patch at the LOD, especially in animations. For example, this can be used to better approximate a height map related to a texture over a quadrilateral or triangular patch, e.g., if the map has a very rapid jump in the middle in the case of the spikes of an animal. Figure 15 Shows a variation of the method of Figure 5 (as described above) that adds another optional pre - processing stage (block 1502) that implements the use of the center TF of a quadrilateral or triangular patch. As Figure 15 shown, this additional pre - processing stage (in block 1502) is implemented before the pre - processing stage described above (in block 504) and divides the input patch (which can be quadrilateral or triangular). Unlike the original pre - processing stage (block 504), the additional pre - processing stage (block 1502) can also be applied to isolines; however, it is less useful in this context. In the case of isolines, the isolines are subdivided and the newly added intermediate vertices are assigned the center TF. The subdivision then continues as described above on two sub - isolines (e.g., LEFT - MID and MID - RIGHT).

[0182] Reference may be made to Figure 16 and 17 for a description of the additional pre - processing stage (block 1502). Figure 16 A schematic diagram showing the application of the stage to a quadrilateral input patch 1602 or a triangular input patch 1604, and Figure 17 a flowchart showing the additional pre - processing stage. In the case where the center subdivision factor is enabled, the user must provide the per - patch center TF as well as the vertex TFs of each corner vertex (three for a triangular patch and four for a quadrilateral patch) to the subdivider.

[0183] As Figure 16As shown, an additional preprocessing stage divides the quadrilateral input patch 1602 into four quadrilateral patches 1606 - 1609 and divides the triangular input patch 1604 into three quadrilateral patches 1610 - 1612. To achieve this, preprocessing the quadrilateral input patch 1602 requires adding five new vertices (block 1702): a central vertex 1614 with a central TF (shared by all four sub - domains 1606 - 1609), an upper - middle vertex 1616, a right - middle vertex 1618, a lower - middle vertex 1620, and a left - middle vertex 1622. For each newly added vertex, their subdivision factors are calculated (in block 1706) by taking the MEAN() of the adjacent corner TFs of the newly added vertex. In various examples, the MEAN() function given by equation (6) can be used because it results in a more consistent subdivision pattern; however, in other examples, the arithmetic mean can be used.

[0184] Preprocessing the triangular input patch 1604 requires adding four new vertices (block 1704): a central vertex 1624 with a central TF (shared by all three sub - domains), a right - middle vertex 1626, a lower - middle vertex 1628, and a left - middle vertex 1630. For each newly added vertex, their subdivision factors are given by taking the MEAN() of the adjacent corner TFs of the newly added vertex (as calculated in block 1706). As described above, in various examples, the MEAN() function given by equation (6) can be used because it results in a more consistent subdivision pattern; however, in other examples, the arithmetic mean can be used.

[0185] The last stage of the additional preprocessing stage (block 1708) reduces each subdivision factor, and in various examples, each TF is reduced by 2*INTERVAL. This reduction of the TF (before the original preprocessing stage input to block 504) ensures the correct number of refinements are made on each boundary edge of the patch and indicates that the subdivision has occurred.

[0186] After the original input patch is subdivided into three or four quadrilateral patches, in the additional preprocessing stage (block 1502), these three or four quadrilateral patches (with their vertex TFs as calculated in block 1708) are input to the original preprocessing stage (block 504) as if they were the original input patch, and the method continues as described above. Figure 18 Shows various example subdivisions that can be obtained using Figure 15 the method.

[0187] Due to the additional preprocessing stage (blocks 1502 and Figure 17)The fact that each domain edge is subdivided at least once means that any single connected mesh should be fully subdivided with or without a central TF, even with a TF of 0.0, to ensure that no cracks occur (i.e., all patches in a single connected network should use the same method, i.e., they should all use the method of Figure 5 or the method of Figure 15 , and there are no input patches using the method of Figure 5 and other input patches using the method of Figure 15 ).

[0188] The improved subdivision methods described herein address one or more of the above-described problems that arise in known subdivision methods. In various examples, the improved subdivision methods can address many or all of the problems detailed above, as follows:

[0189] · No sudden moves - Using the improved subdivision method, the geometry increases in small increments as the subdivision factor increases to produce a smooth transition. This helps with the prediction of rendering times.

[0190] · No cracks - As shown above, the improved subdivision method does not produce T-junctions within or along the boundaries of the domain.

[0191] · No floating - As the subdivision factor increases, each vertex introduced by the subdivider maintains its domain space position and thus there are no "floating" artifacts.

[0192] · No over / under-subdivision - The integer vertex subdivision factor t at each end of an edge corresponds to 2 t subdivisions. Additionally, the average vertex subdivision factor of t on a quadrilateral roughly corresponds to 2 2t vertices and up to twice as many primitives (which are the smallest). Similarly, a triangular patch corresponds to vertices and up to twice as many primitives.

[0193] · No thin triangles - As described above, the improved subdivision method produces only four (or fewer) categories of triangles per patch, and this limits the minimum value of the square root of the ratio of per-patch area to perimeter.

[0194] · Space / time complexity - The algorithm is recursive (as Figure 9 shown), and each subdomain / patch that supports a fair amount of parallelism can be processed independently. The input vertices require an additional fixed-point value for the vertex subdivision factor.

[0195] Additionally, the improved subdivision methods described herein have the following additional characteristics in various examples:

[0196] ·Orientation independent - By dividing the patch into a fan of triangular patches with the mid vertex as the apex of each (in the preprocessing stage, block 504), no choice is made about the orientation of the triangles, so the same subdivision will always be produced.

[0197] ·N - sided polygons - The improved subdivision method can be easily adapted to support any polygon patch with N sides by dividing the patch into a fan of triangles (in a variation of the preprocessing stage 504). In each case, for an average subdivision factor t, the method will produce approximately vertices and up to twice as many primitives.

[0198] Although the above examples (e.g., in Figure 5 ) show that the improved subdivision method is implemented for triangle, quadrilateral, and contour patches, it will be recognized that the method can be implemented for only a subset of those patches (e.g., only for quadrilateral patches, only for triangle patches, or only for quadrilateral and triangle patches).

[0199] Although Figure 5 shows an improved subdivision method that includes a preprocessing stage (block 504) and a recursive application of the subdivision algorithm (in blocks 506 and 508), it will be recognized that Figure 9 the method shown can optionally be implemented independently without the preprocessing stage (block 504 and as shown in Figure 7 and Figure 8 ), or optionally, the preprocessing stage (block 504) can be implemented in a different way than that shown in Figure 7 and Figure 8 ). Similarly, in the case of using a central subdivision factor (as shown in Figure 15 ), the method can be implemented without the preprocessing stage (block 504 and as shown in Figure 7 and Figure 8 ), or optionally, the preprocessing stage (block 504) can be implemented in a different way than that shown in Figure 7 and Figure 8 ).

[0200] In another variation of the improved subdivision method described above, the vertex subdivision factors can be represented differently, i.e., by transforming them by one or more scalings, translations, or other transformations. The resulting updated vertex subdivision factors (e.g., in blocks 708, 808, and 912) are thus different from subtracting INTERVAL. For example, vertex TF can be represented by raising two to their power and dividing by the square root of two. More generally, for any F(x) - an invertible function on the real numbers, the subdivision factor TF' can be given by TF' = F(TF). Instead of subtracting INTERVAL, the following functions can be used to update vertex TF (as computed in blocks 708, 808, and 912):

[0201] TF’: = F(F -1 (TF’)-INTERVAL)

[0202] In this example, the test condition (instead of the condition given by Equation (3) above) will be TF’ > F(THRES) or TF’ < F(THRES), where the choice of inequality depends on whether F is order-preserving or order-reversing. By conjugating by F(), there is no semantic difference in the method.

[0203] In the example, if TF’ = F(TF) = 2 TF (i.e., no longer works in base-2 logarithms), then the function for updating vertex TF (e.g., in blocks 708, 808, and 912) will be:

[0204]

[0205] The test condition is then TF’ > 2 0 = 1, since 2 TF is order-preserving.

[0206] Although specific examples of the values of THRES and INTERVAL are provided in the above description, in other examples, different values of one or both of these parameters may be used.

[0207] In the above example, two possible functions MEAN() are described: the arithmetic mean and the MEAN() function given by Equation (6) above. In other example implementations of the improved subdivision method described herein, another function may optionally be used as the MEAN() function, which may be symmetric or asymmetric (although this will result in a loss of azimuth independence).

[0208] Although the above example uses a single value for each of THRES and INTERVAL and a single MEAN() function (e.g., the arithmetic mean and the MEAN() function given by Equation (6)), other examples may use multiple values of THRES and / or MEAN and / or multiple MEAN() functions.

[0209] In the improved subdivision method described above, if LEFT.TF or RIGHT.TF exceeds THRES, a new vertex is added (and in cases where “or” is used, e.g., in Equation (3), in its standard meaning, if one or both of LEFT.TF and RIGHT.TF exceed the threshold, a new vertex is added). In a variation of the above example, the subdivision may be performed only when both LEFT.TF and RIGHT.TF exceed THRES.

[0210] While in the improved subdivision method described above, new vertices are added if LEFT.TF or RIGHT.TF exceeds THRES (as in equation (3)), it should be recognized that in a variation of the method, new vertices can be added if LEFT.TF or RIGHT.TF exceeds or equals THRES.

[0211] In the above description, subdivision is described as being applied recursively (e.g., in blocks 506 and 508). However, in other examples, the method can be applied non - recursively. For example, it can be applied iteratively (performing a single level of subdivision on all current patches before performing the next level of subdivision on all resulting patches). In another example, another non - recursive method can be implemented, such as testing whether each vertex on a 65 - by - 65 grid should be included and then determining which primitives any included vertices are part of based on the position of the vertices.

[0212] In the example described above, the improved subdivision method is described as being performed in domain space. In another variation of the method, subdivision can optionally be applied outside of domain space.

[0213] The vertex TF input into the improved subdivision method can be generated by a separate application (e.g., based on the viewer's distance from each vertex, e.g., the vertex TF can be proportional to the reciprocal of the distance of the vertex from the eye). In various examples, an API can be provided that converts edge TF to vertex TF before inputting the edge TF into the method described herein (e.g., by averaging all the edge TFs of the edges meeting at the vertex).

[0214] The improved subdivision method described herein can be used to perform subdivision on - the - fly (e.g., when the viewpoint changes in a 3D scene), or optionally, the method can be used offline to pre - compute triangles for multiple different viewpoints.

[0215] The improved subdivision method described herein can be implemented in hardware. In various examples, the method can be implemented in a hardware subdivision unit within a graphics processing unit (GPU) as Figure 19 shown. Figure 19 A schematic diagram of an example GPU pipeline 1900 that can be implemented in the hardware within a GPU is shown. As Figure 19 shown, the pipeline 1900 includes a vertex shader 1902, which is responsible for performing each vertex calculation, including calculating the vertex subdivision factor for all of these (e.g., based on the position of the vertex relative to the camera). Before calculating the vertex TF, the vertex shader transforms the vertex into natural space and can apply one or more other linear transformations. The vertex shader 1902 is unaware of the mesh topology and only knows the current vertex fed to it.

[0216] Between the vertex shader 1902 and the hardware tessellation unit (or tessellator) 1904 (or between the vertex shader and an optional hull shader not shown in Figure 19 where the pipeline 1900 includes one or more optional hull shaders between the vertex shader 1902 and the tessellator 1904), patches (i.e., an ordered set of vertices) are constructed using a topology (where this can be a pre - built selection stored in the tessellator selected by the user prior to the draw call). This patch information is passed to the hull shader (where provided). However, the tessellator 1904 only takes the vertex TF, and the remaining patch information is passed on to the domain shader 1906.

[0217] The hardware tessellation unit (or tessellator) 1904 includes hardware logic that uses the received vertex TF to implement the improved tessellation method described above (e.g., as shown in Figure 5 , 7 -9, 15, and 17). Different from the vertex shader, the hardware tessellation unit (and any optional hull shader) operates per - patch rather than per - vertex. To simplify the hardware required to implement the equations for calculating the new vertex TF (e.g., in blocks 706, 806, 906, and 1706), the calculations can be performed in log2 (as in the example described above) and so can be implemented as addition and subtraction (or multiplication and division would be used). As described above, the hardware tessellation unit 1904 can be configured to perform aspects of the method described above in parallel (e.g., the recursions on different patches in blocks 506 and 608, e.g., as Figure 9 shown). The hardware tessellation unit 1904 outputs the domain - space coordinates of each new vertex and passes it to the domain shader 1906 (e.g., by storing the details of each patch in a buffer, as in Figure 9 block 914).

[0218] The domain shader 1906 acts as a second vertex shader for the vertices produced by the tessellator 1904 and is executed once per vertex (produced by the tessellator). The domain shader provides the domain - space position (u, v), gives all the patch information, and outputs the full vertex structure. The domain shader uses the patch control points and the domain - space coordinates to construct new vertices and apply any displacement mapping (e.g., by sampling some bump or height map encoded in a texture).

[0219] After the domain shader 1906 has run on each produced vertex of each patch, the vertices are passed to the rasterizer (not shown in Figure 19 ). Primitives (in the form of an index buffer) are passed from the tessellator to the rasterizer, one after the other.

[0220] Figure 19The GPU pipeline 1900 is shown only by way of example, and the improved tessellation method using vertex TF described herein can be used in any GPU architecture. It will also be recognized that the hardware tessellation unit 1904 can be used in the GPU pipeline, and in addition to or instead of the vertex shader 1902, the optional hull shader and domain shader 1906, the GPU also includes other shaders.

[0221] The improved tessellation method described above can optionally be implemented in software (or a combination of software and hardware). Figure 20 Shows various components of an exemplary computing-based device 2000 that can be implemented in any form as a computing and / or electronic device and configured to implement the tessellation method described above.

[0222] The computing-based device 2000 includes one or more processors 2002, which can be a microprocessor, a controller, or any other suitable type of processor for processing computer-executable instructions to control the operation of the device to perform the improved tessellation method described above. In some examples where, for example, a system-on-chip architecture is used, the processor 2002 may include one or more fixed-function blocks (also referred to as accelerators) that implement part of the improved tessellation method in hardware (rather than software or firmware). Platform software including an operating system 2004 or any other suitable platform software can be provided at the computing-based device to enable the application software 2006 to execute on the device, and the application software can include a tessellation module 2008. This tessellation module 2008 can, for example, include a preprocessing module (which implements Figure 5 or Figure 15 block 504), optionally an additional preprocessing module (which implements Figure 15 block 1502) and a recursive tessellation module (which implements Figure 5 or Figure 15 block 506 and / or 508).

[0223] Computer-executable instructions can be provided using any computer-readable medium accessible by a computing-based device 2000. The computer-readable medium can include, for example, computer storage media such as a memory 2010 and communication media. Computer storage media (i.e., non-transitory machine-readable media), such as the memory 2010, includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information such as computer-readable instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, RAM, ROM, EPROM, EEPROM, flash memory or other storage technology, CD-ROM, digital versatile discs (DVDs) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission media that can be used to store information accessible by a computing device. In contrast, communication media can embody computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transmission mechanism. As defined herein, computer storage media does not include communication media. Although computer storage media (i.e., non-transitory machine-readable media, such as the memory 2010) is shown within the computing-based device 2000, it should be understood that the memory can be distributed or located remotely and accessed via a network or other communication link (e.g., using a communication interface 2012).

[0224] The computing-based device 2000 can also include an input / output controller arranged to display information to a display device that can be separated from or integrated with the computing-based device 2000. The displayed information can provide a graphical user interface. The input / output controller can also be arranged to receive and process input from one or more devices such as user input devices (e.g., a mouse or keyboard). In an embodiment, the display device can also act as a user input device if it is a touch-sensitive display device. The input / output controller can also output data to devices other than the display device such as a locally connected printing device.

[0225] The terms “processor” and “computer” are used herein to refer to any device or portion thereof having processing capabilities such that it can execute instructions. The term “processor” can include, for example, a central processing unit (CPU), a graphics processing unit (GPU or VPU), a physics processing unit (PPU), a radio processing unit (RPU), a digital signal processor (DSP), a general-purpose processor (e.g., a general-purpose GPU), a microprocessor, any processing unit designed to accelerate tasks external to the CPU, and the like. Those skilled in the art will recognize that such processing capabilities are incorporated into many different devices, and thus the term “computer” includes set-top boxes, media players, digital radios, PCs, servers, mobile phones, personal digital assistants, and many other devices.

[0226] Those skilled in the art will recognize that storage devices for storing program instructions can be distributed across a network. For example, a remote computer may store examples of processes described as software. A local or terminal computer may access the remote computer and download a portion or all of the software to run the program. Alternatively, the local computer may download fragments of the software as needed or execute some software instructions at the local terminal and some instructions at the remote computer (or computer network). Those skilled in the art will also recognize that all or a portion of the software instructions may be implemented by dedicated circuitry (such as DSPs, programmable logic arrays, etc.) using conventional techniques known to those skilled in the art.

[0227] The methods described herein may be performed by a computer configured with software in machine-readable form stored on a tangible storage medium, such as in the form of a computer program including computer-readable program code for configuring the computer to perform the components of the method or in the form of a computer program including computer program code modules suitable for performing all steps of any method described herein when the program is run on a computer, and wherein the computer program may be embodied on a computer-readable storage medium. Examples of tangible (or non-transitory) storage media include magnetic disks, thumb drives, memory cards, etc., and do not include propagated signals. The software may be suitable for execution on a parallel processor or a serial processor such that the method steps may be performed in any suitable order or simultaneously.

[0228] The hardware components described herein may be produced by a non-transitory computer-readable storage medium having computer-readable program code encoded thereon.

[0229] The intent also includes software that "describes" or defines the configuration of hardware that implements the modules, functions, components, or logic described above, such as HDL (Hardware Description Language) software, such as that used for designing integrated circuits or for configuring programmable chips to implement the desired functions. That is, a computer-readable storage medium can be provided having stored thereon computer-readable program code for generating a processing unit configured to execute any method described herein or for generating a processing unit including any apparatus described herein. That is, a computer system can be configured to generate a representation of a digital circuit from a definition of circuit elements and data defining rules for combining those circuit elements, where the non-transitory computer-readable storage medium can have processor-executable instructions stored thereon that, when executed at such a computer system, cause the computer system to generate a processing unit as described herein. For example, the non-transitory computer-readable storage medium can have computer-readable instructions stored thereon that, when executed at a computer system for generating a representation of an integrated circuit, cause the computer system to generate a representation of a processor of a receiver as described in the examples herein or to generate a representation of a processor configured to execute a method as described in the examples herein. The representation of the processor can be the processor itself or a representation of the processor (e.g., a mask) that can be used to generate the processor.

[0230] The memory storing machine-executable data used in implementing the disclosed aspects can be a non-transitory medium. The non-transitory medium can be volatile or non-volatile. Examples of volatile non-transitory media include semiconductor-based memories such as SRAM or DRAM. Examples of technologies that can be used to implement non-volatile memories include optical and magnetic memory technologies, flash memory, phase change memory, persistent RAM.

[0231] A specific reference to "logic" refers to a structure that performs one or more functions. Examples of logic include circuits arranged to perform those functions. For example, such a circuit can include transistors and / or other hardware elements available in the manufacturing process. As an example, such transistors and / or other elements can be used to form a circuit or structure that implements and / or includes a memory such as a register, flip-flop, or latch, a logic operator such as a Boolean operator, a mathematical operator such as an adder, multiplier, or shifter, and interconnections. Such elements can be provided as custom circuits or standard cell libraries, macros, or at other levels of abstraction. Such elements can be interconnected in a particular arrangement. Logic can include fixed-function circuits, and the circuits can be programmed to perform one or more functions; such programming can be provided from a firmware or software update or control mechanism. Logic identified as performing one function can also include logic that implements component functions or sub-processes. In an example, hardware logic has a circuit that implements a fixed-function operation or multiple operations, a state machine, or a process.

[0232] It will be apparent to those skilled in the art that any range or device value given herein can be extended or altered without losing the desired effect.

[0233] It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments. The embodiments are not limited to those embodiments that solve any or all of the stated problems or have any or all of the stated benefits and advantages.

[0234] Any reference to "an" item means one or more of those items. The term "comprising" is used herein to mean including the identified method blocks or elements, but such blocks or elements do not comprise an exclusive list, and a device may contain additional blocks or elements, and a method may contain additional operations or elements. Moreover, the blocks, elements, and operations are not implicitly closed in themselves.

[0235] The steps of the methods described herein may be performed in any suitable order or simultaneously where appropriate. The arrows between the boxes in the figures illustrate an example order of method steps, but are not intended to exclude other orders or the performance of multiple steps in parallel. Additionally, individual blocks may be deleted from any method without departing from the spirit and scope of the subject matter described herein. Aspects of any of the examples described above may be combined with aspects of any of the other examples described to form additional examples without losing the desired effect. Where elements in the figures are shown as being connected by arrows, it is to be understood that these arrows illustrate only one example flow of communication (including data and control messages) between the elements. The flow between the elements may be in either direction or in both directions.

[0236] It is to be understood that the above description of the preferred embodiments is given by way of example only, and that various modifications may be made by those skilled in the art. Although the various embodiments have been described above in a certain degree of detail or with reference to one or more separate embodiments, those skilled in the art may make many variations to the disclosed embodiments without departing from the spirit or scope of the invention.

Claims

1. A method for performing subdivision on an input patch in a computer graphics system, where the input patch is a triangular input patch or a quadrilateral input patch, the method comprises: forming a new vertex at the center of the input patch; calculating the vertex subdivision factor of the new vertex; dividing the input patch to form three new triangular patches for a triangular input patch or four new triangular patches for a quadrilateral input patch; reducing the vertex subdivision factor of each vertex of the new patches; and recursively applying the subdivision algorithm to each triangular patch, wherein the input patch is a triangular input patch including the following three vertices: an upper vertex, a left vertex, and a right vertex; and the vertex subdivision factor of the new vertex at the center of the triangle is calculated using the following formula: MID.TF = MEAN(TOP.TF, LEFT.TF, RIGHT.TF) where MID.TF is the vertex subdivision factor of the new vertex, TOP.TF is the vertex subdivision factor of the upper vertex, LEFT.TF is the vertex subdivision factor of the left vertex, and RIGHT.TF is the vertex subdivision factor of the right vertex, and MEAN() is the average value of the values within the parentheses; or wherein the input patch is a quadrilateral input patch including the following four vertices: an upper left vertex, an upper right vertex, a lower left vertex, and a lower right vertex, and the vertex subdivision factor of the new vertex at the center of the quadrilateral is calculated using the following formula: MID.TF = MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) where MID.TF is the vertex subdivision factor of the new vertex, TLEFT.TF is the vertex subdivision factor of the upper left vertex, TRIGHT.TF is the vertex subdivision factor of the upper right vertex, BLEFT.TF is the vertex subdivision factor of the lower left vertex, BRIGHT.TF is the vertex subdivision factor of the lower right vertex, and MEAN() is the average value of the values within the parentheses.

2. The method according to claim 1, wherein, each of the new patches has three vertices, and the three vertices include the new vertex and two vertices of the vertices of the input patch.

3. The method according to claim 1, further comprising, for a triangular input patch: comparing the vertex subdivision factor of each vertex of the input patch with a threshold; in response to determining that none of the vertex subdivision factors exceeds the threshold, outputting data describing the input patch.

4. The method according to claim 3, wherein, forming a new vertex, calculating the vertex subdivision factor, dividing the input patch, and reducing the vertex subdivision factor are performed in response to determining that at least one of the vertex subdivision factors exceeds the threshold.

5. The method according to claim 1, wherein, MEAN(TOP.TF, LEFT.TF, RIGHT.TF) is calculated using the following formula: MEAN(TOP.TF, LEFT.TF, RIGHT.TF) = MIN(AVG(TOP.TF, LEFT.TF, RIGHT.TF), MIN(TOP.TF, LEFT.TF, RIGHT.TF) + INTERVAL) Wherein, AVG() is the arithmetic mean of the values within the parentheses, MIN() is the minimum value in the list of values within the parentheses, and INTERVAL is a predefined parameter.

6. The method according to claim 5, wherein, Reducing the vertex subdivision factor of each vertex in each newly formed initial patch includes reducing each vertex subdivision factor by the predefined parameter INTERVAL.

7. The method according to claim 5, wherein, INTERVAL = 0.

5.

8. The method according to claim 1, wherein, Calculate MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) using the following formula: MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) = MIN(AVG(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF), MIN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) + INTERVAL) Wherein, AVG() is the arithmetic mean of the values within the parentheses, MIN() is the minimum value in the list of values within the parentheses, and INTERVAL is a predefined parameter.

9. The method according to claim 8, wherein, Reducing the vertex subdivision factor of each vertex in each newly formed initial patch includes reducing each vertex subdivision factor by the predefined parameter INTERVAL.

10. The method according to any one of claims 8 - 9, comprising: Receiving a triangular patch with a central subdivision factor; Adding four new vertices to subdivide the triangular patch into three new quadrilateral patches; Calculating the vertex subdivision factor of each of the four new vertices; and Reducing the vertex subdivision factor of each vertex in the three new quadrilateral patches; wherein, the input patch to be subdivided is one of the three new quadrilateral patches.

11. The method according to any one of claims 8 - 9, comprising: Receiving a quadrilateral patch with a central subdivision factor; Adding five new vertices to subdivide the initial quadrilateral patch into four new quadrilateral patches; Calculating the vertex subdivision factor of each of the five new vertices; and Reducing the vertex subdivision factor of each vertex in the four new quadrilateral patches; wherein, the input patch to be subdivided is one of the four new quadrilateral patches.

12. The method according to any one of claims 1 - 9, wherein, The new vertices are formed at the centroid of the input patch.

13. The method according to claim 10, wherein, The new vertex is formed at the centroid of the input patch.

14. The method according to claim 11, wherein, The new vertex is formed at the centroid of the input patch.

15. A hardware tessellation unit configured to perform tessellation on an input patch in a computer graphics system, where the input patch is a triangular input patch or a quadrilateral input patch, and the hardware tessellation unit includes hardware logic configured to: Form a new vertex at the center of the input patch; Calculate the vertex tessellation factor of the new vertex; Divide the input patch to form three new triangular patches for a triangular input patch or four new triangular patches for a quadrilateral input patch; Reduce the vertex tessellation factor of each vertex of the new patches; and Recursively apply the tessellation algorithm to each triangular patch, wherein, The input patch is a triangular input patch including the following three vertices: an upper vertex, a left vertex, and a right vertex; and the vertex tessellation factor of the new vertex at the center of the triangle is calculated using the following formula: MID.TF = MEAN(TOP.TF, LEFT.TF, RIGHT.TF) where MID.TF is the vertex tessellation factor of the new vertex, TOP.TF is the vertex tessellation factor of the upper vertex, LEFT.TF is the vertex tessellation factor of the left vertex, and RIGHT.TF is the vertex tessellation factor of the right vertex, and MEAN() is the average value of the values within the parentheses; or wherein the input patch is a quadrilateral input patch including the following four vertices: an upper left vertex, an upper right vertex, a lower left vertex, and a lower right vertex, and the vertex tessellation factor of the new vertex at the center of the quadrilateral is calculated using the following formula: MID.TF = MEAN(TLEFT.TF, TRIGHT.TF, BLEFT.TF, BRIGHT.TF) where MID.TF is the vertex tessellation factor of the new vertex, TLEFT.TF is the vertex tessellation factor of the upper left vertex, TRIGHT.TF is the vertex tessellation factor of the upper right vertex, BLEFT.TF is the vertex tessellation factor of the lower left vertex, BRIGHT.TF is the vertex tessellation factor of the lower right vertex, and MEAN() is the average value of the values within the parentheses.

16. The hardware tessellation unit according to claim 15, wherein, The hardware logic is further configured to: Compare the vertex tessellation factor of each vertex of the input patch with a threshold; In response to determining that none of the vertex tessellation factors exceeds the threshold, output data describing the input patch.

17. The hardware tessellation unit according to claim 16, wherein, The hardware logic is configured to: in response to determining that at least one of the vertex tessellation factors exceeds the threshold, form a new vertex, calculate the vertex tessellation factor, divide the input patch, and reduce the vertex tessellation factor.

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