Digital-to-analog converter and driving circuit of display device including the same

Abstract

A digital-to-analog converter and a driving circuit of a display device including the same are provided. The digital-to-analog converter converts digital image data into an analog image signal. The digital-to-analog converter includes a driving stage that outputs voltages different from each other to first and second output terminals based on a first input voltage supplied to a first input terminal, a second input voltage supplied to a second input terminal, and a first input bit. The driving stage includes a switching circuit including a plurality of switches that are turned on alternately with each other according to a control signal, and outputs an intermediate output voltage to a third output terminal based on the first input voltage supplied to the first input terminal and the second input voltage supplied to the second input terminal, and a selection section that outputs one of the first input voltage and the second input voltage and the intermediate output voltage.

Description

Technical Field

[0001] This invention relates to display devices, and more specifically to driving circuits and digital-to-analog converters suitable for display devices. Background Technology

[0002] Display devices utilize digital-to-analog converters (DACs) to convert externally input digital image signals into analog signals and provide them to the display panel. As the resolution of display devices increases, the number of bits in the digital image signal also increases. Consequently, there is a problem of increasing capacity and number of components used to implement the DAC. Summary of the Invention

[0003] One object of the present invention is to provide a digital-to-analog converter that increases versatility by inputting and outputting multiple analog voltages for a single digital image signal, while reducing size and number of components.

[0004] Another object of the present invention is to provide a driving circuit for a display device including the aforementioned digital-to-analog converter.

[0005] However, the purpose of this invention is not limited to the above-described purpose, and various extensions can be made without departing from the spirit and scope of this invention.

[0006] To achieve an objective of this invention, the digital-to-analog converters (DACs) according to various embodiments of this invention are applicable to display devices and can convert digital image data into analog image signals. The DAC may include: a first driving stage that outputs different voltages to a first output terminal and a second output terminal based on a first input voltage supplied to a first input terminal, a second input voltage supplied to a second input terminal, and a first input bit in digital form. The first driving stage may include: a switching circuit comprising a plurality of switches alternately switched on according to a control signal, and outputting an intermediate output voltage to a third output terminal based on the first input voltage supplied to the first input terminal and the second input voltage supplied to the second input terminal; and a selection unit that outputs one of the first input voltage and the second input voltage, as well as the intermediate output voltage.

[0007] According to one embodiment, the selection unit may include: a first multiplexer that, in response to the first input bit, outputs the first input voltage or the intermediate output voltage to the first output terminal; and a second multiplexer that, in response to the first input bit, outputs the intermediate output voltage or the second input voltage to the second output terminal.

[0008] According to one embodiment, the switching circuit may include: a first capacitor electrically connected to the first input terminal or the second input terminal according to the control signal; a second capacitor connected to the third output terminal; a first switching unit connected to the first input terminal, the first capacitor, and the second capacitor based on the control signal; and a second switching unit connected to the second input terminal, the first capacitor, and the second capacitor based on the control signal.

[0009] According to one embodiment, if the first switch is turned on, the first capacitor and the second capacitor are connected in series between the first input terminal and ground.

[0010] According to one embodiment, if the second switch is turned on, the first capacitor and the second capacitor are connected in series between the second input terminal and ground.

[0011] According to one embodiment, the intermediate output voltage may correspond to the average value of the first input voltage and the second input voltage.

[0012] According to one embodiment, the control signal may be a rectangular wave with repeated first and second phases.

[0013] According to one embodiment, the first switch may be turned on in response to the first phase of the control signal, and the second switch may be turned on in response to the second phase of the control signal.

[0014] According to one embodiment, the digital-to-analog converter may further include: at least one driver stage corresponding to the input bits other than the first input bit, and being subordinately connected starting from the first driver stage. The first input bit may be the most significant bit.

[0015] According to one embodiment, the at least one driving stage may include: a second driving stage that uses the voltage output to the first output terminal as the first input voltage and uses the voltage output to the second output terminal as the second input voltage, and includes the selection section and the switching circuit.

[0016] According to one embodiment, the first switch portion of the second driving stage and the second switch portion of the first driving stage may be turned on simultaneously, and the second switch portion of the second driving stage and the first switch portion of the first driving stage may be turned on simultaneously.

[0017] According to one embodiment, the control signal may be supplied to the second drive stage as an inverted signal.

[0018] According to one embodiment, the at least one driving stage may include: a second driving stage, including the switching circuit, and outputting a voltage based on the output of the previous driving stage and the least significant bit.

[0019] According to one embodiment, the second driver stage may include a multiplexer, the multiplexer being controlled according to the least significant bit, and the multiplexer being connected to a third output terminal and a second input terminal of the second driver stage.

[0020] According to one embodiment, the second driver stage may include a multiplexer, the multiplexer being controlled according to the least significant bit, and the multiplexer being connected to a third output terminal and a first input terminal of the second driver stage.

[0021] To achieve an objective of the present invention, the driving circuit of the display device according to various embodiments of the present invention may include: a digital-to-analog converter (DAC) for converting digital image data into analog image signals; and a plurality of output buffers for outputting data voltages to data lines based on the analog image signals. The DAC may include: a switching circuit comprising a plurality of switches that are alternately switched on according to a control signal, and outputting an intermediate output voltage to a third output terminal based on a first input voltage supplied to a first input terminal and a second input voltage supplied to a second input terminal; and a selection unit that outputs one of the first input voltage and the second input voltage, and the intermediate output voltage, based on an input bit.

[0022] According to one embodiment, the selection unit may include: a first multiplexer that, in response to the input bit, outputs the first input voltage or the intermediate output voltage to a first output terminal; and a second multiplexer that, in response to the input bit, outputs the intermediate output voltage or the second input voltage to a second output terminal.

[0023] According to one embodiment, the switching circuit may include: a first capacitor electrically connected to the first input terminal or the second input terminal according to the control signal; a second capacitor connected to the third output terminal; a first switching unit connected to the first input terminal, the first capacitor, and the second capacitor based on the control signal; and a second switching unit connected to the second input terminal, the first capacitor, and the second capacitor based on the control signal.

[0024] According to one embodiment, at least one of the plurality of output buffers may interpolate and output the voltage of the first output terminal and the voltage of the second output terminal.

[0025] (Invention Effects)

[0026] The digital-to-analog converters (DACs) according to various embodiments of the present invention, by incorporating multiple capacitors (a simple structure) that output analog voltages based on recursive iterative switching operations, can prevent the increase in the size of the DAC and the exponential increase in the number of components such as capacitors caused by the increase in the number of input bits. Furthermore, output errors of the DAC can be reduced, and voltage conversion speed can be improved, thereby making it suitable for high-frequency / high-resolution display devices.

[0027] Furthermore, the digital-to-analog converter (DAC) outputs two final voltages through a relatively simple structure, thereby enabling further voltage regulation, such as interpolation of the final voltages. Therefore, the analog voltage output from the DAC and its driving circuitry can be further subdivided, thereby enhancing their versatility and making them easily adaptable to the conditions of various display devices.

[0028] However, the effects of the present invention are not limited to those described above, and various extensions can be made without departing from the spirit and scope of the present invention. Attached Figure Description

[0029] Figure 1 This is a block diagram illustrating the digital-to-analog converters involved in various embodiments of the present invention.

[0030] Figure 2 It means Figure 1 A circuit diagram of an example of the switching circuitry included in a digital-to-analog converter.

[0031] Figure 3 This indicates supply to Figure 2 A waveform diagram of an example of the control signal of a switching circuit.

[0032] Figure 4 It means Figure 1 A diagram of an example of a digital-to-analog converter.

[0033] Figure 5a and Figure 5b It is used to illustrate input bit-based Figure 4 A diagram illustrating an example of the operation of a digital-to-analog converter.

[0034] Figure 6a It means Figure 1 Another example of a digital-to-analog converter is shown in the figure.

[0035] Figure 6b It means Figure 1 Another example of a digital-to-analog converter is shown in the figure.

[0036] Figure 7 This is a block diagram illustrating the driving circuit of a display device according to various embodiments of the present invention.

[0037] Figure 8 It means Figure 7 A block diagram of an example of the digital-to-analog converter and buffer included in the driving circuit.

[0038] Figure 9 This is a block diagram illustrating the display device involved in various embodiments of the present invention. Detailed Implementation

[0039] Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings. The same reference numerals are used for the same constituent elements in the drawings, and repeated descriptions of the same constituent elements are omitted.

[0040] Figure 1 This is a block diagram illustrating the digital-to-analog converters involved in various embodiments of the present invention.

[0041] Reference Figure 1 The digital-to-analog converter 100 may include: a driver stage ST, based on the voltage supplied to the first input terminal IN1, the voltage supplied to the second input terminal IN2, and the input bit D. <k>It outputs different voltages to the first output terminal OUT1 and the second output terminal OUT2.

[0042] In one embodiment, the digital-to-analog converter 100 may be included in the display device within a data driving unit (or driving circuit) for supplying data voltage. Additionally, in Figure 1 Only one driver stage ST included in the digital-to-analog converter 100 is shown, but the digital-to-analog converter 100 may include multiple driver stages ST. For example, multiple driver stages ST may output predetermined analog voltages corresponding to a data line connected to a pixel.

[0043] The drive stage ST may include a switching circuit 120 and a selection unit 140.

[0044] The switching circuit 120 may include a plurality of switches that are alternately switched on according to control signals CON or CONB. The switching circuit 120 may output an intermediate output voltage V3 to the third output terminal OUT3 based on a first input voltage V1 supplied to the first input terminal IN1 and a second input voltage V2 supplied to the second input terminal IN2. For example, the switching circuit 120 may output an intermediate output voltage V3 to the third output terminal OUT3 corresponding to the average value of the first input voltage V1 and the second input voltage V2. Alternatively, the intermediate output voltage V3 may correspond to the intermediate value between the first input voltage V1 and the second input voltage V2.

[0045] Here, the first input voltage V1 and the second input voltage V2 can be provided from the gamma voltage generation unit or the power supply unit included in the display device.

[0046] The selection unit 140 can be based on the input bit D <k>The selection unit 140 outputs one of the first input voltage V1 and the second input voltage V2, as well as an intermediate output voltage V3. That is, the selection unit 140 can output two output voltages VO1 and VO2 from three voltages V1, V2, and V3.

[0047] Input bit D <k>These can be digital bits of image data corresponding to the image to be displayed. For example, each driver stage ST can correspond to a unit bit (1 bit) of image data. When supplying 4 bits of image data to the digital-to-analog converter 100, the digital-to-analog converter 100 can be configured with four driver stages ST connected subordinately. Each of the four driver stages ST can correspond to a data line.

[0048] In one embodiment, the selection unit 140 may include a first multiplexer 142 and a second multiplexer 144 (in... Figure 1 In this diagram, MUX represents a multiplexer, and the same applies to other diagrams.

[0049] The first multiplexer 142 can receive a first input voltage V1 and an intermediate output voltage V3. The first multiplexer 142 can respond to input bit D. <k>The first output voltage VO1 is output to the first output terminal OUT1. That is, one of the first input voltage V1 and the intermediate output voltage V3 can be selected as the first output voltage VO1.

[0050] The second multiplexer 144 can receive the second input voltage V2 and the intermediate output voltage V3. The second multiplexer 144 can respond to input bit D. <k>The second output terminal OUT2 outputs either the second input voltage V2 or the intermediate output voltage V3. That is, one of the second input voltage V2 and the intermediate output voltage V3 can be selected as the second output voltage VO2.

[0051] In one embodiment, the first multiplexer 142 and the second multiplexer 144 can output different voltages. For example, when the first multiplexer 142 outputs an intermediate output voltage V3, the second multiplexer 144 can output a second input voltage V2. Alternatively, when the second multiplexer 144 outputs an intermediate output voltage V3, the first multiplexer 142 can output a first input voltage V1.

[0052] Input bit D <k>It can include values ​​of 0 or 1. For example, in input bit D <k>When the value is 1, the first multiplexer 142 can select the first input voltage V1, and the second multiplexer 144 can select the intermediate output voltage V3. (In input bit D) <k>When the voltage is 0, the first multiplexer 142 can select the intermediate output voltage V3, and the second multiplexer 144 can select the second input voltage V2.

[0053] As described above, the digital-to-analog converter 100 according to various embodiments of the present invention can output two voltages using three inputs. Therefore, the output of the digital-to-analog converter 100 can be interpolated or selectively utilized, thereby allowing free control of the data voltage and enhancing the versatility of the digital-to-analog converter 100.

[0054] Figure 2 It means Figure 1 A circuit diagram of an example of the switching circuitry included in a digital-to-analog converter. Figure 3 This indicates supply to Figure 2 A waveform diagram of an example of the control signal of a switching circuit.

[0055] Reference Figures 1 to 3 The switching circuit 120 may include a first capacitor C1, a second capacitor C2, a first switching part 122, and a second switching part 124.

[0056] The first capacitor C1 can be connected to either the first input terminal IN1 or the second input terminal IN2 according to the control signal CON. The first capacitor C1 can be connected between the first node N1 and the second node N2.

[0057] The second capacitor C2 can be connected between the third output terminal OUT3 and a predetermined voltage source. For example, the second capacitor C2 can be connected between the third output terminal OUT3 and ground.

[0058] The first capacitor C1 and the second capacitor C2 can be connected in series with each other via the first switch section 122 and the second switch section 124. Furthermore, the first capacitor C1 and the second capacitor C2 can be alternately switched on via the first switch section 122 and the second switch section 124 to distribute the first input voltage V1 or the second input voltage V2 based on their respective capacitances.

[0059] The first switching unit 122 can connect the first input terminal IN1, the first capacitor C1, and the second capacitor C2 based on the control signal CON. In one embodiment, the first switching unit 122 may include a first switch SW1 and a second switch SW2. The first switch SW1 can be connected between the first input terminal IN1 and the first node N1, and the second switch SW2 can be connected between the third output terminal OUT3 and the second node N2. If the first switching unit 122 is turned on, the first capacitor C1 and the second capacitor C2 can be connected in series between the first input terminal IN1 and ground.

[0060] The second switch section 124 can be connected to the second input terminal IN2, the first capacitor C1, and the second capacitor C2 based on the control signal CON. In one embodiment, the second switch section 124 may include a third switch SW3 and a fourth switch SW4. The third switch SW3 can be connected between the first node N1 and the third output terminal OUT3, and the fourth switch SW4 can be connected between the second node N2 and the second input terminal IN2. If the second switch section 124 is turned on, the first capacitor C1 and the second capacitor C2 can be connected in series between the second input terminal IN2 and ground.

[0061] In one embodiment, such as Figure 3 As shown, the control signal CON can be a rectangular wave with alternating first and second phases. The first phase can be a logic high level, and the second phase can be a logic low level. The first switch SW1 and the second switch SW2 of the first switching unit 122 can be turned on in response to the first phase of the control signal CON. The third switch SW3 and the fourth switch SW4 of the second switching unit 124 can be turned on in response to the second phase of the control signal CON. That is, the first switching unit 122 and the second switching unit 124 can be rapidly and alternately turned on / off.

[0062] When the capacitance of the first capacitor C1 is C, the capacitance of the second capacitor C2 can be expressed by the following mathematical formula 1.

[0063] [Mathematical Expression 1]

[0064] C'=C+△C

[0065] Here, C' can be the capacitance of the second capacitor C2, and ΔC can be the difference between the capacitance of the first capacitor C1 and the capacitance of the second capacitor C2.

[0066] When the first switch section 122 and the second switch section 124 are switched alternately k+1 times (where k is a natural number), the intermediate output voltage V3 can be expressed by the following mathematical formula 2.

[0067] [Mathematical Expression 2]

[0068]

[0069] Here, V3[k+1] can be the intermediate output voltage V3 based on the (k+1)th switch, C can be the capacitance of the first capacitor C1, ΔC can be the difference between the capacitance of the first capacitor C1 and the capacitance of the second capacitor C2, V3[k] can be the intermediate output voltage V3 based on the kth switch, V1 can be the first input voltage, and V2 can be the second input voltage.

[0070] When the switching circuit 120 is switched on and off a sufficiently large number of times, mathematical expression 2 can be expressed by the following mathematical expression 3.

[0071] [Mathematical Expression 3]

[0072]

[0073] That is, the switching circuit 120 can output the average value of the first input voltage V1 and the second input voltage V2 as the intermediate output voltage V3, regardless of the difference in capacitance between the first capacitor C1 and the second capacitor C2. Therefore, the switching circuit 120 can output a voltage that is sluggish due to the mismatch caused by the difference in capacitance between the first capacitor C1 and the second capacitor C2.

[0074] Figure 4 It means Figure 1 A diagram of an example of a digital-to-analog converter.

[0075] Reference Figure 4 The digital-to-analog converter 101 may include multiple drive stages ST1 to ST4.

[0076] Figure 4 This indicates that the 4-bit input bit D is received. <3> D <2> D <1> D <0> The digital-to-analog converter 101. Therefore, the first driver stage ST1 to the fourth driver stage ST4 can respectively correspond to the input bit D. <3> D <2> D <1> D <0> .

[0077] The first driver stage ST1 can respond to the first input bit D. <3> The first output voltage VO1 and the second output voltage VO2 are output. The second driver stage ST2 can respond to the second input bit D. <2> It outputs two voltages. The third driver stage ST3 can respond to the third input bit D. <1> It outputs two voltages. The fourth driver stage ST4 can respond to the fourth input bit D. <0> The first final voltage FO1 and the second final voltage FO2 are output.

[0078] Here, the first input bit D <3> It can be the most significant bit (MSB) of the input bits, or the fourth input bit (D). <0> It can be the least significant bit (LSB) of the input bits.

[0079] However, this is just an example, and the number of input bits and the number of driver stages are not limited to this. For example, with eight input bits, the digital-to-analog converter 101 may include eight driver stages.

[0080] The first driver stage ST1 to the fourth driver stage ST4 can be connected to a slave location. In one embodiment, the first output terminal of the first driver stage ST1 ( Figure 1 OUT1 can be connected to the first input terminal IN1-2 of the second driver stage ST2, and the second output terminal of the first driver stage ST1 ( Figure 1 OUT2 can be connected to the second input terminal IN2-2 of the second driver stage ST2. Similarly, each output terminal of the second driver stage ST2 can be connected to the input terminals IN1-3 and IN2-3 of the third driver stage ST3, and each output terminal of the third driver stage ST3 can be connected to the input terminals IN1-4 and IN2-4 of the fourth driver stage ST4. That is, the output voltages of the previous driver stage can be supplied as the input voltages of the current driver stage.

[0081] The first drive stage ST1 to the fourth drive stage ST4 can respectively include references Figures 1 to 3 The switch circuit 120 and the selection unit 140 are described.

[0082] In one embodiment, a control signal CON can be supplied to the first drive stage ST1, and an inverted signal of the control signal CON (hereinafter referred to as the inverted control signal CONB) can be supplied to the second drive stage ST2. Similarly, a control signal CON can be supplied to the third drive stage ST3, and an inverted control signal CONB can be supplied to the fourth drive stage ST4. That is, control signals CON and CONB with opposite waveforms (opposite phases) can be supplied to adjacent drive stages respectively.

[0083] Therefore, the first switch section 122 of the second drive stage ST2 can be turned on simultaneously with the second switch section 124 of the first drive stage ST1, and the second switch section 124 of the second drive stage ST2 can be turned on simultaneously with the first switch section 122 of the first drive stage ST1. That is, the switch sections of adjacent drive stages can be switched in opposite ways.

[0084] As described above, adjacent driver stages perform complementary switching operations, thereby reducing the overall equivalent capacitance of driver stages ST1 to ST4. Therefore, output errors caused by changes in equivalent capacitance due to the switching of the switching circuit 120 can be reduced.

[0085] In addition, the first drive stage ST1 to the fourth drive stage ST4 have a simple structure with capacitors C1 and C2 that output analog voltage based on recursive iterative switching operation, thereby preventing the increase in the size of the digital-to-analog converter 101 and the exponential increase in the number of components such as capacitors due to the increase in the number of input bits.

[0086] Furthermore, the digital-to-analog converter 101 outputs two final voltages FO1 and FO2 through a relatively simple structure, thereby enabling further voltage regulation using interpolation of the final voltages FO1 and FO2. Therefore, the versatility of the digital-to-analog converter 101 is enhanced, and the digital-to-analog converter 101 of the present invention can be easily applied to various display devices and data drive units (or drive circuits).

[0087] Figure 5a and Figure 5b It is used to illustrate input bit-based Figure 4 A diagram illustrating an example of the operation of a digital-to-analog converter.

[0088] Reference Figures 4 to 5b The input bit D of the digital-to-analog converter 101 <3> D <2> D <1> D <0> It can be 0110(D) <3> ; 0, D <2> 1. D <1> 1. D <0> ;0).

[0089] In addition, the switching circuit 120 can use the average value of the voltages of the first input terminals IN1-1, IN1-2, IN1-3, IN1-4 and the voltages of the second input terminals IN2-1, IN2-2, IN2-3, IN2-4 as the intermediate output voltages V3-1, V3-2, V3-3, V3-4 for output.

[0090] like Figure 5a and Figure 5b As shown, the first input voltage V1 can be a predetermined reference voltage VREF, and the second input voltage V2 can be 0V.

[0091] In input bit D <k>When the value is 1, the first multiplexer 142 can select the voltages of the first input terminals IN1-1, IN1-2, IN1-3, and IN1-4, and the second multiplexer 144 can select the intermediate output voltages V3-1, V3-2, V3-3, and V3-4. (Input bit D...) <k>When the value is 0, the first multiplexer 142 can select the intermediate output voltages V3-1, V3-2, V3-3, and V3-4, and the second multiplexer 144 can select the voltages of the second input terminals IN2-1, IN2-2, IN2-3, and IN2-4.

[0092] Therefore, the digital-to-analog converter 101 can output as follows: Figure 5b The voltage shown.

[0093] Specifically, the first driver stage ST1 can output to the first output terminal (e.g., Figure 1 The OUT1 output provides the intermediate output voltage V3-1, which can be supplied to the second output terminal (e.g., Figure 1 OUT2) outputs the second input voltage V2. In other words, if the first input bit D <3> =0 (i.e., D) <3> If VO1-1 can be (8 / 16)V1, then the first output voltage VO2-1 of the first drive stage ST1 can be 0.

[0094] If the second input bit D <2> =1 (that is, D) <2> If ;1), then the first output voltage VO1-2 of the second drive stage ST2 can be (8 / 16)V1, and the second output voltage VO2-2 of the second drive stage ST2 can be (4 / 16)V1.

[0095] If the third input bit D <1> =1 (that is, D) <1> If ;1), then the first output voltage VO1-3 of the third drive stage ST3 can be (8 / 16)V1, and the second output voltage VO2-3 of the third drive stage ST3 can be (6 / 16)V1.

[0096] If the fourth input bit D <0> =0 (i.e., D) <0> If ;0), then the first output voltage of the fourth drive stage ST4 (i.e., the first final voltage FO1) can be (7 / 16)V1, and the second output voltage of the fourth drive stage ST4 (i.e., the second final voltage FO2) can be (6 / 16)V1.

[0097] As described above, the digital-to-analog converter 101 according to various embodiments of the present invention can ultimately output two analog voltages corresponding to the difference in the number of bits of the least significant bit. Therefore, the output of analog voltages can be further subdivided.

[0098] Furthermore, since the second input voltage V2 is output as is from the first driver stage ST1, the conversion speed of the analog voltage relative to the digital value can be increased due to the existence of a bypass period. Therefore, the digital-to-analog converter 101 according to the embodiments of the present invention can be easily applied to high-scan-rate data drive circuits that require high speed.

[0099] Figure 6a It means Figure 1 Another example of a digital-to-analog converter is shown in the figure.

[0100] Reference Figures 4 to 6a , with the least significant bit D <0> The corresponding fourth drive stage ST4' may include a multiplexer 144'.

[0101] Based on the least significant bit D <0> Control multiplexer 144'. In one embodiment, multiplexer 144' can be connected to the third output V3-4 of the fourth driver stage ST4 and the second input V3-4 of the fourth driver stage ST4 (in... Figure 4 The connection is represented as IN2-4.

[0102] Therefore, the digital-to-analog converter 102 can output only the second final voltage FO2. For example, in a digital-to-analog converter 102 only applicable to Figure 5b With the input of (6 / 16)V1, the digital-to-analog converter 102 can output a voltage of (6 / 16)V1.

[0103] Figure 6b It means Figure 1 Another example of a digital-to-analog converter is shown in the figure.

[0104] Reference Figures 4 to 6b , with the least significant bit D <0> The corresponding fourth drive stage ST4” may include a multiplexer 142’.

[0105] Based on the least significant bit D <0> Control multiplexer 142'. In one embodiment, multiplexer 142' can be connected to the third output V3-4 of the fourth driver stage ST4 and the first input V3-4 of the fourth driver stage ST4 (in... Figure 4 The connection is represented as IN1-4.

[0106] Therefore, the digital-to-analog converter 103 can output only the first final voltage FO1. For example, in the case of a logarithmic-to-analog converter 103... Figure 5b With the input of (7 / 16)V1, the digital-to-analog converter 103 can output a voltage of (7 / 16)V1.

[0107] Figure 7 This refers to the driving circuit of the display device involved in various embodiments of the present invention.

[0108] Reference Figure 7 The driving circuit 300 of the display device may include a shift register 320, a latch 340, a digital-to-analog converter 360, and an output buffer 380.

[0109] The shift register 320 can synchronously enable the latch clock signals CK1, CK2, ..., CKm in sequence with the clock signal CLK.

[0110] The latch unit 340 can receive latch clock signals CK1, CK2, ..., CKm from the shift register 320, and latch digital image signals DATA synchronously with the latch clock signals CK1, CK2, ..., CKm. Additionally, the latch unit 340 can simultaneously provide latched digital image data DA1, DA2, ..., DAm to the digital-to-analog converter 360 in response to linear latch signals.

[0111] The digital-to-analog converter 360 can convert digital image data DA1, DA2, ..., DAm into analog image signals Y1, Y2, ..., Ym. The digital-to-analog converter 360 can receive gamma voltage VGA input from the gamma voltage generation unit and convert the digital image data DA1, DA2, ..., DAm into analog image signals Y1, Y2, ..., Ym for output to the output buffer 380.

[0112] The digital-to-analog converter 360 may include a drive stage with a switching circuit and a selection unit. The switching circuit may include a plurality of switches that are alternately turned on and off according to a control signal, and may output an intermediate output voltage to a third output terminal based on a first input voltage supplied to a first input terminal and a second input voltage supplied to a second input terminal. The selection unit may output one of the first input voltage and the second input voltage, as well as the intermediate output voltage, based on an input bit.

[0113] On the other hand, the digital-to-analog converter 360 can also include based on the number of bits in the digital image data DA1, DA2, ..., DAm. Figure 1 ST, the driver level.

[0114] The structure and operation of the digital-to-analog converter 360 have been referenced. Figures 1 to 6b Detailed explanations have been provided, therefore repeated explanations have been omitted.

[0115] The output buffer 380 can output multiple analog image signals Y1, Y2, ..., Ym to multiple data lines D1, D2, ..., Dm. Figure 7 The diagram illustrates a one-to-one correspondence between analog image signals Y1, Y2, ..., Ym and data lines D1, D2, ..., Dm. In this case, the digital-to-analog converter 360 may include... Figure 6a and / or Figure 6b The structure. For example, the digital-to-analog converter (e.g., corresponding to the first data line D1) Figure 6a (102) can output only one final voltage.

[0116] As described above, the driving circuit 300 of the display device according to various embodiments of the present invention may include a driving stage with a simple structure having capacitors C1 and C2 that output analog voltages based on recursive iterative switching operations, thereby preventing the increase in the size of the digital-to-analog converter 360 and the exponential increase in the number of components such as capacitors due to the increase in the number of input bits.

[0117] Figure 8 It means Figure 7 A block diagram of an example of a digital-to-analog converter and buffer included in the drive circuit.

[0118] Reference Figure 1 , Figure 7 and Figure 8 The digital-to-analog converter 362 can output a first final voltage FO1 and a second final voltage FO2, and the output buffer 382 can supply a data voltage DV to the data line D1 using the first final voltage FO1 and the second final voltage FO2.

[0119] The digital-to-analog converter 362 can have a reference Figures 1 to 5b The structure is described below. The digital-to-analog converter 362 can receive a first input voltage V1 and a second input voltage V2. The digital-to-analog converter 362 can output a first final voltage FO1 and a second final voltage FO2 corresponding to the input bits of the digital image data DA1.

[0120] Output buffer 382 can generate a data voltage DV based on a first final voltage FO1 and a second final voltage FO2. In one embodiment, output buffer 382 can interpolate the first final voltage FO1 and the second final voltage FO2 based on a voltage control signal VCS. For example, output buffer 382 can include various known forms of interpolation circuits that can output the voltage between the first final voltage FO1 and the second final voltage FO2 based on the voltage control signal VCS.

[0121] In one embodiment, the output buffer 382 may also select one of the first final voltage FO1 and the second final voltage FO2 to output based on the voltage control signal VCS.

[0122] As described above, the digital-to-analog converter 362 outputs two final voltages FO1 and FO2 through a simplified structure, which can be interchanged in the output buffer 382, ​​including interpolation circuits, etc. Therefore, the versatility of the digital-to-analog converter 362 is enhanced, and the analog voltage output from the drive circuit 300 can be further subdivided.

[0123] Figure 9 This is a block diagram illustrating the display device involved in various embodiments of the present invention.

[0124] Reference Figure 9 The display device 1000 may include a pixel unit 10, a scan driving unit 20, a data driving unit 30, and a timing control unit 40.

[0125] The pixel unit 10 may include multiple pixels PX. Each pixel PX may be connected to scan lines S1, S2, ..., Sn and data lines D1, D2, ..., Dm.

[0126] The timing control unit 40 can output a data control signal DCS to control the data drive unit 30 and a scan control signal SCS to control the scan drive unit 20. The data control signal DCS may include a clock signal supplied to the shift register of the data drive unit 30 and a linear latch signal supplied to the latch unit. In addition, the timing control unit 40 can provide image data DATA in digital form to the data drive unit 30.

[0127] The scan drive unit 20 can supply scan signals to each pixel PX through scan lines S1, S2, ..., Sn in response to the scan control signal SCS.

[0128] The data driving unit 30 can supply data signals (data voltages) to each pixel PX via data lines D1, D2, ..., Dm according to the data control signal DCS. In one embodiment, the data driving unit 30 may include... Figure 7 and / or Figure 8 The drive circuit 300. The configuration of the drive circuit 300 and the digital-to-analog converter and output buffer included therein have been referenced. Figures 1 to 8 The details have been explained in detail, so the explanations that are redundant with it have been omitted.

[0129] The above description refers to various embodiments of the present invention. However, those skilled in the art should understand that various modifications and changes can be made to the present invention without departing from the spirit and scope of the invention as described in the claims.< / k> < / k> < / k> < / k> < / k> < / k> < / k> < / k> < / k> < / k>

Claims

1. A digital-to-analog converter, suitable for a display device, for converting digital image data into analog image signals, the digital-to-analog converter comprising: The first driver stage outputs different voltages to the first output terminal and the second output terminal based on the first input voltage supplied to the first input terminal, the second input voltage supplied to the second input terminal, and the first input bit in digital form. The first driver level includes: A switching circuit includes a plurality of switches that are alternately switched on according to a control signal, and outputs an intermediate output voltage to a third output terminal based on a first input voltage supplied to a first input terminal and a second input voltage supplied to a second input terminal; and The selection unit outputs one of the first input voltage and the second input voltage, as well as the intermediate output voltage.

2. The digital-to-analog converter according to claim 1, wherein, The selection unit includes: A first multiplexer, in response to the first input bit, outputs either the first input voltage or the intermediate output voltage to the first output terminal; and The second multiplexer, in response to the first input bit, outputs the intermediate output voltage or the second input voltage to the second output terminal.

3. The digital-to-analog converter according to claim 2, wherein, The switching circuit includes: The first capacitor is electrically connected to either the first input terminal or the second input terminal according to the control signal; The second capacitor is connected to the third output terminal; A first switching unit connects the first input terminal, the first capacitor, and the second capacitor based on the control signal; and The second switch unit connects the second input terminal, the first capacitor, and the second capacitor based on the control signal.

4. The digital-to-analog converter according to claim 3, wherein, If the first switch is turned on, the first capacitor and the second capacitor are connected in series between the first input terminal and ground, and if the second switch is turned on, the first capacitor and the second capacitor are connected in series between the second input terminal and ground.

5. The digital-to-analog converter according to claim 3, wherein, The control signal is a rectangular wave that repeats the first and second phases.

6. The digital-to-analog converter according to claim 5, wherein, The first switch is turned on in response to the first phase of the control signal, and the second switch is turned on in response to the second phase of the control signal.

7. The digital-to-analog converter according to claim 5, further comprising: At least one driver stage, corresponding to the input bits other than the first input bit, and subordinated to the first driver stage, wherein the first output of the preceding driver stage is connected to the first input of the following driver stage, and the second output of the preceding driver stage is connected to the second input of the following driver stage. The first input bit is the most significant bit.

8. The digital-to-analog converter according to claim 7, wherein, The at least one driving stage includes: a second driving stage that uses the voltage output to the first output terminal as a first input voltage of the second driving stage and uses the voltage output to the second output terminal as a second input voltage of the second driving stage, and includes the selection section and the switching circuit.

9. The digital-to-analog converter according to claim 8, wherein, The first switching section of the second driving stage and the second switching section of the first driving stage are simultaneously turned on. The second switch section of the second drive stage and the first switch section of the first drive stage are simultaneously turned on.

10. A driving circuit for a display device, comprising: A digital-to-analog converter (DAC) transforms digital image data into analog image signals. as well as Multiple output buffers output data voltage to the data lines based on the analog image signal. The digital-to-analog converter includes: A switching circuit includes a plurality of switches that are alternately switched on according to a control signal, and outputs an intermediate output voltage to a third output terminal based on a first input voltage supplied to a first input terminal and a second input voltage supplied to a second input terminal; as well as The selection unit, based on the digital input bits, outputs one of the first input voltage and the second input voltage, as well as the intermediate output voltage.

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