Electronic devices

Abstract

The electronic device includes: a display module having a front surface and a rear surface opposite to the front surface, and including pixels arranged on the front surface and display pads connected to the pixels and exposed from the rear surface; a protective film arranged on the rear surface of the display module; a circuit board arranged between the display module and the protective film and having a front surface and a rear surface, the front surface of the circuit board faces the rear surface of the display module, the circuit board including a first substrate pad connected to the display pad and exposed from the front surface of the circuit board and a second substrate pad exposed from the rear surface of the circuit board; and a driving element connected to the second substrate pad to drive the pixel, wherein the second substrate pad and the protective film are spaced apart from each other.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2020-0061691, filed on May 22, 2020, which is hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field

[0003] Exemplary embodiments of the present invention relate generally to electronic devices, and more particularly, to electronic devices having improved reliability. Background Art

[0004] In electronic devices, a display panel is manufactured, and then a circuit board is connected to the display panel. For example, a tape automated bonding (TAB) mounting method bonds a circuit board to a display panel using an anisotropic conductive film (ACF).

[0005] The above information disclosed in this Background section is only for understanding the background of the present inventive concept and therefore it may contain information that does not constitute prior art. Summary of the invention

[0006] The electronic device constructed according to the exemplary embodiment of the present invention can improve durability by including a circuit board disposed between a display panel and a protective film.

[0007] Additional features of the inventive concept will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concept.

[0008] An electronic device according to an exemplary embodiment includes: a display module having a front surface and a rear surface opposite to the front surface, the display module including pixels arranged on the front surface and display pads connected to the pixels and exposed from the rear surface; a protective film arranged on the rear surface of the display module; a circuit board arranged between the display module and the protective film and having a front surface facing the rear surface of the display module and a rear surface opposite to the front surface of the circuit board, the circuit board including a first substrate pad connected to the display pad and exposed from the front surface of the circuit board and a second substrate pad exposed from the rear surface of the circuit board; and a driving element connected to the second substrate pad to drive the pixel, wherein the second substrate pad and the protective film are spaced apart from each other.

[0009] The circuit board may also include: a first solder resist layer; a plurality of substrate insulating layers, arranged on the first solder resist layer and including at least one of polyimide and polyethylene terephthalate (PET); a plurality of substrate signal lines, arranged between the plurality of substrate insulating layers; and a second solder resist layer, covering the plurality of substrate insulating layers, wherein the first substrate pad and the second substrate pad can be connected to the same substrate signal line among the plurality of substrate signal lines.

[0010] The first substrate pad may overlap at least a portion of the second substrate pad.

[0011] The first substrate pad may be spaced apart from the second substrate pad, and the driving element may be surrounded by a protective film.

[0012] The protection film may include a penetrating accommodation hole, and the driving element may be accommodated in the accommodation hole.

[0013] The circuit board may include a line area and a dummy area adjacent to the line area, and the substrate signal line is disposed in the line area.

[0014] The electronic device may further include an electronic module disposed on the lower side of the protective film and including at least one of an audio output module, a light emitting module, a light receiving module, and a camera module, wherein the circuit board may further include a connector connected to the electronic module.

[0015] The circuit board may further include a metal pattern disposed in the dummy area.

[0016] The display module may include: a base substrate including a base layer and a barrier layer arranged on the base layer, wherein the base layer includes an organic material and the barrier layer includes an inorganic material; a transistor arranged on the base layer and including a semiconductor pattern having a plurality of electrodes; an organic light emitting element connected to the transistor; and a signal line connecting the transistor and a display pad, wherein the signal line may be arranged on the same layer as at least one of the plurality of electrodes of the semiconductor pattern.

[0017] The base substrate may include a substrate hole penetrating through the base layer and the barrier layer and exposing a portion of the signal line, and the display pad may include a conductive pattern filled in the substrate hole.

[0018] The base substrate may further include an additional barrier layer disposed on the lower side of the base layer and an additional base layer disposed on the lower side of the additional barrier layer and including polyimide, the base substrate may include a substrate hole that passes through the base layer, the barrier layer, the additional base layer and the additional barrier layer and exposes a portion of the signal line, and the display pad may be formed by a metal filled in the substrate hole.

[0019] The electronic device includes an adhesive layer disposed between a display module and a circuit board to bond the display module and the circuit board, wherein the adhesive layer includes at least one of a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), and an optically clear resin (OCR).

[0020] The adhesive layer may include an antistatic material.

[0021] The display pad and the first substrate pad may be connected through an anisotropic conductive film, and the second substrate pad and the driving element may be connected through another anisotropic conductive film (ACF).

[0022] The protection film may include at least one of a light blocking layer, a heat dissipation layer, and a buffer layer.

[0023] The circuit board may cover the entire rear surface of the display module.

[0024] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings illustrate exemplary embodiments of the present invention and together with the description serve to explain the inventive concept. The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification.

[0026] Figure 1 is a perspective view of an electronic device according to an exemplary embodiment.

[0027] Figure 2A is an exploded perspective view of an electronic device according to an exemplary embodiment.

[0028] Figure 2B is a block diagram of an electronic module according to an exemplary embodiment.

[0029] Figure 3A is a cross-sectional view of a display module according to an exemplary embodiment.

[0030] Figure 3B is a cross-sectional view of a display module according to an exemplary embodiment.

[0031] Figure 4 is a plan view of a display panel according to an exemplary embodiment.

[0032] Figure 5 According to an exemplary embodiment, Figure 4 A cross-sectional view taken along line II'.

[0033] Figure 6According to another exemplary embodiment, Figure 4 A cross-sectional view taken along line II'.

[0034] Fig. 7A is a plan view of a circuit board according to an exemplary embodiment.

[0035] Figure 7B is a rear view of a circuit board according to an exemplary embodiment.

[0036] Figure 8 It is along Fig. 7A A cross-sectional view taken along line II-II'.

[0037] Fig. 9 is a cross-sectional view of some components of an electronic device according to an exemplary embodiment.

[0038] Fig. 10A is a cross-sectional view of some components of an electronic device according to an exemplary embodiment.

[0039] Fig. 10B is a plan view illustrating a protective film and a driving element according to an exemplary embodiment.

[0040] Fig.11 is a plan view of a circuit board according to an exemplary embodiment. DETAILED DESCRIPTION

[0041] In the following description, for the purpose of illustration, many specific details are elaborated to provide a thorough understanding of various exemplary embodiments or implementations of the present invention. As used herein, "implementation" and "implementation" are interchangeable words, which are non-limiting examples of one or more devices or methods using the inventive concept disclosed herein. However, it is obvious that various exemplary embodiments can be put into practice without these specific details or with one or more equivalent arrangements. In other examples, in order to avoid unnecessarily blurring various exemplary embodiments, known structures and devices are shown in block diagram form. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, without departing from the inventive concept, the specific shape, configuration and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0042] Unless otherwise specified, the exemplary embodiments shown should be understood as providing exemplary features of different details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of various embodiments may be combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0043] In the accompanying drawings, the use of hatching and / or shading is generally used to make the boundaries between adjacent elements clear. Therefore, unless otherwise stated, the presence or absence of hatching or shading does not convey or indicate any preference or requirement for a specific material, material properties, size, ratio, commonality between the elements shown and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the accompanying drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the exemplary embodiments can be implemented differently, a specific processing sequence can be performed differently from the described sequence. For example, two processes described in succession can be performed substantially simultaneously, or in an order opposite to the described order. In addition, the same reference numerals represent the same elements.

[0044] When an element or layer is referred to as being "on", "connected to" or "coupled to" another element or layer, it may be directly on, directly connected to or directly coupled to another element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. For this reason, the term "connected" may represent a physical connection, an electrical connection and / or a fluid connection with or without the presence of an intervening element. In addition, the DR1 axis, the DR2 axis and the DR3 axis are not limited to the three axes of a rectangular coordinate system (such as, the x-axis, the y-axis and the z-axis), and may be interpreted in a broader sense. For example, the DR1 axis, the DR2 axis and the DR3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0045] Although the terms "first", "second", etc. can be used in this article to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below can be referred to as the second element.

[0046] Spatially relative terms such as "beneath," "below," "under," "lower," "above," "upper," "over," "higher," "side" (e.g., as in "sidewall"), and the like may be used herein for descriptive purposes, and thereby to describe the relationship of one element to another element(s) as shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as being "below" or "beneath" other elements or features would then be oriented to be "above" the other elements or features. Thus, the exemplary term "below" may encompass both the above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and thus the spatially relative descriptors used herein should be interpreted accordingly.

[0047] The terms used herein are for the purpose of describing a particular embodiment, rather than being intended to be limiting. Unless the context clearly indicates otherwise, as used herein, the singular forms "one", "an" and "the" are intended to also include plural forms. In addition, when used in this specification, the terms "comprising", "comprising", "including" and / or "including" represent the existence of stated features, integers, steps, operations, elements, parts and / or their combinations, but do not exclude the existence or addition of one or more other features, integers, steps, operations, elements, parts and / or their combinations. It should also be noted that, as used herein, the terms "substantially", "about" and other similar terms are used as approximate terms and not as degree terms, and are therefore used to allow for the inherent deviations in the measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0048] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. Therefore, differences from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are expected. Therefore, the exemplary embodiments disclosed herein should not necessarily be understood as limited to the specific illustrated shapes of the regions, but should include deviations in shape due to, for example, manufacturing. In this manner, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and therefore are not necessarily intended to be limiting.

[0049] According to the convention in the art, some exemplary embodiments are described and shown in the accompanying drawings for functional blocks, units and / or modules. It will be understood by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc.) that can be formed using semiconductor-based preparation techniques or other manufacturing techniques. In the case where blocks, units and / or modules are implemented by microprocessors or other similar hardware, software (e.g., microcode) can be used to program and control the blocks, units and / or modules to perform the various functions discussed herein, and optionally, they can be driven by firmware and / or software. It is also considered that each block, unit and / or module can be implemented by dedicated hardware, or implemented as a combination of dedicated hardware that performs some functions and processors (e.g., one or more programmed microprocessors and related circuits) that perform other functions. In addition, without departing from the scope of the inventive concept, each block, unit and / or module of some exemplary embodiments can be physically divided into two or more interactive and discrete blocks, units and / or modules. Furthermore, the blocks, units and / or modules of some exemplary embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the inventive concept.

[0050] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0051] Figure 1 is a perspective view of an electronic device according to an exemplary embodiment. Figure 2A is an exploded perspective view of an electronic device according to an exemplary embodiment. Figure 2B is a block diagram of an electronic module according to an exemplary embodiment. Figure 3A is a cross-sectional view of a display module according to an exemplary embodiment. Figure 3B is a cross-sectional view of a display module according to an exemplary embodiment. Figure 4 is a plan view of a display panel according to an exemplary embodiment. Figure 5 According to an exemplary embodiment, Figure 4 A cross-sectional view taken along line II'. Figure 6 According to another exemplary embodiment, Figure 4 A cross-sectional view of the display panel taken along line II'.

[0052] Reference Figure 1 2, the electronic device EA can be a device activated according to an electrical signal. The electronic device EA can be used in various applications. For example, the electronic device EA can be used for large display devices such as televisions, monitors, or outdoor billboards, and small and medium display devices such as personal computers, laptop computers, personal digital terminals, car navigation units, game consoles, portable electronic devices, and cameras. The inventive concept is not limited thereto, and the electronic device can be used for other display devices. In the following, the electronic device EA will be exemplarily shown as a smart phone.

[0053] The electronic device EA may display an image IM toward a third direction DR3 on a display surface FS that is parallel to the first direction DR1 and the second direction DR2. The image IM may include a still image and a dynamic image. Figure 1 The viewing window and icons are shown as examples of the image IM. The display surface FS on which the image IM is displayed may correspond to the front surface of the electronic device EA, and may correspond to the front surface of the window panel WP.

[0054] As used herein, the front surface (or upper surface) and the rear surface (or lower surface) of each member are defined relative to the direction of displaying the image IM. The front surface and the rear surface may be opposite to each other in the third direction DR3, and the normal direction of each of the front surface and the rear surface may be parallel to the third direction DR3. At the same time, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 are relative concepts and can therefore be changed to other directions. As used herein, "on a plane" may be defined as viewed from the third direction DR3.

[0055] The electronic device EA may include a window panel WP, an anti-reflection panel RPP, a display module DM, a circuit board PCB, a driving element D-IC, a protective film PF, an electronic module EM, a power module PM and a housing HU. In the exemplary embodiment shown, the window panel WP and the housing HU may be combined to form the appearance of the electronic device EA.

[0056] The window panel WP may include an optically transparent insulating material. For example, the window panel WP may include glass or plastic. The window panel WP may have a multi-layer structure or a single-layer structure. For example, the window panel WP may include a plurality of plastic films bonded by an adhesive, or may include a glass substrate and a plastic film bonded by an adhesive.

[0057] As described above, the display surface FS of the window panel WP may define the front surface of the electronic device EA. The window panel WP may include a transmissive area TA and a frame area BZA. The transmissive area TA may be an optically transparent area. For example, the transmissive area TA may have a visible light transmittance of about 90% or more.

[0058] The bezel area BZA may have a relatively lower light transmittance than the transmission area TA. The bezel area BZA may define the shape of the transmission area TA. The bezel area BZA may be adjacent to the transmission area TA and may surround the transmission area TA.

[0059] The bezel area BZA may have a predetermined color. The bezel area BZA may cover the peripheral area NAA of the display module DM to prevent the peripheral area NAA from being seen from the outside. In some exemplary embodiments, the bezel area BZA may be omitted.

[0060] The anti-reflection panel RPP may be disposed under the window panel WP. The anti-reflection panel RPP may reduce reflectivity of external light incident from an upper side of the window panel WP. In some exemplary embodiments, the anti-reflection panel RPP may be omitted and may be included in the display module DM.

[0061] The display module DM may display an image IM and sense an external input. The display module DM may include a front surface IS having an active area AA and a peripheral area NAA. The active area AA may be an area activated according to an electrical signal.

[0062] The active area AA according to an exemplary embodiment may be an area for displaying an image IM, and may also be an area for sensing an external input. The transmissive area TA may overlap at least a portion of the active area AA. For example, the transmissive area TA may overlap at least a portion of the front surface IS or the active area AA.

[0063] Therefore, the user may view the image IM or provide an external input through the transmissive area TA. However, the inventive concept is not limited thereto, and in some exemplary embodiments, for example, an area displaying the image IM and an area sensing the external input may be separated from each other in the active area AA.

[0064] The peripheral area NAA may be an area covered by the bezel area BZA. The peripheral area NAA may be adjacent to the active area AA. The peripheral area NAA may surround the active area AA. A driving element or driving wiring for driving the active area AA may be provided in the peripheral area NAA.

[0065] The display module DM may include a display panel DP and a detection sensor ISP. The display panel DP may be configured to substantially generate an image IM. A user may view the image IM generated by the display panel DP from the outside through the transmissive area TA.

[0066] The detecting sensor ISP may sense an external input applied from the outside. For example, the detecting sensor ISP may sense an external input provided to the window panel WP.

[0067] The external input may include various forms of input provided from outside the electronic device EA. For example, the external input may include an external input applied when approaching the electronic device EA or adjacent to the electronic device at a predetermined distance (e.g., hovering), and contact by a part of the body (such as a user's hand). In addition, the external input may be provided in various forms, such as force, pressure, and light, but is not limited thereto.

[0068] The display module DM includes a display pad area PDD. The display pads of the display pad area PDD may be arranged in the second direction DR2, and the plurality of display pads may be exposed from the rear surface IU of the display module DM.

[0069] The display pad region PDD may be a region connected to the substrate pad region PDC of the circuit board PCB. The display module DM includes a plurality of display pads disposed in the display pad region PDD. The display pads may be disposed on a rear surface IU of the display module DM.

[0070] The circuit board PCB may be disposed on the lower side of the display module DM. More specifically, the circuit board PCB may be disposed on the rear surface IU of the display module DM. The circuit board PCB may cover at least a portion of the rear surface IU of the display module DM.

[0071] The circuit board PCB includes a substrate pad region PDC. A plurality of pads in the substrate pad region PDC may be exposed from the front surface PS of the circuit board PCB.

[0072] As described above, the substrate pad region PDC may be a region connected to the display pad region PDD of the display module DM. The substrate pad region PDC may include a plurality of pads corresponding to the display pads included in the display pad region PDD.

[0073] The circuit board PCB is electrically connected to the display module DM. The circuit board PCB may generate an electrical signal and provide the electrical signal to the display module DM, or receive and process an electrical signal generated from the display module DM.

[0074] The electrical signal generated in the circuit board PCB may be provided to the pixel PX through the signal line of the display panel DP. The signal line may include at least one or more of the power line PL, the scan line GL, the data line DL, and the light emitting control line EL, which will be referred to later. Figure 4 Describe in more detail.

[0075] The adhesive layer ADL may be disposed between the display module DM and the circuit board PCB to bond the display module DM and the circuit board PCB. The adhesive layer ADL may have an area smaller than each of the display module DM and the circuit board PCB in the first and second directions DR1 and DR2.

[0076] The adhesive layer ADL may be spaced apart from the display pad region PDD exposed on the rear surface IU of the display module DM and the substrate pad region PDC exposed in the front surface PS of the circuit board PCB. Therefore, the display pad region PDD and the substrate pad region PDC may be electrically connected to each other without the adhesive layer ADL interposed therebetween.

[0077] The adhesive layer ADL may include a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), and / or an optically clear resin (OCR).

[0078] The adhesive layer ADL according to the exemplary embodiment may include an antistatic material known in the art. In this manner, the adhesive layer ADL including the antistatic material may prevent static electricity from flowing into the display module DM.

[0079] The driving element D-IC may be disposed on the rear surface PU of the circuit board PCB to be connected to the circuit board PCB. The circuit board PCB may electrically connect the driving element D-IC and the display module DM, and the driving element D-IC may generate an electrical signal to be provided to the display module DM or process an electrical signal provided from the display module DM.

[0080] The driving element D-IC may include a gate driving circuit that generates a gate signal or a data driving circuit that generates a data signal. However, the inventive concept is not limited thereto, and the driving element D-IC in some exemplary embodiments may include various control circuits that generate and process various control signals for driving the display module DM.

[0081] The protection film PF may be disposed on the rear surface PU of the circuit board PCB to be bonded to the circuit board PCB through the adhesive layer. The protection film PF may be disposed on the lower side of the display module DM to protect the display module DM from external impact.

[0082] The protective film PF may be connected to the second substrate pad IP exposed on the rear surface PU of the circuit board PCB (see Figure 7B ) are spaced apart. As used herein, the term "spaced apart" may mean "not overlapping" in a plane.

[0083] The protection film PF may include a plurality of layers. For example, the protection film PF may include a light blocking layer, a heat dissipation layer, a buffer layer, and a plurality of adhesive layers.

[0084] The light blocking layer may prevent components disposed on the rear surface IU of the display module DM from being seen. The light blocking layer may include a binder and a plurality of pigment particles dispersed therein. The pigment particles may include carbon black or the like.

[0085] The display module DM according to the exemplary embodiment may include a protective film PF including a light blocking layer to enhance light blocking performance and impact resistance. In this way, the electronic device EA using the display module DM according to the exemplary embodiment may have improved visibility and reliability against external shock or stress generated during use.

[0086] The heat dissipation layer can effectively dissipate the heat generated from the display module DM. The heat dissipation layer can be set as a metal plate with good heat dissipation performance. For example, the heat dissipation layer can include at least any one of stainless steel, graphite, copper (Cu) and aluminum (Al), but is not limited thereto. The heat dissipation layer can not only enhance the heat dissipation performance, but also have electromagnetic wave shielding performance or electromagnetic wave absorption performance.

[0087] The buffer layer may include any one of sponge, foam or polyurethane resin. When the buffer layer includes foam, the buffer layer includes a matrix member and a plurality of voids. The plurality of voids may be dispersed in the matrix member and defined by the matrix member. The buffer layer may have elasticity and a porous structure.

[0088] The matrix member may include a flexible material. For example, the matrix layer may include a synthetic resin. For example, the matrix layer may include at least any one of acrylonitrile butadiene styrene copolymer (ABS), polyurethane (PU), polyethylene (PE), ethylene vinyl acetate (EVA) and polyvinyl chloride (PVC).

[0089] The plurality of voids easily absorbs the impact applied to the buffer layer. The plurality of voids may be defined by the porous structure of the buffer layer. The plurality of voids ensures that the shape of the buffer layer is transformed to ensure the elasticity of the buffer layer, thereby enhancing the impact resistance of the electronic device EA. The buffer layer may include a variety of synthetic resins, but is not limited thereto.

[0090] Reference Figure 2B , the electronic device EA may include a display module DM, a power module PM and an electronic module EM. The electronic module EM may include a first electronic module EM1 and a second electronic module EM2. The display module DM, the power module PM, the first electronic module EM1 and the second electronic module EM2 may be electrically connected to each other.

[0091] The display module DM may include a display panel DP and a detection sensor ISP. The display panel DP may be configured to generate an image IM, and the detection sensor ISP may be configured to sense an external input.

[0092] The first electronic module EM1 and the second electronic module EM2 may include various functional modules for operating the electronic device EA. The first electronic module EM1 may be mounted on a motherboard electrically connected to the display module DM, or may be mounted on a separate substrate to be electrically connected to the motherboard through a connector.

[0093] The first electronic module EM1 may include a control module CM, a wireless communication module TM, an image input module IIM, an audio input module AIM, a memory MM, and an external interface IF. Some of the modules may not be mounted on the motherboard but may be electrically connected to the motherboard through a circuit board PCB.

[0094] The control module CM controls the overall operation of the electronic device EA. The control module CM may include a microprocessor. For example, the control module CM activates or deactivates the display module DM. The control module CM may control other modules such as the image input module IIM or the audio input module AIM based on a touch signal received from the display module DM.

[0095] The wireless communication module TM can transmit / receive wireless signals with other terminals using Bluetooth or Wi-Fi lines. The wireless communication module TM can transmit / receive voice signals using general communication lines. The wireless communication module TM includes a transmission unit TM1 that modulates the signal to be transmitted and transmits the signal, and a reception unit TM2 that demodulates the received signal.

[0096] The image input module IIM processes the image signal and converts the signal into image data that can be displayed on the display module DM. The audio input module AIM receives an external sound signal through a microphone in a recording mode, a voice recognition mode, etc. and converts the signal into electrical voice data.

[0097] The external interface IF may be an interface connected to an external charger, a wired / wireless data port, a card (eg, memory card, SIM / UIM card) holder, and the like.

[0098] The second electronic module EM2 may include an audio output module AOM, a light emitting module LM, a light receiving module LRM and a camera module CMM. These components may be mounted directly on a motherboard, or mounted on a separate substrate to be electrically connected to the display module DM through a connector, or may be electrically connected to the first electronic module EM1.

[0099] The audio output module AOM converts sound data received from the wireless communication module TM or sound data stored in the memory MM and outputs the data to the outside.

[0100] The light emitting module LM generates and outputs light. The light emitting module LM may output infrared light. For example, the light emitting module LM may include an LED element. For example, the light receiving module LRM may detect infrared light. The light receiving module LRM may be activated when infrared light having a predetermined level or higher is detected. The light receiving module LRM may include a CMOS sensor. After the infrared light generated from the light emitting module LM is output and reflected by an external object (e.g., a finger or face of a user), the reflected infrared light may be incident on the light receiving module LRM. The camera module CMM may capture external images.

[0101] The power module PM provides the power required for the overall operation of the electronic device EA. The power module PM may include a conventional battery module.

[0102] Reference Figure 3A , the display module DM may include a display panel DP, a detection sensor ISP, and a bonding member SLM.

[0103] The display panel DP may include a first base substrate BS1, a circuit element layer ML-D, and a display element layer EML. The detection sensor ISP may include a second base substrate BS2 and a sensing circuit layer ML-T.

[0104] Each of the first base substrate BS1 and the second base substrate BS2 may be a silicon substrate, a plastic substrate, a glass substrate, an insulating film, or a stack structure including a plurality of insulating layers.

[0105] The circuit element layer ML-D may be disposed on the first base substrate BS1. The circuit element layer ML-D may include a plurality of insulating layers, a plurality of conductive layers, and a semiconductor layer. The plurality of conductive layers of the circuit element layer ML-D may form a signal line or a control circuit for the pixel PX.

[0106] The display element layer EML may be disposed on the circuit element layer ML-D. The display element layer EML may include an organic light emitting diode. However, the present inventive concept is not limited thereto, and in other exemplary embodiments, the display element layer EML may include an inorganic light emitting diode, an organic-inorganic light emitting diode, or a liquid crystal layer.

[0107] The second base substrate BS2 may be disposed on the display element layer EML. A predetermined space may be defined between the second base substrate BS2 and the display element layer EML. The space may be filled with air or an inert gas. In some exemplary embodiments, the space may be additionally or alternatively filled with a filler such as a silicone-based polymer, an epoxy-based resin, or an acrylic-based resin.

[0108] The sensing circuit layer ML-T may be disposed on the second base substrate BS2. The sensing circuit layer ML-T may include a plurality of insulating layers and a plurality of conductive layers. The plurality of conductive layers may include sensing electrodes for sensing external inputs, sensing wirings electrically connected to the sensing electrodes, and sensing pads electrically connected to the sensing wirings.

[0109] The bonding member SLM may be disposed between the first base substrate BS1 and the second base substrate BS2. The bonding member SLM may bond the first base substrate BS1 and the second base substrate BS2. The bonding member SLM may include an organic material such as a photocurable resin or a photoplastic resin or an inorganic material such as a frit sealant, but is not limited thereto.

[0110] Reference Figure 3B , the display module DM- 1 according to the exemplary embodiment may include a display panel DP- 1 and a detection sensor ISP- 1 .

[0111] The display panel DP-1 may include a first base substrate BS1, a circuit element layer ML-D, a display element layer EML, and a thin film encapsulation layer ETL. The detection sensor ISP-1 may include a sensing circuit layer ML-T. The thin film encapsulation layer ETL and the second base substrate BS2 may have substantially the same configuration.

[0112] The thin film encapsulation layer ETL may seal the display element layer EML from the outside to prevent moisture, oxygen, etc. from flowing into the display element layer EML. The thin film encapsulation layer ETL may include an organic layer and a plurality of inorganic layers that seal the organic layer.

[0113] The inorganic layer can prevent external moisture, oxygen, etc. from penetrating into the display element layer EML. The inorganic layer may include silicon oxide (SiO x ), silicon oxynitride (SiO x N y )、ZrO x ) or a combination thereof. For example, the inorganic layer can be formed by a deposition process.

[0114] The organic layer may be disposed on the display element layer EML to provide a flat surface. Curves or particles formed on the upper surface of the display element layer EML may be covered by the organic layer to prevent components (eg, the detection sensor ISP-1) formed on the organic layer from being affected.

[0115] According to an exemplary embodiment, the display panel DP-1 and the detection sensor ISP-1 may be formed through a continuous process. In particular, the sensing circuit layer ML-T may be directly formed on the thin film encapsulation layer ETL.

[0116] Reference Figure 4, the display panel DP may include a plurality of pixels PX, a plurality of signal lines GL, DL, PL, and EL, and a plurality of display pads VP.

[0117] The active area AA of the display panel DP may be an area where an image is displayed, and the peripheral area NAA may be an area where a driving circuit, a driving wiring, etc. may be disposed. In the active area AA, a light-emitting area in which a plurality of pixels PX emit light and a non-light-emitting area adjacent to the light-emitting area may be disposed.

[0118] A plurality of signal lines GL, DL, PL, and EL may be connected to the pixels PX to transfer electrical signals to the pixels PX. Figure 4 The scan line GL, the data line DL, the power line PL, and the light emission control line EL among the signal lines included in the display panel DP are exemplarily shown. However, the inventive concept is not limited thereto, and in some exemplary embodiments, an initialization voltage line may be further included in the peripheral area NAA.

[0119] In addition, the power pattern may be provided in the peripheral area NAA to be connected to the plurality of power lines PL. Therefore, the display panel DP may provide the same power signal to the pixels PX.

[0120] The display pads VP exposed on the rear surface IU of the display module DM may be provided in plurality to be respectively connected to the data lines DL. The remaining display pads VP may be connected to the power pattern to be electrically connected to the power line PL. The display panel DP may provide the pixel PX with an electrical signal provided from the driving element D-IC through the display pads VP.

[0121] Reference Figure 5 , the display panel DP according to the exemplary embodiment may include a plurality of insulating layers, semiconductor patterns, conductive patterns, and signal lines. The insulating layers, semiconductor layers, and conductive layers may be formed by, for example, coating or vapor deposition. Thereafter, the insulating layers, semiconductor layers, and conductive layers may be selectively patterned by a photolithography method. In this way, semiconductor patterns, conductive patterns, signal lines, and the like may be formed.

[0122] The base substrate BS1 may include a multi-layer structure including a base layer PI and a barrier layer BI. The base layer PI may include an organic material.

[0123] For example, the base layer PI may include at least one or more of polyimide, polyethylene naphthalate, polyethylene terephthalate, polyarylate, polycarbonate, polyetherimide, and polyethersulfone. In this way, the base layer PI may be flexible. However, the present inventive concept is not limited thereto, and in some exemplary embodiments, the base substrate BS1 may be rigid.

[0124] The barrier layer BI is disposed on the base layer PI. The barrier layer BI may cover the base layer PI. The barrier layer BI may be an insulating layer including an inorganic material. For example, the barrier layer BI may include aluminum oxide (AlO x ), titanium oxide (TiO x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y )、ZrO x ) and hafnium oxide (HfO x ) At least one or more of the above. The barrier layer BI may be formed of multiple inorganic layers. The barrier layer BI may prevent impurities from entering from the outside.

[0125] The transistor TR may include a plurality of electrodes. For example, the source electrode SE, the active electrode AP and the drain electrode DE of the transistor TR are formed by a semiconductor pattern. The transistor TR controls the charge transfer in the semiconductor pattern through the gate electrode GE to output the electrical signal input from the source electrode SE through the drain electrode DE.

[0126] The first insulating layer 10 is disposed on the base substrate BS1. The first insulating layer 10 covers the semiconductor pattern. The first insulating layer 10 may include an inorganic layer and / or an organic layer, and may have a single-layer structure or a multi-layer structure. The first insulating layer 10 may include aluminum oxide (AlO x ), titanium oxide (TiO x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y )、ZrO x ) and hafnium oxide (HfO x ) at least one or more.

[0127] In the illustrated embodiment, the first insulating layer 10 may be a single layer of silicon oxide (SiO x ) layer. The insulating layer to be described later except the first insulating layer 10 may include an inorganic layer and / or an organic layer, and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the above-mentioned materials.

[0128] The gate GE is disposed on the first insulating layer 10. The gate GE may be a part of the metal pattern. The gate GE may overlap with the active electrode AP. In the process of doping the semiconductor pattern, the gate GE may function as a mask.

[0129] The second insulating layer 20 covering the gate electrode GE is disposed on the first insulating layer 10. The second insulating layer 20 may include an inorganic layer and / or an organic layer, and may have a single-layer structure or a multi-layer structure. In the exemplary embodiment shown, the second insulating layer 20 may be a single-layer silicon oxide (SiOx )layer.

[0130] The first connection electrode SD1 may be disposed on the second insulating layer 20. The first connection electrode SD1 may be connected to the second insulating layer 20 through a contact hole penetrating the first insulating layer 10 and the second insulating layer 20. Figure 4 Any of the signal lines shown.

[0131] The third insulating layer 30 is disposed on the second insulating layer 20. The third insulating layer 30 may include an organic layer. The second connection electrode SD2 may be disposed on the third insulating layer 30. The second connection electrode SD2 may be connected to the first connection electrode SD1 through a contact hole penetrating the third insulating layer 30.

[0132] The fourth insulating layer 40 covering the second connection electrode SD2 is disposed on the third insulating layer 30. The fourth insulating layer 40 may include an organic layer.

[0133] In the illustrated exemplary embodiment, the organic light emitting diode OLED may include a first electrode EL1 , a hole control layer HCL, a light emitting layer ELP, an electron control layer ECL, and a second electrode EL2 .

[0134] The first electrode EL1 is disposed on the fourth insulating layer 40. The first electrode EL1 is connected to the second connection electrode SD2 through a contact hole passing through the fourth insulating layer 40.

[0135] A display opening is defined in the pixel definition film PDL. The display opening of the pixel definition film PDL exposes at least a portion of the first electrode EL1. The portion of the first electrode EL1 exposed by the display opening may be defined as a light emitting region, and a portion adjacent to the light emitting region may be defined as a non-light emitting region.

[0136] The hole control layer HCL may be disposed in common in the light emitting region and the non-light emitting region. The hole control layer HCL may include a hole transport layer and may further include a hole injection layer. The light emitting layer ELP is disposed on the hole control layer HCL. The light emitting layer ELP may be disposed in a region corresponding to a display opening. The light emitting layer ELP may be formed separately in each of the pixels PX.

[0137] The electron control layer ECL is disposed on the light emitting layer ELP. The electron control layer ECL may include an electron transport layer and may further include an electron injection layer. The hole control layer HCL and the electron control layer ECL may be formed together in a plurality of pixels PX using an open mask. The second electrode EL2 is disposed on the electron control layer ECL. The second electrode EL2 may be formed together and continuously in a plurality of pixels PX.

[0138] The thin film encapsulation layer ETL is disposed on the second electrode EL2. The thin film encapsulation layer ETL is disposed in common in a plurality of pixels PX. In the exemplary embodiment shown, the thin film encapsulation layer ETL may directly cover the second electrode EL2. In some exemplary embodiments, a capping layer covering the second electrode EL2 may also be disposed between the thin film encapsulation layer ETL and the second electrode EL2. In this case, the thin film encapsulation layer ETL may directly cover the capping layer. The thin film encapsulation layer ETL according to the exemplary embodiment shown may correspond to the reference Figure 3B A thin film encapsulation layer ETL is described.

[0139] According to an exemplary embodiment, Figure 4 One of the signal lines shown (eg, data line DL, and hereinafter also referred to as signal line DL) may extend from the semiconductor pattern and be connected to the display pad VP. In particular, the signal line DL may extend from the active area AA to the peripheral area NAA to be connected to the display pad VP.

[0140] The signal line DL may be disposed on the same layer as any one of the electrodes included in the transistor TR. For example, the signal line DL may branch from the source electrode SE. In the exemplary embodiment shown, the signal line DL may be disposed on the blocking layer BI.

[0141] In the illustrated exemplary embodiment, the base substrate BS1 overlaps the peripheral area NAA, and a substrate hole VH penetrating the base layer PI and the barrier layer BI may be defined in the base substrate BS1 to expose a portion of the signal line DL.

[0142] The display pad VP may be connected to a portion of the signal line DL. The display pad VP may be formed of a metal filled in the substrate hole VH. The display pad VP and the signal line DL may be provided in plural to be connected to a corresponding pixel PX.

[0143] Reference Figure 6 , the base substrate BS1-A of the display panel DP-A according to the illustrated exemplary embodiment may include a barrier layer BI1, a base layer PI1, an additional barrier layer BI2, and an additional base layer PI2 stacked along a third direction DR3. The additional base layer PI2 may include polyimide.

[0144] The components of the display panel DP-A according to the illustrated exemplary embodiment are similar to those of the display panel DP-A except for the base substrate BS1-A. Figure 5 Components of the display panel DP shown in FIG. 1 are substantially the same. Thus, in order to avoid redundancy, repeated description of substantially the same components of the display panel DP-A already described above will be omitted.

[0145] The base substrate BS1 -A overlaps the peripheral area NAA, and a substrate hole VH-A penetrating the barrier layer BI1 , the base layer PI1 , the additional barrier layer BI2 , and the additional base layer PI2 may be defined in the base substrate BS1 -A to expose a portion of the signal line DL.

[0146] The display pad VP-A may be connected to a portion of the signal line DL. The display pad VP-A may be formed of a metal filled in the substrate hole VH-A. The display pad VP-A and the signal line DL may be provided in plural to be connected to the corresponding pixel PX.

[0147] Fig. 7A is a plan view of a circuit board according to an exemplary embodiment. Figure 7B is a rear view of a circuit board according to an exemplary embodiment. Figure 8 It is along Fig. 7A A cross-sectional view taken along line II-II'.

[0148] Reference Fig. 7A and Figure 7B The circuit board PCB according to the exemplary embodiment shown can be divided into a line area CBA and a dummy area DMA adjacent to the line area CBA. The circuit board PCB includes a front surface PS facing the rear surface IU of the display module DM and a rear surface PU facing the front surface PS.

[0149] The line area CBA of the circuit board PCB may include substrate signal lines mounted on the circuit board PCB, first substrate pads CP disposed in the first substrate pad area PDC, and second substrate pads IP disposed in the second substrate pad area PDI.

[0150] The first substrate pad CP is disposed on the front surface PS and overlaps the line area CBA. The first substrate pad CP can be connected to the display pad VP of the display module DM. The second substrate pad IP is disposed on the rear surface PU and overlaps the line area CBA. The second substrate pad IP can be connected to the driving element D-IC.

[0151] In the exemplary embodiment shown, the circuit board PCB may further include a connector CNT protruding from the line area CBA in the second direction DR2. The connector CNT may be used as a test connector for checking whether the circuit board PCB works in the process of assembling the display module DM. In addition, the connector CNT may be bent in a direction toward the rear surface PU to be connected to the electronic module EM, but is not limited thereto.

[0152] The line area CBA according to the illustrated exemplary embodiment is shown as being disposed on the right side and bottom side of the circuit board PCB, but the inventive concept is not limited thereto. For example, in other exemplary embodiments, the position of the line area CBA may be changed according to the configuration of the display module DM and the circuit board PCB.

[0153] Reference Figure 8 According to the exemplary embodiment shown, the circuit board PCB may include a plurality of insulating layers. For example, the circuit board PCB may include a first solder resist layer SR-1, a first substrate insulating layer IL-1, a second substrate insulating layer IL-2, and a second solder resist layer SR-2 stacked in sequence.

[0154] The first substrate insulating layer IL-1 and the second substrate insulating layer IL-2 may include at least any one of polyimide, polyethylene naphthalate, polyethylene terephthalate, polyarylate, polycarbonate, polyetherimide, and polyethersulfone. The second solder resist layer SR-2 may cover the first substrate insulating layer IL-1 and the second substrate insulating layer IL-2.

[0155] The circuit board PCB may include a conductive pad disposed between a plurality of insulating layers. For example, the circuit board PCB may include a first substrate signal line SL-1 disposed on a first solder resist layer SR-1 and a second substrate signal line SL-2 insulated from the first substrate signal line SL-1, wherein the first substrate insulating layer IL-1 is interposed between the first substrate signal line SL-1 and the second substrate signal line SL-2.

[0156] The circuit board PCB may include a first substrate pad CP and a second substrate pad IP. The first substrate pad CP may be provided in a hole penetrating the second solder resist layer SR-2 and the second substrate insulating layer IL-2 to expose a portion of the second substrate signal line SL-2 from the front surface PS. The second substrate pad IP may be provided in a hole penetrating the first solder resist layer SR-1 and the first substrate insulating layer IL-1 to expose a portion of the second substrate signal line SL-2 from the rear surface PU.

[0157] In the illustrated exemplary embodiment, the first substrate pad CP may overlap at least a portion of the second substrate pad IP.

[0158] The first substrate pad CP and the second substrate pad IP may be connected to opposite surfaces of the second substrate signal line SL-2 of the substrate signal lines SL-1 and SL-2.

[0159] Figure 8The circuit board PCB is exemplarily shown as having two substrate insulating layers IL-1 and IL-2 and two substrate signal lines SL-1 and SL-2, but the inventive concept is not limited thereto. For example, in some exemplary embodiments, the circuit board PCB may include two or more substrate insulating layers and substrate signal lines.

[0160] Furthermore, in some exemplary embodiments, the circuit board PCB may further include a bridge pattern penetrating the substrate insulating layers IL-1 and IL-2 to connect the first substrate signal line SL-1 and the second substrate signal line SL-2 disposed on different layers.

[0161] Fig. 9 is a cross-sectional view of some components of an electronic device according to an exemplary embodiment.

[0162] Reference Fig. 9 , the display pad VP of the display module DM and the first substrate pad CP of the circuit board PCB may be connected by a conductive adhesive member ACF. In addition, the driving element D-IC and the second substrate pad IP of the circuit board PCB may be connected by a conductive adhesive member ACF. The conductive adhesive member ACF may include an anisotropic conductive adhesive film (ACF).

[0163] In the area outside the area where the display pad VP and the first substrate pad CP are connected by the conductive adhesive member ACF, the display module DM and the circuit board PCB can be connected by the first adhesive layer ADL1. In addition, in the area outside the area where the driving element D-IC and the second substrate pad IP are connected by the conductive adhesive member ACF, the circuit board PCB and the protective film PF can be connected by the second adhesive layer ADL2.

[0164] In the illustrated exemplary embodiment, the first substrate pad CP may overlap at least a portion of the second substrate pad IP.

[0165] The first adhesive layer ADL1 and the second adhesive layer ADL2 may each include at least one of a pressure sensitive adhesive (PSA), an optically clear adhesive (OCA), and an optically clear resin (OCR), but are not limited thereto.

[0166] According to an exemplary embodiment, the circuit board PCB is disposed between the display module DM and the protective film PF. In this way, a flexible circuit board bent from the display panel DP to connect to the driving element D-IC can be avoided, and defects that may be generated due to bending the display panel DP, such as cracks in the signal line, can be prevented or at least suppressed.

[0167] Furthermore, avoiding the bending process of the display panel DP during manufacturing can simplify the process for manufacturing the electronic device EA. In addition, since the insulating layer provided in the circuit board PCB can include any one of polyimide and polyethylene terephthalate (PET), the impact resistance of the electronic device EA can be improved.

[0168] Fig. 10A is a cross-sectional view of some components of an electronic device according to an exemplary embodiment. Fig. 10B is a plan view showing a protective film and a driving element according to an exemplary embodiment. Fig. 9 The same / similar components shown in FIG. 1 are given the same / similar reference numerals, and thus, repeated descriptions thereof will be omitted. Hereinafter, an electronic device EA-1 according to the illustrated exemplary embodiment will be described.

[0169] Reference Fig. 10A and Fig. 10B , the display pad VP of the display module DM according to the exemplary embodiment shown and the first substrate pad CP of the circuit board PCB-1 can be connected by a conductive adhesive member ACF. In addition, the driving element D-IC and the second substrate pad IP-1 of the circuit board PCB-1 can be connected by a conductive adhesive member ACF. The conductive adhesive member ACF may include an anisotropic conductive adhesive film (ACF).

[0170] In a region other than a region where the display pads VP and the first substrate pads CP are connected by the conductive adhesive member ACF, the display module DM and the circuit board PCB-1 may be connected by the first adhesive layer ADL1.

[0171] Furthermore, in an area other than the area where the driving element D-IC and the second substrate pad IP-1 are connected by the conductive adhesive member ACF, the circuit board PCB-1 and the protection film PF-1 may be connected by the second adhesive layer ADL2-1.

[0172] In the exemplary embodiment shown, the first substrate pad CP may be spaced apart from the second substrate pad IP-1. Accordingly, the driving element D-IC may be connected to the second substrate pad IP-1 exposed through the first hole A-OP of the second adhesive layer ADL2-1 and the second hole P-OP of the protective film PF-1. In this case, the driving element D-IC may be surrounded by the second adhesive layer ADL2-1 and the protective film PF-1.

[0173] Fig.11 is a plan view of a circuit board according to an exemplary embodiment. Fig. 7A and Figure 7B The same / similar components shown in FIG. 1 are given the same / similar reference numerals, and thus, duplicate descriptions thereof will be omitted.

[0174] The circuit board PCB-1 according to the exemplary embodiment shown may be divided into a line area CBA and a dummy area DMA adjacent to the line area CBA. The line area CBA may include a substrate pad CP disposed on the first substrate pad area PDC and a connector CNT protruding from the line area CBA along the second direction DR2. The circuit board PCB-1 according to the exemplary embodiment shown may further include a metal pattern DMP disposed in the dummy area DMA.

[0175] The metal pattern DMP may have an electromagnetic wave shielding property or an electromagnetic wave absorbing property. Since the metal pattern DMP is embedded in the circuit board PCB-1, the metal pattern DMP may be omitted. Figure 2A The functional layer including the metal plate in the protective film PF described in . Therefore, it is possible to provide an electronic device EA that is thinner than an electronic device having a separate metal plate provided.

[0176] According to an exemplary embodiment, the circuit board PCB is disposed between the display module and the protective film. In this way, a flexible circuit board bent from the display panel to connect to the driving element can be avoided, and defects that may be generated by bending the display panel, such as cracks in the signal line, can be prevented or at least suppressed.

[0177] Furthermore, avoiding the bending process of the display panel DP during manufacturing can simplify the process for manufacturing the electronic device EA. In addition, since the insulating layer provided in the circuit board includes any one of polyimide and polyethylene terephthalate (PET), the impact resistance of the electronic device EA can be improved.

[0178] Although certain exemplary embodiments and examples have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to these embodiments, but is limited to the broader scope of the appended claims and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.

Claims

1. An electronic device, comprising: A display module having a front surface and a rear surface opposite to the front surface, the display module comprising pixels disposed on the front surface and display pads connected to the pixels and exposed from the rear surface; a protective film, disposed on the rear surface of the display module; a circuit board disposed between the display module and the protective film and having a front surface facing the rear surface of the display module and a rear surface opposite to the front surface of the circuit board, the circuit board comprising a first substrate pad connected to the display pad and exposed from the front surface of the circuit board and a second substrate pad exposed from the rear surface of the circuit board; as well as a driving element connected to the second substrate pad to drive the pixel, wherein the protective film exposes a portion of the rear surface of the circuit board, and the driving element is connected to the second substrate pad in the portion of the circuit board exposed from the protective film.

2. The electronic device according to claim 1, wherein: The circuit board also includes: First solder mask layer; a plurality of substrate insulating layers disposed on the first solder resist layer and comprising at least one of polyimide and polyethylene terephthalate; a plurality of substrate signal lines disposed between the plurality of substrate insulating layers; and a second solder resist layer, covering the plurality of substrate insulating layers, The first substrate pad and the second substrate pad are connected to the same substrate signal line among the plurality of substrate signal lines.

3. The electronic device according to claim 1, wherein: The first substrate pad overlaps at least a portion of the second substrate pad.

4. The electronic device according to claim 1, wherein: The first substrate pad is spaced apart from the second substrate pad; and The driving element is surrounded by the protective film.

5. The electronic device according to claim 4, wherein: The protective film includes a penetrating receiving hole; and The driving element is accommodated in the accommodation hole.

6. The electronic device according to claim 1, wherein: The circuit board includes a line area and a dummy area adjacent to the line area, wherein a substrate signal line is disposed in the line area.

7. The electronic device according to claim 6, further comprising an electronic module disposed on the lower side of the protective film and comprising at least one of an audio output module, a light emitting module, a light receiving module, and a camera module, in, The circuit board also includes a connector connected to the electronic module.

8. The electronic device according to claim 6, wherein: The circuit board further includes a metal pattern disposed in the dummy area.

9. The electronic device according to claim 1, wherein: The display module comprises: A base substrate, comprising a base layer and a barrier layer disposed on the base layer, wherein the base layer comprises an organic material and the barrier layer comprises an inorganic material; a transistor disposed on the base layer and including a semiconductor pattern having a plurality of electrodes; an organic light emitting element connected to the transistor; and a signal line connecting the transistor and the display pad, and The signal line is disposed on a same layer as at least one of the plurality of electrodes of the semiconductor pattern.

10. The electronic device according to claim 9, wherein: The base substrate includes a substrate hole penetrating through the base layer and the barrier layer and exposing a portion of the signal line; and The display pad includes a conductive pattern filled in the substrate hole.

11. The electronic device according to claim 9, wherein: The base substrate further includes an additional barrier layer disposed on an underside of the base layer and an additional base layer disposed on an underside of the additional barrier layer and including polyimide; a substrate hole penetrating through the base layer, the barrier layer, the additional base layer, and the additional barrier layer, and exposing a portion of the signal line; and The display pad is formed of metal filled in the substrate hole.

12. The electronic device according to claim 1, further comprising an adhesive layer disposed between the display module and the circuit board to bond the display module and the circuit board, in, The adhesive layer includes at least one of a pressure-sensitive adhesive, an optically transparent adhesive, and an optically transparent resin.

13. The electronic device according to claim 12, wherein: The adhesive layer includes an antistatic material.

14. The electronic device according to claim 1, wherein: The display pad and the first substrate pad are connected through an anisotropic conductive film, and the second substrate pad and the driving element are connected through another anisotropic conductive film.

15. The electronic device according to claim 1, wherein: The protection film includes at least one of a light blocking layer, a heat dissipation layer, and a buffer layer.

16. The electronic device according to claim 1, wherein: The circuit board covers the entire rear surface of the display module.

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