Method for removing one or more devices from a strip using a support plate

Abstract

A method of removing a device from a substrate using a support plate. One or more strips composed of semiconductor layers are formed on the substrate, and one or more device structures are formed on the strips. At least one support plate is bonded to the strips, and stress is applied to the support plate to remove the strips from the substrate. The support plate is used to divide the strips into one or more device units after the strips are removed from the substrate, wherein the device units are packaged and arranged into one or more modules. The support plate can also be used to create one or more cleaved facets in the device structures after the strips are removed from the substrate.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit under 35 USC § 119(e) of the following co-pending and commonly assigned applications:

[0003] U.S. Provisional Application Serial No. 62 / 817,216, filed on March 12, 2019 by Takeshi Kamikawa, Srinivas Gandrothula, and Masahiro Araki, entitled “METHOD FOR REMOVING A BAR OF ONE OR MORE DEVICES USING SUPPORTING PLATES” (Attorney Docket No. G&C 30794.0724USP1 (UC 2019-416-1));

[0004] This application is incorporated herein by reference.

[0005] This application is related to the following co-pending and commonly assigned applications:

[0006] U.S. utility patent application No. 16 / 608,071, filed on October 24, 2019, by Takeshi Kamikawa, Srinivas Gandrothula, Hongjian Li, and Daniel A. Cohen, and entitled “METHOD OF REMOVING A SUBSTRATE,” (attorney docket no. 30794.0653USWO (UC 2017-621-1)), which claims the benefit under 35 U.S.C. 365(c) of co-pending and commonly assigned PCT International Patent Application No. PCT / US18 / 31393, filed on May 7, 2018, by Takeshi Kamikawa, Srinivas Gandrothula, Hongjian Li, and Daniel A. Cohen, and entitled “METHOD OF REMOVING A SUBSTRATE,” (attorney docket no. 30794.0653WO (UC 2017-621-1)). 2017-621-2), which claims the benefit of co-pending and commonly assigned U.S. Provisional Patent Application No. 62 / 502,205, filed on May 5, 2017, entitled “METHOD OF REMOVING A SUBSTRATE,” by Takeshi Kamikawa, Srinivas Gandrothula, Hongjian Li, and Daniel A. Cohen (Attorney Docket No. 30794.0653USP1 (UC 2017-621-1) pursuant to 35 U.S.C. § 119(e);

[0007] U.S. utility patent application Ser. No. 16 / 642,298, filed on February 20, 2020 by Takeshi Kamikawa, Srinivas Gandrothula, and Hongjian Li, and entitled “METHOD OF REMOVING A SUBSTRATE WITH A CLEAVING TECHNIQUE,” attorney docket No. 30794.0659USWO (UC 2018-086-2), which claims the benefit pursuant to 35 U.S.C. 365(c) of co-pending and commonly assigned PCT International Patent Application No. PCT / US18 / 51375, filed on September 17, 2018 by Takeshi Kamikawa, Srinivas Gandrothula, and Hongjian Li, and entitled “METHOD OF REMOVING A SUBSTRATE WITH A CLEAVING TECHNIQUE,” attorney docket No. 30794.0659WO (UC 2018-086-2). 2018-086-2)), which claims the benefit of co-pending and commonly assigned U.S. Provisional Patent Application No. 62 / 559,378, filed on September 15, 2017, entitled “METHOD OF REMOVING A SUBSTRATE WITH A CLEAVING TECHNIQUE” by Takeshi Kamikawa, Srinivas Gandrothula, and Hongjian Li (Attorney Docket No. 30794.0659USP1 (UC 2018-086-1)) pursuant to 35 U.S.C. § 119(e);

[0008] PCT International Patent Application No. PCT / US19 / 25187, filed April 1, 2019, by Takeshi Kamikawa, Srinivas Gandrothula, and Hongjian Li, entitled “METHOD OF FABRICATING NONPOLAR AND SEMIPOLAR DEVICES USING EPITAXIAL LATERAL OVERGROWTH,” (Attorney Docket No. 30794.0680WOU1 (UC 2018-427-2)), which claims common pending and commonly assigned status under 35 U.S.C. § 119(e) to Takeshi Kamikawa, Srinivas Gandrothula, and Hongjian Li’s filed March 30, 2018, entitled “METHOD OF FABRICATING NONPOLAR AND SEMIPOLAR DEVICES BY USING EPITAXIAL LATERAL OVERGROWTH” The benefit of U.S. Provisional Patent Application Serial No. 62 / 650,487 (Attorney Docket No. G&C30794.0680USP1 (UC 2018-427-1));

[0009] PCT International Patent Application No. PCT / US19 / 32936, filed May 17, 2019, by Takeshi Kamikawa and Srinivas Gandrothula, entitled “METHOD FOR DIVIDING A BAR OF ONE OR MORE DEVICES,” (Attorney Docket No. 30794.0681WOU1 (UC2018-605-2)), which claims the benefit under 35 U.S.C. § 119(e) of co-pending and commonly assigned U.S. Provisional Application Serial No. 62 / 672,913, filed May 17, 2018, by Takeshi Kamikawa and Srinivas Gandrothula, entitled “METHOD FOR DIVIDING A BAR OF ONE OR MORE DEVICES,” (Attorney Docket No. G&C 30794.0681USP1 (UC2018-605-1));

[0010] PCT International Patent Application No. PCT / US19 / 34686, filed May 30, 2019, by Srinivas Gandrothula and Takeshi Kamikawa, and entitled “METHOD OF REMOVING SEMICONDUCTING LAYERS FROM A SEMICONDUCTING SUBSTRATE,” (Attorney Docket No. 30794.0682WOU1 (UC 2018-614-2), which claims the benefit under 35 U.S.C. § 119(e) of co-pending and commonly assigned U.S. Provisional Application Serial No. 62 / 677,833, filed May 30, 2018, by Srinivas Gandrothula and Takeshi Kamikawa, and entitled “METHOD OF REMOVING SEMICONDUCTING LAYERS FROM A SEMICONDUCTING SUBSTRATE,” (Attorney Docket No. G&C 30794.0682USP1 (UC 2018-614-2)). 2018-614-1);

[0011] PCT International Patent Application No. PCT / US19 / 59086, filed on October 31, 2019 by Takeshi Kamikawa and Srinivas Gandrothula, and entitled “METHOD OF OBTAINING A SMOOTH SURFACE WITH EPITAXIAL LATERAL OVERGROWTH,” (Attorney Docket No. 30794.0693WOU1 (UC 2019-166-2)), which claims the benefit under 35 U.S.C. § 119(e) of co-pending and commonly assigned U.S. Provisional Application Serial No. 62 / 753,225, filed on October 31, 2018 by Takeshi Kamikawa and Srinivas Gandrothula, and entitled “METHOD OF OBTAINING A SMOOTH SURFACE WITH EPITAXIAL LATERAL OVERGROWTH,” (Attorney Docket No. G&C 30794.0693USP1(UC 2019-166-1));

[0012] PCT International Patent Application No. PCT / US20 / 13934, filed on January 16, 2020 by Takeshi Kamikawa, Srinivas Gandrothula, and Masahiro Araki, and entitled “METHOD FOR REMOVAL OF DEVICES USING A TRENCH,” (Attorney Docket No. 30794.0713WOU1 (UC 2019-398-2)), which claims the benefit under 35 U.S.C. § 119(e) of co-pending and commonly assigned U.S. Provisional Application Serial No. 62 / 793,253, filed on January 16, 2019 by Takeshi Kamikawa, Srinivas Gandrothula, and Masahiro Araki, and entitled “METHOD FOR REMOVAL OF DEVICES USING A TRENCH,” (Attorney Docket No. G&C 30794.0713USP1 (UC 2019-398-2)). 2019-398-1); and

[0013] PCT International Patent Application No. PCT / US20 / 20647, filed on March 2, 2020 by Takeshi Kamikawa and Srinivas Gandrothula, and entitled “METHOD FOR FLATTENING A SURFACE ON AN EPITAXIAL LATERAL GROWTH LAYER,” (Attorney Docket No. 30794.0720WOU1 (UC 2019-409-2)), which claims the benefit under 35 U.S.C. § 119(e) of co-pending and commonly assigned U.S. Provisional Application Serial No. 62 / 812,453, filed on March 1, 2019 by Takeshi Kamikawa and Srinivas Gandrothula, and entitled “METHOD FOR FLATTENING A SURFACE ON AN EPITAXIAL LATERAL GROWTH LAYER,” (Attorney Docket No. G&C 30794.0720USP1 (UC 2019-409-2)). 2019-409-1);

[0014] All of the applications described are incorporated herein by reference. Technical Field

[0015] The present invention relates to a method of removing strips of one or more devices using a support plate. Background Art

[0016] Currently, various methods are used to remove devices from foreign or alien substrates, such as wet etching, laser ablation, sacrificial layers, etc. However, such methods may not be applicable to homogeneous substrates.

[0017] For example, some device manufacturers have used III-nitride substrates, such as GaN substrates, to produce III-nitride-based devices, such as laser diodes (LDs) and light-emitting diodes (LEDs), for use in lighting, optical storage, electronic devices, and sensors, etc. However, the cost of GaN substrates has hindered their wider use in the manufacture of III-nitride-based devices.

[0018] Furthermore, it is relatively easy to remove foreign or heterogeneous substrates from the epitaxial layer using laser ablation or other techniques at the heterointerface. However, a III-nitride-based semiconductor layer deposited on a GaN substrate has no heterointerface, making it difficult to remove the GaN substrate from the III-nitride-based semiconductor layer.

[0019] Therefore, there is a need for a technique to remove a Group III nitride substrate or layer from a Group III nitride based semiconductor layer in an easy manner.

[0020] In one prior technique, a GaN layer is exfoliated under tensile strain through a metallic stressor layer. See, for example, Applied Physics Express 6 (2013) 112301 and U.S. Patent No. 8,450,184, both of which are incorporated herein by reference. Specifically, this technique uses exfoliation of the middle of a GaN layer.

[0021] However, the surface topography on the exfoliation plane is rough and the technique cannot be controlled at the exfoliation location. In addition, the removal method may damage the semiconductor layer due to excessive bending in the layer being removed, which may cause cracks in undesired directions.

[0022] Therefore, there is a need to reduce any such damage and determine the removal position. Determining the removal position is important when it comes to mass production because changing the removal position may reduce the yield of mass production.

[0023] Another conventional technique is to remove the device structure from the GaN substrate using photoelectrochemical (PEC) etching of a sacrificial layer, but this takes a long time and involves several complicated processes.

[0024] Therefore, there exists a need in the art for improved methods of removing a Group III-nitride substrate from a Group III-nitride based semiconductor layer, particularly in the case of growing GaN thin films on GaN substrates. Summary of the invention

[0025] To overcome the limitations of the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding this specification, the present invention discloses a method of removing a strip of one or more devices using a support plate.

[0026] Specifically, the present invention performs the following steps:

[0027] Step 1: Fabricate a strip consisting of devices on a substrate.

[0028] Step 2: Determine where to remove the strip.

[0029] Step 3: Join the support plate to the strip.

[0030] Step 4: Apply stress to the support plate in a vertical direction of the strip to remove the strip at the removal position.

[0031] Step 5: Implement the device process after achieving strip removal.

[0032] Step 6: Mount the device together with the support plate to the rods and tables of the module.

[0033] The present invention has many advantages with respect to removing strips of devices from homogeneous and heterogeneous substrates.The present invention can be applied to many kinds of optoelectronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Referring now to the drawings, wherein like reference numerals indicate corresponding parts throughout:

[0035] Figure 1(a) , 1(b) , 1(c), 1(d), 1(e), 1(f), 1(g) and 1(h) illustrate the structure of the device and the process flow of manufacturing the device.

[0036] Figure 2 The basic configuration of the device structure is shown.

[0037] 3(a) and 3(b) illustrate the orientation of a growth restriction mask on a substrate.

[0038] Figure 4(a) , 4(b) , 4(c), 4(d), 4(e), 4(f), 4(g), 4(h), 4(i), 4(j), 4(k), 4(l), 4(m) and 4(n) illustrate the structure of the device and the second case of the process flow for manufacturing the device.

[0039] Figure 5(a) , 5(b) and 5(c) describe a method of fabricating the strips without using the epitaxial lateral overgrowth (ELO) technique.

[0040] Figure 6(a) ,6(b) and 6(c) illustrate how the removal position of the strip is determined.

[0041] Figure 7 is a scanning electron microscope (SEM) image showing the edge of the growth limiting mask.

[0042] Figure 8 Explains how to join the strips and support plates.

[0043] Figure 9(a) and 9(b) Bonding to a conventional LED device structure and a conventional LD ​​device structure using a p-electrode configuration is illustrated.

[0044] Figure 10(a) and 10(b) Bonding to a conventional LED device structure is illustrated.

[0045] Figure 11(a) , 11(b) and 11(c) illustrate the use of a retaining type support plate, where the support plate is a fin.

[0046] Fig.12 (a), 12(b), 12(c), 12(d), 12(e) and 12(f) illustrate the use of fins and retaining plates or membranes on a substrate with strips for bonding.

[0047] Figure 13(a) , 13(b) , 13(c), 13(d), 13(e) and 13(f) illustrate the use of a retaining plate or membrane and fins bonded to the strip and substrate.

[0048] Figure 14(a) , 14(b) and 14(c) illustrate how the n-electrodes are provided at separate regions of the strips.

[0049] Fig.15 The use of divided support areas formed with periodic lengths according to the length of the device is illustrated.

[0050] Fig.16 The use of divided support areas and grooves as well as other types of divided support areas are illustrated.

[0051] Figure 17(a) and 17(b) Two types of support plates are shown, without or with depressed portions.

[0052] Figure 18(a) , 18(b) , 18(c) and 18(d) illustrate a first method of dividing the stripes.

[0053] Figure 19(a) ,19(b) , 19(c) and 19(d) illustrate a second method of dividing the strips, in which the support plate has a depressed area.

[0054] Figure 20(a) and 20(b) A third method of dividing the strips is illustrated which is a variation of the second method of dividing the strips without the depressed areas.

[0055] Figure 21(a) , 21(b) and 21(c) illustrate a fourth method of dividing the strips using a dry etching method to cleave and / or divide the strips.

[0056] Figure 21(d) and 21(e) A variation of the fourth method is illustrated.

[0057] Figure 22(a) and 22(b) A fifth method of dividing the strip is illustrated in which the strip and the support plate are bent to cause the strip to be cleaved and / or divided.

[0058] Figure 23(a) and 23(b) Illustration of how stress is applied to bend the strip into a concave shape.

[0059] Figure 24(a) , 24(b) and 24(c) illustrate a sixth method of dividing the strips, in which stress is applied to the strips using the difference in coefficient of thermal expansion between the strips and the support plate.

[0060] Fig.25 SEM images are shown illustrating how the edges of the stripes have various shapes depending on the plane of the substrate.

[0061] Fig.26 The diagram shows a method for coating facets on several divided chips simultaneously in an easy manner.

[0062] Figure 27(a) and 27(b) It illustrates how the coating can be formed into the warped areas at the edges of the strips.

[0063] Figure 28(a) and 28(b) Illustration of how to perform an aging test.

[0064] Fig.29 Illustration of how a laser diode is packaged.

[0065] Fig.30 It illustrates how the device can be mounted directly in the package.

[0066] Fig.31 The diagram shows how the device is handled and mounted into the package.

[0067] Fig.32 The structure of the polymer film is shown schematically.

[0068] Fig.33 SEM images are shown illustrating the use of various miscut orientations of the m-plane substrate.

[0069] Fig.34 SEM images are shown illustrating the use of various off-cut orientations of semi-polar planar substrates.

[0070] Fig.35 SEM images are shown illustrating the use of various off-cut orientations of non-polar, semi-polar, and non-polar planar substrates.

[0071] Figure 36(a) and 36(b) The diagram shows some options on how to remove the bar.

[0072] Figure 37(a) and 37(b) The diagram illustrates how etching can be used to produce laser facets.

[0073] Figure 38(a) and 38(b) The diagram shows the partitioning of support areas, recessed areas, etched mirror areas, and coating layers.

[0074] Figure 39(a) and 39(b) Illustration of the fabrication of a vertical cavity surface emitting laser.

[0075] Fig.40 is a schematic diagram of a vertical cavity surface emitting laser (VCSEL) with a support plate.

[0076] Figure 41(a) , 41(b) , 41(c) and 41(d) illustrate how the support plate is attached to the strip of LEDs.

[0077] Figure 42(a) and 42(b) The device is shown after the strips have been removed, with an etched N-pole surface present on the backside of the strips.

[0078] Fig.43 is a flow chart illustrating a method of removing a strip of one or more devices from a substrate by bonding a support plate to the strip. DETAILED DESCRIPTION

[0079] In the following description of the preferred embodiments, reference is made to specific embodiments in which the invention may be practiced. It should be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the present invention.

[0080] Overview

[0081] The present invention describes a method for removing a strip consisting of one or more devices from a substrate by bonding a support plate to the strip. Specifically, the present invention performs the following steps:

[0082] Step 1: Fabricate one or more strips consisting of one or more devices on a substrate. There are several methods to fabricate the strips. In addition, this step may include various processes to fabricate the devices on the strips.

[0083] Step 2: Determine the removal location for each of the strips.

[0084] Step 3: Join one or more support plates to the strip.

[0085] Step 4: Applying stress to the support plate in a perpendicular direction to the strip (ie normal to the surface of the strip), which removes the strip at the removal location.

[0086] Step 5: Perform additional device processes (if necessary) after removing the strips, such as providing an n-electrode on the back side of the strips, fabricating facets for the laser diode devices, etc. These processes are not always necessary, as each process can be completed before removing the strips.

[0087] Step 6: Mount the device together with the support plate to the rods and stages of the module. If the support plate has high thermal conductivity, the support plate can be mounted directly to the rods and stages of the module. On the other hand, if the thermal conductivity of the support plate is low, the side of the device can contact the rods and stages of the module in order to maintain high thermal conductivity.

[0088] Removing the strip using the above steps provides many advantages when manufacturing the device:

[0089] - Thin layer devices with a wide width in the area in contact with the substrate can be removed with this method.

[0090] The method can remove devices of various sizes. For example, very small laser diode devices can be made, which is important.

[0091] Support plates help apply stress to the removal location.

[0092] Avoid breaking the strip after removal. Specifically, the support plate is engaged and in contact with the strip to prevent the strip from breaking.

[0093] • Easy handling of the strip after removal. This allows mounting the strip to a stage and facet coating and n-electrode deposition after removal. Furthermore, this avoids damaging the strip by touching a collet chuck or the like.

[0094] • Engage the support plate while completing the process of junction-down installation. The present invention can be implemented to install many strips to submounts simultaneously with the junction down. This can reduce processing time and allow some common processes to be performed.

[0095] • Using the present invention, the support plate can be joined to the strips even if the height of the strips is different in each strip.

[0096] The yield of the bonding process can be improved by the present invention.

[0097] • The support plate helps divide the strip into devices and helps to facet the devices by making cleaving quick and easy.

[0098] • The support plate enables reliability checks to be carried out in an easy and low-cost manner while the device is in an unsealed condition.

[0099] Thus, the present invention has many kinds of advantages with respect to removing strips from homogeneous and foreign substrates such as gallium arsenide, indium phosphide, gallium antimonide, etc. In addition, the removed strips can be easily and quickly handled after removal because the support plate prevents the strips from breaking during handling. Bonding the support plate to the strips can assist in joint-down installation.

[0100] The present invention can be used to grow and fabricate a number of different devices, including light emitting diodes (LEDs), laser diodes (LDs), vertical cavity surface emitting lasers (VCSELs), Schottky barrier diodes (SBDs), metal oxide semiconductor field effect transistors (MOSFETs), or other devices.

[0101] Process steps

[0102] The steps of the present invention are described in more detail below:

[0103] Step 1: Fabricate a strip consisting of one or more devices on a substrate.

[0104] Several methods can be used in fabricating a strip consisting of one or more devices on a substrate.

[0105] Case 1:

[0106] Figure 1(a)-1(h) , Figure 2 and Figure 3(a)-3(b) The diagram shows a first situation of the structure of the device according to the present invention and a process flow for manufacturing the device.

[0107] Figure 1(a)-1(h)The process of manufacturing a strip consisting of one or more devices on a substrate 101 is illustrated, which may include a III-nitride substrate, a template substrate 101 having a GaN layer or a foreign substrate 101, a growth limiting mask 102, an opening region 103, a non-growth region 104, a III-nitride ELO layer 105A, a III-nitride regrown layer 105B, a III-nitride device layer 106, a blank region 107, a ridge structure 108, a current blocking layer 109, a p-type electrode 110, a polymer film 111, separated strips 112, a rupture point 113, and an etched region 114.

[0108] Figure 2 The basic configuration of the resulting structure is shown in FIG. The resulting structure includes strips 115 consisting of one or more devices formed by substrate 101, III-nitride ELO layer 105A, III-nitride regrown layer 105B, and III-nitride device layer 106, wherein the strips 115 are separated from each other. Each strip 115 is bonded to a support plate 116 using a bonding metal 117, wherein the support plate 116 and polymer film 111 are used to remove the strips 115 from the substrate 101, as described in more detail below.

[0109] A more detailed description of the steps used by the present invention in manufacturing the strip 115 of the device is provided below:

[0110] Process 1: A growth restriction mask 102 is deposited on a substrate 101 , and the remaining surface is exposed by a stripped opening region 103 in the growth restriction mask 102 , as shown in FIG. 1( b ). Figure 3(a) and 3(b) The orientation of the growth restriction mask 102 on the substrate 101 is illustrated. In alternative embodiments, the growth restriction mask 102 may be formed on a c-plane substrate 101 or an m-plane substrate 101.

[0111] Process 2: Growing a III-nitride ELO layer 105A on the substrate 101 using the growth limiting mask 102 such that the growth extends in a direction parallel to the stripped opening regions 103 of the growth limiting mask 102 and the III-nitride ELO layer 105A does not merge, as shown in FIG. 1( c ).

[0112] Process 3: The substrate 101 and the III-nitride ELO layer 105A are removed from the MOCVD reactor, wherein at least part of the growth limiting mask 102 is removed by a dry or wet etching method (using an etchant such as hydrofluoric acid (HF) or buffered HF (BHF)), as shown in FIG. 1( d ).

[0113] Process 4: Growing a regrown layer 105B on the III-nitride ELO layer 105A to form a blank area 107 and planarizing the surface of the layer, as shown in FIG1(e). In the case of a wider width growth limit mask 102, there is a possibility that many cracks are generated due to the difference in thermal expansion coefficient between the ELO III-nitride layer 105A and the growth limit mask 102. The blank area 107 can prevent cracks from being generated in the ELO III-nitride layer 105A by reducing the stress in the layer.

[0114] Process 5: Growing a III-nitride device layer 106 on the regrown layer 105B, as shown in Fig. 1(f). When the surface is rough, the surface can be polished by chemical mechanical polishing (CMP) or the like, which causes the in-plane distribution of the layer thickness to decrease as the III-nitride device layer 106 grows.

[0115] Process 6: A device is manufactured on a flat surface area by conventional methods, wherein a ridge structure, a p-electrode, a pad electrode, etc. are disposed on the III-nitride device layer 106, which includes an island-shaped III-nitride semiconductor layer at a predetermined position, as shown in FIG. 1(g).

[0116] Process 7: Etch at least a portion of the III-nitride device layer 106, the regrown layer 105B, and the III-nitride ELO layer 105A by conventional dry etching methods, as shown by the etched area 114 in FIG. 1(h).

[0117] Thereby, a strip 115 of the device can be obtained. Furthermore, a break point 113 as a removal location 113 can be obtained using the growth limit mask 102, as shown in Fig. 1(h).

[0118] Case 2:

[0119] Figure 4(a)-4(e) The diagram shows a second situation of the structure of the device according to the present invention and the process flow of manufacturing the device.

[0120] Process 1: A growth restriction mask 102 is deposited on a substrate 101 , and the remaining surface is exposed by a stripped opening region 103 in the growth restriction mask 102 , as shown in FIG. 4( b ).

[0121] Process 2: Growing a III-nitride ELO layer 105A on the substrate 101 using the growth limiting mask 102 such that the growth extends in a direction parallel to the stripped opening regions 103 of the growth limiting mask 102 and the III-nitride ELO layer 105A does not merge, as shown in FIG. 4( c ).

[0122] Process 3: The substrate 101 and the III-nitride ELO layer 105A are removed from the MOCVD reactor, wherein at least a portion of the growth limiting mask 102 is removed by dry or wet etching (using an etchant such as HF or BHF), as shown in FIG. 4( d ). Removing the growth limiting mask 102 before growing the III-nitride device layer 106 prevents surface roughness degradation. Removing the growth limiting mask 102 reduces the supply of excess gas to the side facets of the III-nitride ELO layer 105A. This can also help obtain a smooth surface on the III-nitride device layer 106, which forms an island-shaped III-nitride semiconductor layer. Thereby, this can also avoid compensation of the p-type layer by the decomposed n-type dopants (such as silicon (Si) and oxygen (O) atoms) from the mask 102.

[0123] Process 4: Growth of the III-nitride device layer 106, as shown in Figure 4(d) After the growth of the III-nitride device layer 106, adjacent stripes 115 are not merged.

[0124] Process 5: A device is fabricated by conventional methods at a flat surface area, wherein a ridge structure, a p-electrode, a pad electrode, etc. are disposed on the III-nitride device layer 106 at a predetermined position, as shown in FIG. 4( e ).

[0125] Thereby, a strip 115 of the device can be obtained. Furthermore, a break point 113 as a removal location 113 can be obtained using the growth limit mask 102, as shown in Fig. 1(h).

[0126] Case 3:

[0127] This situation Figure 5(a)-5(c) , which describes a method of manufacturing a strip without using the ELO technique, comprising the following steps:

[0128] Process 1: Providing a III-nitride substrate 101; growing one or more InAlGaN-based layers on the III-nitride substrate 101, as shown in FIG5(a). At this time, the InAlGaN-based layer includes a sacrificial layer 502 to determine the removal position. In this case, the position of the sacrificial layer 502 becomes the removal position.

[0129] Process 2: Fabricate a device structure 507 on the III-nitride device layer 506, which includes a p-type layer, an active layer, and an n-type layer, as shown in FIG. 5(b).

[0130] Process 3: Etching portions of the InAlGaN-based layers 501-505 by conventional dry etching methods, as shown in the etched area 114 in Figure 5(b). To remove portions of the sacrificial layer 502 by wet etching, dry etching is performed until the sacrificial layer 502 is exposed, as shown in Figure 5(b).

[0131] Process 4: Etch a portion of the sacrificial layer 502 by a wet etching method to create a depressed area at the edge of the sacrificial layer 502. Conventional methods may be used, including an etchant such as KOH, NaOH, aqua regia, etc.

[0132] Photoelectrochemical (PEC) etching methods may also be used. If a PEC etching method is used, the sacrificial layer 502 should contain indium to facilitate etching, such as an InAlGaN sacrificial layer 502 whose band gap is greater than the wavelength of an ultraviolet (UV) light source that can be used when PEC etching is used. For example, 405nm UV light may be used, and the band gap of the sacrificial layer 502 is greater than 3.06eV. In this case, the sacrificial layer 502 may absorb the UV light to generate electrons and holes during PEC etching.

[0133] Thereby, strips 115 may be obtained and removal locations 113 are created to utilize depressed areas at the edges of the sacrificial layer 502 .

[0134] Step 2: Determine the removal position for each of the strips

[0135] Currently, there are several methods to determine the removal location 113 .

[0136] One method is to form a region narrower than the width Wb of the stripe 115, as shown in FIG6(a), which is the width Wrp of the removal position 113. In other words, the width Wrp of the removal position 113 is narrower than the width Wb of the stripe 115. The etching growth restriction mask 102 and the sacrificial layer 502 play a role in forming the removal position 113. This method easily and accurately determines the removal position 113.

[0137] also, Figure 7 The situation around the edge of the growth limit mask 102 is shown. It can be seen that there is a strong contrast around the edge portion of the growth limit mask 102, which indicates the presence of stress. This can also indicate a number of defects. These phenomena are caused by the difference in thermal expansion coefficients between the epitaxial layer and the growth limit mask 102. It is envisioned that these stresses and defects help cracks to occur in this area. Therefore, this method is suitable for removing strips from the substrate by the present invention.

[0138] Another method, as shown in FIG6( b), is to form a region 601 of the most fragile layer of the strip 115, for example, there is a highly Si-doped layer, an InGaN layer, etc. The highly Si-doped layer is fragile because it has internal stress and many defects. The InGaN layer is more fragile than other III-nitride layers. Therefore, these fragile layers can provide removal locations 113.

[0139] Yet another method is to form an area where stress is applied most strongly from the support plate 116, as shown in FIG6(c). This area becomes the removal position 113. As shown in FIG6(c), when the strip 115 is formed, it can use an angle etching method. Thereby, the removal position 113 can be determined.

[0140] The present invention can utilize these methods of determining the removal location 113, as described above. The present invention can also combine these methods.

[0141] Step 3: Attach one or more support plates to the strips

[0142] Step 3 can be divided into at least two parts. The first part is to fabricate the device structure on the strip 115 , and the second part is to bond the support plate 116 to the strip 115 .

[0143] <Manufacturing device structure chapter>

[0144] Fabrication of devices composed of Group III nitride device layer 106 on the surface of strip 115 can be performed by conventional methods, with ridge structures, p-electrodes, pad electrodes, etc. In the present invention, many types of devices can be fabricated on strip 115 by conventional methods using conventional structures.

[0145] <Joining Chapter>

[0146] Various bonding techniques can be used with the present invention, which are suitable for making devices by removing the strip 115, as described below. This includes diffusion bonding, eutectic bonding (Au-Sn solder, Si-Au), and transient liquid phase bonding (Pd-In bonding). These bonding methods can be applied to any device, such as laser diodes, LEDs, electronic devices, sensors, etc.

[0147] The goal of bonding the support plate 116 to the strip 115 is to effectively transfer the stress applied by the support plate 116 to the removal position 113 to facilitate the removal of the strip 115. The height of the reinforcing strip 115 is important for removing the strip 115 at the removal position 113. In addition, there is no problem if the bonding strength between the strip 115 and the support plate 116 is stronger than the strength for removing the strip 115 at the removal position 113. Within this range, any bonding material such as solder, adhesive, metal, etc. can be used.

[0148] The following are various cases in which the joining method of the present invention can be applied.

[0149] Case 1: Solder

[0150] In this case, conventional solders (such as Au-Sn, Sn-Ag-Cu, etc.) can be used. Figure 8 , 9(a)9(b), 10(a) and 10(b), which explain how to join the strip 115 and the support plate 116. For example, if a Si substrate is selected as the support plate 116, a solder containing Sn is suitable for the present invention in terms of joining strength, joining temperature and low resistivity.

[0151] exist Figure 8 In the example shown in , the Si support plate 116 has Au—Sn solder 117 on its surface.

[0152] Figure 9(a) and 9(b) The examples shown in illustrate the use of a p-electrode configuration bonded to a conventional LED device structure and a conventional LD ​​device structure.

[0153] In the case of LEDs, the electrodes of LED 901 include an Ag layer that directly contacts the p-type layer of the LED to reflect the emitted light. Ni, Ti, and Pt layers are used for adhesion and to prevent interdiffusion. The support plate 116 and LED strip 115 are bonded at 250-300° C., as shown in FIG10( a).

[0154] Using Pd-In can provide some advantages for the device. If the removed strip 115 includes LED devices, these devices require high reflectivity at the bonding portion. For example, low temperature transient liquid phase Pd-In bonding is implemented at about 200°C. A Pd layer is provided on the surface of the top of the strip 115, and a Pd-In layer is provided on the support plate 116. These structures are then bonded to each other at a low temperature. Pd-In 3 The intermetallic compound is formed by interdiffusion during heating, which improves the bonding strength due to the high melting temperature of 600° C. or more.

[0155] As another candidate, Au and Si eutectic bonding can be used between GaN and Si substrates, 400°C, process time 30 minutes, 5 MPa.

[0156] Ag-Au and Ag-Al diffusion bonding is performed at 150° C. In the case of LEDs, Ni (1 nm: thin layer) can be used to enhance the reflectivity in the Ni / Ag / Au layer as the p-electrode of the LED, which is bonded to Au with a Si submount.

[0157] Case 2: Adhesive

[0158] In this case, an adhesive may be used to join the strip 115 and the support plate 116. The adhesive may be an epoxy or a polymer adhesive. Candidate materials include the following: polyimide, two-part epoxy, benzocyclobutene (BCB:C 8 H 6) and UV-curable photopolymers such as SU-8. For example, in bonding, benzocyclobutene (BCB:C 8 H 6 ) was heated at 200°C for 60 minutes.

[0159] Applicators for different adhesives are designed based on the adhesive being used and the size of the area to which the adhesive is to be applied.

[0160] Case 3: Au-Au bonding via surface activation method

[0161] In this case, the strip 115 and the support plate 116 can be joined without solder. Therefore, the feature of the joint is high thermal conductivity. This is similar to case 1, except for the bonding material 117. In this case, the bonding material 117 is gold (Au), and the support plate 116 is preferably silicon (Si). The strip 115 and the support plate 116 are joined at 300-400°C using gold without solder.

[0162] It is preferred to activate the bonding surface before Au-Au bonding. The bonding surface is activated using Ar and / or O 2 The strip 115 is then bonded to a support plate 116 under pressure at 150-300°C.

[0163] Case 4: Reflow Bonding

[0164] In this case, conventional reflow bonding is used for the purpose of self-alignment.

[0165] If conductive bonding materials are used, they should be separated from the substrate by at least an insulating layer such as SiO 2 、Al 2 O 3 、Zr 2 O etc.) covers the side faces of the strip 115 to prevent current leakage. Preferably, the insulating layer completely covers the side faces.

[0166] <Support Plate Material>

[0167] The following relates to the types of materials used for the support plate 116 .

[0168] Case 1: Single crystal support plate

[0169] In this case, the support plate 116 is single crystal, such as SiC, Si, AlN, GaN, etc. When Si is used as the support plate 116, it has the following advantages:

[0170] 1. High thermal conductivity,

[0171] 2. Low resistivity,

[0172] 3. Easy to micro-fabricate,

[0173] 4. Taking advantage of the atomically flat surface of Si, Au-Au bonding can be used without solder, and

[0174] 5. Low cost.

[0175] Therefore, the use of Si support plate 116 is suitable for the present invention. Other materials such as SiC, AlN, and GaN can be used as support plate 116.

[0176] Case 2: Metal support plate

[0177] In this case, the support plate 116 is a metal such as Cu, CuW, Al, stainless steel, etc. This has the advantage of high thermal conductivity.

[0178] Case 3: Ceramic support plate

[0179] When insulation is required for the support plate 116, good candidates are ceramic materials such as Al 2 O 3 , and AlN, SiC, etc. The ceramic support plate 116 can also achieve high thermal conductivity.

[0180] In general, many semiconductor lasers employ this type of submount on a stem (such as a TO can package) because of low cost, insulation, and high thermal conductivity.

[0181] In the present invention, it does not matter whether the support plate 116 is conductive or not. The support plate 116 having through holes filled with Ag or the like can also be used to improve thermal conductivity and reduce resistivity.

[0182] The support plate 116 made of ceramic is hard and durable, making it easy to handle without cracking, especially when the support plate 116 has a large ratio of longitudinal length to lateral length. Hardness and robustness are very important factors for the support plate 116.

[0183] <Support Plate Shape>

[0184] The following relates to the shape of the support plate 116 .

[0185] Case 1: Separated support plate

[0186] This case uses a separate support plate 116, where the support plate 116 is a fin. In the separate fin type support plate 116, the fins are individually separated and placed on the strip 115. The fins may be arranged one by one on the strip 115, or a plurality of fins may be arranged on the strip 115 at the same time. Then, pressure is applied to the fins by the plate 116, and the strip 115 and the plate 116 are heated to be bonded. Thereby, the bonding process is completed.

[0187] This type of support plates 116 has an advantage in that, even when the strips 115 are at different heights, these support plates 116 can be easily joined to the strips 115 due to their flexibility.

[0188] When the strips 115 are grown using the ELO technique, the strips 115 may have different heights. In this case, a separate fin-type support plate 116 is preferred.

[0189] Case 2: Keep the support plate

[0190] This case uses a holding type support plate 116, wherein the support plate 116 is a fin. In the holding type support plate 116, the fin 1101 is arranged on the membrane 1102, such as Figure 11(a) , 11(b) There are two types of retaining support plates 116, as described below.

[0191] Case 2-1: Different materials

[0192] This type of retaining support plate 116 consists of different materials for the fins 1101 and the membrane 1102. The fins 1101 have been adhered to the membrane 1102, after which the fins 1101 can be removed.

[0193] The film 1102 may be a heat-resistant film such as a fluororesin film, a polyimide film, etc. The film 1102 may also be heat-resistant, with a thermal expansion coefficient close to that of the substrate 101 having the strips 115 , for precise bonding positions.

[0194] If the membrane 1102 is a flexible membrane, it is effective even if the heights of the strips 115 are different.

[0195] Case 2-2: Same materials

[0196] This type of retaining support plate 116 is composed of the same material used for the fins 1101 and the membrane 1102, as shown in Figure 11(c).

[0197] In this case, there are advantages in that the fins 1101 can be easily handled and accurately arranged with respect to the corresponding strips 115 .

[0198] For example, manufacturing a membrane 1102 having fins 1101 from a silicon substrate can be relatively easily achieved using dry etching and wet etching methods, such as the structure shown in FIG11( c). In this case, since the distance and direction between adjacent strips 115 are fixed, the possibility of misalignment with the strips 115 is low. In addition, this configuration is preferred in terms of yield.

[0199] However, since the fin 1101 and the membrane 1102 have low flexibility, as shown in FIG11(c), the thickness p of the membrane 1102 is set to be thin enough to be able to bend the membrane 1102. Thereby, even if this type of support plate 116 is used, it can correspond to the difference in height of the strip 115. In particular, when silicon is used, the thickness p is preferably less than 200 μm to make bending easy.

[0200] The fins 1101 and the membrane 1102 are arranged on a substrate 101 having strips 115, as shown in FIG. Fig.12 (a)-12(c) As shown. Then, pressure is applied to the membrane 1102 and the fin 1101, and the structure is heated to bond. Thereby, the bonding process is completed.

[0201] The film 1102 and the fin 1101 are removed using another polymer film 1201 attached to the fin 1102, such as Fig.12 As shown in (d)-12(f), the thermal expansion coefficient of the other polymer film 1201 is larger than that of the substrate 101 having the strip 115, as shown in FIG. Fig.12 (d)-12(f) as shown.

[0202] Step 4: Apply stress to the support plate to remove the strip at the removal location

[0203] Step 4 applies stress to the support plate 116 (this can occur in a variety of ways) to remove the strip at the removal location.

[0204] Case 1: Separated support plate

[0205] This case includes a separate support plate 116, wherein the support plate 116 is a fin. Figure 4(g)-4(k) As shown, one or more support plates 116 are placed on the strips 115 in a direction parallel to the strips 115. Pressure and heat are applied to the support plates 116 and the substrate 101. Then, after cooling, the following process is used for removal:

[0206] Process 1: Attach the polymer film 111 to the strip 115 of the device, as shown in FIG. 4( g ).

[0207] Process 2: Applying pressure to the polymer film 111 and the substrate 101, as shown in FIG. 4(h).

[0208] Process 3: Lowering the temperatures of the polymer film 111 and the substrate 101 while applying pressure.

[0209] Process 4: Utilizing the difference in thermal coefficient between the polymer film 111 and the substrate 101 to remove the strips 115 of the device.

[0210] Stress may be generated by the difference in thermal expansion coefficients and applied to the support plate 116, which may remove the strips 115 from the substrate 101 without the polymer film 111 contacting the strips 115. Thereby, stress may be effectively applied at the removal location.

[0211] Various methods can be used to reduce the temperature. For example, the substrate 101 and the polymer film 111 can be placed in a liquid N while applying pressure. 2 (e.g., at 77°K). The temperature of the substrate 101 and the polymer film 111 can also be controlled using a piezoelectric transducer. In addition, the plate 116 that applies pressure to the polymer film 111 can be cooled to a low temperature before and / or during contact with the polymer film 111. Thereby, the polymer film 111 cools and pressure can be applied to the strip 115 due to the large thermal expansion coefficient.

[0212] When the temperature is lowered, the substrate 101 and the polymer film 111 may be wetted by atmospheric moisture. In this case, the temperature reduction may be performed in a dry air atmosphere or in a dry N 2 This is carried out in an atmosphere, which prevents the substrate 101 and the polymer film 111 from getting wet.

[0213] Thereafter, the temperature is raised to, for example, room temperature, and pressure is no longer applied to the film 111. At this point, the strips 115 have been removed from the substrate 101, and the polymer film 111 is then separated from the substrate 101.

[0214] Using a separate support plate 116 can improve flexibility and obtain a working area that provides space to move the support plate 116. These are key advantages of removal.

[0215] Another method is shown in FIG4(j), which does not utilize different thermal expansion coefficients. This method simply applies stress mechanically to the support plate 116. In addition, by enhancing the adhesion of the polymer film 111, peeling off the polymer film 111 only results in being able to remove the strip 115 from the substrate 101, because the presence of the support plate 116 effectively applies stress to the removal position, as shown in FIG4(k).

[0216] Case 2: Retaining support plate

[0217] This case includes a retaining support plate 116 , wherein the support plate 116 is a fin 1102 .

[0218] Case 2-1: Different materials

[0219] In the case of different materials, the membrane 1101 and the fin 1102 are arranged on a substrate 101 with a strip 115, as shown in FIG. Fig.12(a)-12(b) Then, pressure is applied to the fin 1101, and the film 1102 and the fin 1101 are heated to be bonded. Thereby, the bonding process is completed.

[0220] The film 1102 is removed, as Fig.12 Another polymer film 1201 (whose thermal expansion coefficient is greater than that of the substrate 101 with the strips 115) is attached to the fin 1101, as shown in FIG. Fig.12 (d) As shown. The temperature of the polymer film 1201 and the substrate 101 is reduced while applying pressure, wherein the polymer film 1201 shrinks as the temperature is reduced. Therefore, the polymer film 1201 can apply pressure in the horizontal direction at the side surface of the fin 1101. This pressure applied from the side surface allows the fin 1101 to be effectively removed from the substrate 101, as shown in FIG. Fig.12 (e) During the low temperature period, the polymer film 1201 maintains the pressure applied to the fin 1101 from the top of the film 1201. Finally, the polymer film 1201 is removed from the fin 1101 with the strip 115, as shown in FIG. Fig.12 (f) as shown.

[0221] Case 2-2: Same materials

[0222] In the case of the same material, the fin 1101 and the membrane 1102 are the same material, such as silicon, as shown in FIG. 11( c ). The fin 1101 and the membrane 1102 can be manufactured from a silicon substrate using conventional methods, such as photolithography, dry and wet etching processes, etc. Then, the fin 1101 and the membrane 1102 are bonded to the strip 115 and the substrate 101 by a bonding method, such as Figure 13(a) and 13(b) shown.

[0223] When the holding plate is a support plate, it applies stress to the holding plate, as shown in FIG13( c). In this case, stress can be efficiently applied to the removal position, as shown in FIG13( d), so that the strip 115 can be removed from the substrate 101. The bonding solder, metal and adhesive material can provide a buffer to protect the strip 115.

[0224] This also describes the preferred method that can be used when removing. Figure 13(e) and 13(f) As shown, portions of the holding plate are removed by a wet or dry etching 1301 process, which results in a split support plate. The remaining process is then the same as described in Case 1: Split support plate. The key advantage of this method is that bonding the holding plate with fins to the substrate 101 such that the strips 115 enable precise alignment and simultaneous bonding of multiple strips. This can improve yield and performance.

[0225] Additionally, other methods may be used to remove the retention plate.

[0226] <Using the cleavage property of GaN crystal>

[0227] Preferably, when removing the strips 115, the cleavage properties of the GaN crystal are exploited, particularly along the m-plane and c-plane known as cleavage planes.

[0228] Utilizing the cleave plane to remove the strip 115 allows the strip 115 to be removed without undue stress, which is highly preferred.

[0229] In addition, it has been found that the strip 115 can be removed by utilizing the GaN cleavage property without using a cleavage plane. As shown in FIG. 4( l ), ​​the substrate 101 is a (20-21) plane, which is not a cleavage plane, and is tilted 15 degrees from the m-plane. However, the surface of the substrate 101 after removal contains an m-plane surface. This can be confirmed by measuring the angle of the surface.

[0230] The present invention can utilize this phenomenon. In other words, utilizing cleavage planes such as the c-plane and the m-plane provides a great advantage in removing the strip 115 in other planes such as (30-31), (30-3-1), (20-21), (20-2-1), (10-11), (10-1-1), etc. which are not cleavage planes. Therefore, it is highly preferred that a portion of the surface of the substrate 101 presents a cleavage plane after removal.

[0231] This is a very useful and powerful method that can be used to remove other planes such as (11-22), (1-10-2), (1-102), etc.

[0232] Step 5: Attachment Process After Strip Removal

[0233] Step 5 performs device processes after removing the strips 115. However, some or all of these device processes may be performed before removing the strips 115.

[0234] For example, the processing after removal may include n-electrode deposition to the back side of strips 115, facet formation by cleaving, coating of the facets, and so on.

[0235] <Providing n-electrode at separation region>

[0236] After strip 115 is removed from substrate 101, as shown in Figure 14(a), strip 115 engages support plate 116. Figure 14(a) shows the back side of strip 115, which has separation region 1401. Separation region 1401 directly contacts substrate 101 or underlying layers, but is not on the growth limit mask 102 region.

[0237] Then, as shown in FIG. 14( b ), the method of providing the n-electrode may use the metal mask 1402 method. The n-electrode may be provided on the back side of the III-nitride device layer 106 using the metal mask 1402. The height of the strip 115 is above 10 μm, so it is preferable to provide the n-electrode using the metal mask 1402 method. In addition, if the size of the strip 115 is small, the collet that transfers the strip 115 to the process may contact the support plate without touching the strip 115. This may reduce the probability of damaging the strip 115.

[0238] Typically, the n-electrode is composed of the following materials: Ti, Hf, Cr, Al, Mo, W, Au. For example, the n-electrode may be composed of Ti-Al-Pt-Au (thickness of 30-100-30-500 nm), but is not limited to these materials. The deposition of these materials may be performed by electron beam evaporation, sputtering, thermal evaporation, etc.

[0239] In the case of forming the n-electrode 1403 on the back side of the strip 115 after removing the strip 115 from the substrate 101, the n-electrode 1403 is preferably formed on the region including the separation region 1401, which is shown in FIG. 14( c). This region maintains good surface conditions for the n-electrode 1403 to obtain low contact resistivity. The present invention keeps this region clean until the III-nitride device layer 106 is removed. Therefore, it is better to form the n-electrode 1403 at this region.

[0240] The n-electrode 1403 may also be provided on the top surface, which is the same surface used to make the p-electrode.

[0241] <Face formation by cleavage>

[0242] The use of support plate 116 enables many methods of forming facets when removing strips 115. In other words, support plate 116 may be used when making facets, as described in more detail below.

[0243] <Dividing the support area>

[0244] The goal of this step is to prepare the strips 115 of the dividing device before removing the strips 115 from the substrate 101. Fig.15 As shown, the divided support region 1501 is formed with a periodic length, wherein each period is determined according to the device length. For example, in the case of an LD device, one period is set to 300-1200 μm.

[0245] The divided support region 1501 is a line scribed by a diamond tip scriber or a laser scriber; or a groove 1502 formed by dry etching, such as reactive ion etching (RIE) or inductively coupled plasma (ICP), but not limited to these methods. The divided support region 1501 is formed on both sides of the strip 115 or on one side of the strip 115. The depth of the divided support region 1501 is preferably 1 μm or more.

[0246] Several methods can be used to divide the strip 115 into devices, as described below. The divided support region 1501 is weaker than any other portion. The divided support region 1501 avoids breaking the strip 115 at unexpected locations, allowing the device length to be accurately determined, such as Fig.15 shown.

[0247] Also like Fig.15 As shown, a divided support region 1501 is formed at the surface of the strip 115 to avoid a current injection region 1503 , such as on a ridge structure or on the p-electrode 110 .

[0248] Furthermore, the partitioned support region 1501 may also be formed on the back side of the strip 115 where there is no current injection region 1503 as there is on the top side of the strip 115. Thus, the partitioned support region 1501 may be formed in a variety of ways.

[0249] Fig.16 Shows Fig.15 The dividing support areas 1501 and grooves 1502, and other types of dividing support areas 1601, 1602, 1603, 1604, wherein 1501 is a scribe line on only one side of the strip 115, 1601 is a scribe line on both sides of the strip 115, 1602 is a dotted scribe line across the strip 115, 1603 is a continuous scribe line across the strip 115, and 1604 is a dividing support area or a local groove formed by dry etching or laser scribing.

[0250] On the other hand, strip 115 may be divided into one or more devices without divided support areas 1501, grooves 1502, or divided support areas 1601, 1602, 1603, 1604. However, it is highly preferred to utilize divided support areas 1501, grooves 1502, or divided support areas 1601, 1602, 1603, 1604. Furthermore, any combination of different types of divided support areas 1501, 1601, 1602, 1603, 1604, or grooves 1502 may be used.

[0251] <Different types of support plates>

[0252] There are two types of support plates 116: without or with a depressed area 1701, respectively Figure 17(a) and17(b) As shown. These depressed areas 1701 help divide the strip 115 into two or more devices. In addition, it also helps to make the device faceted.

[0253] The support plate 116 may also assist in removing the strip 115 from the substrate 101 and dividing the strip 115 into devices in the case of bonding. In this way, the support plate 116 has many advantages.

[0254] There are several methods of utilizing the support plate 115 to divide the strip 115 into devices, which are described below.

[0255] ---Method 1---

[0256] Figure 18(a) and 18(b) A first method of dividing the strip 115 is illustrated, and a cross section of the strip 115 with a support plate 116 is shown. In this case, in order to make the cleaving facets, the length of the support plate 116 is shorter than the strip 115. Using a dividing support area 1501 is much better at obtaining the cleaving plane. In this method, the strip 115 has a dividing support area 1501 at the back side of the strip 115. These areas 1501 are formed by a diamond tip scriber or a laser scriber after the strip 115 is removed from the substrate 101. The areas 1501 are located at the edge of the support plate 116. Then, the claw 1801 applies stress to the edge 115 of the strip in order to cleave the strip 115. The support plate 116 promotes cleaving by suspending the edge 115 of the strip.

[0257] Furthermore, the strips 115, after being removed, do not substantially contain the substrate 101. The strips 115 made by MOCVD, MBE, etc. have high crystalline quality, while the substrate 101 generally has some irregularities, such as grains, depressions, etc. When the substrate 101 and the strips 115 are cleaved simultaneously by conventional methods, the irregularities of the substrate 101 may prevent the strips 115 from being well cleaved in a straight manner.

[0258] Another way to create facets is Figure 18(c) and 18(d) 15, which forms a divided support area 1501 on the top side of the strip 115 before or after being bonded to the support plate 116. In this case, the claw 1801 applies stress to the edge 115 of the strip, which is suspended from the support plate 116. Since the rest of the strip 115 is bonded to the plate 116, it is easy to split the strip 115 at the divided support area 1501.

[0259] The result of this method is a device unit 1802 consisting of a device with a support plate 116 .

[0260] ---Method 2---

[0261] In the second method, the support plate 116 has a depressed area 1901, such as Figure 19(a) and 19(b) As shown in FIG. 1 , the portions of the strip 115 corresponding to the depressed areas 1901 of the support plate 116 are suspended. Since these areas 1901 are suspended, the strip 115 can bend when stress is applied to these areas 1901 by the claw 1801. This phenomenon is used to split and / or divide the strip 115, such as Figure 19(c) and 19(d) The support plate 116 is joined as if dividing the support area 1501 in the depressed area 1901, as shown in FIG. 19(a). In addition, a separation portion 1902 is located on the back side of the support plate 116, which is formed to correspond to the depressed area 1901. The separation portion 1902 helps to divide the support plate 116.

[0262] The result of this method is a device unit 1802 consisting of a device with a support plate 116 .

[0263] ---Method 3---

[0264] The third method is a variation of the second method without the depressed area, such as Figure 20(a) and 20(b) In this case, the support plate 116 and the strip 115 can be cleaved and / or divided at the same time by using the divided support area 1501, the separation portion 1902 and the collet 1801. Thereby, it is possible to manufacture a device having the support plate 116 as a device unit 1802.

[0265] ---Method 4---

[0266] A fourth method uses a dry etching method to cleave and / or divide the strips 115, such as Figure 21(a)-21(c) As shown. The thickness of the strip 115 is in the range of 5 to 100 um. The portion of the strip 115 corresponding to the depressed area 1901 is etched. However, before the etching completely separates the strip 115, the etching stops. Therefore, the thickness of the strip 115 at the etching area 2101 is so thin that the crack 2102 appears as an internal strain at the etching area 2101, which automatically splits or divides the strip 115. If the strip 115 is not separated by the internal strain, stress can be applied to the etching area 2101 by the claw 1801, as shown in Figure 21 (c). Then, the support plate 116 is divided by the separated portion 1902. Thereby, a device having the support plate 116 as a device unit 1802 can be manufactured.

[0267] ---Method 4'---

[0268] A variation of the fourth method is Figure 21(d) and 21(e). The strip 115 is completely separated by etching at the etching portion 2101. In addition, the etched mirror facet 2103 can be manufactured by dry etching. When the facet 2103 is manufactured, the shape of the facet 2103 is inclined. In the case where the facet 2103 is perpendicular to the direction of the waveguide, the facet 2103 produces the desired effect. To achieve this, an angle etching method can be used. The sample is placed in an etching chamber at an angle to obtain a vertical facet 2103. This method is suitable for samples that are difficult to obtain vertical facets by a cleavage method, such as semi-polar planes (20-21), (20-2-1), (30--31), (30-3-1), (11-22), etc. Then, the support plate 116 is separated at the separation portion 1902. Thereby, a device with a support plate 116 as a device unit 1802 can be manufactured only.

[0269] ---Method 5---

[0270] The fifth method is Figure 22(a)-22(b) . The method bends the strip 115 and the support plate 116, which causes the strip to be split and / or divided. The strip 115 and the support plate 116 are rectangular in shape, which have a large ratio of short sides to long sides, and therefore can be easily bent. To bend the strip 115, a collet 1801 and a support plate 116 can be used. The strip 115 and the support plate 116 are bent, which applies stress at the dividing support area 1501. Thereby, the strip 115 and the support plate 116 can be split and divided into device units 1802. The direction of the bending is determined according to the position of the dividing support area 1501. If the dividing support area 1501 is formed on the back side of the strip 115, as shown in FIG. 22( a), the applied stress bends the strip 115 into a convex shape.

[0271] On the other hand, if the divided support area 1501 is formed on the opposite side (top) of the strip 115, the applied stress bends the strip 115 into a concave shape as shown in Fig. 23(a). Thus, a device unit 1802 is manufactured as shown in Fig. 23(b).

[0272] ---Method 6---

[0273] The sixth method is almost the same as the fifth method. However, the way of applying stress is different from the fifth method. In the fifth method, stress is mechanically applied to the strip 115 by the collet 1801 and the plate 116. On the other hand, in the sixth method, stress is applied to the strip 115 using the difference in thermal expansion coefficient between the strip 115 and the support plate 116, as shown in FIG. Figure 24(a)-24(c) shown.

[0274] Under the condition of lowering the temperature, if the thermal expansion coefficient of the strip 115 is greater than that of the support plate 116, the strip 115 and the support plate 116 become concave shapes, as shown in FIG24(c). On the other hand, if the thermal expansion coefficient of the strip 115 is less than that of the support plate 116, the strip 115 and the support plate 116 become convex shapes, as shown in FIG24(b). The difference in thermal expansion coefficients can split and / or divide the strip 115 and the support plate 116 into device units 1802.

[0275] <Edge of opening area>

[0276] like Fig.25 As shown, after growing the ELO III-nitride layer 105A, the edge 115 of the strip has various shapes depending on the plane of the substrate 101. At the edge portion, there may be many different thicknesses of the layers of the III-nitride device layer 106 compared to the center of the strip 115. In addition, the edge 115 of the strip may also have different thicknesses on both sides. When manufacturing the device, the edge portion of the strip 115 may not be used, although the present invention can solve the problem of different thicknesses even in this case. For example, as Figure 18(a) , 18(b) , 18(c) and 18(d), the edges 115 of the strips can be easily eliminated while simultaneously producing the cleavage facets.

[0277] As another measure, using CMP is a beneficial method after growing the III-nitride ELO layer 105A. In the present invention, the ELO III-nitride layer 105A is the thickest layer among the layers in the strip 115. Therefore, the difference in thickness between the edge portion and the central portion of the strip 115 becomes larger. Therefore, after growing the ELO III-nitride layer 105A, the substrate 101 having the III-nitride ELO layer 105A is polished by CMP to be flush with the surface. Compared with the III-nitride ELO layer 105A, the III-nitride device layer 106 is not so thick. After growing the III-nitride device layer 106, the difference in thickness between the edge portion and the central portion of the strip 115 does not cause a problem when manufacturing a device.

[0278] <Split-surface coating process>

[0279] The next step in device processing involves coating the facets. When the laser diode device emits a laser, light in the device that penetrates the facets of the device to the outside of the device is absorbed by the radiationless recombination centers at the facets, causing the facet temperature to continue to rise. As a result, the temperature rise can lead to catastrophic optical damage (COD) of the facets.

[0280] Facet coating can reduce non-radiative recombination centers. To prevent COD, facets need to be coated with dielectric layers such as AlN, AlON, Al2 O 3 、SiN、SiON、SiO 2 、ZrO 2 、TiO 2 、 2 O 5 Etc. In general, the coating film is a multilayer structure composed of the above materials. The structure and thickness of the layer are determined by the predetermined reflectivity.

[0281] In the present invention, the strip 115 is typically divided into a plurality of device units 1802 to obtain split facets. The method of coating the facets needs to be performed in an easy manner on several device units 1802 at the same time. In the facet coating process, the device units 1802 are mounted on the spacer plate 2601 in a low horizontal position before coating, such as Fig.26 Preferably, the spacer plate 2601 has an adhesive on its surface to fix the device unit 1802. Then, as shown in FIG. Fig.26 26(a) and 26(b), a plurality of device units 1802 are disposed on a spacer plate 2601, and a plurality of spacer plates 2601 are stored in a coating holder 2602. In these processes, it is preferred to use a support plate 116 that is larger than the strip 115 to facilitate handling of the device units 1802, because the device units 1802 can be transferred without touching the device units 1802, thereby reducing the chance of damaging the strip 115. Note that it is not always necessary to use a spacer plate 2601, and the coating holder 2602 may be used alone.

[0282] Thereby, several device units 1802 can be coated simultaneously. In one embodiment, facet coating is performed at least twice - once for the front facet of each device unit 1802 and once for the rear facet of each device unit 1802 .

[0283] The length of the spacer plate 2601 is set to almost the cavity length of the laser diode device, making it easy and fast to coat multiple times. Once the spacer plate 2601 is set in the coating holder 2602, two facets can be coated without setting the spacer plate 2601 again in the coating holder 2602. In one embodiment, the first coating is performed on the front facet that emits the laser, and the second coating is performed on the rear facet that reflects the laser. The coating holder 2602 is reversed in the facility for depositing the coating film before the second coating. This substantially reduces the lead time of the process.

[0284] like Figure 27(a) and 27(b)As shown, the ridge structure 108 is located at the bottom of the strip 115. When coating the facets, in the case where the support plate 116 has a depressed area 1701, the coating 2701 can be formed into a warped area 2702 at the edge 115 of the strip. The existing warped area helps the coating layer to completely cover the ridge structure 108, which is highly preferred.

[0285] Step 6: Mount the device with support plate to the module's poles and table

[0286] In step 6, the device with the support plate 116 is mounted to the poles and stages of the module and then subjected to a screening or burn-in test.

[0287] Screening device

[0288] This step distinguishes defective and non-defective devices. First, various characteristics of the device are checked under given conditions; such as output power, voltage, current, resistivity, far field pattern (FFP), slope efficiency, etc. At this point, the chip is already mounted on the heat sink board, so it is easy to check these characteristics.

[0289] like Figure 28(a) and 28(b) As shown, preferably, the aging test is performed in a box 2801, which is sealed in a dry air or nitrogen atmosphere. The p-electrode and the solder having electrical continuity to the n-electrode 1403 are contacted by probes 2802, 2803, respectively. Then, non-defective device units 1802 can be selected and screened by the aging test (life test).

[0290] The heating stage 2804 maintains the temperature of the device unit 1802 with a heat sink plate during the screening test, for example, 60 degrees, 80 degrees, etc. The light detector 2805 is used to measure the light 2806 output power, which identifies non-defective device units 1802 with constant output power or detects defective device units 1802.

[0291] In particular, in the case of a III-nitride-based semiconductor laser diode device, it is known that when the laser diode oscillates in an atmosphere containing moisture, it deteriorates. This degradation is caused by moisture and siloxane in the air, so the III-nitride-based semiconductor laser diode needs to be sealed in dry air during the aging test. Therefore, when the III-nitride-based laser diode is shipped from the device manufacturer, the laser diode is already sealed in a dry air atmosphere.

[0292] Prior Art Regarding Screening or Burn-in Testing

[0293] Generally speaking, screening or aging tests are performed before shipment to screen out defective products. For example, screening conditions such as high temperature and high power are performed according to the specifications of the laser device.

[0294] Furthermore, this is done with the device mounted in / on a package that is sealed in dry air and / or dry nitrogen prior to screening. This results in limited flexibility in the packaging and mounting of the laser device.

[0295] In the prior art, if defective production occurs, the defective product is discarded in the entire TO can package, which is a great loss for production. This makes it difficult to reduce the production cost of laser diodes. There is a need to detect defective products at an earlier step.

[0296] Benefits and Advantages

[0297] The method of the present invention has the following advantages.

[0298] The coating segmentation of the device uses a heat sink plate on which multiple devices can be mounted at a low level, and then after the coating process, grooves are used to divide the coated strip into devices with sub-mounts, allowing the devices with sub-mounts to be inspected in a dry air or nitrogen atmosphere in screening tests.

[0299] When the screening test is performed, the device already has two contact points, namely the p-electrode and the solder on the heat sink board, or in the case of flip chip bonding, the n-electrode and the solder on the heat sink board. In addition, when the device consists of only the chip and the sub-mount, the present invention can select defective products using the screening test. Therefore, in the case of discarding defective products, the present invention can reduce losses more than the prior art, which is of great value.

[0300] In the case of screening high power laser diode devices, there are two electrode pads with solder 2807, 2808 on the heating stage 2804. A portion of the solder is connected to the n-electrode with a wire, and another portion of the solder is connected to the p-electrode through a conductive support plate. In addition, it is very preferred that the n-electrode is connected to the solder portion 2808 by two or more wires. Thereby, the probe used to apply current to the device is critical in the case of high currents that will be used to screen high power laser diodes, which can avoid contacting the p-electrode and n-electrode directly. The probe does not directly contact the electrode, which may break the contacted portion, especially in the case of applying high current density.

[0301] Mount the device on or in a package

[0302] like Fig.29 As shown, a TO can package 2901 includes a stem and a stage 2902, wherein a device or chip 2903 is mounted on the stem and the stage 2902. The TO can package 2901 includes a window 2904 for emitting light; otherwise, the TO can package 2901 is sealed 2905.

[0303] The solder (Au-Sn, Sn-Ag-Cu, etc.) or bonding metal (Au-Au bonding) provided at the bottom of the package 2901 is wire-bonded to the solder on the package 2901, such as AlN, SiC, CuW, Cu, Al, etc. The pins of the package 2901 are connected by wires to the solder on the board 116. Thereby, current from an external supply can be applied to the device 2903.

[0304] like Fig.30 As shown, the device or chip 3001 can also be directly mounted in a package 3002, which includes a cover 3003, a window 3004 for emitting light, and one or more pins 3005 for electrical connection. The back side of the support plate 116 and the side faces of the support plate 116 can directly contact the surface of the package 3002. Due to the high thermal conductivity, this is very preferred in terms of thermal management.

[0305] Furthermore, this is more preferred than solder bonding between the package 3002 and the device 3001 by metal bonding (such as Au-Au, Au-In, etc. bonding). This method requires flatness of the surface of the package 3002 and the back side of the device 3001. If the support plate 116 is made of silicon, it is easy to achieve an atomically flat surface, which is preferred. In the absence of solder, this configuration achieves high thermal conductivity and low temperature bonding, which are the main advantages of the device process.

[0306] In addition, phosphor 3006 can be positioned outside and / or inside package 3002. Device 3001 can be installed in package 3002 using various configurations because of its compact nature. In addition, when silicon is selected as the material of support plate 116, it makes it easy to obtain support plate 116 of various shapes, sizes and surface conditions because silicon has high processability. Of course, the present invention can use many types of materials, such as metals, ceramics, semiconductors, etc.

[0307] Thereby, the module can be used as a light bulb or a car headlight.

[0308] As presented herein, these processes provide an improved method of obtaining laser diode devices including VCSELs. Furthermore, once the device is removed from substrate 101, substrate 101 can be recycled several times, which accomplishes the goals of environmentally friendly production and low-cost modules. These device units can be used as lighting devices such as light bulbs, data storage devices, optical communication devices such as Li-Fi, etc.

[0309] It is difficult to produce a single type of package that can be used with multiple different types of laser diode devices. However, this method can overcome this problem by using device units because burn-in testing can be performed without subpackaging. Therefore, it is easy to install different types of devices in a single type of package.

[0310] Fig.31 The problem of handling and mounting the device unit 1802 is illustrated. When it comes to handling the device unit 1802 and mounting to the package, the width Wb of the strip 115 is preferably narrower than the width Wsp of the support plate 116. When Wsp is wider than Wb, the device unit 1802 can be mounted in a manner that the side facets of the support plate 116 directly contact the surface of the package or heat sink. If Wb is wider than Wsp, the strip 115 prevents the side facets of the support plate 116 from completely contacting the package or heat sink.

[0311] Figure 8 The problem in the case where the support plate 116 is likely to have a shape in which its height Wh is greater than its width Wb is illustrated because this shape makes it easy to effectively remove the strip 115 from the substrate 101 by applying stress to the removal position 113 .

[0312] Fig.31 The figure shows a case where the area of ​​the side face of the support plate 116 is larger than the area of ​​the bottom thereof. In this case, the thermal conductivity can be effectively improved by utilizing the area of ​​the side face of the support plate 116, so it is preferable.

[0313] Definition of terms

[0314] III-nitride substrates

[0315] As long as the III-nitride substrate 101 allows the growth of the III-nitride based semiconductor layer through the growth limit mask 102, any GaN substrate cut from bulk GaN and AlN crystals on the {0001}, {11-22}, {1-100}, {20-21}, {20-2-1}, {30-31}, {30-3-1}, {10-11}, {10-1-1} plane, etc. or other planes can be used.

[0316] Heterogeneous Substrate

[0317] In addition, the present invention can also use a foreign substrate 101 for the device. For example, a GaN template or other III-nitride-based semiconductor layer can be grown on a foreign substrate 101 (such as sapphire, Si, GaAs, SiC, etc.) for use in the present invention. The GaN template or other III-nitride-based semiconductor layer is typically grown on the foreign substrate 101 to a thickness of about 2-6 μm, and then a growth restriction mask 102 is set on the GaN template or other III-nitride-based semiconductor layer.

[0318] Growth restriction mask

[0319] The growth restriction mask 102 includes a dielectric layer (such as SiO 2、SiN、SiON、Al 2 O 3 、AlN、AlON、MgF、ZrO 2 The growth restriction mask 102 may be a laminated structure selected from the above materials. It may also be a multi-stacked layer structure selected from the above materials.

[0320] In one embodiment, the thickness of the growth restriction mask 102 is about 0.05-3 μm. The width of the mask 102 is preferably greater than 20 μm, and more preferably, the width is greater than 40 μm. This design is to avoid interference between adjacent support plates 116. The growth restriction mask 102 is deposited by sputtering, electron beam evaporation, plasma enhanced chemical vapor deposition (PECVD), ion beam deposition (IBD), etc., but is not limited to these methods.

[0321] like Figure 3(a) and 3(b) As shown, the growth restriction mask 102 includes a plurality of opening regions 103 which are periodically arranged in the first direction and the second direction at intervals Wo+Wr extending in the second direction.

[0322] Typical dimensions of masks

[0323] Typically, the growth restriction mask 102 used in the present invention has the following dimensions. The length of the opening region 103 is, for example, 200 to 35000 μm; the width Wo is, for example, 2 to 180 μm. In one embodiment, the growth restriction mask 102 is as follows: Figure 3(a) and 3(b) As shown, 1.0-μm-thick SiO 2 A film was formed in which the length of the opening region 102 was 4000 μm; the width Wo was 40 μm; and the width of the mask was 60 μm.

[0324] Direction of the growth restriction mask

[0325] On the c-plane free-standing GaN substrate 101, the stripped openings 103 are periodically arranged at first intervals and second intervals in a first direction parallel to the 11-20 direction (a-axis) of the substrate 101 and in a second direction parallel to the 10-10 direction (m-axis) of the substrate 101, respectively, and extend in the second direction.

[0326] On the m-plane free-standing GaN substrate 101, the stripped openings 103 are periodically arranged at first intervals and second intervals in a first direction parallel to the 11-20 direction (a-axis) of the substrate 101 and in a second direction parallel to the 0001 direction (c-axis) of the substrate 101, respectively, and extend in the second direction.

[0327] On a semipolar (20-21) or (20-2-1) GaN substrate 101, the opening regions 103 are arranged in directions parallel to [-1014] and [10-14], respectively.

[0328] Alternatively, a foreign substrate 101 may be used. When a c-plane GaN template is grown on a c-plane sapphire substrate 101, the opening region 103 is in the same direction as the c-plane GaN template; when an m-plane GaN template is grown on an m-plane sapphire substrate 101, the opening region 103 is in the same direction as the m-plane GaN template. Thereby, the m-plane cleavage plane can be used to divide the strips 115 of the device having the c-plane GaN template, and the c-plane cleavage plane can be used to divide the strips 115 of the device having the m-plane GaN template; this is highly preferred.

[0329] The width of the stripped opening 103 is typically constant in the second direction, but may vary in the second direction as desired. It is preferably selected as a direction to allow a smooth surface to be easily obtained after growing the III-nitride ELO layer 105A.

[0330] Group III nitride semiconductor layer

[0331] The III-nitride ELO layer 105A, the III-nitride regrown layer 105B, and the III-nitride device layer 106 generally include (Al, In, Ga, B)N layers, and may contain dopants and other impurities such as Mg, Si, Zn, O, C, H, and the like.

[0332] The III-nitride device layer 106 generally includes more than two layers, including at least one layer among an n-type layer, an undoped layer, and a p-type layer. The III-nitride device layer 106 specifically includes a GaN layer, an AlGaN layer, an AlGaInN layer, an InGaN layer, etc. In a semiconductor device, several electrodes are provided at predetermined positions according to the type of the semiconductor device.

[0333] Advantages of Epitaxial Lateral Overgrowth

[0334] The crystallinity of the III-nitride layer 105A grown from the stripped opening 103 of the growth restriction mask 102 on the III-nitride substrate 101 using epitaxial lateral overgrowth (ELO) is very high.

[0335] Furthermore, two advantages can be obtained by using the III-nitride substrate 101. One advantage is that a high quality III-nitride ELO layer 105A can be obtained, such as having a very low defect density compared to using a sapphire substrate.

[0336] Another advantage of using similar or identical materials for both the epitaxial layer and the substrate is that strain in the epitaxial layer can be reduced. In addition, due to similar or identical thermal expansion, the method can reduce the amount of bending of the substrate during epitaxial growth. As above, the effect is that the production yield can be high so as to improve the uniformity of temperature.

[0337] The use of foreign substrates such as sapphire (m-plane, c-plane), LiAlO, SiC, Si, etc. for growing III-nitride based semiconductor layers is that these substrates are low cost substrates. This is an important advantage for large scale production.

[0338] In terms of device quality, the use of a free-standing III-nitride substrate is highly preferred for the above reasons. On the other hand, the use of a foreign substrate makes it easy to remove the III-nitride-based semiconductor layer due to the weaker bonding strength at the cleavage point.

[0339] Support plate

[0340] In the present invention, there are two types of support plates 116. These types of support plates 116 are identified as type A and type B. In type A, the support plate 116 is pre-designed to be suitable for removing one strip 115. In type B, the support plate 116 has a plurality of fins, each of which corresponds to a strip 115 to be removed.

[0341] Polymer film

[0342] The polymer film 111 is used to remove the device unit from the III-nitride substrate 101 used with the foreign substrate 101 or from the GaN template, such as Figure 4(i) and 4(j) In the present invention, cutting tape (including commercially available UV-sensitive cutting tape) can be used as the polymer film 111. For example, the structure of the polymer film 111 may include a double layer, such as Fig.32 As shown, it includes a base layer 3201 and an adhesive layer 3202, but is not limited to this structure. The base film 111 material can have a thickness of, for example, about 80 μm, and can be made of polyvinyl chloride (PVC). The adhesive layer having a thickness of, for example, about 15-40 μm can be made of an acrylic UV sensitive adhesive.

[0343] When the UV sensitive dicing tape is exposed to UV light, the stickiness of the tape decreases dramatically.After removing the III-nitride device layer 106 from the substrate 101, the UV sensitive dicing tape is exposed by UV light, which allows for easy removal.

[0344] Device

[0345] The semiconductor device is, for example, a Schottky diode, a light emitting diode (LED), a laser diode (LD), a vertical cavity surface emitting laser (VCSEL), a photodiode, a transistor, a sensor, etc., but is not limited to these devices. The present invention is particularly useful for micro-LEDs and laser diodes, such as edge-emitting lasers and vertical cavity surface emitting lasers. The present invention is particularly useful for semiconductor lasers with cleaved facets.

[0346] Alternative Embodiments

[0347] First embodiment

[0348] A Group III nitride based semiconductor laser device and a method of manufacturing the same according to the first embodiment are explained.

[0349] In the first embodiment, if Figure 3(a) and 3(b) and Figure 4(i)-4(j) As shown, a base substrate 101 is first provided, and a growth restriction mask 102 having a plurality of stripped opening regions 103 is formed on the substrate 101 .

[0350] In this embodiment, the base substrate 101 is an m-plane substrate made of an ELO III-nitride based semiconductor having a mis-cut orientation of -1.0 degrees toward the c-axis. Fig.33 As shown in the images, the ELO III-nitride based semiconductor layer is substantially uniform and has a very smooth surface.

[0351] The growth conditions of the ELO III-nitride layer can be the same as the MOCVD growth conditions. For example, the GaN layer is grown at a temperature of 950-1200°C and a pressure of 15 kPa. For the growth of the GaN layer, trimethylgallium (TMG) and ammonia (NH 3 ) was used as the raw gas, and the carrier gas was only hydrogen (H 2 ), silane (SiH 4 ) as dopant gas. The growth time is 4-8 hours.

[0352] The growth gas flow rates are as follows: TMG is 12 sccm, NH 3 8slm, carrier gas 3slm, and SiH 4 is 1.0 sccm; and the V / III ratio is about 7700. This can obtain a 20 μm thick III-nitride ELO layer 105A.

[0353] After the growth of the III-nitride ELO layer 105A, the substrate 101 with the layer 105A is removed from the MOCVD apparatus to remove the growth limiting mask 102. The growth limiting mask 102 is removed by wet etching using an etchant such as HF, BHF, etc. Then, the III-nitride device layer 106 can be grown on the substrate 101, as shown in FIG4(d). The III-nitride device layer 106 can include an InGaN layer, an AlGaN layer, an AlInGaN layer, an AlInN layer, etc.

[0354] For the growth of the AlGaN layer, triethylaluminum (TMA) was used as a starting gas; and for the growth of the InGaN layer, triethylindium (TMI) was used as a starting gas. Under these conditions, the following layers have been grown on the III-nitride ELO layer 105A.

[0355] Composed of p-GaN capping layer, SiO 2 The ridge stripe structure composed of the current confinement layer and the p-electrode provides optical confinement in the horizontal direction. The width of the ridge stripe structure is on the order of 1.0 to 40 μm, and is typically 10 μm. The nitride semiconductor laser diode has the following layers, which are stacked on the III-nitride ELO layer (GaN layer) 105A in the order described: InGaN / GaN 3MQW active layer (10nm x 10nm: 3MQW), AlGaN-EBL (electron blocking layer) layer, p-GaN guide layer, ITO capping layer and p-electrode. Note that these nitride semiconductor layers can be grown from any nitride-based III-V compound semiconductor in the above order.

[0356] The process of manufacturing the device is implemented on a wafer scale. It can use conventional methods such as photolithography, deposition by sputtering and electron beam (EB), etching by ICP and RIE, etc. Finally, it can obtain a diode laser structure on the substrate 101, as shown in Figure 4(e). The strip 115 of the device is bonded to the support plate 116, as shown in Figure 4(f). The support plate 116 is made of silicon and uses An-Sn solder 117. When bonding, the support plate 116 is heated to 250-300°C. The width Wm of the bonding metal 117 is preferably wider than the width Wp of the p-pad to which it is bonded, as shown in Figure 4(e). Figure 2 , 9, 40 and 41. Preferably, Wm is wider than the width Wb of the strip 115 to ensure the contact strength between the strip 115 and the support plate 116.

[0357] As shown in FIG4(g), the polymer film 111 is attached to the support plate 116, and stress is applied so that it enters into the space between adjacent support plates 116. The substrate 101 having the support plates 116 and the polymer film 111 is cooled to take advantage of the different thermal expansion coefficients between the polymer film 111 and the substrate 101. Cooling the film 111 causes it to shrink, which increases stress on the support plate 116 in the vertical direction of the strip 115. Then, the strip 115 having the support plate 116 can be removed from the substrate 101. The polymer film 111 has an adhesive layer to hold the support plate 116 after the strip 115 is removed. The adhesive layer is soft, so when pressure is applied, the adhesive layer enters into the space between adjacent support plates 116, as shown in FIG4(g). Figure 4(i) and 4(j) This effectively applies stress to the removal point 113. In addition, the adhesive layer does not directly contact the strip 115 and is therefore easy to process.

[0358] There are several options for removing the strip 115, such as Figure 36(a) and 36(b) In the case of FIG. 36( a), the strips 115 extend to the edge of the substrate 101. The support plate 116 is then placed on the strips 115. The polymer film 111 is attached to the support plate 116, completely covering the substrate 101, and is used to remove the strips 115. In this case, preferably, the area of ​​the substrate 101 can be fully utilized, with little or no space between the strips 115.

[0359] In the case of FIG. 36( b), the strips 115 are divided into several parts of the substrate 101. The support plate 116 is then disposed on the strips 115. The polymer film 111 is disposed on only some of the strips 115 on the substrate 101, and only these strips 115 are removed. The remaining strips 115 on the substrate 101 can be removed by repeatedly performing the same process. As the wafer size of the substrate 101 increases, this method is preferred because the removal process can be repeated within a small area.

[0360] As shown in FIG. 14 , an n-electrode 1403 composed of Ti / Al / Pt / Au layers may be disposed on the back side of the strip 115 using a metal mask 1402 .

[0361] In this case, the split facets are made using the method 2 proposed in step 5. First, the facets are made, and then the support plate 116 is separated using the separation portion 1902. Fig.26 As shown, the device unit 1802 is deposited with AlN / Al 2 O 3 Then, as Figure 28(a) and 28(b) As shown, the screening test checks for failure of device unit 1802 .

[0362] Only device units 1802 that pass the screening test are mounted on the package, such as Fig.29 and Fig.30 These packages are arranged as modules, which can include automotive headlights, light bulbs, projectors, etc.

[0363] like Fig.33 , 34 As shown in FIG. 35 , the present invention can use the ELO technique to obtain smooth surfaces in many different planes. In addition, the present invention can use the ELO technique to obtain smooth surfaces in many different planes of the GaN substrate. The examples shown herein describe the case of the m-plane, but the present invention is not limited to these planes and can utilize many different planes.

[0364] Second embodiment

[0365] In this embodiment, the plane of the III-nitride substrate 101 is semi-polar (20-21). When a semi-polar substrate 101 is used, the present invention may not be able to obtain the cleavage plane at the facet of the laser diode device. In this case, a dry etching process can be used to make the laser facet. Figure 37(a) and 37(b) As shown, etching using a dry etching method results in facets 3701 and steps 3702 on strip 115, where 3703 represents light emission. Then, a partition support region 1501 is formed on step 3702, which can be used when partitioning strip 115 into device units 1802. Figure 38(a) and 38(b) The diagram further illustrates the divided support region 1501, the depressed region 1701, the etched mirror region 3801, and the coating layer 3802. The strip 115 and the support plate 116 can be divided into device units 1802 using method 2 of step 5. In this way, the present invention can use the semipolar substrate 101 for edge-emitting lasers. Even when the semipolar substrate 101 is used, the cleaving method can be used.

[0366] Third embodiment

[0367] In this embodiment, as shown in FIG. 39 and Fig.40 The manufacturing of VCSEL is explained as shown.

[0368] FIG39( a) shows the structure before the strips are removed, where the VCSEL structure can be conventional. As a dielectric multilayer (such as SiO 2 、Al 2 O 3 、TiO 2 、 2 O 3 )'s p-side DBR 3901 and p-electrode 3902 are disposed on the strip 115.

[0369] Fig. 39(b) shows the structure after the strips 115 are removed together with the support plate 116. The n-side DBR 3903 and the n-electrode 3904 are provided on the back side of the strips 115. In the case of VCSELs, there is no need to form cleavage facets.

[0370] When dividing the strip 115 into device units, any proposed method may be used.

[0371] Fig.40 1 is a schematic diagram of a VCSEL 4001 bonded to a support plate 116 using a bonding metal 117, wherein the VCSEL 4001 comprises an n-side DBR 4002, an n-electrode 4003, a p-side DBR 4004, a p-electrode 4005, an ITO layer 4006, and an active layer 4007. Both m-plane and c-plane substrates 101 are applicable to this embodiment. After removing the strip 115, the back side of the strip 115 is a cleavage plane. Therefore, the surface of the back side of the strip 115 can be very flat.

[0372] However, even if other substrate 101 is used, the back side of bar 115 is polished by CMP or the like to be flattened.

[0373] Fourth embodiment

[0374] LED and micro-LED are explained in this embodiment. The III-nitride device layer 106 is grown on the ELO III-nitride layer 105A, which is grown on the c-plane GaN substrate 101. The opening area 103 (not shown) is a hexagonal shape, and the diameter of the opening area is 3-250 microns. A high reflectivity p-type electrode 901 is provided on the III-nitride device layer 106.

[0375] like Figure 41(a) , 41(b) , 41(c) and 41(d), support plate 116 is attached to strip 4101 of LEDs. In these drawings, FIG. 41(a) is a first top view, and FIG. 41(b) is a side view of FIG. 41(a), while FIG. 41(c) is a second top view, and FIG. 41(d) is a side view of FIG. 41(c). In these embodiments, strip 115 may not have a rectangular shape, but it is identified as strip 115 for ease of explanation regardless of the shape of the device.

[0376] 42( a) shows a device unit after removing the strip 115 and the support plate 116, wherein there is an N-pole surface 4201 at the back side of the strip 115. The N-pole surface 4201 is easily etched with a KOH etchant or the like, which can obtain a rough surface 4202 suitable for light extraction, as shown in FIG42( b).

[0377] Finally, the device units from this process are arranged and packaged for use.

[0378] Fifth embodiment

[0379] In the fifth embodiment, a sapphire substrate is used as a foreign substrate 101. The structure is almost the same as the first embodiment except that a sapphire substrate 101 and a buffer layer on the sapphire substrate 101 are used. The buffer layer is generally used with a III-nitride-based semiconductor layer grown on the sapphire substrate 101. In this embodiment, the buffer layer includes both a buffer layer and an n-GaN layer or an undoped GaN layer. The buffer layer is grown at a low temperature of about 500-700°C. Afterwards, the n-GaN layer or the undoped GaN layer is grown at a higher temperature of about 900-1200°C. The total thickness is about 1-3 μm. Then, a growth restriction mask 102 is set on the n-GaN layer or the undoped GaN layer. The remaining processes for completing the device are the same as the first embodiment, especially after removing the strips 115 from the sapphire substrate 101.

[0380] On the other hand, it is not necessary to use a buffer layer. For example, the growth limiting mask 102 may be directly disposed on the foreign substrate. Thereafter, the III-nitride ELO layer 105A, the regrown layer 105B, and / or the III-nitride device layer 106 may be grown. In this case, due to the heterogeneous interface containing many defects, the interface between the surface of the foreign substrate 101 and the bottom surface of the III-nitride ELO layer 105A may be easily separated.

[0381] With the present invention, atomically smooth facets for resonance can be obtained even when using a foreign substrate 101, because the facets are formed after removing the epitaxial layer from the foreign substrate 101. In this case, the type of substrate 101 does not affect the cleavage facets. On the other hand, using a foreign substrate 101 has a large impact on mass production.

[0382] For example, the substrate 101 used can be a low-cost and large-sized substrate such as sapphire, GaAs, and Si compared to a free-standing GaN substrate. This results in a low-cost device. In addition, sapphire and GaAs substrates are known to be low thermal conductivity materials, so devices made using these substrates have thermal problems. However, using the present invention, these thermal problems can be avoided because the device is removed from the foreign substrate 101.

[0383] Furthermore, in the case of using the ELO growth method for the strips 115 of the removed device, the method can drastically reduce the dislocation density and stacking defect density, which have become critical issues in the case of using a foreign substrate.

[0384] Therefore, the present invention can solve many problems caused by using a foreign substrate.

[0385] Process steps

[0386] Fig.43 1 is a flow chart illustrating a method of removing one or more strips 115 of a device from a substrate 101 using a support plate 116, wherein: one or more strips 115 composed of group III nitride semiconductor layers 105A, 105B, 106 are formed on the substrate 101, and a structure of a device is formed on the strips 115; at least one support plate 116 is bonded to the strips 115, and stress is applied to the support plate 116 to remove the strips 115 from the substrate 101; the support plate 116 is used to manufacture one or more cleavage planes in the structure of the device after the strips 115 are removed from the substrate 101; the support plate 116 is used to divide the strips 115 into one or more device units; and the device units are packaged and arranged as one or more modules. The steps of the method are described in more detail below.

[0387] Box 4301 represents a step of providing a base substrate 101. In one embodiment, the base substrate 101 is a III-nitride based substrate 101 such as a GaN based substrate 101, or a foreign substrate 101 such as a sapphire substrate 101. The steps may also include an optional step of depositing a template layer on or over the substrate 101, wherein the template layer may include a buffer layer or an intermediate layer, such as a GaN lower layer.

[0388] Box 4302 represents the step of depositing a growth restriction mask 102 on or over the substrate 101 (ie, on the substrate 101 itself or on a template layer). The growth restriction mask 102 is patterned to include a plurality of stripped open regions 103.

[0389] Box 4303 represents the step of growing one or more III-nitride layers 105A and then growing one or more III-nitride regrown layers 105B using epitaxial lateral overgrowth (ELO) on or over growth limit mask 102. This step includes stopping the growth of ELO III-nitride layers 105A before adjacent ELO III-nitride layers 105A merge with each other.

[0390] Block 4304 represents the step of growing one or more III-nitride device layers 106 on or over ELO III-nitride layer 105A and III-nitride regrown layer 105B, thereby fabricating strips 115 on substrate 101. Additional device fabrication may occur before and / or after strips 115 are removed from substrate 101.

[0391] Box 4305 represents the step of bonding the support plate 116 to the strip 115. The support plate 116 is used to fabricate one or more cleave planes in the device structure after the strip 115 is removed from the substrate 101. The width Wsp of the support plate 116 can be wider than the width Wb of the strip 115. The height Wh of the support plate 116 can also be greater than the width Wb of the strip 115.

[0392] Box 4306 represents the step of applying stress to the support plate 116 to remove the strip 115 from the substrate 101 at the removal location 113. This step also includes determining the removal location 113 of the strip 115. The polymer film 111 can contact the support plate 116 to apply the stress. The stress is applied to the support plate 116 orthogonal to the surface of the strip 115 (e.g., in a vertical direction) to remove the strip 115 from the substrate 101 at the removal location 113.

[0393] Box 4307 represents the step of manufacturing the strip 115 into a device after removing the strip 115 from the substrate 101.

[0394] Box 4308 represents the step of dividing the strip 115 into one or more devices by cleaving at the dividing support area 1501 formed along the strip 115.

[0395] Box 4309 represents the step of installing the device with the support plate 116 in the module, wherein the device is mounted to the rods and the stage of the module. When the support plate 116 has a high thermal conductivity, the support plate 116 can be mounted directly to the rods and the stage. When the support plate 116 has a low thermal conductivity, the side of the device can contact the rods and the stage.

[0396] Box 4310 represents the resulting product of the method, namely, one or more III-nitride based semiconductor devices fabricated according to the method, and the substrate 101 that has been removed from the device and is available for recycling and reuse.

[0397] The device may include one or more ELO III-nitride layers 105A grown on or over growth limit mask 102 on substrate 101, wherein growth of ELO III-nitride layers 105A is stopped before adjacent ELO III-nitride layers 105A merge with each other. The device may also include one or more III-nitride regrown layers 105B and one or more additional III-nitride device layers 106 grown on or over ELO III-nitride layers 105A and substrate 101.

[0398] Modifications and Replacements

[0399] Several modifications and substitutions may be made without departing from the scope of the invention.

[0400] For example, the present invention can be used with various orientations of III-nitride substrates. Specifically, the substrate can be c-plane polar, base non-polar m-plane {1 0-1 0} family; and semi-polar plane family with at least two non-zero h, i or k Miller indices and non-zero l Miller index, such as {2 0-2-1} plane. (20-2-1) semi-polar substrates are particularly useful because of the wide area of ​​planarized ELO growth.

[0401] In another example, the present invention is described as being used to manufacture different optoelectronic device structures, such as light emitting diodes (LEDs), laser diodes (LDs), Schottky barrier diodes (SBDs), or metal oxide semiconductor field effect transistors (MOSFETs). The present invention can also be used to manufacture other optoelectronic devices, such as micro-LEDs, vertical cavity surface emitting lasers (VCSELs), edge emitting laser diodes (EELDs), and solar cells.

[0402] Benefits and Advantages

[0403] Several benefits and advantages of using a support plate to remove the device from the substrate derive from the method of the present invention, including the following:

[0404] 1. A thin layer device having a wide width of contact area with the substrate can be removed from the substrate.

[0405] 2. The strip can be removed while avoiding rupturing the strip after removal.

[0406] 3. Easy handling of the strip after removal.

[0407] 4. Engage the support plate while completing the connector down mounting process on the wafer.

[0408] 5. The support plate can be used to make the facets of the laser diode.

[0409] These advantages improve yield and reduce processing time.

[0410] in conclusion

[0411] The above is a description of a preferred embodiment of the present invention. For the purpose of illustration and description, the foregoing description of one or more embodiments of the present invention has been proposed. It is not intended to be exhaustive or to limit the present invention to the precise form disclosed. In accordance with the above teachings, many modifications and variations are possible. The scope of the present invention is intended not to be limited by this detailed description, but to be limited by the appended claims.

Claims

1. A method for manufacturing a semiconductor device, comprising: preparing a plurality of strips composed of a semiconductor layer on a substrate; joining at least one support plate to each of the strips, wherein each of the strips is joined to a different support plate; determining a removal location of the strip, wherein the removal location is a breaking point of the strip from the substrate, and a width of the removal location is narrower than a width of the strip; applying stress to the support plate to remove the strip from the substrate at the removal location; forming one or more divided support areas on the strip at an edge of the support plate after the strip is removed from the substrate; as well as Stress is applied to the edges of the strip to cleave the strip at the divided support regions. The method according to claim 1 , wherein a polymer film contacts the support plate to apply the stress.

3. The method of claim 1, wherein the stress is applied to the support plate normal to the surface of the strip or in a vertical direction along the length of the strip. The method of claim 1 , wherein a width Wsp of the support plate is wider than a width Wb of the strip. The method of claim 1 , wherein the height Wh of the support plate is greater than the width Wb of the strip.

6. The method of claim 1, wherein the support plate is used to divide the strip into one or more devices after the strip is removed from the substrate. The method of claim 6 , wherein the device is packaged and arranged as one or more modules.

8. The method of claim 1, further comprising forming one or more device structures on the strip.

9. The method of claim 8, wherein the support plate is used to fabricate cleave planes of one or more of the device structures after the strips are removed from the substrate.

10. The method of claim 1, wherein at least one device or module is fabricated using the strip.

11. A method for manufacturing a semiconductor device, comprising: Using one or more support plates, multiple strips of the device are removed from the substrate by: fabricating said strips on said substrate; determining a removal location of the strip, wherein the removal location is a breaking point of the strip from the substrate, and a width of the removal location is narrower than a width of the strip; joining the support plates to the strips, wherein each of the strips is joined to a different support plate; applying stress to the support plate to remove the strip from the substrate at the removal location; forming one or more divided support areas on the strip at an edge of the support plate after the strip is removed from the substrate; applying stress to the edges of the strip to cleave the strip at the divided support regions; fabricating the device on the strip after the strip is removed from the substrate; as well as The device is mounted together with the support plate in a module.

12. The method of claim 11, wherein the stress is applied to the support plate normal to a surface of the strip to remove the strip from the substrate at the removal location. 13 . The method of claim 11 , wherein the stress is applied to the support plate in a vertical direction of the strip to remove the strip from the substrate at the removal position.

14. The method of claim 11, wherein the device is mounted to a pole and a table of the module.

15. The method of claim 14, wherein when the support plate has a high thermal conductivity, the support plate is mounted directly to the rod and the stage.

16. The method of claim 14, wherein when the support plate has a low thermal conductivity, the side of the device contacts the rod and the stage.

17. The method of claim 14, wherein at least one of the strip, device or module is manufactured.

18. A method for manufacturing a semiconductor device, comprising: One or more devices are removed from a substrate using a plurality of support plates, wherein: preparing one or more strips consisting of a semiconductor layer on a substrate and forming structures of the device on the strips; determining a removal location of the strip, wherein the removal location is a breaking point of the strip from the substrate, and a width of the removal location is narrower than a width of the strip; bonding at least one of the support plates to each of the strips, wherein each of the strips is bonded to a different support plate, and applying stress to the support plates to remove the strips from the substrate at the removal location; at least one of the support plates is used to divide the strip into the devices after the strip is removed from the substrate, wherein one or more dividing support areas are formed on the strip at edges of the support plates and stress is applied to the edges of the strip to cleave the strip at the dividing support areas; and The device is packaged and arranged into one or more modules.

19. The method of claim 18, wherein at least one of the support plates is used to fabricate one or more cleave planes in structures of the device after the strip is removed from the substrate.

20. The method of claim 18, wherein at least one of the strip, device, or module is manufactured.

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