A blind via filling method using reduced graphene as a seed layer

The use of reduced graphene oxide with polyaniline and manganese oxide in circuit board blind hole filling addresses adhesion and conductivity issues, enhancing efficiency and environmental sustainability.

CN113802160BActive Publication Date: 2025-07-15GUANGZHOU HKUST FOK YING TUNG RES INST
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Patent Information

Application Number
CN202110802205.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-07-15
Publication Date
2025-07-15
Estimated Expiration
2041-07-15

AI Technical Summary

Technical Problem

In the existing blind hole filling technology, graphene is used as the seed layer, which leads to poor conductivity. The traditional method uses a large number of chemicals to be environmentally unfriendly, making it difficult to meet environmental protection requirements and large-scale production needs.

Method used

The copper electroplating barrier wall layer and seed layer were constructed using conductive polymer polyaniline and graphene. The pretreatment of the manganese dioxide layer was combined with ultraviolet light to reduce graphene oxide, which increased adhesion and reduced surface resistance, and blind hole filling was completed using reverse pulse plating.

Benefits of technology

It improves the conductivity and filling efficiency of blind holes, reduces the use of chemical raw materials, is suitable for large-scale production, and effectively prevents leakage of anodic fiber glass wire, simplifying the process.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a blind via filling method using reduced graphene as a seed layer, which includes: pre-treating a drilled circuit board to remove smear and form a manganese dioxide layer on the surface of the blind via to obtain a pre-treated circuit board; forming a polyaniline layer on the surface of the manganese dioxide layer of the pre-treated circuit board to obtain a first circuit board; forming a graphene oxide layer on the surface of the polyaniline layer of the first circuit board to obtain a second circuit board; irradiating the second circuit board with ultraviolet light to reduce the graphene oxide to obtain a third circuit board; performing reverse pulse electroplating on the third circuit board, and after electroplating, completing the filling of the blind via on the circuit board. The blind via filling method of the present invention uses the conductive polymer polyaniline and graphene to construct a copper electroplating barrier layer and a seed layer, thereby improving the conductivity and filling efficiency of the blind via, and preventing the leakage of anodic glass fibers. At the same time, its preparation method has simple steps and involves fewer chemical raw materials, and is suitable for large-scale production.
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Description

Technical Field

[0001] The present invention relates to the field of electroplating technology, and particularly relates to an environment-friendly blind hole filling method using reduced graphene as a seed layer. Background Art

[0002] With the development of the economy, the area of circuit boards is getting smaller and smaller, but the circuit components are getting more and more dense. Generally, circuit boards are stacked to reduce the occupied area, and blind holes are used to make the stacked circuit boards conductive. In traditional technology, the blind hole filling technology requires pretreatment and then electroplating with copper to form a conductive layer, but the pretreatment generally involves chemicals that are harmful to the environment. In addition, as the volume of the circuit board decreases day by day and the distance between blind holes becomes shorter, in a high-humidity environment, copper ions are likely to migrate from the high-voltage end to the low-voltage end along the glass fiber, resulting in leakage of the anodic glass fiber.

[0003] In general, the pretreatment in the commonly used blind hole filling technology generally adsorbs palladium first and then electrolessly plates copper to form a seed layer. The whole pretreatment involves a large number of processes and the use of a large amount of chemicals. Among them, ethylenediaminetetraacetic acid is particularly difficult to separate from sewage. In addition, some additives such as formaldehyde and cyanide also cause damage to the environment. In addition to using electroless copper plating technology, the prior art also includes the following seed layers: (1) using graphite to form a seed layer after removing the glue residue, but the limitation of directly using graphite is that graphite only generates van der Waals forces with the surface of the circuit board and has weak adhesion; (2) using reduced graphene to form a seed layer on polyvinylimidazole. Although it is currently known that graphene can prevent ion migration, thereby preventing leakage of the anodic glass fiber, that is, the technology of using reduced graphene to form a seed layer on polyvinylimidazole can achieve this purpose, but the conductivity of polyvinylimidazole is general, resulting in poor conductivity of the obtained stacked circuit board. In addition, the general glue residue removal process makes the surface rough without changing the surface charge. Therefore, the attachment of polyvinylimidazole utilizes the van der Waals forces and physical adhesion generated with the surface of the circuit board, and the adhesion strength depends on the surface roughness of the circuit board, which easily leads to unstable attachment effects. If the adhesion of the seed layer is insufficient, it is easy to come off during electroplating, thus unable to achieve the effect of blind hole filling. Summary of the Invention

[0004] In order to overcome the deficiencies of the prior art, the purpose of the present invention is to provide a blind hole filling method using reduced graphene as a seed layer, which uses the conductive polymer polyaniline and graphene to construct a copper electroplating barrier layer and a seed layer, thereby improving the blind hole conductivity and filling efficiency, and preventing leakage of the anodic glass fiber. At the same time, its preparation method has simple steps, involves fewer chemical raw materials, and is suitable for large-scale production.

[0005] The present invention is realized by adopting the following technical solutions:

[0006] A blind via filling method using reduced graphene as a seed layer, comprising the following preparation steps:

[0007] S1: Pretreat the drilled circuit board to remove the smear and form a manganese dioxide layer on the surface of the blind via to obtain the pretreated circuit board;

[0008] S2: Form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board to obtain the first circuit board;

[0009] S3: Form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board to obtain the second circuit board;

[0010] S4: Irradiate the second circuit board with ultraviolet light to reduce graphene oxide and lower the surface resistance to obtain the third circuit board;

[0011] S5: Perform reverse pulse electroplating on the third circuit board. After electroplating, the blind via filling on the circuit board is completed.

[0012] Further, the specific steps of step S1 are:

[0013] For the drilled circuit board, first use ethylene glycol to treat it at 70°C - 80°C for 5 min - 15 min, and then use permanganate to treat it at 70°C - 80°C for 30 min - 60 min to form a negatively charged manganese dioxide layer on the surface of the blind via of the circuit board.

[0014] Further, the circuit board is an FR4 fiberglass board; the concentration of the ethylene glycol is 500 g / L; the concentration of the permanganate is 3 wt% - 3.5 wt%.

[0015] Further, the specific steps of step S2 are:

[0016] First, form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board using a polyaniline solution, and then perform air drying for 15 min - 30 min.

[0017] Further, the polyaniline solution is prepared by dispersing 0.3 g - 3 g of polyaniline in 100 ml of ethanol.

[0018] Further, the specific steps of step S3 are:

[0019] First, form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board using a graphene oxide solution, and then dry it in an oven at 60°C for 30 min - 45 min.

[0020] Further, the graphene oxide solution is prepared by dispersing 0.3 g - 3 g of graphene oxide in 100 ml of water.

[0021] Furthermore, the irradiation time in step S4 is 3h - 10h, and the ultraviolet light uses a UVA light source.

[0022] Furthermore, the operating parameters of the reverse pulse electroplating in step S4 are: the voltage is 2.5V - 7.5V, the time is 2h - 6h, and the electroplating solution contains copper sulfate pentahydrate, sulfuric acid, sodium chloride, sodium polydithiopropane sulfonate, polyethylene glycol, Janus green B, and water.

[0023] Furthermore, the specifications of the blind hole are a diameter of 0.2 ± 0.05 mm and a depth of 0.2 ± 0.05 mm.

[0024] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0025] The blind hole filling method of the present invention uses the conductive polymers polyaniline and graphene to construct a copper electroplating barrier layer and a seed layer, thereby improving the conductivity and filling efficiency of the blind hole, and preventing the leakage of anodic glass fiber filaments. At the same time, its preparation method has simple steps and involves fewer chemical raw materials, which is suitable for large-scale production. In addition, a negatively charged manganese dioxide layer is formed on the circuit board surface during the removal of the glue residue process to adhere to the positively charged polyaniline, and negatively charged graphene oxide is further adhered to the polyaniline. Electrostatic forces are generated between each layer, thereby strengthening the adhesion between each layer. The graphene oxide is reduced by ultraviolet light, reducing the resistance of the seed layer, thereby improving the conductivity and filling efficiency.

[0026] The final product obtained by the present invention is a circuit board micro-blind hole with reduced graphene as a copper electroplating barrier layer and a seed layer. At least 2 hours of reverse pulse electroplating at a voltage of up to 2.5 - 7.5V enables the filling of micro-blind holes with a diameter of 0.2 ± 0.05 mm and a depth of 0.2 ± 0.05 mm. When the exposure time of graphene oxide to ultraviolet light is 0 hour, 3 hours, and 6 hours respectively, the average resistance of the micro-blind holes electroplated with 2.5V is 0.1299 mΩ, 0.1002 mΩ, and 0.0984 mΩ respectively, and the average resistance of the micro-blind holes electroplated with 5.0V is 0.1047 mΩ, 0.0980 mΩ, and 0.0875 mΩ respectively, indicating that the conductivity of the micro-blind holes is good. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a process flow schematic diagram of a blind hole filling method using reduced graphene as a seed layer according to the present invention;

[0028] Figure 2 is a cross-sectional analysis diagram of a blind hole in Example 3 of the present invention;

[0029] Figure 3 is a cross-sectional analysis diagram of a blind hole in Example 4 of the present invention;

[0030] Figure 4 This is the cross-sectional analysis diagram of the blind hole in Embodiment 5 of the present invention;

[0031] Figure 5 This is the cross-sectional analysis diagram of the blind hole in Embodiment 6 of the present invention;

[0032] Figure 6 This is the cross-sectional analysis diagram of the blind hole in Embodiment 7 of the present invention. Detailed implementation manners

[0033] Next, in combination with the detailed implementation manners, the present invention will be further described. It should be noted that, on the premise of no conflict, the following-described embodiments or technical features can be combined arbitrarily to form new embodiments.

[0034] Please refer to Figure 1 , which is a schematic process flow diagram of a blind hole filling method using reduced graphene as a seed layer in the present invention. Specifically, the blind hole filling method includes the following preparation steps:

[0035] S1: Pretreat the drilled circuit board to remove the smear and form a manganese dioxide layer on the surface of the blind hole to obtain a pretreated circuit board. The formation of the manganese dioxide layer is beneficial to subsequent electroplating processing;

[0036] S2: Form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board to obtain a first circuit board. The formation of the polyaniline layer is beneficial to the subsequent attachment of graphene oxide;

[0037] S3: Form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board to obtain a second circuit board. The formation of the graphene oxide layer is helpful for subsequent copper electroplating;

[0038] S4: Irradiate the second circuit board with ultraviolet light to reduce graphene oxide and reduce the surface resistance to obtain a third circuit board;

[0039] S5: Perform reverse pulse electroplating on the third circuit board. After electroplating, the blind hole filling on the circuit board is completed.

[0040] In one of the embodiments, the blind hole filling method includes the following preparation steps:

[0041] S1: For the drilled circuit board, first use ethylene glycol to treat it at 70°C - 80°C for 5 min - 15 min to remove the smear, and then use permanganate to treat it at 70°C - 80°C for 30 min - 60 min to form a negatively charged manganese dioxide layer on the surface of the blind hole of the circuit board to obtain a pretreated circuit board;

[0042] Among them, ethylene glycol helps to be compatible with the epoxy resin on the circuit board, which is beneficial to removing the epoxy resin and wetting the circuit board, facilitating subsequent processing; the formation of the manganese dioxide layer is beneficial to subsequent electroplating processing for attaching polyaniline; the circuit board is an FR4 glass fiber board, which is a plate-shaped insulating material made by impregnating a glass fiber cloth with epoxy resin as an adhesive and formed by drying and hot pressing. It has high mechanical properties, water absorption, flame retardancy and heat resistance, and its dielectric properties are stable after immersion in water; the concentration of the ethylene glycol is 500 g / L; the concentration of the permanganate is 3 wt%-3.5 wt%. In one embodiment, the permanganate is, but not limited to, one or more of lithium permanganate, sodium permanganate, potassium permanganate, ammonium permanganate, calcium permanganate, barium permanganate, zinc permanganate, magnesium permanganate, mercury permanganate, cadmium permanganate, rubidium permanganate.

[0043] S2: First, form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board using a polyaniline solution, and then perform air drying for 15 min - 30 min to obtain a first circuit board;

[0044] Among them, positively charged polyaniline is easily attached to negatively charged manganese dioxide, improving the adhesion. The formation of the polyaniline layer is beneficial to the subsequent attachment of graphene oxide; the polyaniline solution is prepared by dispersing 0.3 g - 3 g of polyaniline in 100 ml of ethanol.

[0045] S3: First, form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board using a graphene oxide solution, and then dry it in an oven at 60°C for 30 min - 45 min to obtain a second circuit board;

[0046] Among them, negatively charged graphene oxide is easily attached to positively charged polyaniline, improving the adhesion. The formation of the graphene oxide layer helps with subsequent copper electroplating; the graphene oxide solution is prepared by dispersing 0.3 g - 3 g of graphene oxide in 100 ml of water.

[0047] S4: Irradiate the second circuit board under a UVA light source for 3 h - 10 h to reduce graphene oxide, lower the surface resistance, and improve the filling efficiency to obtain a third circuit board;

[0048] Among them, UVA is a part of the wavelength division of ultraviolet rays, with a wavelength of 320 - 420 nm, and it has strong penetrating power.

[0049] S5: Reverse pulse electroplate the third circuit board. After electroplating, the blind vias on the circuit board are filled. Among them, the operating parameters of the reverse pulse electroplating are: the voltage is 2.5V - 7.5V, the time is 2h - 6h, and the electroplating solution contains copper sulfate pentahydrate, sulfuric acid, sodium chloride, sodium polydithiopropane sulfonate, polyethylene glycol, Janus green B, and water.

[0050] The following are specific embodiments of the present invention. The raw materials, equipment, etc. used in the following embodiments can be obtained by purchase except for special limitations.

[0051] Except for special limitations in the following embodiments, the circuit board is an FR4 fiberglass board, the concentration of ethylene glycol is 500g / L, the permanganate is potassium permanganate, and the electroplating solution contains copper sulfate pentahydrate, sulfuric acid, sodium chloride, sodium polydithiopropane sulfonate, polyethylene glycol, Janus green B, and water.

[0052] Example 1

[0053] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0054] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75°C for 15 minutes to remove the glue residue, and then wash the surface with deionized water. Then, use 3.2wt% permanganate to treat it at 80°C for 45 minutes to form a negatively charged manganese dioxide layer on the blind via surface of the circuit board, and wash the surface with deionized water to obtain the pretreated circuit board.

[0055] S2: First, use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air drying for 30 minutes to obtain the first circuit board. Among them, the polyaniline solution is prepared by dispersing 0.5g of polyaniline in 100ml of ethanol.

[0056] S3: First, use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board, and then dry it in an oven at 60°C for 45 minutes to obtain the second circuit board. Among them, the graphene oxide solution is prepared by dispersing 0.5g of graphene oxide in 100ml of water.

[0057] S4: Irradiate the second circuit board under a UVA light source for 3 hours to reduce graphene oxide, lower the surface resistance, and improve the filling efficiency to obtain the third circuit board.

[0058] S5: Reverse pulse electroplate the third circuit board with a voltage of 2.5V and a time of 2h. After electroplating, the blind vias on the circuit board are filled.

[0059] Example 2

[0060] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0061] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the smear, and wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the blind via surface of the circuit board, and wash the surface with deionized water to obtain the pretreated circuit board;

[0062] S2: First use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air-drying treatment for 30 min to obtain the first circuit board; among them, the polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0063] S3: First use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board, and then dry it in an oven at 60 °C for 45 min to obtain the second circuit board; among them, the graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0064] S4: Irradiate the second circuit board under a UVA light source for 3 h to reduce graphene oxide, reduce the surface resistance, and improve the filling efficiency to obtain the third circuit board;

[0065] S5: Perform reverse pulse electroplating on the third circuit board with a voltage of 5.0 V for 2 h. After electroplating, complete the blind via filling on the circuit board.

[0066] Example 3

[0067] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0068] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the smear, and wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the blind via surface of the circuit board, and wash the surface with deionized water to obtain the pretreated circuit board;

[0069] S2: First use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air-drying treatment for 30 min to obtain the first circuit board; among them, the polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0070] S3: First, use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board. Then, dry it in an oven at 60 °C for 45 min to obtain the second circuit board. The graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0071] S4: Irradiate the second circuit board under a UVA light source for 6 h to reduce graphene oxide, lower the surface resistance, and improve the filling efficiency, thereby obtaining the third circuit board.

[0072] S5: Perform reverse pulse electroplating on the third circuit board at a voltage of 2.5 V for 2 h. After electroplating, the blind holes on the circuit board are filled.

[0073] Example 4

[0074] A blind hole filling method using reduced graphene as a seed layer includes the following preparation steps:

[0075] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the smear layer, and then wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the blind hole surface of the circuit board, and then wash the surface with deionized water to obtain the pretreated circuit board.

[0076] S2: First, use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air drying for 30 min to obtain the first circuit board. The polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0077] S3: First, use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board. Then, dry it in an oven at 60 °C for 45 min to obtain the second circuit board. The graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0078] S4: Irradiate the second circuit board under a UVA light source for 6 h to reduce graphene oxide, lower the surface resistance, and improve the filling efficiency, thereby obtaining the third circuit board.

[0079] S5: Perform reverse pulse electroplating on the third circuit board at a voltage of 5.0 V for 2 h. After electroplating, the blind holes on the circuit board are filled.

[0080] Example 5

[0081] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0082] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the glue residue, and wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the blind via surface of the circuit board, and wash the surface with deionized water to obtain a pretreated circuit board;

[0083] S2: First use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air drying for 30 min to obtain the first circuit board; among them, the polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0084] S3: First use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board, and then dry it in an oven at 60 °C for 45 min to obtain the second circuit board; among them, the graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0085] S4: Irradiate the second circuit board under a UVA light source for 6 h to reduce graphene oxide, lower the surface resistance, and improve the filling efficiency to obtain the third circuit board;

[0086] S5: Perform reverse pulse electroplating on the third circuit board with a voltage of 7.5 V for 2 h. After electroplating, complete the blind via filling on the circuit board.

[0087] Example 6

[0088] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0089] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the glue residue, and wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the blind via surface of the circuit board, and wash the surface with deionized water to obtain a pretreated circuit board;

[0090] S2: First use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air drying for 30 min to obtain the first circuit board; among them, the polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0091] S3: First, use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board. Then, dry it in an oven at 60 °C for 45 min to obtain the second circuit board. The graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0092] S4: Irradiate the second circuit board under a UVA light source for 6 h to reduce graphene oxide, lower the surface resistance, and improve the filling efficiency, thereby obtaining the third circuit board.

[0093] S5: Perform reverse pulse electroplating on the third circuit board at a voltage of 7.5 V for 2.5 h. After electroplating, the blind vias on the circuit board are filled.

[0094] Example 7

[0095] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0096] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the smear layer, and then wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the surface of the blind vias of the circuit board, and then wash the surface with deionized water to obtain the pretreated circuit board.

[0097] S2: First, use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air drying for 30 min to obtain the first circuit board. The polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0098] S3: First, use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board. Then, dry it in an oven at 60 °C for 45 min to obtain the second circuit board. The graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0099] S4: Irradiate the second circuit board under a UVA light source for 6 h to reduce graphene oxide, lower the surface resistance, and improve the filling efficiency, thereby obtaining the third circuit board.

[0100] S5: Perform reverse pulse electroplating on the third circuit board at a voltage of 7.5 V for 3 h. After electroplating, the blind vias on the circuit board are filled.

[0101] In the above embodiments, the components of each material are not limited to those described above. Each material can also be composed of other single components or multiple components described in the present invention. The operating parameters are not limited to those described above. Each operating parameter can also be other operating parameters described in the present invention, which will not be elaborated here.

[0102] Comparative Example 1

[0103] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0104] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the smear, and then wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the blind via surface of the circuit board, and wash the surface with deionized water to obtain a pretreated circuit board;

[0105] S2: First, use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air drying for 30 min to obtain a first circuit board; among them, the polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0106] S3: First, use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board, and then dry it in an oven at 60 °C for 45 min to obtain a second circuit board; among them, the graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0107] S4: Irradiate the second circuit board under a UVA light source for 0 h as a control to obtain a third circuit board;

[0108] S5: Perform reverse pulse electroplating on the third circuit board with a voltage of 2.5 V for 2 h. After electroplating, the blind vias on the circuit board are filled.

[0109] Comparative Example 2

[0110] A blind via filling method using reduced graphene as a seed layer includes the following preparation steps:

[0111] S1: For the drilled circuit board, first use ethylene glycol to treat it at 75 °C for 15 min to remove the smear, and then wash the surface with deionized water. Then, use 3.2 wt% permanganate to treat it at 80 °C for 45 min to form a negatively charged manganese dioxide layer on the blind via surface of the circuit board, and wash the surface with deionized water to obtain a pretreated circuit board;

[0112] S2: First, use 100 μL of polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pre-treated circuit board, and then perform air-drying treatment for 30 minutes to obtain the first circuit board. Among them, the polyaniline solution is prepared by dispersing 0.5 g of polyaniline in 100 ml of ethanol.

[0113] S3: First, use 100 μL of graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board, and then dry it in an oven at 60 °C for 45 minutes to obtain the second circuit board. Among them, the graphene oxide solution is prepared by dispersing 0.5 g of graphene oxide in 100 ml of water.

[0114] S4: Irradiate the second circuit board under a UVA light source for 0 h as a control to obtain the third circuit board.

[0115] S5: Perform reverse pulse electroplating on the third circuit board with a voltage of 5.0 V for 2 h. After electroplating, the blind holes on the circuit board are filled.

[0116] Performance Test

[0117] 1. Resistance Test

[0118] The circuit board is made of FR4 fiberglass board, with a micro blind hole of 0.2 ± 0.05 mm in diameter and 0.2 mm in depth at the center of each board. A 2 mm * 11 mm copper wire is connected to the bottom of the hole. The resistance test is carried out with a DC resistance tester ZX5512 type from Changzhou Zhixin Precision Electronics Co., Ltd. Connect the anode to the copper wire at the bottom of the hole and the cathode to the micro blind hole and its surface copper layer. Each sample is tested for resistance three times. The test results are shown below.

[0119] Table 1

[0120] Item Resistance Value 1 / mΩ Resistance Value 2 / mΩ Resistance Value 3 / mΩ Average Resistance / mΩ Comparative Example 1 0.1265 0.1490 0.1143 0.1299 Comparative Example 2 0.1025 0.1050 0.1065 0.1047 Example 1 0.1039 0.0988 0.0978 0.1002 Example 2 0.0996 0.0966 0.0977 0.0980 Example 3 0.0969 0.0996 0.0986 0.0984 Example 4 0.0860 0.0904 0.0860 0.0875

[0121] 2. Cross-Section Analysis

[0122] From the resistance test, the blind hole resistance of the circuit board exposed to ultraviolet light for 6 hours is lower. Therefore, cross-section analysis is carried out on the circuit board exposed to ultraviolet light for 6 hours during electroplating at different voltages. After electroplating each sample, it is sealed with epoxy resin and polished to the cross-section of the blind hole. As Figures 2 to 4 .

[0123] Figure 2 is the cross-section analysis diagram of the blind hole in Example 3;

[0124] Figure 3 is the cross-section analysis diagram of the blind hole in Example 4;

[0125] Figure 4Blind hole cross-section analysis diagram for Example 5.

[0126] As can be seen from the above Figures 2 to 4 it can be known that as the voltage increases, the copper thickness increases. Therefore, using a higher voltage (7.5V) can fill more efficiently. After electroplating each sample, it is sealed with epoxy resin and polished to the cross-section of the blind hole. As Figure 5 and Figure 6 .

[0127] Figure 5 Blind hole cross-section analysis diagram for Example 6;

[0128] Figure 6 Blind hole cross-section analysis diagram for Example 7.

[0129] As can be seen from the above Figure 5 and Figure 6 it can be known that when the electroplating time is increased to 3 hours and the voltage is 7.5V, the blind hole filling rate is relatively high.

[0130] 3. Surface profile analysis

[0131] The surface profile analysis is carried out using an NPFLEX three-dimensional optical profiler. The analysis results are shown below.

[0132] Table 2

[0133] Item Electroplating Voltage / V Electroplating Time / h Root Mean Square Roughness / μm Example 3 2.51 2 2.7125 Example 4 5.0 2 3.889 Example 5 7.5 2 9.7395 Example 6 7.5 2.5 6.2854 Example 7 7.5 3 8.6011

[0134] As can be seen from the above table, when using a higher voltage (7.5V), the surface root mean square roughness is relatively high, with a maximum of 9.7395μm. Since the surface height difference is not significant, it will not affect the subsequent solder performance on the surface.

[0135] The above embodiments are only the preferred embodiments of the present invention and cannot be used to limit the scope of protection of the present invention. Any non-substantive changes and substitutions made by those skilled in the art based on the present invention fall within the scope of protection required by the present invention.

Claims

1. A blind via filling method using reduced graphene as a seed layer, characterized in that, It includes the following preparation steps: S1: Pretreat the drilled circuit board to remove the glue scum and form a manganese dioxide layer on the surface of the blind holes, obtaining the pretreated circuit board; S2: Form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, obtaining the first circuit board; S3: Form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board, obtaining the second circuit board; S4: Irradiate the second circuit board with ultraviolet light to reduce the graphene oxide and lower the surface resistance, obtaining the third circuit board; S5: Perform reverse pulse electroplating on the third circuit board, and after electroplating, the blind holes on the circuit board are filled.

2. The blind hole filling method using reduced graphene as a seed layer according to claim 1, wherein The specific steps of step S1 are as follows: For the drilled circuit board, first use ethylene glycol to treat it at 70°C - 80°C for 5 min - 15 min, and then use permanganate to treat it at 70°C - 80°C for 30 min - 60 min, so as to form a negatively charged manganese dioxide layer on the surface of the blind holes of the circuit board.

3. The blind via filling method using reduced graphene as a seed layer according to claim 2, wherein, The circuit board is an FR4 glass fiber board; the concentration of the ethylene glycol is 500 g / L; the concentration of the permanganate is 3 wt% - 3.5 wt%.

4. The blind via filling method using reduced graphene as a seed layer according to claim 1, characterized in that, The specific steps of step S2 are as follows: First, use a polyaniline solution to form a polyaniline layer on the surface of the manganese dioxide layer of the pretreated circuit board, and then perform air drying, and the air drying time is 15 min - 30 min.

5. The blind via filling method using reduced graphene as a seed layer according to claim 4, wherein, The polyaniline solution is prepared by dispersing 0.3 g - 3 g of polyaniline in 100 ml of ethanol.

6. The blind via filling method using reduced graphene as a seed layer according to claim 1, wherein, The specific steps of step S3 are as follows: First, use a graphene oxide solution to form a graphene oxide layer on the surface of the polyaniline layer of the first circuit board, and then dry it in an oven at 60°C, and the drying time is 30 min - 45 min.

7. The blind via filling method using reduced graphene as a seed layer according to claim 6, characterized in that, The graphene oxide solution is prepared by dispersing 0.3 g - 3 g of graphene oxide in 100 ml of water.

8. The blind hole filling method using reduced graphene as a seed layer according to claim 1, wherein The irradiation time in step S4 is 3 h - 10 h, and the ultraviolet light uses a UVA light source.

9. The blind via filling method using reduced graphene as a seed layer according to claim 1, wherein, The operating parameters of the reverse pulse electroplating in step S5 are: the voltage is 2.5 V - 7.5 V, the time is 2 h - 6 h, and the electroplating solution contains copper sulfate pentahydrate, sulfuric acid, sodium chloride, sodium polydithiopropanesulfonate, polyethylene glycol, Janus green B and water.

10. The blind via filling method using reduced graphene as a seed layer according to claim 1, wherein, The specifications of the blind holes are a diameter of 0.2 ± 0.05 mm and a depth of 0.2 ± 0.05 mm.

Citation Information

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