Display device and method of manufacturing a display device

Abstract

A display device and a method of manufacturing a display device, wherein the display device includes a first substrate, a second substrate facing the first substrate, a through-hole passing through the first substrate and the second substrate, and a hole fusion pattern joining the first substrate and the second substrate to each other around the through-hole.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0077796, filed on June 25, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Aspects of exemplary embodiments of the present disclosure relate to display devices and methods of manufacturing the same. Background Technology

[0004] Electronic devices used to provide images to users (e.g., smartphones, tablet PCs, digital cameras, laptops, navigation devices, and smart TVs) include display devices for displaying images.

[0005] A display device includes a display panel and various components for driving the display panel. Recently, various components for realizing functions other than screen display can be installed in a display device. For example, as an example of such components, a smartphone can be equipped with one or more optical elements, such as a camera and / or an infrared sensor.

[0006] Display devices may include optical apertures to allow optical elements to receive light. In this case, some components of the display device may be physically perforated to increase the transmittance of the optical aperture.

[0007] The information disclosed above in the background section is intended to enhance the understanding of the technical background of this disclosure, and therefore may contain information that does not constitute prior art. Summary of the Invention

[0008] One or more exemplary embodiments of this disclosure relate to a display device and a method of manufacturing the display device, wherein the non-display area around (e.g., near or adjacent to) the optical aperture is reduced.

[0009] However, the aspects and features of this disclosure are not limited thereto, and the above and other aspects and features of this disclosure will become more apparent to those skilled in the art from the following detailed description of this disclosure.

[0010] According to one or more example embodiments of the present disclosure, a display device includes: a first substrate; a second substrate facing the first substrate; a through-hole passing through the first substrate and the second substrate; and a hole fusion pattern configured to join the first substrate and the second substrate to each other around the through-hole.

[0011] In an example embodiment, each of the first substrate and the second substrate may include glass, and the hole fusion pattern may be formed by fusing the first substrate and the second substrate together.

[0012] In an example embodiment, the display device may further include an edge blending pattern configured to join the first substrate and the second substrate to each other at the edge of the first substrate or the second substrate.

[0013] In an example embodiment, in a planar view, the width of the edge fusion pattern may be greater than the width of the hole fusion pattern.

[0014] In an example embodiment, the width of the hole fusion pattern can be in the range of 1 / 2 to 1 / 5 of the width of the edge fusion pattern.

[0015] In an example embodiment, the display device may further include a display area for displaying a screen and a non-display area surrounding the display area. The through-hole and the hole fusion pattern may be located in the display area, and the edge fusion pattern may be located in the non-display area.

[0016] In an example embodiment, the display device may further include a sub-hole fusion pattern configured to join the first substrate and the second substrate to each other at the display area, and the sub-hole fusion pattern may surround at least one of the through-hole and the hole fusion pattern.

[0017] In an example embodiment, the hole fusion pattern may be located between the first substrate and the second substrate.

[0018] In an example embodiment, the display device may further include an active element layer located between the first substrate and the second substrate, and the active element layer may not overlap with the via.

[0019] In an example embodiment, the aperture fusion pattern may include a central portion and a peripheral portion surrounding the central portion, the central portion including a plasma structure.

[0020] In an example embodiment, the ratio of the thickness of the hole fusion pattern in the thickness direction to the width of the hole fusion pattern in a first direction perpendicular to the thickness direction can be greater than 1.9:1.

[0021] In an example embodiment, the width of the hole fusion pattern in the first direction may be less than or equal to 100 micrometers (μm).

[0022] In an example embodiment, the hole fusion pattern may further include a long axis and a short axis intersecting the long axis, and the width of one side of the long axis in the direction of the short axis may be different from the width of the other side of the long axis in the direction of the short axis.

[0023] In an example embodiment, the other side of the long shaft may be closer to the through hole than the other side of the long shaft, and the width of the other side of the long shaft may be greater than the width of the other side of the long shaft.

[0024] In an example embodiment, the vias and the fused via patterns may be spaced apart from each other, and the first substrate and the second substrate may be spaced apart from each other in the thickness direction in the areas where the vias and the fused via patterns are spaced apart from each other.

[0025] According to one or more example embodiments of the present disclosure, a method of manufacturing a display device includes: placing a second substrate on a first substrate on which an active element layer is disposed; forming a dummy fusion pattern and a via fusion pattern for joining the first substrate and the second substrate to each other by irradiating at least one of the first substrate and the second substrate with a femtosecond laser beam, the dummy fusion pattern being disposed on a first closed curve and the via fusion pattern being disposed on a second closed curve, the second closed curve being spaced apart from and outside the first closed curve; and forming a through hole in the thickness direction through the first substrate and the second substrate by cutting between the dummy fusion pattern and the via fusion pattern.

[0026] In an example embodiment, the hole fusion pattern can be formed continuously without being interrupted, and the dummy fusion pattern can be formed into multiple parts by being at least partially broken.

[0027] In an example embodiment, forming the dummy fusion pattern and the aperture fusion pattern may include: forming a sub-aperture fusion pattern on a third closed curve, the third closed curve being spaced apart from the second closed curve and located outside the second closed curve.

[0028] In an example embodiment, forming the via may include: irradiating at least one of the first substrate and the second substrate with a cutting laser beam, wherein the wavelength of the cutting laser beam may be greater than the wavelength of the femtosecond laser beam.

[0029] In an example embodiment, each of the first substrate and the second substrate may include glass, and the dummy fusion pattern and the hole fusion pattern may be formed by fusing the first substrate and the second substrate together.

[0030] According to one or more exemplary embodiments of the present disclosure, a display device and a method of manufacturing the display device may be provided, wherein the non-display area around (e.g., near or adjacent to) an optical aperture may be reduced or minimized.

[0031] The aspects and features of this disclosure are not limited to those described above, and various other aspects and features may be included in this specification. Attached Figure Description

[0032] The above and other aspects and features of this disclosure will become more apparent to those skilled in the art from the following detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0033] Figure 1 This is a plan view of the display device according to an embodiment;

[0034] Figure 2 It is along Figure 1 A cross-sectional view taken from line II-II';

[0035] Figure 3 It is a layout diagram showing the planar arrangement relationship between components around multiple hole areas;

[0036] Figure 4 This is a cross-sectional view of the portion surrounding the hole area of ​​the display device according to an embodiment;

[0037] Figure 5 This is a plan view of the display panel of the display device according to an embodiment;

[0038] Figure 6 It is along Figure 5 A cross-sectional view taken from lines A-A' and B-B';

[0039] Figure 7 This is a circuit diagram of the pixels of a display device according to an embodiment;

[0040] Figure 8 yes Figure 6 A magnified view of region C;

[0041] Figure 9 and Figure 10 This is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment;

[0042] Figure 11 This is a plan view illustrating the portion surrounding the hole area in a method of manufacturing a display device according to an embodiment;

[0043] Figure 12 This is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment;

[0044] Figure 13 This is a plan view illustrating the portion surrounding the hole area in a method of manufacturing a display device according to an embodiment;

[0045] Figure 14 This is a cross-sectional view of a display device according to another embodiment;

[0046] Figure 15 This is an enlarged plan view of the portion surrounding the hole area of ​​a display device according to another embodiment;

[0047] Figure 16 It is along Figure 15 A cross-sectional view taken from line XVI-XVI';

[0048] Figure 17 This is a cross-sectional view illustrating a method of manufacturing a display device according to another embodiment;

[0049] Figure 18 This is an enlarged plan view of the area surrounding the hole.

[0050] Figure 19 This is a cross-sectional view illustrating a method of manufacturing a display device according to another embodiment; and

[0051] Figure 20 This is a plan view illustrating a method of manufacturing a display device according to another embodiment. Detailed Implementation

[0052] In the following description, exemplary embodiments will be illustrated in more detail with reference to the accompanying drawings, wherein the same reference numerals refer to the same elements throughout. However, this disclosure may be implemented in a variety of different forms and should not be construed as being limited to the embodiments shown herein. Rather, these embodiments are provided as examples so that this disclosure will be thorough and complete, and will fully convey to those skilled in the art the aspects and features of this disclosure. Therefore, processes, elements, and techniques that are unnecessary for those skilled in the art to fully understand the aspects and features of this disclosure may not be described. Unless otherwise stated, the same reference numerals refer to the same elements throughout the drawings and written description, and therefore their description may not be repeated.

[0053] In the accompanying drawings, for clarity, the relative dimensions of elements, layers, and areas may be enlarged and / or simplified. For ease of illustration, spatial relative terms such as “below,” “under,” “below,” “below,” “above,” and “above” are used herein to describe the relationship of one element or feature as shown in the figures to other elements(s)(s). It will be understood that, in addition to the orientations depicted in the drawings, spatial relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the drawings is flipped, an element described as “below,” “below,” or “below” other elements or features would then be positioned “above” other elements or features. Thus, the example terms “below” and “below” can cover both orientations of “above” and “below.” The device may be otherwise positioned (rotated 90 degrees or in other orientations), and the spatial relative terms used herein should be interpreted accordingly.

[0054] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe different elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, area, layer, or part from another element, component, area, layer, or part. Therefore, without departing from the spirit and scope of this disclosure, the first element, component, area, layer, or part described below may be named a second element, component, area, layer, or part. The description of an element such as a “first” element may not require or imply the existence of a second element or other elements. The terms “first” and “second,” etc., may also be used herein to distinguish elements of different categories or groups. For example, the terms “first” and “second,” etc., may respectively mean “first category (or first group)”, “second category (or second group)”, etc.

[0055] It will be understood that when an element or layer is referred to as being "on," "connected to," or "bonded to" another element or layer, the element or layer may be directly on, directly connected to, or directly bonded to the other element or layer, or one or more intermediate elements or layers may exist. Furthermore, it will be understood that when an element or layer is referred to as being "between" two elements or layers, the element or layer may be the only element or layer between the two elements or layers, or one or more intermediate elements or layers may exist.

[0056] The terminology used herein is for the purpose of describing particular embodiments and is not intended to limit this disclosure. As used herein, the singular forms “a” and “an” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprises / comprising,” “includes / including,” and “has / have / having” are used in this specification, they indicate the presence of the listed features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of…” when following a list of elements (elements / features) modify the entire list of elements and not individual elements (elements / features) within that list.

[0057] As used herein, the terms “substantially,” “approximately,” and similar terms are used as terms of approximation rather than terms of degree, and are intended to account for inherent biases in measured or calculated values ​​that will be recognized by one of ordinary skill in the art. Furthermore, the use of “may” when describing embodiments of this disclosure means “one or more embodiments of this disclosure.” As used herein, the terms “use / using / used” may be considered synonymous with the terms “utilize / utilizing / utilized,” respectively. Additionally, the term “exemplary” is intended to mean an example or illustration.

[0058] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that, unless expressly defined herein, terms (such as those defined in a commonly used dictionary) shall be interpreted as having the same meaning as they have in the context of the relevant field and / or in this specification, and shall not be interpreted in an ideal or overly formal sense.

[0059] Figure 1 This is a plan view of a display device according to an embodiment. Figure 2 It is along Figure 1 A cross-sectional view taken from line II-II'. For example, Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment.

[0060] As used herein, the first direction DR1 and the second direction DR2 represent different directions that intersect each other, for example, directions that intersect each other at right angles in a plan view. The third direction DR3 indicates the direction that intersects with the plane containing the first direction DR1 and the second direction DR2, and for example, it can indicate the direction that intersects both the first direction DR1 and the second direction DR2 perpendicularly. As shown, for example, the first direction DR1 can indicate the vertical direction of the display device 1, the second direction DR2 can indicate the horizontal direction of the display device 1, and the third direction DR3 can indicate the thickness direction of the display device 1.

[0061] As used herein, one side of the first direction DR1 refers to the upward direction in the plan view, and the other side of the first direction DR1 refers to the downward direction in the plan view. One side of the second direction DR2 refers to the rightward direction in the plan view, and the other side of the second direction DR2 refers to the leftward direction in the plan view. One side of the third direction DR3 refers to the upward direction in the cross-sectional view, and the other side of the third direction DR3 refers to the downward direction in the cross-sectional view. Furthermore, unless otherwise indicated, relative to the third direction DR3, the terms "above," "top surface," and "upper side" as used herein refer to one side of the display surface of the display panel 10, and the terms "below," "bottom surface," and "lower side" as used herein refer to the side opposite to the display surface of the display panel 10. However, it should be understood that the directions described in this disclosure refer to relative directions, and therefore, this disclosure is not limited to the described directions.

[0062] Reference Figure 1 and Figure 2 The display device 1 displays moving images and / or still images. The main screen display orientation may correspond to one side of the third-party DR3 (e.g., a top-emitting display device), but this disclosure is not limited thereto.

[0063] Display device 1 can refer to any suitable electronic device used to provide a display screen. Examples of display device 1 can include televisions, laptops, monitors, billboards, and Internet of Things (IoT) devices that provide a display screen, as well as various suitable portable electronic devices, such as mobile phones, smartphones, tablet computers (PCs), electronic watches, smartwatches, watch phones, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, game consoles, and digital cameras.

[0064] Display device 1 includes an active area AAR and an active area NAR. In display device 1, the area of ​​the screen that is displayed is defined as the display area, and the area of ​​the screen that is not displayed is defined as the non-display area. Therefore, the display area can be included in the active area AAR (e.g., in or on the active area AAR), and the non-display area can be included in the non-active area NAR (e.g., in or on the non-active area NAR). When display device 1 has a touch function, the touch area, which is the area for sensing touch input, can also be included in the active area AAR (e.g., in or on the active area AAR). The display area and the touch area can overlap each other. The active area AAR can be the area of ​​the display screen that detects touch input.

[0065] An active region AAR may include multiple pixels PX. The multiple pixels PX may be arranged in a matrix. Each pixel PX may have a rectangular or square shape in a planar view (e.g., when viewed from above), but this disclosure is not limited thereto.

[0066] The non-active area NAR is set to surround (e.g., near or adjacent to) the active area AAR. For example, the non-active area NAR may at least partially surround the active area AAR (e.g., around the perimeter of the active area AAR). The non-active area NAR may be a border area. The non-active area NAR may be associated with window components, which will be described in more detail later (e.g., see [link to window component description]). Figure 2 The printed layer of 20 in (e.g., see 20) Figure 2 22) overlaps.

[0067] Non-active region (NAR) can be around all edges of active region (AAR) (e.g., ... Figure 1 (e.g., around the periphery of all edges of the active region AAR). However, this disclosure is not limited thereto. For example, the non-active region NAR may not be set to be close to (e.g., adjacent to) at least one of the four edges of the active region AAR.

[0068] Signal lines and / or driving circuitry can be provided at the non-active area NAR (e.g., within or on the non-active area NAR) for applying signals to the active area AAR (e.g., to the display area and / or to the touch area). In an embodiment, a driver chip IC can be disposed at the non-active area NAR (e.g., within or on the non-active area NAR). The driver chip IC may include an integrated circuit for driving the display panel 10. The integrated circuit may include an integrated circuit for the display and / or an integrated circuit for the touch component (TSP). The driver chip IC may be directly mounted on an area of ​​the first substrate 100 that protrudes relative to the second substrate 190.

[0069] In the active area AAR, the display device 1 may also include an HLE having at least one hole (see Figure 3 The pore region HLA. The pore region HLA will be described in more detail later.

[0070] Figure 2 It is along Figure 1 The cross-sectional view taken from line II-II'. Refer to the following text. Figure 1 and Figure 2 Describe the cross-sectional structure of display device 1.

[0071] The display device 1 includes a display panel 10 providing a display screen, a touch component TSP, a polarizing component POL, a window component 20, and a cover panel CPL. The cover panel CPL may be disposed below the display panel 10.

[0072] Display panel 10 can provide a display screen. In other words, display panel 10 can provide video and / or images. Examples of display panel 10 may include organic light-emitting display panels, micro LED display panels, nano LED display panels, quantum dot light-emitting display panels, liquid crystal display panels, plasma display panels, field emission display panels, electrophoretic display panels, and electrowetting display panels, etc. In the following description, for convenience, examples of using organic light-emitting display panels as display panel 10 will be described in more detail; however, this disclosure is not limited thereto, and other suitable display panels may be used as display panel 10. Display panel 10 will be described in more detail below.

[0073] A touch component TSP can be disposed on the display panel 10. The touch component TSP can sense touch input. The touch component TSP can be disposed on the top surface (e.g., a surface) of the second substrate 190. The touch component TSP can be provided integrally with the display panel 10 in the form of a touch layer as shown in the embodiments below. However, this disclosure is not limited thereto, and the touch component TSP can be disposed on the display panel 10 in the form of a touch panel or a touch film. The touch component TSP can include a plurality of touch electrodes. However, this disclosure is not limited thereto, and in other embodiments, the touch component TSP may be omitted.

[0074] The polarizing element POL can polarize light passing through it. The polarizing element POL can be used to reduce the reflection of external light. The polarizing element POL can be attached to the touch element TSP through a polarizing bonding layer (not shown). When the touch element TSP is omitted, the polarizing element POL can be attached to the second substrate 190.

[0075] A window member 20 is disposed on a polarizing member POL. The window member 20 is used to cover and protect the display panel 10. The window member 20 may include a window substrate 21 and a printed layer 22 disposed on the window substrate 21. The window member 20 can be attached to a surface of the display panel 10 via a transparent bonding layer OCR including an optically transparent adhesive (OCA) and / or an optically transparent resin (OCR). When the display device 1 includes a polarizing member POL, the window member 20 may be attached to the top surface (e.g., a surface) of the polarizing member POL.

[0076] The window substrate 21 can be made of a transparent material. The window substrate 21 can be made of, for example, glass or plastic.

[0077] The planar shape of the window substrate 21 corresponds to the shape of the display device 1 to which it is applied. For example, when the display device 1 has a rectangular or substantially rectangular shape in a planar view, the window substrate 21 may also have a rectangular or substantially rectangular shape in a planar view. As another example, when the display device 1 has a circular shape in a planar view, the window substrate 21 may also have a circular shape in a planar view.

[0078] The printed layer 22 can be disposed on the window substrate 21. The printed layer 22 can be disposed on one surface and / or another surface of the window substrate 21. The printed layer 22 can be disposed on the edge portion of the window substrate 21, and can be disposed on the non-active area (NAR). In addition, the printed layer 22 can also be disposed within the aperture area (HLA). The printed layer 22 can be a light-blocking layer or a decorative layer used to provide aesthetics.

[0079] The hole area HLA of the display device 1 will be described in more detail below.

[0080] Figure 3 It is a layout diagram showing the planar arrangement relationship between components around multiple hole areas. Figure 4 This is a cross-sectional view of the portion surrounding the hole area of ​​the display device according to an embodiment.

[0081] Reference Figures 1 to 4 The hole region HLA can be offset towards one side of the first direction DR1 of the display device 1. The hole region HLA itself can be a non-active area NAR that does not perform display and / or touch (e.g., it can be included as part of a non-active area NAR). The hole region HLA can be located within an active area AAR. In other words, the hole region HLA can be as follows: Figure 1The active region AAR shown is surrounded (e.g., around the periphery of the active region AAR). In another example, the aperture region HLA may be configured to be surrounded by the non-active region NAR (e.g., around the periphery of the active region AAR), or it may be configured to be close to (e.g., adjacent to) the boundary between the active region AAR and the non-active region NAR, or at the boundary between the active region AAR and the non-active region NAR (e.g., in the boundary or on the boundary), such that a portion of the aperture region HLA is surrounded by the active region AAR (e.g., around the periphery of the active region AAR), and another portion of the aperture region HLA is surrounded by the non-active region NAR (e.g., around the periphery of the non-active region NAR).

[0082] The aperture region HLA can have a suitable shape in a planar view, such as a circle, ellipse, dumbbell shape, and / or a rectangle with a convex short side. However, this disclosure is not limited to this, and the planar shape of the aperture region HLA can be modified in various ways, such as a rectangle, square, and / or other polygons.

[0083] The aperture region HLA may include at least one aperture HLE. The shape of the aperture HLE in the planar view may correspond to the shape of the aperture region HLA in the planar view. However, this disclosure is not limited thereto, and the aperture HLE may have any suitable shape in the planar view, such as, for example, a circle or an ellipse.

[0084] The aperture HLE can include a physical through-hole HLE_TH. The through-hole HLE_TH may be circular in a plan view, but this disclosure is not limited thereto. The through-hole HLE_TH may include a first through-hole HLE_TH1 physically passing through the display panel 10, a second through-hole HLE_TH2 physically passing through the touch member TSP, a third through-hole HLE_TH3 physically passing through the polarizing member POL, and a fourth through-hole HLE_TH4 physically passing through the transparent bonding layer OCR. By removing a portion of the aforementioned components from the through-hole HLE_TH (e.g., by removing a portion of the display panel 10, the touch member TSP, the polarizing member POL, and the transparent bonding layer OCR), the light transmittance in the corresponding area can be improved.

[0085] The first through-hole HLE_TH1, the second through-hole HLE_TH2, the third through-hole HLE_TH3, and the fourth through-hole HLE_TH4 can overlap each other in at least a portion of the region (e.g., in at least a portion of the region or on at least a portion of the region). Therefore, the optical path traversed by external light entering the optical element OPS can be ensured.

[0086] In addition to the through-hole HLE_TH, the hole HLE may also include an optical hole HLE_OP serving as an optical light-transmitting window. The optical hole HLE_OP may be disposed within the hole region HLA. The optical hole HLE_OP may overlap with the through-hole HLE_TH and may be defined by the pattern of the printed layer 22 of the window member 20. The printed layer 22 may be partially disposed within the hole region HLA to prevent or substantially prevent light from the pixel PX from being emitted through the through-hole HLE_TH (e.g., to prevent or substantially prevent light leakage). The printed layer 22 may be configured to extend to the outer periphery of the hole region HLA, but this disclosure is not limited thereto.

[0087] A printed layer 22 is disposed around the via HLE_TH (e.g., surrounding the periphery of the via HLE_TH) and exposes at least a portion of the via HLE_TH. The area of ​​the via HLE_TH exposed by the printed layer 22 may correspond to (e.g., may be or may define) an optical aperture HLE_OP through which light passes. In one embodiment, the printed layer 22 located at the aperture region HLA (e.g., in or on the aperture region HLA) may partially overlap with the via HLE_TH. In other words, the inner surface of the printed layer 22 may protrude further inward from the inner wall of the via HLE_TH. The inner surface of the printed layer 22 may be aligned with the inner wall of the via HLE_TH having a minimum radius, or may be configured to be closer to its interior (e.g., may be configured to protrude further inward than the inner wall defining the minimum radius of the via HLE_TH). Therefore, the inner walls of the first through-hole HLE_TH1, the second through-hole HLE_TH2, the third through-hole HLE_TH3, and the fourth through-hole HLE_TH4 under the printed layer 22 can be covered by the printed layer 22, and thus will not be visually identifiable from the outside.

[0088] The display device 1 may further include an optical element OPS, which includes a light-receiving portion. Examples of an optical element OPS including a light-receiving portion may include a camera, a lens (e.g., a condenser lens or an optical path guide lens), and an optical sensor, such as an infrared sensor, an iris recognition sensor, and / or an illuminance sensor. The optical element OPS may be configured to overlap with the aperture region HLA on another surface side of the display panel 10. At least a portion of the light-receiving portion of the optical element OPS may be disposed in the optical aperture HLE_OP. Light from outside the display device 1 can pass through the window substrate 21 surrounded by the printed layer 22 and can enter the light-receiving portion. As described above, when the window substrate 21 exhibits high transmittance, external light can reach the light-receiving portion of the optical element OPS through the optical path without significant loss.

[0089] The display device 1 may further include a cover panel CPL. The cover panel CPL may be disposed on another surface of the first substrate 100. The cover panel CPL may include a heat dissipation layer and / or a buffer layer, etc. The cover panel CPL may at least not be disposed in the area overlapping with at least one of the optical aperture HLE_OP and the through aperture HLE_TH.

[0090] The display panel 10 of the display device 1 will be described in more detail below.

[0091] Figure 5 This is a plan view of the display panel of the display device according to an embodiment. Figure 6 It is along Figure 5 The cross-sectional view taken from lines A-A' and B-B'.

[0092] Reference Figure 5 and Figure 6 The display panel 10 may include a first substrate 100, a second substrate 190, an active element layer (ATL), a substrate encapsulation area (SA), and a hole encapsulation area (HA).

[0093] The first substrate 100 may support an active device layer (ATL) disposed thereon. The first substrate 100 may generally be transparent and may have high light transmittance. The first substrate 100 may include inorganic materials such as glass and / or quartz, but this disclosure is not limited thereto. Inorganic materials may include, for example, silicon oxide (SiO2), but this disclosure is not limited thereto. However, in cases where not limited thereto, the first substrate 100 may be a transparent plate or a transparent film.

[0094] The second substrate 190 may be positioned facing the first substrate 100 and spaced apart from it. The second substrate 190 may protect the active element layer (ATL) from external moisture and / or air. The second substrate 190 may generally be transparent and may have high light transmittance. The second substrate 190 may include inorganic materials such as glass and / or quartz, but this disclosure is not limited thereto. Inorganic materials may include, for example, silicon oxide (SiO2), but this disclosure is not limited thereto. However, in cases where not limited thereto, the second substrate 190 may be a transparent plate or a transparent film.

[0095] An active element layer (ATL) may be disposed between the first substrate 100 and the second substrate 190. The ATL may be disposed on the top surface (e.g., a surface) of the first substrate 100. The ATL may cover most of the first substrate 100, except for a portion of the first substrate 100. In other words, the ATL may not overlap with the first via HLE_TH1 in the thickness direction (e.g., the third direction DR3), and may not be disposed in the area where the first via HLE_TH1 is formed (e.g., not in or on the area where the first via HLE_TH1 is formed). Furthermore, the ATL may not be disposed in at least a portion of the non-active region NAR (e.g., not in or on the non-active region NAR). The ATL may include a light-emitting element and a thin-film transistor for driving the light-emitting element. The active component layer (ATL) may be spaced apart from the second substrate 190 disposed above the active component layer (ATL), but this disclosure is not limited thereto. The active component layer (ATL) will be described in more detail below.

[0096] The first substrate 100 and the second substrate 190 of the display panel 10 may have regions in which there is no physical interface between the first substrate 100 and the second substrate 190. As used herein, the expression "there is no or substantially no physical boundary between the two components" means that there is no physical interface that can physically separate the two components.

[0097] The display device 1 may further include an edge fusion pattern FSP1 and a hole fusion pattern FSP2, wherein there is no or substantially no physical boundary between the first substrate 100 and the second substrate 190 of the display panel 10. The edge fusion pattern FSP1 and the hole fusion pattern FSP2 can be formed by fusing the first substrate 100 and the second substrate 190 together. The first substrate 100 and the second substrate 190 can be bonded together by the edge fusion pattern FSP1 and the hole fusion pattern FSP2. The edge fusion pattern FSP1 may be disposed at a substrate encapsulation region SA (e.g., in or on the substrate encapsulation region SA), and the hole fusion pattern FSP2 may be disposed at a hole encapsulation region HA (e.g., in or on the hole encapsulation region HA). In other words, the first substrate 100 and the second substrate 190 may be fused together and bonded together at the substrate encapsulation region SA (e.g., in or on the substrate encapsulation region SA) and at the hole encapsulation region HA (e.g., in or on the hole encapsulation region HA).

[0098] Edge fusion pattern FSP1 and via fusion pattern FSP2 can be formed across the first substrate 100 and the second substrate 190. As used herein, the term "formed across components or set across components" means that components are connected by the space provided by the components. In other words, edge fusion pattern FSP1 and via fusion pattern FSP2 can be integrally formed from the first substrate 100 to the second substrate 190 without being separated.

[0099] Edge blending pattern FSP1 and via blending pattern FSP2 can be spaced apart from the active component layer ATL by a suitable distance (e.g., a predetermined distance) without overlapping with the active component layer ATL. The distance between edge blending pattern FSP1 and the active component layer ATL can be greater than the distance between via blending pattern FSP2 and the active component layer ATL. However, this disclosure is not limited thereto.

[0100] The edge blending pattern FSP1 can be spaced apart from the outer wall (e.g., outer edge surface) of the display panel 10 by a suitable distance (e.g., a predetermined distance). Between the spaced-apart edge blending pattern FSP1 and the outer wall of the display panel 10, the first substrate 100 and the second substrate 190 can be spaced apart from each other by a suitable distance (e.g., a predetermined distance) in the thickness direction (e.g., third direction DR3). Therefore, in a cross-sectional view, the edge of the display panel 10 can have a curved shape, wherein the outer surface of the first substrate 100, the outer surface of the second substrate 190, and the outer side of the edge blending pattern FSP1 are connected to each other.

[0101] The hole fusion pattern FSP2 can be spaced apart from the inner wall of the first through-hole HLE_TH1 by a suitable distance (e.g., a predetermined distance). Between the spaced-apart hole fusion pattern FSP2 and the inner wall of the first through-hole HLE_TH1, the first substrate 100 and the second substrate 190 can be spaced apart from each other by a suitable distance (e.g., a predetermined distance) in the thickness direction (e.g., the third direction DR3). Therefore, in a cross-sectional view, the inner wall of the first through-hole HLE_TH1 can have a curved shape, wherein the inner surface of the first substrate 100, the inner surface of the second substrate 190, and the inner side of the hole fusion pattern FSP2 can be connected to each other.

[0102] Each of the edge blending pattern FSP1 and the hole blending pattern FSP2 may include a central portion PLS and a peripheral portion HAZ.

[0103] The central portion PLS may include a plasma structure. The central portion PLS may be formed in a shape with major and minor axes intersecting each other. The plasma structure may have various suitable dimensions. However, this disclosure is not limited thereto, and the plasma structure may not exist, or even if it does exist, it may not be visually identifiable.

[0104] The peripheral HAZ may coincide with or substantially coincide with the area where heat diffusion occurs due to the thermal energy generated by laser irradiation, as will be described in more detail below. The peripheral HAZ may be a region formed by partially melting each of the first substrate 100 and the second substrate 190 via heat and then solidifying the molten portion. The dimensions of the edge fusion pattern FSP1 and the via fusion pattern FSP2 may be the same as or substantially the same as the dimensions of their peripheral HAZs. In other words, the dimensions of the edge fusion pattern FSP1 may be the same as or substantially the same as the dimensions of the peripheral HAZ of the edge fusion pattern FSP1, and the dimensions of the via fusion pattern FSP2 may be the same as or substantially the same as the dimensions of the peripheral HAZ of the via fusion pattern FSP2.

[0105] The central portion PLS and the peripheral portion HAZ can melt at different temperatures and then solidify. Therefore, the central portion PLS and the peripheral portion HAZ can have different refractive indices. Thus, in a planar view, the central portion PLS and the peripheral portion HAZ can be visually distinguished. In other words, due to the difference in processing temperature, the central portion PLS and the peripheral portion HAZ can have different optical properties, thereby allowing them to be visually distinguished. Therefore, the first substrate 100, the second substrate 190, the central portion PLS, and the peripheral portion HAZ can be visually distinguished from each other. The peripheral portion HAZ can be formed around the central portion PLS (e.g., around the periphery of the central portion PLS), but this disclosure is not limited thereto.

[0106] The width WH of the aperture fusion pattern FSP2 can be smaller than the width WS of the edge fusion pattern FSP1. For example, the width WH of the aperture fusion pattern FSP2 can be greater than or equal to 1 / 5 of the width WS of the edge fusion pattern FSP1 and less than or equal to 1 / 2 of the width WS of the edge fusion pattern FSP1, but this disclosure is not limited thereto. In a non-limiting example, the width WH of the aperture fusion pattern FSP2 can be 100 μm or less, or 150 μm or less. Because the width WH of the aperture fusion pattern FSP2 is smaller than the width WS of the edge fusion pattern FSP1, the non-active area NAR (e.g., the aperture region HLA) around the via HLE_TH (e.g., adjacent to the via HLE_TH) can be further reduced, which can provide the user with a more immersive display screen.

[0107] The width WS of the edge blending pattern FSP1 represents the width of the edge blending pattern FSP1 in the planar view in the direction of travel (e.g., the extension direction) and in the direction perpendicular to the thickness direction (e.g., the third direction DR3). In other words, the width WS of the edge blending pattern FSP1 at the portion extending in the first direction DR1 in the planar view represents the width in the second direction DR2, and the width WS of the edge blending pattern FSP1 at the portion extending in the second direction DR2 in the planar view represents the width in the first direction DR1. Figure 6 In the example, the width WS of the edge blending pattern FSP1 is shown in the second direction DR2.

[0108] The width WH of the hole fusion pattern FSP2 represents the width of the hole fusion pattern FSP2 in the traveling direction (e.g., the extension direction) and the width in the direction perpendicular to the thickness direction (e.g., the third third direction DR3) in the planar view. In other words, the width WH of the hole fusion pattern FSP2 arranged in a circular shape in the planar view represents the shortest distance between the inner and outer sides of the hole fusion pattern FSP2 relative to the direction perpendicular to the thickness direction (e.g., the third third direction DR3). The inner side of the hole fusion pattern FSP2 can represent the side of the first through hole HLE_TH1, and the outer side of the hole fusion pattern FSP2 can represent the opposite side of the first through hole HLE_TH1. For example, in Figure 6 The width WH of the hole fusion pattern FSP2 is shown on the second direction DR2, but this disclosure is not limited thereto.

[0109] The aspect ratio of the hole fusion pattern FSP2 can be higher than that of the edge fusion pattern FSP1. For example, the aspect ratio of the hole fusion pattern FSP2 can be 1.5 times or more, or 3 times or more, higher than that of the edge fusion pattern FSP1, but this disclosure is not limited thereto. The aspect ratio of the edge fusion pattern FSP1 represents the ratio of the thickness THS to the width WS of the edge fusion pattern FSP1, and the aspect ratio of the hole fusion pattern FSP2 represents the ratio of the thickness THH to the width WH of the hole fusion pattern FSP2. The aspect ratio of the hole fusion pattern FSP2 can, for example, be higher than 1.56:1, higher than 1.9:1, or higher than 2.5:1, but this disclosure is not limited thereto. In other words, the thickness THH of the hole fusion pattern FSP2 can be 1.56 times or more, 1.9 times or more, or 2.5 times or more, larger than the width WH of the hole fusion pattern FSP2, but this disclosure is not limited thereto. Due to the high aspect ratio of the via fusion pattern FSP2, the via fusion pattern FSP2 can have a thickness THH suitable for fusing the first substrate 100 and the second substrate 190 together, and the width WH of the via fusion pattern FSP2 can be reduced.

[0110] At the substrate encapsulation region SA and the hole encapsulation region HA (e.g., in or on the substrate encapsulation region SA and the hole encapsulation region HA), the first substrate 100 and the second substrate 190 can be encapsulated by the edge fusion pattern FSP1 and the hole fusion pattern FSP2, respectively.

[0111] More specifically, the substrate packaging region SA can be located at the non-active region NAR (e.g., in or on the non-active region NAR) and can be positioned along the edge of the display panel 10. In a plan view, the substrate packaging region SA can be positioned in a closed shape. Although in Figure 5 The diagram shows a substrate packaging region SA having a frame shape including a hollow portion, but this disclosure is not limited thereto.

[0112] An edge-blending pattern FSP1 can be disposed in the substrate encapsulation region SA. In the substrate encapsulation region SA, the first substrate 100 and the second substrate 190 can be bonded to each other via the edge-blending pattern FSP1. The shape of the edge-blending pattern FSP1 in a plan view can correspond to the shape of the substrate encapsulation region SA in a plan view, but this disclosure is not limited thereto. In other words, the edge-blending pattern FSP1 can be disposed along the edge of the display panel 10. Therefore, it is possible to prevent or substantially prevent external air and / or moisture from penetrating from the outside of the display panel 10 through the side surfaces of the display panel 10 into the internal area. In other words, the edge-blending pattern FSP1 can encapsulate the display panel 10 from all four side surfaces of the display panel 10.

[0113] The via encapsulation region HA can be located at the via region HLA (e.g., in or on the via region HLA) and can be positioned along the edge of the first via HLE_TH1. The via encapsulation region HA can be positioned in a closed shape. In other words, the via encapsulation region HA can be positioned to completely surround the first via HLE_TH1 (e.g., around the periphery of the first via HLE_TH1). For example, the via encapsulation region HA can have an annular shape, but this disclosure is not limited thereto.

[0114] A hole fusion pattern FSP2 can be disposed in the hole encapsulation region HA. In the hole encapsulation region HA, the first substrate 100 and the second substrate 190 can be bonded to each other through the hole fusion pattern FSP2. For example, the shape of the hole fusion pattern FSP2 in a planar view can correspond to the shape of the hole encapsulation region HA in a planar view, but this disclosure is not limited thereto. In other words, the hole fusion pattern FSP2 can be disposed along the edge of the first through-hole HLE_TH1. Therefore, it is possible to prevent or substantially prevent external air and / or moisture from penetrating from the inside of the first through-hole HLE_TH1 into the internal region. In other words, the hole fusion pattern FSP2 can encapsulate the display panel 10 from the inner surface of the first through-hole HLE_TH.

[0115] Therefore, the edge blending pattern FSP1 and the hole blending pattern FSP2 can be configured to surround the internal space of the first substrate 100 and the second substrate 190 spaced apart from each other in the thickness direction (e.g., the third third direction DR3), and the internal space can be sealed. The internal region of the display panel 10 defined by the first substrate 100 and the second substrate 190 can be in a vacuum state. However, this disclosure is not limited to this, and the internal region can be filled with gas or filler. The gas may include, for example, an inert gas or standard atmosphere, but this disclosure is not limited to this.

[0116] Figure 7 This is a circuit diagram of the pixels of a display device according to an embodiment.

[0117] Reference Figure 7 The circuitry of a pixel PX may include a first transistor TR1, a second transistor TR2, a capacitor Cst, and an organic light-emitting diode (OLED). The circuitry of each pixel PX is connected to a corresponding scan line SL, a corresponding data line DL, and a first source voltage line ELVDDL.

[0118] The first transistor TR1 can be a driving transistor, and the second transistor TR2 can be a switching transistor. Although in Figure 7 The first transistor TR1 and the second transistor TR2 are shown to be PMOS transistors, but this disclosure is not limited thereto, and either or both of the first transistor TR1 and the second transistor TR2 may be NMOS transistors as needed or desired.

[0119] The first electrode (e.g., source electrode) of the first transistor TR1 is connected to the first source voltage line ELVDDL, and the second electrode (e.g., drain electrode) of the first transistor TR1 is connected to the anode of the organic light-emitting diode (OLED). The first electrode (e.g., source electrode) of the second transistor TR2 is connected to the data line DL, and the second electrode (e.g., drain electrode) of the second transistor TR2 is connected to the gate electrode of the first transistor TR1. A capacitor Cst is connected between the gate electrode and the first electrode of the first transistor TR1. The cathode of the OLED receives a second source voltage ELVSS. The second source voltage ELVSS may be lower than the first source voltage ELVDD provided from the first source voltage line ELVDDL.

[0120] The second transistor TR2 can output a data signal applied to the data line DL in response to a scan signal applied to the scan line SL. The capacitor Cst can be charged with a voltage corresponding to the data signal received from the second transistor TR2. The first transistor TR1 can control the driving current flowing through the organic light-emitting diode (OLED) in response to the amount of charge stored in the capacitor Cst.

[0121] exist Figure 7 The equivalent circuitry of pixel PX shown is merely an example embodiment, and therefore, this disclosure is not limited thereto. For example, in other embodiments, the pixel circuitry of pixel PX may include a greater number of transistors (e.g., three or seven) and / or capacitors, as needed or desired.

[0122] Figure 8 yes Figure 6 A magnified view of region C. (Refer to...) Figure 8 The active element layer (ATL) of the display panel 10 is described in more detail.

[0123] Reference Figure 6 and Figure 8 The active component layer ATL may include at least one semiconductor layer 110, multiple conductive layers, and multiple insulating layers. The active component layer ATL may not be disposed at the substrate package region SA and the via package region HA (e.g., not disposed in or on the substrate package region SA and the via package region HA). In other words, the active component layer ATL may be spaced apart from the edge fusion pattern FSP1 and the via fusion pattern FSP2. The semiconductor layer 110, multiple conductive layers, and multiple insulating layers of the active component layer ATL may be spaced apart from the edge fusion pattern FSP1 and the via fusion pattern FSP2. However, this disclosure is not limited thereto, and in some embodiments, a portion of the multiple insulating layers may be disposed at the substrate package region SA and / or the via package region HA (e.g., in or on the substrate package region SA and / or the via package region HA). In this case, the edge fusion pattern FSP1 and / or the via fusion pattern FSP2 may be formed to pass through this portion of the multiple insulating layers.

[0124] The active element layer (ATL) may include a semiconductor layer 110, a first insulating layer 121, a first gate conductive layer 130, a second insulating layer 122, a second gate conductive layer 140, a third insulating layer 123, a data conductive layer 150, a fourth insulating layer 124, an anode 160, a dam layer 126 having an opening exposing the anode 160, a light-emitting layer 170 disposed in the opening of the dam layer 126, and a cathode 180 disposed on the light-emitting layer 170 and the dam layer 126. These layers may be stacked sequentially in the order described above. Furthermore, each of the above layers may include a single layer or a stack of multiple layers. However, this disclosure is not limited thereto, and other layers may be further disposed between the above layers.

[0125] A semiconductor layer 110 is disposed on the first substrate 100. The semiconductor layer 110 forms the channel of the thin-film transistor of the pixel PX. The semiconductor layer 110 may include polycrystalline silicon. However, this disclosure is not limited thereto, and the semiconductor layer 110 may include monocrystalline silicon, low-temperature polycrystalline silicon, amorphous silicon, or oxide semiconductor. The oxide semiconductor may include, for example, a binary compound (AB) containing indium (In), zinc (Zn), gallium (Ga), tin (Sn), titanium (Ti), aluminum (Al), hafnium (Hf), zirconium (Zr), and / or magnesium (Mg). x ), ternary compounds (AB) x C y ) or quaternary compounds (AB) x C y D z ).

[0126] A first insulating layer 121 is disposed on the semiconductor layer 110. The first insulating layer 121 can be a gate insulating layer with gate insulation function. The first insulating layer 121 may include silicon compounds or metal oxides, etc. For example, the first insulating layer 121 may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, or titanium oxide, etc.

[0127] A first gate conductive layer 130 is disposed on a first insulating layer 121. The first gate conductive layer 130 may include the gate electrode GAT of the thin-film transistor of the pixel PX, a scan line connected to the gate electrode GAT, and a first electrode CE1 of the storage capacitor.

[0128] The first gate conductive layer 130 may include at least one metal selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu).

[0129] The second insulating layer 122 may be disposed on the first gate conductive layer 130. The second insulating layer 122 may be an interlayer insulating layer or a second gate insulating layer. The second insulating layer 122 may include inorganic insulating materials, such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide and / or zinc oxide.

[0130] A second gate conductive layer 140 is disposed on the second insulating layer 122. The second gate conductive layer 140 may include a second electrode CE2 of a storage capacitor. The second gate conductive layer 140 may include at least one metal selected from the group consisting of molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The second gate conductive layer 140 may be made of the same or substantially the same material as the first gate conductive layer 130, but this disclosure is not limited thereto.

[0131] The third insulating layer 123 is disposed on the second gate conductive layer 140. The third insulating layer 123 may be an interlayer insulating layer. The third insulating layer 123 may include inorganic insulating materials, such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide and / or zinc oxide.

[0132] A data conductive layer 150 is disposed on the third insulating layer 123. The data conductive layer 150 may include a first electrode SD1 and a second electrode SD2 of the thin-film transistor of the pixel PX. The first electrode SD1 and the second electrode SD2 of the thin-film transistor can be electrically connected to the source and drain regions of the semiconductor layer 110 via contact holes passing through the third insulating layer 123, the second insulating layer 122, and the first insulating layer 121. The data conductive layer 150 may also include a first source voltage electrode ELVDDE of the pixel PX. The first source voltage electrode ELVDDE can be electrically connected to the second electrode CE2 of the storage capacitor through contact holes passing through the third insulating layer 123.

[0133] The data conductive layer 150 may include at least one metal selected from the group consisting of aluminum (Al), molybdenum (Mo), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), germanium (Ge), and copper (Cu). The data conductive layer 150 may be a single layer or multiple layers. For example, the data conductive layer 150 may have a stacked structure of Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, or Ti / Cu.

[0134] A fourth insulating layer 124 is disposed on the data conductive layer 150. The fourth insulating layer 124 covers the data conductive layer 150. The fourth insulating layer 124 can be a pass-through layer. The fourth insulating layer 124 may include an organic insulating material.

[0135] Anode 160 is disposed on the fourth insulating layer 124. Anode 160 may be a pixel electrode provided for each pixel PX. Anode 160 may be connected to the second electrode SD2 of the thin-film transistor via a contact hole through the fourth insulating layer 124. Anode 160 may at least partially overlap with the emitter region EMA of pixel PX.

[0136] The anode 160 may have a stacked structure formed by stacking material layers with high work functions (e.g., indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and / or indium oxide (In2O3)) and reflective material layers (e.g., silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or mixtures thereof). However, this disclosure is not limited thereto. The layer with high work function may be disposed above the reflective material layer and may be disposed closer to the light-emitting layer 170 than the reflective material layer. The anode 160 may have a multilayer structure such as ITO / Mg, ITO / MgF2, ITO / Ag, and / or ITO / Ag / ITO, but this disclosure is not limited thereto.

[0137] A dam layer 126 may be disposed on the anode 160. The dam layer 126 may be disposed on the anode 160 and may include an opening exposing the anode 160. The emitting region (EMA) and the non-emitting region (not shown) may be separated from each other by the dam layer 126 and its opening. The dam layer 126 may comprise an organic insulating material, such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polystyrene resin, polyphenylene sulfide resin, or benzocyclobutene (BCB). In some embodiments, the dam layer 126 may also comprise an inorganic material.

[0138] The display device 1 may also include a separator 127. The separator 127 may be disposed on the dam layer 126. The separator 127 may be disposed directly on the dam layer 126. The separator 127 may overlap with the dam layer 126 in the thickness direction. The separator 127 may be used to maintain a gap with the structure disposed above it. Additionally, the separator 127 may be used to support the structure stacked thereon, and when the display panel 10 is pressed, the separator 127 may be used to mitigate deformation caused by stress. For example, the separator 127 may support the second substrate 190 disposed thereon and may prevent or substantially prevent the second substrate 190 from sliding down (e.g., moving downwards, warping, or bending). Furthermore, in the case of depositing organic material of the light-emitting layer 170 through a fine metal mask (not shown), the separator 127 may be used to prevent or substantially prevent the fine metal mask (not shown) from sliding down (e.g., moving downwards, warping, or bending). The separator 127 may have a width smaller than the width of the dam layer 126. The separator 127 can be provided on a portion (e.g., a section) of the dam layer 126, and thus, a stepped portion can be created relative to the portion where the separator 127 is not provided (e.g., the portion of the dam layer 126 where the separator 127 is not provided).

[0139] Similar to dam layer 126, separator 127 may include an organic insulating material. Separator 127 and dam layer 126 may be formed as separate layers from each other, or they may be made of the same or substantially the same material and formed by the same or substantially the same process (e.g., by a single process). For example, dam layer 126 and separator 127 with different heights may be formed by coating a photosensitive organic material and then performing exposure and development using a slit mask or halftone mask via the same process (e.g., via a single process).

[0140] A light-emitting layer 170 is disposed on the anode 160 exposed by the dam layer 126. The light-emitting layer 170 may include an organic material layer. The organic material layer of the light-emitting layer may include an organic light-emitting layer, and may also include a hole injection / transport layer and / or an electron injection / transport layer.

[0141] The cathode 180 can be disposed on the light-emitting layer 170. The cathode 180 can be a common electrode extending across the entire pixel PX. The anode 160, the light-emitting layer 170, and the cathode 180 can constitute an organic light-emitting element.

[0142] The cathode 180 may contact not only the light-emitting layer 170 but also the top surface of the dam layer 126. Furthermore, the cathode 180 may contact the surface of the separator 127 and may cover the surface of the separator 127 in the area forming the separator 127 (e.g., in or over the area forming the separator 127). The cathode 180 may be formed to conform to the structure disposed below it, reflecting the stepped portion of the structure disposed below it.

[0143] The cathode 180 may include a material layer having a low work function, such as Li, Ca, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, Ba or compounds thereof (e.g., LiF or BaF2) or mixtures (e.g., mixtures of Ag and Mg), or a multilayer structure (e.g., LiF / Ca or LiF / Al). The cathode 180 may also include a transparent metal oxide layer disposed on the material layer having a low work function.

[0144] An anti-reflective member AR and a second substrate 190 are disposed on the cathode 180. The anti-reflective member AR is disposed on the cathode 180, and the second substrate 190 is disposed on the anti-reflective member AR. Since the second substrate 190 has already been described above, its redundant description need not be repeated.

[0145] In the following text, reference will be made to Figures 9 to 13 A method for manufacturing a display device 1 according to an embodiment will be described in more detail.

[0146] Figure 9 and Figure 10 This is a cross-sectional view illustrating a method for manufacturing a display device according to an embodiment. Figure 11 This is a plan view illustrating the portion surrounding the hole area in a method for manufacturing a display device according to an embodiment. Figure 9 and Figure 10 A cross-section of the area surrounding (e.g., around or adjacent to) the pore region HLA is shown. Figure 9 The process for forming the dummy fusion pattern FSP_D is shown, and Figure 10 The process for forming the hole fusion pattern FSP2 is shown. Figure 11 It is a plan view showing the portion around (e.g., surrounding or adjacent to) the aperture region HLA that forms the dummy fusion pattern FSP_D and the aperture fusion pattern FSP2.

[0147] Reference Figures 9 to 11 A dummy fusion pattern FSP_D and a via fusion pattern FSP2 are formed to fuse the first substrate 100 and the second substrate 190 together. The dummy fusion pattern FSP_D is formed before the via fusion pattern FSP2 is formed.

[0148] More specifically, the first laser module LM1 can emit a first laser beam L1 from above the second substrate 190 toward the first substrate 100. The first focal point FC1 of the first laser beam L1 can be located inside the first substrate 100.

[0149] The first laser module LM1 can emit a femtosecond laser beam (or a microwave laser beam). In other words, the first laser beam L1 can be a femtosecond laser beam. As used herein, a femtosecond laser beam can refer to a laser beam having a pulse width of greater than or equal to 200 femtoseconds and less than or equal to 500 femtoseconds, but this disclosure is not limited thereto.

[0150] When the first laser beam L1 is irradiated onto the first focal point FC1 located inside the first substrate 100, high energy can be provided to the portion surrounding (e.g., adjacent to) the first focal point FC1. The provided energy can cause the first substrate 100 and / or the second substrate 190 to become plasma. The plasma-transformed portions of the first substrate 100 and / or the second substrate 190 can melt and expand. In other words, a portion of the first substrate 100 can expand upwards into the second substrate 190 in the thickness direction (e.g., the third direction DR3), and the first substrate 100 can fuse (or connect) with the second substrate 190. In other words, the first substrate 100 and the second substrate 190 can be connected to each other to form the central portion PLS of the dummy fusion pattern FSP_D.

[0151] Heat is generated near the central portion PLS, which becomes plasma, and this heat can melt the portion surrounding (e.g., adjacent to or around) the central portion PLS. Therefore, the peripheral portion HAZ of the dummy fusion pattern FSP_D can be formed around the central portion PLS (e.g., around the periphery of the central portion PLS). Similar to the central portion PLS, the peripheral portion HAZ of the dummy fusion pattern FSP_D can connect the first substrate 100 and the second substrate 190 to each other to bond the two components together.

[0152] Because the outer HAZ and the central PLS have different melting temperatures, their optical properties can also differ. For example, the outer HAZ and the central PLS can have different refractive indices, thus allowing them to be visually distinguishable from each other.

[0153] The shape of the dummy fusion pattern FSP_D in the cross-sectional view can be substantially the same as the shape of the edge fusion pattern FSP1 or the hole fusion pattern FSP2 described above, so that its redundant description can be avoided.

[0154] The dummy fusion pattern FSP_D can be disposed at the aperture region HLA (e.g., in or on the aperture region HLA) and can be formed in a circular shape in a planar view. In other words, the first laser beam L1 can be continuously irradiated. Therefore, in a planar view, the dummy fusion pattern FSP_D can be disposed in a closed curved shape. For example, the dummy fusion pattern FSP_D can be formed in a closed circular shape, but this disclosure is not limited thereto.

[0155] In some embodiments, after forming the dummy fusion pattern FSP_D, the aperture fusion pattern FSP2 is formed.

[0156] More specifically, the second laser module LM2 can emit a second laser beam L2 from above the second substrate 190 toward the first substrate 100. The second focal point FC2 of the second laser beam L2 can be located inside the first substrate 100. The second laser module LM2 can emit a femtosecond laser beam, and the second laser beam L2 can be a femtosecond laser beam. The second laser beam L2 can be coupled with the first laser beam (e.g., see...). Figure 9 The L1) is the same or substantially the same, but this disclosure is not limited thereto.

[0157] Since the process for forming the aperture fusion pattern FSP2 can be the same as or substantially the same as the process for forming the dummy fusion pattern FSP_D described above, its redundant description need not be repeated.

[0158] The aperture fusion pattern FSP2 can be formed outside the dummy fusion pattern FSP_D (e.g., around the periphery of the dummy fusion pattern FSP_D), while being spaced apart from the dummy fusion pattern FSP_D. The aperture fusion pattern FSP2 can be located closer to the active region AAR than the dummy fusion pattern FSP_D. The aperture fusion pattern FSP2 can surround the dummy fusion pattern FSP_D (e.g., around the outer periphery of the dummy fusion pattern FSP_D).

[0159] However, this disclosure is not limited to the order in which the dummy fusion pattern FSP_D and the via fusion pattern FSP2 are formed. For example, in other embodiments, the via fusion pattern FSP2 may be formed first, and then the dummy fusion pattern FSP_D may be formed.

[0160] Figure 12 This is a cross-sectional view illustrating a method for manufacturing a display device according to an embodiment. Figure 13 This is a plan view illustrating the portion surrounding the hole area in a method for manufacturing a display device according to an embodiment. Figure 12 A cross-section of the region surrounding (e.g., around or adjacent to) the pore region HLA is shown. Figure 12 and Figure 13 The process for forming the first through-hole HLE_TH1 is shown.

[0161] Reference Figure 12 and Figure 13 In formation Figure 10 and Figure 11 After the structure shown in the figure is completed, the first through hole HLE_TH1 can be formed by cutting the first substrate 100 and the second substrate 190.

[0162] More specifically, the first substrate 100 and the second substrate 190 can be cut along the cutting line CL. For example, the first substrate 100 and the second substrate 190 can be cut by a cutting laser module that emits a cutting laser beam (e.g., by another cutting laser module that emits a different cutting laser beam), but this disclosure is not limited thereto. When forming the first via HLE_TH1 by cutting the first substrate 100 and the second substrate 190 using a cutting laser beam, the wavelength of the cutting laser beam can be greater than the wavelength of the second laser beam L2 used to form the hole fusion pattern FSP2. The first via HLE_TH1 can be formed in the hole region HLA by cutting the first substrate 100 and the second substrate 190. Furthermore, the inner wall of the first via HLE_TH1 can include the side surface (inner surface) of the first substrate 100 and the side surface (inner surface) of the second substrate 190, but this disclosure is not limited thereto. The side surface (inner surface) of the first substrate 100 and the side surface (inner surface) of the second substrate 190 can be aligned with each other (e.g., they can be coplanar).

[0163] The cut line CL can be located between the dummy fusion pattern FSP_D and the via fusion pattern FSP2. In other words, when the first via HLE_TH1 is formed by cutting the first substrate 100 and the second substrate 190 along the cut line CL, the dummy fusion pattern FSP_D can be removed.

[0164] Due to the presence of the dummy fusion pattern FSP_D, the first substrate 100 and the second substrate 190 can be more firmly fixed to each other in the process of forming the first via HLE_TH1, and the gap between the first substrate 100 and the second substrate 190 in the thickness direction (e.g., third direction DR3) can be reduced. In the process of cutting the first substrate 100 and the second substrate 190 to form the first via HLE_TH1, the stress applied to the portion where the first substrate 100 and the second substrate 190 are fused together can be reduced. Therefore, the distance between the cutting line CL and the via fusion pattern FSP2 can be further reduced, and the non-active region NAR at the via region HLA (e.g., in or on the via region HLA) can be further reduced. Furthermore, it is not necessary to align the first substrate 100 and the second substrate 190, thereby preventing or substantially preventing the increase of the non-active region NAR due to alignment tolerances.

[0165] Although the method for forming the aperture fusion pattern FSP2 has been described in more detail above, such a method can also be applied to the method for forming the edge fusion pattern FSP1. In other words, the method for forming the edge fusion pattern FSP1 can be the same as or substantially the same as (or similar to) the method for forming the aperture fusion pattern FSP2 described above, and therefore, its redundant description need not be repeated.

[0166] Other example embodiments of the display device will be described in more detail below. In the example embodiments below, the references above may be simplified or may not be repeated. Figures 1 to 13 Redundant descriptions of components that are the same or substantially the same, and can primarily describe their differences.

[0167] Figure 14 This is a cross-sectional view of a display device according to another embodiment.

[0168] Reference Figure 14 In this embodiment, the width WH of the hole fusion pattern FSP2_1 of the display panel 10_1 is... Figure 6 The difference between the hole fusion pattern FSP2 and the embodiment is that the width WH is, Figure 14 The width WH of the hole fusion pattern FSP2_1 includes a first width WH1 and a second width WH2 that are different from each other.

[0169] More specifically, the width WH of the hole fusion pattern FSP2_1 of the display panel 10_1 in this embodiment may include a first width WH1 and a second width WH2, and the first width WH1 and the second width WH2 may be different from each other. The sum of the first width WH1 and the second width WH2 may be the same as the width (e.g., the total width) WH of the hole fusion pattern FSP2_1 (e.g., the width (e.g., the total width) WH of the hole fusion pattern FSP2_1 may be defined).

[0170] The first width WH1 of the via fusion pattern FSP2_1 indicates the width of the portion of the via fusion pattern FSP2_1 located on one side of the extension line FL, the extension line FL being an imaginary line extending from the main axis of the via fusion pattern FSP2_1 in the thickness direction (e.g., the third direction DR3), and the second width WH2 of the via fusion pattern FSP2_1 indicates the width of the portion of the via fusion pattern FSP2_1 located on the other side (e.g., the opposite side) of the extension line FL. In other words, one side and the other side of the via fusion pattern FSP2_1 can be asymmetrical with respect to the extension line FL. A portion of the first width WH1 of the via fusion pattern FSP2_1 can be farther away from the first via HLE_TH1 (e.g., it can be positioned further away from the first via HLE_TH1) than a portion of the second width WH2 of the via fusion pattern FSP2_1, and this portion of the first width WH1 of the via fusion pattern FSP2_1 can be positioned closer to the active element layer ATL than this portion of the second width WH2 of the via fusion pattern FSP2_1. The hole fusion pattern FSP2_1 can have a maximum thickness on the extension line FL, and the second focus FC2 of the hole fusion pattern FSP2_1 can be located on the extension line FL, but this disclosure is not limited thereto.

[0171] The first width WH1 of the aperture fusion pattern FSP2_1 can be smaller than the second width WH2 of the aperture fusion pattern FSP2_1. The aperture fusion pattern FSP2_1 is arranged in a circular shape in the planar view, so that the second focus FC2 can move in a circular shape in the planar view. Although the same or substantially the same thermal energy can be transferred to both the outer and inner sides of the circle along which the second focus FC2 moves, the area where thermal energy can diffuse can be smaller on the inner side of the circle compared to the outer side. Therefore, thermal energy can be transferred to areas farther away from the second focus FC2 (e.g., further away from the second focus FC2) on the inner side of the circle compared to the outer side.

[0172] On the other hand, the width WS of the edge blending pattern FSP1 may include a first width WS1 and a second width WS2, and the first width WS1 and the second width WS2 may be the same as or substantially the same as each other. The sum of the first width WS1 and the second width WS2 may be the same as the width (e.g., the total width) WS of the edge blending pattern FSP1 (e.g., the width (e.g., the total width) WS of the edge blending pattern FSP1 may be defined).

[0173] The first width WS1 of the edge blending pattern FSP1 represents the width of the region located inside the extension line FL, which is an imaginary line extending from the third focal point FC3 of the edge blending pattern FSP1 in the thickness direction (e.g., the third direction DR3), and the second width WS2 of the edge blending pattern FSP1 represents the width of the region located outside the extension line FL. In other words, a portion of the first width WS1 of the edge blending pattern FSP1 can be positioned closer to the active element layer ATL than a portion of the second width WS2 of the edge blending pattern FSP1.

[0174] Furthermore, in this case, the first width WS1 and the second width WS2 of the hole fusion pattern FSP2_1 are different. The difference between the first width WH1 and the second width WH2 of the hole fusion pattern FSP2_1 can be greater than the difference between the first width WS1 and the second width WS2 of the edge fusion pattern FSP1. For example, the difference between the first width WH1 and the second width WH2 of the hole fusion pattern FSP2_1 can be greater than or equal to twice the difference between the first width WS1 and the second width WS2 of the edge fusion pattern FSP1 and less than or equal to five times the difference between the first width WS1 and the second width WS2 of the edge fusion pattern FSP1, or it can be greater than or equal to 1.5 times the difference between the first width WS1 and the second width WS2 of the edge fusion pattern FSP1 and less than or equal to ten times the difference between the first width WS1 and the second width WS2 of the edge fusion pattern FSP1, but this disclosure is not limited thereto. ,

[0175] Furthermore, the region located on one side of the extension line FL of the via fusion pattern FSP2_1 can have a smaller property change than the region located on the other side of the extension line FL of the via fusion pattern FSP2_1. Therefore, the bonding force between the first substrate 100 and the second substrate 190 in the region located on one side of the extension line FL of the via fusion pattern FSP2_1 (e.g., in the region located on one side of the extension line FL of the via fusion pattern FSP2_1 or on the region located on one side of the extension line FL of the via fusion pattern FSP2_1) can be greater than the bonding force between the first substrate 100 and the second substrate 190 in the region located on the other side of the extension line FL of the via fusion pattern FSP2_1 (e.g., in the region located on the other side of the extension line FL of the via fusion pattern FSP2_1 or on the region located on the other side of the extension line FL of the via fusion pattern FSP2_1).

[0176] In this case, the non-active area NAR (or hole area HLA) around the via HLE_TH can be further reduced, which can provide users with a more immersive display screen.

[0177] Figure 15 This is an enlarged plan view of the portion surrounding the hole area of ​​a display device according to another embodiment. Figure 16 It is along Figure 15 The cross-sectional view taken by line XVI-XVI'.

[0178] Reference Figure 15 and Figure 16 In this embodiment, the hole fusion pattern FSP2_2 of the display panel 10_2 is... Figure 14 The difference between the hole fusion pattern FSP2_1 in this embodiment and the hole fusion pattern FSP2_2 in this embodiment is that the hole fusion pattern FSP2_2 includes a straight portion LA and a curved portion CA.

[0179] More specifically, the hole fusion pattern FSP2_2 of the display panel 10_2 in this embodiment may include a straight portion LA and a curved portion CA. In a plan view, the straight portion LA of the hole fusion pattern FSP2_2 may be a straight line. For example, the straight portion LA of the hole fusion pattern FSP2_2 may extend in the second direction DR2, but this disclosure is not limited thereto. In a plan view, the curved portion CA of the hole fusion pattern FSP2_2 may be curved. For example, in a plan view, the curved portion CA of the hole fusion pattern FSP2_2 may be set as part of a circle, but this disclosure is not limited thereto.

[0180] The straight portion LA of the hole fusion pattern FSP2_2 can have a straight portion width WHL, and the straight portion width WHL can include a first width WHL1 and a second width WHL2. The first width WHL1 and the second width WHL2 of the straight portion width WHL are substantially the same.

[0181] The curved portion CA of the hole fusion pattern FSP2_2 can have a curved portion width WHC, and the curved portion width WHC can include a first width WHC1 and a second width WHC2. The first width WHC1 and the second width WHC2 of the curved portion width WHC can be different from each other. This is because the curved portion width WHC and its first width WHC1 and second width WHC2 can be respectively... Figure 14 The width WH of the aperture fusion pattern FSP2_1 in the embodiment and the corresponding second width WH2 and first width WH1 of the aperture fusion pattern FSP2_1 are the same or substantially the same, so their redundant descriptions need not be repeated.

[0182] In other words, edge blending patterns (e.g., see...) Figure 6 In the "FSP1" section, the straight portion LA of the hole fusion pattern FSP2_2 and the curved portion CA of the hole fusion pattern FSP2_2 can be arranged in different shapes from each other. The straight portion width WHL of the straight portion LA of the hole fusion pattern FSP2_2 and the curved portion width WHC of the curved portion CA of the hole fusion pattern FSP2_2 can each be smaller than the edge fusion pattern (e.g., see...). Figure 6 The width WS of “FSP1” in the hole fusion pattern FSP2_2. In addition, the width WHL of the straight portion LA of the hole fusion pattern FSP2_2 may include a first width WHL1 and a second width WHL2 that are the same or substantially the same as each other, and the width WHC of the curved portion CA of the hole fusion pattern FSP2_2 may include a first width WHC1 and a second width WHC2 that are different from each other.

[0183] In this case, the non-active area NAR (or hole area HLA) around the first via HLE_TH1 (e.g., adjacent to the first via HLE_TH1) can be further reduced, which can provide users with a more immersive display screen.

[0184] Figure 17 This is a cross-sectional view illustrating a method of manufacturing a display device according to another embodiment. Figure 18 This is a magnified plan view of the area surrounding the hole. Figure 17 The process of forming the sub-via fusion pattern FSP_S and then forming the first through-via HLE_TH1 is shown. Figure 18 It is a plan view showing the portion around the pore region HLA, in which the sub-pore fusion pattern FSP_S is further formed.

[0185] Reference Figure 17 and Figure 18 The method for manufacturing the display device in this embodiment is similar to... Figures 9 to 13 The difference in the method of manufacturing the display device in the embodiment may be that a sub-hole fusion pattern FSP_S is further formed.

[0186] More specifically, after forming the dummy fusion pattern FSP_D and the via fusion pattern FSP2, a sub-via fusion pattern FSP_S can be further formed. Compared to the via fusion pattern FSP2, the sub-via fusion pattern FSP_S can be formed in a region closer to the active component layer ATL (e.g., in a region closer to the active component layer ATL or on a region closer to the active component layer ATL). However, this disclosure is not limited thereto, and compared to the via fusion pattern FSP2, the sub-via fusion pattern FSP_S can be formed in a region farther from the active component layer ATL (e.g., in a region farther from the active component layer ATL or on a region farther from the active component layer ATL).

[0187] The method for forming the sub-via fusion pattern FSP_S can be the same as or substantially the same as the method for forming the via fusion pattern FSP2 or the method for forming the dummy fusion pattern FSP_D described above. Therefore, its redundant description need not be repeated.

[0188] After forming the sub-via fusion pattern FSP_S, the first substrate 100 and the second substrate 190 can be cut along the cleaving line CL, thereby forming the first via HLE_TH1. The cleaving line CL can be located between the via fusion pattern FSP2 and the dummy fusion pattern FSP_D. Therefore, after forming the first via HLE_TH1, the dummy fusion pattern FSP_D is removed. However, the sub-via fusion pattern FSP_S and the via fusion pattern FSP2 can remain around the first via HLE_TH1 (e.g., around the periphery of the first via HLE_TH1).

[0189] In this configuration, the distance between the cut line CL and the via fusion pattern FSP2 can be further reduced, and the non-active region NAR at the via region HLA (e.g., in or on the via region HLA) can be further reduced. Furthermore, because a sub-via fusion pattern FSP_S, in addition to the via fusion pattern FSP2, is also disposed at the via region HLA (e.g., in or on the via region HLA), the bonding strength between the first substrate 100 and the second substrate 190 at the via region HLA (e.g., in or on the via region HLA) can be increased, and the portion surrounding the via HLE_TH1 can be more reliably encapsulated.

[0190] Figure 19 This is a cross-sectional view illustrating a method of manufacturing a display device according to another embodiment. Figure 19 A cross-section of the display panel 10_3 is shown, wherein, according to Figure 17 and Figure 18 The method for manufacturing a display device in the embodiments is applied to the substrate packaging region SA and the hole packaging region HA.

[0191] Reference Figure 19 In this embodiment, the display panel 10_3 and Figure 6 The difference between the display panel 10 in this embodiment and the display panel 10_3 in this embodiment is that the display panel 10_3 includes a first sub-fusion pattern FSP_S1 and a second sub-fusion pattern FSP_S2.

[0192] More specifically, the display panel 10_3 in this embodiment includes an edge blending pattern FSP1, a first sub-blending pattern FSP_S1, a second sub-blending pattern FSP_S2, and a hole blending pattern FSP2.

[0193] The first sub-fusion pattern FSP_S1 may be disposed together with the edge fusion pattern FSP1 at the substrate packaging region SA (e.g., in or on the substrate packaging region SA), and the second sub-fusion pattern FSP_S2 may be disposed together with the via fusion pattern FSP2 at the via packaging region HA (e.g., in or on the via packaging region HA). The distance d2 between the first sub-fusion pattern FSP_S1 and the edge fusion pattern FSP1 may be greater than the distance d1 between the second sub-fusion pattern FSP_S2 and the via fusion pattern FSP2.

[0194] In this case, the non-active area NAR (or via area HLA) around the first via HLE_TH1 (e.g., adjacent to the first via HLE_TH1) can be further reduced, which can provide users with a more immersive display screen. In addition, the bonding force between the first substrate 100 and the second substrate 190 can be increased, and the internal areas of the first substrate 100 and the second substrate 190 can be more reliably encapsulated.

[0195] Figure 20 This is a plan view illustrating a method of manufacturing a display device according to another embodiment. Figure 20 This is an enlarged view of the portion surrounding the HLA pore region (e.g., adjacent to the HLA pore region).

[0196] Reference Figure 20 The method for manufacturing a display device according to this embodiment and Figures 9 to 13 The difference in the embodiments may be that, in this embodiment, the dummy fusion pattern FSP_D1 can be divided into multiple parts.

[0197] More specifically, in the method of manufacturing a display device according to this embodiment, the dummy fusion pattern FSP_D1 can be formed on a generally closed curve that is not completely closed. In other words, the dummy fusion pattern FSP_D1 can include multiple portions formed individually of each other. In this case, for example, the laser beam used to form the dummy fusion pattern FSP_D1 can be irradiated discontinuously.

[0198] In this configuration, the dummy fusion pattern FSP_D1 can still be securely (e.g., more securely) fixed to the first substrate 100 and the second substrate 190, and the gap between the first substrate 100 and the second substrate 190 in the thickness direction (e.g., third direction DR3) can be reduced. During the process of cutting the first substrate 100 and the second substrate 190 to form the first via HLE_TH1, the stress applied to the portion where the first substrate 100 and the second substrate 190 are fused together can be reduced.

[0199] Although some exemplary embodiments have been described, those skilled in the art will readily recognize that various modifications can be made to the exemplary embodiments without departing from the spirit and scope of this disclosure. It will be understood that, unless otherwise described, the description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Therefore, it will be apparent to those skilled in the art that, unless specifically indicated otherwise, features, characteristics, and / or elements described in connection with a particular embodiment can be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments. Therefore, it should be understood that the foregoing is illustrative of various exemplary embodiments and should not be construed as limiting to the specific exemplary embodiments disclosed herein, and various modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the spirit and scope of this disclosure as defined in the appended claims and their equivalents.

Claims

1. A display device having a display area and a non-display area surrounding the display area, wherein, The display device includes: First substrate; The second substrate faces the first substrate; A through-hole passes through the first substrate and the second substrate at the display area; A hole fusion pattern is configured to bond the first substrate and the second substrate to each other around the through hole in the display area; The sub-hole fusion pattern is configured to further bond the first substrate and the second substrate to each other around the via in the display area. The sub-hole fusion pattern surrounds the through hole or both the through hole and the hole fusion pattern.

2. The display device according to claim 1, wherein, Each of the first substrate and the second substrate comprises glass, and The hole fusion pattern is formed by fusing the first substrate and the second substrate together.

3. The display device according to claim 1, wherein, The display device further includes an edge blending pattern configured to join the first substrate and the second substrate to each other at the edge of the first substrate or the second substrate.

4. The display device according to claim 3, wherein, In the plan view, the width of the edge fusion pattern is greater than the width of the hole fusion pattern.

5. The display device according to claim 4, wherein, The width of the hole fusion pattern is in the range of 1 / 2 to 1 / 5 of the width of the edge fusion pattern.

6. The display device according to claim 3, wherein, The edge blending pattern is located in the non-display area, and / or the edge blending pattern includes a central portion and a peripheral portion surrounding the central portion, the central portion including a plasma structure.

7. The display device according to any one of claims 3 to 6, wherein, The display device further includes: A sub-fusion pattern is configured to further bond the first substrate and the second substrate to each other in the non-display area, the edge fusion pattern surrounding the sub-fusion pattern. The distance between the sub-fusion pattern and the edge fusion pattern is greater than the distance between the sub-fusion pattern and the hole fusion pattern.

8. The display device according to claim 1, wherein, The hole fusion pattern is located between the first substrate and the second substrate.

9. The display device according to claim 1, wherein, The display device further includes an active element layer located between the first substrate and the second substrate. The active element layer does not overlap with the via.

10. The display device according to claim 1, wherein, The aperture fusion pattern includes a central portion and a peripheral portion surrounding the central portion, the central portion including a plasma structure.

11. The display device according to claim 10, wherein, The ratio of the thickness of the hole fusion pattern in the thickness direction to the width of the hole fusion pattern in a first direction perpendicular to the thickness direction is greater than 1.9:

1.

12. The display device according to claim 11, wherein, The width of the fused hole pattern in the first direction is less than or equal to 100 micrometers.

13. The display device according to claim 10, wherein, The hole fusion pattern also includes a long axis and a short axis intersecting the long axis, and Wherein, the width of one side of the major axis in the direction of the minor axis is different from the width of the other side of the major axis in the direction of the minor axis.

14. The display device according to claim 13, wherein, The other side of the long shaft is closer to the through hole than the first side of the long shaft, and The width of the other side of the long axis is greater than the width of the side of the long axis.

15. The display device according to claim 1, wherein, The vias and the fused hole patterns are spaced apart from each other, and the first substrate and the second substrate are spaced apart from each other in the thickness direction in the area where the vias and the fused hole patterns are spaced apart from each other.

16. A method for manufacturing a display device, wherein, The method includes: A second substrate is placed on a first substrate on which an active element layer is disposed; A dummy fusion pattern and a via fusion pattern for bonding the first and second substrates together are formed by irradiating at least one of the first and second substrates with a femtosecond laser beam. The dummy fusion pattern is disposed on a first closed curve, and the via fusion pattern is disposed on a second closed curve, the second closed curve being spaced apart from and outside the first closed curve. A through-hole is formed in the thickness direction by cutting between the first substrate and the second substrate between the dummy fusion pattern and the hole fusion pattern.

17. The method according to claim 16, wherein, The hole fusion pattern is formed continuously without being interrupted, and the dummy fusion pattern is formed into multiple parts by being at least partially broken.

18. The method according to claim 16, wherein, The formation of the dummy fusion pattern and the hole fusion pattern includes: A sub-hole fusion pattern is formed on a third closed curve, which is spaced apart from the second closed curve and is located outside the second closed curve.

19. The method of claim 16, wherein, The formation of the through-hole includes: irradiating at least one of the first substrate and the second substrate with a cutting laser beam, and The wavelength of the cutting laser beam is greater than the wavelength of the femtosecond laser beam.

20. The method of claim 16, wherein, Each of the first substrate and the second substrate comprises glass, and The dummy fusion pattern and the hole fusion pattern are formed by fusing the first substrate and the second substrate together.

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