Power conversion device and control method of power conversion device

Abstract

In the past, it was impossible to determine which part of the power semiconductor constituting the upper arm circuit and the lower arm circuit had a fault. In the present invention, the analog DC current calculation unit (451) in the power semiconductor diagnosis unit (45) calculates the analog DC current value of each phase at the first fault based on the duty cycle value (Du, Dv, Dw) and AC current sensor value (Ius, Ivs, Iws) of each phase, and outputs it to the fault judgment unit (452). The fault judgment unit (452) uses the analog DC current value of each phase at the first fault, the DC current sensor value (Idcs), the duty cycle value (Du, Dv, Dw) of each phase, and the target torque to determine which part of the power semiconductor in the power conversion circuit (60) has a fault, and outputs a fault notification signal corresponding to the fault part to the fault notification device (30) and the PWM signal generation unit (44). In addition, the fault judgment unit (452) determines the target torque and identifies whether it is during power operation or regeneration.

Description

Technical Field

[0001] The invention relates to a power conversion device and a control method of the power conversion device. Background Art

[0002] Hybrid vehicles and electric vehicles are equipped with power conversion devices to drive motors. In the power conversion device, power semiconductors constituting upper and lower arm circuits are switched in accordance with each phase of the motor, thereby converting direct current supplied by a battery into alternating current to drive the motor.

[0003] In recent years, the need to detect abnormalities and failures in power conversion devices has increased based on functional safety standards for automobiles. Therefore, it is also necessary to perform diagnosis that can detect abnormalities and failures on power semiconductors.

[0004] Patent Document 1 discloses a device that includes a drive circuit for switching on / off of each power semiconductor and outputs an abnormality notification signal to an external abnormality notification device when it is determined that a failure has occurred inside a power conversion device.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2017-208893 Summary of the invention

[0008] Technical problem to be solved by the invention

[0009] In the device described in Patent Document 1, it is impossible to identify which part of the power semiconductors constituting the upper arm circuit and the lower arm circuit has failed.

[0010] Technical solutions adopted to solve technical problems

[0011] The power conversion device involved in the present invention includes: a power conversion circuit, which corresponds to each phase of a multi-phase motor and is composed of an upper arm circuit and a lower arm circuit, and converts a direct current into a multi-phase alternating current; a control circuit, which outputs a PWM signal to the upper arm circuit and the lower arm circuit; an analog direct current calculation unit, which calculates a first fault-time simulated direct current based on the alternating current value of the remaining phases when one phase of the multi-phase fails based on the alternating current output by the power conversion circuit and the duty cycle of the PWM signal; and a fault judgment unit, which detects a fault of the upper arm circuit or the lower arm circuit of any phase based on the direct current input to the power conversion circuit or the direct current according to the alternating current value output from the power conversion circuit, the duty cycle of the PWM signal and the first fault-time simulated direct current.

[0012] In the control method of the power conversion device involved in the present invention, a power conversion circuit corresponding to each phase of a multi-phase motor is composed of an upper arm circuit and a lower arm circuit, a DC current is converted into a multi-phase AC current, a PWM signal is output to the upper arm circuit and the lower arm circuit, and a first fault-time simulated DC current based on the AC current value of the remaining phases when one phase in the multi-phase fails is calculated based on the AC current output by the power conversion circuit and the duty cycle of the PWM signal, and a fault of the upper arm circuit or the lower arm circuit of any phase is detected based on the DC current input to the power conversion circuit or the DC current according to the AC current value output from the power conversion circuit, the duty cycle of the PWM signal and the first fault-time simulated DC current.

[0013] Effects of the Invention

[0014] According to the present invention, it is possible to identify which part of the power semiconductors constituting the upper arm circuit and the lower arm circuit has failed. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a circuit configuration diagram of a power conversion device according to Embodiment 1.

[0016] Figure 2 It is a circuit diagram of a power conversion circuit.

[0017] Figure 3 This is a flowchart showing the failure determination process according to the first embodiment.

[0018] Figure 4 It is a flowchart which shows the failure handling process.

[0019] Figure 5(A)(B)(C) are graphs of AC current, duty cycle, and DC current when a U-phase upper arm circuit has a shutdown fault during power operation.

[0020] Figure 6 This is a circuit configuration diagram of a power conversion device according to the second embodiment.

[0021] Figure 7 This is a flowchart showing the failure determination process according to the second embodiment.

[0022] Figure 8 This is a circuit configuration diagram of a power conversion device according to the third embodiment.

[0023] Fig. 9 This is a flowchart showing the failure determination process according to the third embodiment.

[0024] Fig.10 This is a flowchart showing the failure determination process according to the fourth embodiment.

[0025] Fig.11 This is a flowchart showing the failure determination process according to the fifth embodiment. DETAILED DESCRIPTION

[0026] [Implementation Method 1]

[0027] Figure 1 1 is a circuit configuration diagram of the power conversion device 100 according to the first embodiment.

[0028] The power conversion device 100 converts the DC power obtained from the DC power supply 10 into AC power during power operation and drives the motor 20. The DC power supply 10 is a power supply for driving the motor 20. In addition, the power conversion device 100 converts the power of the motor 20 into DC power and charges the DC power supply 10 during regeneration.

[0029] The motor 20 is a three-phase motor having three windings inside. In addition, the motor 20 is equipped with an angle sensor (not shown) for measuring the rotation angle of the motor 20, and the angle sensor outputs the measured rotation angle as an angle sensor value to the power conversion device 100. The power conversion device 100 detects a fault described later and notifies the fault notification device 30 of the fault.

[0030] The power conversion device 100 includes a control circuit 40, a drive circuit 50, and a power conversion circuit 60. The control circuit 40 includes a motor speed calculation unit 41, a target current calculation unit 42, a duty ratio calculation unit 43, a PWM signal generation unit 44, and a power semiconductor diagnosis unit 45. The power semiconductor diagnosis unit 45 includes a simulated DC current calculation unit 451 and a fault determination unit 452.

[0031] The voltage sensor 70 is a sensor for measuring the output voltage of the DC power supply 10 , and outputs the measured voltage value as a voltage sensor value to the target current calculation unit 42 in the control circuit 40 .

[0032] The DC current sensor 80 measures the DC current flowing between the DC power supply 10 and the power conversion circuit (inverter circuit) 60, and outputs the measured current value as the DC current sensor value Idcs to the fault determination unit 452. In addition, in the present embodiment, the DC current sensor 80 is provided so that the current flowing from the DC power supply 10 into the power conversion circuit 60 is measured as a positive current value, but the DC current sensor 80 may be provided so that the current value in the reverse direction is measured as a positive current value.

[0033] The AC current sensor 90 is a sensor for measuring the AC current flowing through each phase (U phase, V phase, W phase) of the motor 20. Specifically, the AC current Iu flowing through the U phase is measured, and the AC current sensor value Ius is output to the duty cycle calculation unit 43 and the analog DC current calculation unit 451. Similarly, the AC current Iv flowing through the V phase is measured, and the AC current sensor value Ivs is output to the duty cycle calculation unit 43 and the analog DC current calculation unit 451. Similarly, the AC current Iw flowing through the W phase is measured, and the AC current sensor value Iws is output to the duty cycle calculation unit 43 and the analog DC current calculation unit 451.

[0034] The motor speed calculation unit 41 calculates a motor speed value based on a change in an angle sensor value in the motor 20 , and outputs the calculated motor speed value to the target current calculation unit 42 .

[0035] The control circuit 40 communicates with an electronic control device (not shown) provided outside the power conversion device 100 , receives a target torque of the motor 20 from the external electronic control device, and inputs the target torque to the target current calculation unit 42 .

[0036] The target current calculation unit 42 calculates the current value to be flowed to the motor 20 using the target torque, the voltage sensor value, and the motor speed value outputted from the motor speed calculation unit 41, and outputs the current value as a target current value to the duty ratio calculation unit 43. The target current value is expressed in the form of a d-axis target current value and a q-axis target current value, for example.

[0037] The duty cycle calculation unit 43 calculates the U-phase duty cycle value Du, the V-phase duty cycle value Dv and the W-phase duty cycle value Dw based on the target current value output by the target current calculation unit 42 and the AC current sensor values ​​Ius, Ivs, and Iws, and outputs them to the PWM signal generation unit 44 and the analog DC current calculation unit 451.

[0038] In this embodiment, the U-phase duty cycle value Du represents the conduction time ratio of the U-phase upper arm circuit power semiconductor, and the conduction time ratio of the U-phase lower arm circuit power semiconductor is represented by 1-Du. Similarly, the V-phase duty cycle value Dv represents the conduction time ratio of the V-phase upper arm circuit power semiconductor, and the conduction time ratio of the V-phase lower arm circuit power semiconductor is represented by 1-Dv. The W-phase duty cycle value Dw represents the conduction time ratio of the W-phase upper arm circuit power semiconductor, and the conduction time ratio of the W-phase lower arm circuit power semiconductor is represented by 1-Dw.

[0039] The PWM signal generating unit 44 has a timer (not shown) inside, generates a PWM (Pulse Wide Modulation) signal based on the timer value and the U-phase duty value Du, the V-phase duty value Dv, and the W-phase duty value Dw, and outputs the signal to the driving circuit 50 .

[0040] The PWM signal generating unit 44 controls the PWM signal so that when the abnormality notification signal is output from the power semiconductor diagnostic unit 45, the motor 20 is not driven. The state in which the motor 20 is not driven can be, for example, a state in which all six power semiconductors in the power conversion circuit 60 are set to be turned off (referred to as a freewheel state in this embodiment). As another example, a state in which three power semiconductors of the upper arm circuit among the six power semiconductors are set to be turned on and three power semiconductors of the lower arm circuit are set to be turned off (referred to as an upper arm active short-circuit state in this embodiment), or conversely, a state in which three power semiconductors of the upper arm circuit are set to be turned off and three power semiconductors of the lower arm circuit are set to be turned on (referred to as a lower arm active short-circuit state in this embodiment).

[0041] The drive circuit 50 receives the PWM signal output by the PWM signal generation unit 44 , and outputs a drive signal for switching the power semiconductor on and off to the power conversion circuit 60 .

[0042] The power conversion circuit 60 has a filter capacitor and six power semiconductors inside, and converts the DC power obtained from the DC power supply 10 into AC power to drive the motor 20 during power operation. In addition, the power of the motor 20 is converted into DC power to charge the DC power supply 10 during regeneration.

[0043] The power semiconductor diagnosis unit 45 performs fault diagnosis of the power semiconductor in the power conversion circuit 60. The analog DC current calculation unit 451 in the power semiconductor diagnosis unit 45 calculates the analog DC current value of each phase at the first fault based on the duty cycle values ​​Du, Dv, Dw and the AC current sensor values ​​Ius, Ivs, Iws of each phase, and outputs it to the fault determination unit 452.

[0044] The fault determination unit 452 uses the simulated DC current value of each phase at the time of the first fault, the DC current sensor value Idcs, the duty cycle values ​​Du, Dv, Dw of each phase, and the target torque to determine which part of the power semiconductor in the power conversion circuit 60 has a fault, and outputs the fault notification signal corresponding to the fault location to the fault notification device 30 and the PWM signal generation unit 44. In addition, the fault determination unit 452 distinguishes the target torque and identifies whether it is during power operation or regeneration. Specifically, the case where the target torque is positive refers to power operation, and the case where the target torque is negative refers to regeneration. As another identification method, it can be identified as power operation when the DC current sensor value Idcs is positive, and it can be identified as regeneration when the DC current sensor value Idcs is negative.

[0045] Figure 2 is a circuit structure diagram of the power conversion circuit 60 .

[0046] The power conversion circuit 60 has upper and lower arm series circuits of UVW phases. The U-phase upper and lower arm series circuit 61 is composed of a U-phase upper arm power semiconductor Tuu and a U-phase upper arm diode Duu, a U-phase lower arm power semiconductor Tul and a U-phase lower arm diode Dul. The V-phase upper and lower arm series circuit 62 is composed of a V-phase upper arm power semiconductor Tvu and a V-phase upper arm diode Dvu, a V-phase lower arm power semiconductor Tvl and a V-phase lower arm diode Dvl. The W-phase upper and lower arm series circuit 63 is composed of a W-phase upper arm power semiconductor Twu and a W-phase upper arm diode Dwu, a W-phase lower arm power semiconductor Twl and a W-phase lower arm diode Dwl.

[0047] The upper arm circuit 64 has a U-phase upper arm power semiconductor Tuu and a U-phase upper arm diode Duu, a V-phase upper arm power semiconductor Tvu and a V-phase upper arm diode Dvu, and a W-phase upper arm power semiconductor Twu and a W-phase upper arm diode Dwu. The lower arm circuit 65 has a U-phase lower arm power semiconductor Tul and a U-phase lower arm diode Dul, a V-phase lower arm power semiconductor Tvl and a V-phase lower arm diode Dvl, and a W-phase lower arm power semiconductor Twl and a W-phase lower arm diode Dwl. The power semiconductor is, for example, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), and the like.

[0048] The filter capacitor 66 filters the current generated by turning on and off the power semiconductor, and suppresses the ripple of the DC current supplied from the DC power supply 10 to the power conversion circuit 60. For example, an electrolytic capacitor or a film capacitor is used as the filter capacitor 66.

[0049] Figure 3 2 is a flowchart showing a power semiconductor failure determination process in the power semiconductor diagnosis unit 45 .

[0050] like Figure 3 As shown in step S10 , the power semiconductor diagnosis unit 45 obtains the AC current sensor values ​​Ius, Ivs, and Iws and the DC current sensor value Idcs.

[0051] In step S11, the simulated DC current calculation unit 451 calculates the simulated DC current value Idcu when the U phase is at the first fault, the simulated DC current value Idcv when the V phase is at the first fault, and the simulated DC current value Idcw when the W phase is at the first fault based on the following equations (1) to (3) according to the duty cycle values ​​Du, Dv, Dw of each phase and the AC current sensor values ​​Ius, Ivs, Iws, and outputs them to the fault judgment unit 452.

[0052] The simulated DC current at the first fault of phase U is Idcu=Dv×Ivs+Dw×Iws (1)

[0053] When the V phase fails for the first time, the simulated DC current Idcv=Du×Ius+Dw×Iws (2)

[0054] When the W phase fails for the first time, the simulated DC current Idcw=Du×Ius+Dv×Ivs (3)

[0055] In step S12, when the difference between the DC current sensor value Idcs and the U-phase first fault simulated DC current value Idcu is less than threshold 1, the fault determination unit 452 determines that the U-phase power semiconductor has failed. If a power semiconductor shutdown fixed fault occurs, the first fault simulated DC current of the phase is substantially equal to the actual DC current value during the time period when the current flows through the faulty power semiconductor. Threshold 1 is set to a value at which this relationship holds. Thus, it is possible to determine in which phase the fault has occurred.

[0056] In step S13 , the failure determination unit 452 determines whether the electric motor 20 is in the power running state or the regeneration state based on the input target torque and the like.

[0057] When it is determined to be in the power running state, proceed to step S14, in which the fault determination unit 452 determines whether the U-phase duty cycle value Du is greater than the threshold value 2. When the U-phase duty cycle value Du is greater than the threshold value 2, it is determined in step S16 that the U-phase upper arm circuit power semiconductor is shut off and fixed fault. When the U-phase duty cycle value Du is not greater than the threshold value 2, it is determined in step S17 that the U-phase lower arm circuit power semiconductor is shut off and fixed fault. If the U-phase duty cycle value Du is in the range of 0 to 1, the threshold value 2 is set to 0.5, for example. Thus, it is determined to which of the upper arm circuit and the lower arm circuit the current is to flow.

[0058] If it is determined in step S13 that it is in the regeneration state, the process proceeds to step S15, in which the fault determination unit 452 determines whether the U-phase duty cycle value Du is below the threshold value 2. If the U-phase duty cycle value Du is below the threshold value 2, it is determined in step S16 that the U-phase upper arm circuit power semiconductor is shut down and fixed. If the U-phase duty cycle value Du is not below the threshold value 2, it is determined in step S17 that the U-phase lower arm circuit power semiconductor is shut down and fixed.

[0059] In step S18 , the fault determination unit 452 outputs a fault notification signal corresponding to the fault location to the PWM signal generation unit 44 and the fault notification device 30 .

[0060] As a result, the current does not flow through the faulty power semiconductor, so when the current is made to flow through the faulty part, the DC current becomes almost equal to the simulated DC current of the faulty phase during the first fault. At this time, it is known which of the upper and lower arms is turned on based on the duty cycle value of the faulty phase, so the faulty parts of the upper and lower arms can be determined based on the duty cycle. In addition, the voltage (i.e., the duty cycle) is in the same phase as the current during power operation, so the time period when the duty cycle is greater than the threshold value of 0.5 is consistent with the time period when the current is made to flow through the upper arm. On the other hand, during regeneration, the voltage (i.e., the duty cycle) is 180° out of phase with the current, so the time period when the duty cycle is less than the threshold value of 0.5 is consistent with the time period when the current is made to flow through the upper arm.

[0061] Steps S22 to S27 show a failure determination process of the V phase, and steps S32 to S37 show a failure determination process of the W phase.

[0062] In step S12, if the difference between the DC current sensor value Idcs and the U-phase first fault simulated DC current value Idcu is less than threshold 1, the process proceeds to step S22. In step S22, when the difference between the DC current sensor value Idcs and the V-phase first fault simulated DC current value Idcv is less than threshold 1, the fault determination unit 452 determines that a fault has occurred in the power semiconductor of the V-phase. Hereinafter, steps S22 to S27 are the same as the fault determination process of the U-phase, i.e., steps S12 to S17, and therefore their description is omitted.

[0063] In step S22, if the difference between the DC current sensor value Idcs and the V-phase first fault simulated DC current value Idcv is less than threshold 1, the process proceeds to step S32. In step S32, when the difference between the DC current sensor value Idcs and the W-phase first fault simulated DC current value Idcw is less than threshold 1, the fault determination unit 452 determines that a fault has occurred in the W-phase power semiconductor. Hereinafter, steps S32 to S37 are the same as the U-phase fault determination process, i.e., steps S12 to S17, and therefore their description is omitted.

[0064] In step S32, if the difference between the DC current sensor value Idcs and the W-phase first fault-time simulated DC current value Idcw is smaller than threshold 1, the fault determination unit 452 proceeds to step S39. In step S39, it is determined that the power semiconductor is not in a turn-off fixed fault.

[0065] Figure 4 : is a flowchart showing the failure handling process of the PWM signal generating unit 44 .

[0066] The PWM signal generation unit 44 receives the fault notification signal from the fault determination unit 452 and starts the fault response process. Figure 3 Step S18 receives the fault notification signal, Figure 4 In step S40, when it is determined that an upper arm shutdown fixed failure has occurred in any one of the U phase, the V phase, and the W phase, the process proceeds to step S41.

[0067] In step S41, a PWM signal for a freewheeling state or a lower arm active short-circuit state is generated. Since the power semiconductor of the upper arm circuit cannot be turned on due to a failure, the upper arm circuit cannot be set to an active short-circuit state.

[0068] In step S42 , when it is determined that a lower arm shut-off fixed failure has occurred in any one of the U-phase, the V-phase, and the W-phase, the process proceeds to step S43 .

[0069] In step S43, a PWM signal for a freewheeling state or an upper arm active short-circuit state is generated. Since the power semiconductor of the lower arm circuit cannot be turned on due to a failure, the lower arm circuit cannot be set to an active short-circuit state.

[0070] If no fault occurs in step S40 or step S42 , the process proceeds to step S44 . In step S44 , since no fault occurs, the PWM signal generator 44 continues the PWM operation, generates PWM signals corresponding to the duty values ​​Du, Dv, and Dw of each phase, and outputs them to the drive circuit 50 .

[0071] Figure 5 (A) Figure 5 (B) Figure 5 (C) is a graph of AC current, duty cycle, and DC current when a U-phase upper arm circuit has a shutoff fault during power operation.

[0072] Figure 5 (A) shows the alternating current, Figure 5 (B) shows the duty cycle, Figure 5 (C) shows the direct current, and the horizontal axis of each curve is time. At time t, it is shown that during power running, a U-phase upper arm circuit has a shut-off fixed fault.

[0073] like Figure 5 As shown in (A), at time t, a fault that causes the U-phase upper arm circuit to be turned off and fixed occurs, so the AC current sensor value Ius flowing in the U-phase becomes zero. Figure 5 As shown in (C), when the U-phase first fault occurs, the simulated DC current value Idcu is close to the DC current sensor value Idcs. In this time period, Figure 3 As shown in step S13, it is determined that the difference between the DC current sensor value Idcs and the simulated DC current value Idcu at the time of the first fault of the U phase is less than the threshold value 1. Then, in this time period, as Figure 5 As shown in (B), the duty cycle value Du of the U phase exceeds 0.5. Figure 3 As shown in step S14, it is determined that the U-phase duty ratio value Du is greater than the threshold value 2. As a result, Figure 3 In step S16, it is determined that the U-phase upper arm circuit power semiconductor has a fixed-off fault.

[0074] [Implementation Method 2]

[0075] Figure 6 2 is a circuit configuration diagram of a power conversion device 200 according to the second embodiment.

[0076] The power conversion device 200 according to the second embodiment and Figure 1 Compared with the power conversion device 100 according to the first embodiment, the DC current sensor 80 is not provided, and the power semiconductor diagnosis unit 46 is different. The same parts as those of the power conversion device 100 according to the first embodiment are denoted by the same reference numerals and their description is omitted. The different parts are described below.

[0077] The simulated DC current calculation unit 461 of the power semiconductor diagnosis unit 46 calculates the first fault simulated DC current of each phase based on the equations (1) to (3) shown in the first embodiment. In addition, the normal simulated DC current value is calculated using the duty ratios Du, Dv, Dw of each phase and the AC current sensor values ​​Ius, Ivs, and Iws of each phase. That is, the DC current in normal time can be calculated using the following equation (4), so the value calculated by the equation (4) can be used instead of the DC current sensor.

[0078] DC current = (Du×Ius)+(Dv×Ivs)+(Dv×Iws)(4)

[0079] Here, Du: U-phase duty ratio, Dv: V-phase duty ratio, Dw: W-phase duty ratio, Ius: U-phase AC current sensor value, Ivs: V-phase AC current sensor value, and Iws: W-phase AC current sensor value.

[0080] The simulated DC current calculation unit 461 outputs the calculated DC current to the fault determination unit 462. The fault determination unit 462 uses the simulated DC current value of each phase during the first fault, the simulated DC current value during normal operation, the duty cycle values ​​Du, Dv, Dw of each phase, and the target torque to determine which part of the power semiconductor in the power conversion circuit 60 has a fault, and outputs the fault notification signal corresponding to the fault location to the fault notification device 30 and the PWM signal generation unit 44. In addition, the fault determination unit 462 distinguishes the target torque and identifies whether it is during power operation or regeneration. Specifically, the case where the target torque is positive refers to power operation, and the case where the target torque is negative refers to regeneration. As another identification method, when the simulated DC current calculated by the simulated DC current calculation unit 461 during normal operation is positive, it can be identified as power operation, and when the simulated DC current calculated by the simulated DC current calculation unit 461 during normal operation is negative, it can be identified as regeneration.

[0081] Figure 7 2 is a flowchart showing a power semiconductor failure determination process in the power semiconductor diagnosis unit 46 .

[0082] In the fault determination process in the power semiconductor diagnosis unit 46 according to the second embodiment, Figure 3 In the flowchart showing the failure determination process according to the first embodiment, the same parts are denoted by the same reference numerals and their description is omitted, and the different parts are described below.

[0083] like Figure 7 As shown in step S10', the power semiconductor diagnosis unit 46 obtains the AC current sensor values ​​Ius, Ivs, and Iws.

[0084] In step S11', the simulated DC current calculation unit 461 calculates the simulated DC current value Idcu of the U phase at the first fault, the simulated DC current value Idcv of the V phase at the first fault, and the simulated DC current value Idcw of the W phase at the first fault based on the duty cycle values ​​Du, Dv, Dw of each phase and the AC current sensor values ​​Ius, Ivs, Iws of each phase based on equations (1) to (3), and outputs them to the fault determination unit 462. In addition, the DC current at normal time, i.e., the simulated DC current at normal time Idce, is calculated based on equation (4) and outputted to the fault determination unit 462.

[0085] In step S12', when the difference between the normal simulated DC current Idec and the U-phase first fault simulated DC current value Idcu is less than threshold 1, the fault determination unit 462 determines that the U-phase power semiconductor has failed. If a power semiconductor shutdown fixed fault occurs, the first fault simulated DC current of the phase is substantially equal to the actual DC current value during the time period when the current flows through the faulty power semiconductor. Threshold 1 is set to a value that satisfies this relationship. Thus, it is possible to determine in which phase the fault has occurred.

[0086] In step S13, the fault determination unit 462 determines whether the motor 20 is in the power running state or the regeneration state based on the input target torque and the like. Figure 3 The flowchart showing the failure determination process according to the first embodiment is the same.

[0087] In step S12', if the difference between the normal simulated DC current Idce and the U-phase first fault simulated DC current value Idcu is less than threshold 1, the process proceeds to step S22'. In step S22', when the difference between the normal simulated DC current Idce and the V-phase first fault simulated DC current value Idcv is less than threshold 1, the fault determination unit 462 determines that a fault has occurred in the power semiconductor of the V-phase. Hereinafter, steps S23 to S27 are the same as the U-phase fault determination processing steps S13 to S17, and therefore their description is omitted.

[0088] In step S22', if the difference between the normal simulated DC current Idce and the V phase first fault simulated DC current value Idcv is less than threshold 1, the process proceeds to step S32'. In step S32', when the difference between the normal simulated DC current Idce and the W phase first fault simulated DC current value Idcw is less than threshold 1, the fault determination unit 462 determines that the power semiconductor of the W phase has failed. Hereinafter, steps S33 to S37 are the same as the U phase fault determination processing steps S13 to S17, so their description is omitted.

[0089] In step S32', if the difference between the normal-time simulated DC current Idce and the W-phase first fault-time simulated DC current value Idcw is smaller than threshold 1, the fault determination unit 462 proceeds to step S39. In step S39, it is determined that the power semiconductor does not have a turn-off stuck fault.

[0090] [Implementation method 3]

[0091] Figure 8 1 is a circuit configuration diagram of a power conversion device 300 according to the third embodiment.

[0092] The power conversion device 300 according to the third embodiment and Figure 1 The power semiconductor diagnosis unit 47 in the power conversion device 100 according to the first embodiment shown is different. The same reference numerals are used to denote the same parts as those in the power conversion device 100 according to the first embodiment, and the description thereof is omitted. The different parts will be described below.

[0093] The simulated DC current calculation unit 471 of the power semiconductor diagnosis unit 47 calculates the first fault-time simulated DC current of each phase based on equations (1) to (3) shown in Embodiment 1. In addition, the second fault-time simulated DC current of each phase is calculated based on the following equations (5) to (7).

[0094] The simulated DC current at the second fault of phase U is Idcu2 = K × Ius + Dv × Ivs + Dw × Iws (5)

[0095] The simulated DC current at the second fault of phase V is Idcv2 = Du × Ius + K × Ivs + Dw × Iws (6)

[0096] The simulated DC current at the second fault of phase W is Idcw2 = Du × Ius + Dv × Ivs + K × Iws (7)

[0097] Here, Du: U-phase duty cycle, Dv: V-phase duty cycle, Dw: W-phase duty cycle, Ius: U-phase AC current sensor value, Ivs: V-phase AC current sensor value, Iws: W-phase AC current sensor value, and K is a coefficient. The coefficient K is set within the range of 0<K≤1. The first fault simulated DC current of equations (1) to (3) shown in Implementation 1 is equivalent to the case where equations (5) to (7) are calculated with K=0. In order to avoid erroneous detection during normal times, it is preferred that K is set to a value significantly different from 0 (for example, K=1).

[0098] The first fault-time simulated DC current and the second fault-time simulated DC current of each phase calculated by the simulated DC current calculation unit 471 are output to the fault determination unit 472 .

[0099] The fault judgment unit 472 uses the simulated DC current value of each phase during the first fault, the simulated DC current value of each phase during the second fault, the DC current sensor value Idcs, the duty cycle value Du, Dv, Dw of each phase and the target torque to determine which part of the power semiconductor in the power conversion circuit 60 has failed, and outputs a fault notification signal corresponding to the fault location to the fault notification device 30 and the PWM signal generating unit 44.

[0100] In this embodiment, the fault determination unit 472 determines whether the difference between the DC current sensor value Idcs and the first fault simulated DC current value is smaller than threshold 1 and whether the difference between the DC current sensor value Idcs and the second fault simulated DC current value is smaller than threshold 1.

[0101] Since the current does not flow through the faulty power semiconductor, the simulated DC current and the DC current at the second fault using the AC current of all three phases are also equal. Therefore, the fault location can be determined even if the simulated DC current at the second fault is additionally used. In the case where only the difference between the DC current sensor value Idcs and the simulated DC current value at the first fault is determined, the simulated DC current value at the first fault other than the timing fault phase with a small duty cycle (duty cycle ≈ 0) is similar to the DC current, so it is possible to induce false detection of the fault. In contrast, in the present embodiment, by determining whether the difference between the DC current sensor value Idcs and the simulated DC current value at the first fault is less than the threshold value 1, and whether the difference between the DC current sensor value Idcs and the simulated DC current value at the second fault is less than the threshold value 1, the false detection of the fault can be eliminated.

[0102] Fig. 9 2 is a flowchart showing a power semiconductor failure determination process in the power semiconductor diagnosis unit 47 .

[0103] In the fault determination process in the power semiconductor diagnosis unit 47 according to the third embodiment, Figure 3 In the flowchart showing the failure determination process according to the first embodiment, the same parts are denoted by the same reference numerals and their description is omitted, and the different parts are described below.

[0104] Fig. 9In step S10, the power semiconductor diagnosis unit 45 obtains the AC current sensor values ​​Ius, Ivs, Iws and the DC current sensor value Idcs. In step S11", the analog DC current calculation unit 471 calculates the analog DC current value Idcu when the U phase is at the first fault, the analog DC current value Idcv when the V phase is at the first fault, and the analog DC current value Idcw when the W phase is at the first fault based on the duty cycle values ​​Du, Dv, Dw and the AC current sensor values ​​Ius, Ivs, Iws, and outputs them to the fault judgment unit 472. In addition, the analog DC current calculation unit 471 calculates the analog DC current value Idcu2 when the U phase is at the second fault, the analog DC current value Idcv2 when the V phase is at the second fault, and the analog DC current value Idcw2 when the W phase is at the second fault based on equations (5) to (7), and outputs them to the fault judgment unit 472.

[0105] In step S12", when the difference between the DC current sensor value Idcs and the simulated DC current value Idcu at the time of the first fault of the U phase is less than threshold 1, and the difference between the DC current sensor value Idcs and the simulated DC current value Idcu2 at the time of the second fault of the U phase is less than threshold 1, the fault judgment unit 472 determines that a fault has occurred in the power semiconductor of the U phase.

[0106] In step S13, the failure determination unit 462 determines whether the motor 20 is in the power running state or the regeneration state based on the input target torque and the like. Figure 3 The flowchart showing the failure determination process according to the first embodiment is the same.

[0107] In step S12", when the difference between the DC current sensor value Idcs and the simulated DC current value Idcu when the U phase has the first fault is less than threshold 1, and the difference between the DC current sensor value Idcs and the simulated DC current value Idcu2 when the U phase has the second fault is less than threshold 1, the fault judgment unit 472 proceeds to the processing of step S22". In step S22", when the difference between the DC current sensor value Idcs and the simulated DC current value Idcv when the V phase has the first fault is less than threshold 1, and the difference between the DC current sensor value Idcs and the simulated DC current value Idcv2 when the V phase has the second fault is less than threshold 1, the fault judgment unit 472 determines that a fault has occurred in the power semiconductor of the V phase. Hereinafter, steps S23 to S27 are the same as the fault judgment processing steps S13 to S17 of the U phase, and therefore their description is omitted.

[0108] In step S22", when the difference between the DC current sensor value Idcs and the simulated DC current value Idcv when the V phase has the first fault is less than threshold 1, and the difference between the DC current sensor value Idcs and the simulated DC current value Idcv2 when the V phase has the second fault is less than threshold 1, the process proceeds to step S32". In step S32", when the difference between the DC current sensor value Idcs and the simulated DC current value Idcw when the W phase has the first fault is less than threshold 1, and the difference between the DC current sensor value Idcs and the simulated DC current value Idcw2 when the W phase has the second fault is less than threshold 1, the fault judgment unit 472 judges that a fault has occurred in the power semiconductor of the W phase. Hereinafter, steps S33 to S37 are the same as the fault judgment processing steps S13 to S17 of the U phase, and therefore their description is omitted.

[0109] In step S32", when the difference between the DC current sensor value Idcs and the simulated DC current value Idcw during the first fault of the W phase is less than threshold 1, and the difference between the DC current sensor value Idcs and the simulated DC current value Idcw2 during the second fault of the W phase is less than threshold 1, the fault judgment unit 462 proceeds to step S39. In step S39, it is determined that the power semiconductor does not have a fixed shutoff fault.

[0110] [Implementation Method 4]

[0111] The power conversion device 100 according to the fourth embodiment and Figure 1 The power conversion device 100 according to the illustrated embodiment 1 is the same, and therefore the same reference numerals are used to designate the same parts, and description thereof will be omitted.

[0112] Fig.10 1 is a flowchart showing a power semiconductor failure determination process in this embodiment. Figure 3 The flowchart showing the fault determination process according to the first embodiment is different from the flowchart shown in FIG. Figure 3 In the flowchart showing the failure determination process according to the first embodiment, the same parts are denoted by the same reference numerals and their description is omitted, and the different parts are described below.

[0113] In implementation mode 1, Figure 3 In step S12, it is determined whether the difference between the DC current sensor value Idcs and the simulated DC current value Idcu at the time of the first fault of the U phase is less than a threshold value 1. Fig.10In step S12'', it is determined whether the state in which the difference between the DC current sensor value Idcs and the simulated DC current value Idcu at the first fault of the U phase is less than the threshold value 1 continues for more than a specified time. Even if there is no fault in the power semiconductor, when the AC current of a phase is 0, the DC current sensor value is consistent with the simulated DC current value of the phase at the first fault, so there is a possibility of false detection of the fault. Therefore, in the present embodiment, the fault is detected when the state in which the difference between the DC current sensor value Idcs and the simulated DC current value Idcu at the first fault of the U phase is less than the threshold value 1 continues for more than a specified time, thereby avoiding false detection of the fault.

[0114] exist Fig.10 In step S22''', it is determined whether the state in which the difference between the DC current sensor value Idcs and the V-phase first fault simulated DC current value Idcv is less than the threshold value 1 continues for more than a predetermined time.

[0115] exist Fig.10 In step S32'', it is determined whether the state in which the difference between the DC current sensor value Idcs and the W-phase first fault simulated DC current value Idcw is less than the threshold value 1 continues for more than a predetermined time.

[0116] [Implementation method 5]

[0117] The power conversion device 300 according to the fifth embodiment and Figure 8 The power conversion device 300 according to the third embodiment shown is the same, and therefore the same reference numerals are used to designate the same parts, and description thereof will be omitted.

[0118] Fig.11 is a flowchart showing a power semiconductor failure determination process in this embodiment. Fig. 9 The flowchart showing the fault determination process according to the third embodiment is different from the flowchart shown in FIG. Fig. 9 In the flowchart showing the failure determination process according to the third embodiment, the same parts are denoted by the same reference numerals and their description is omitted, and the different parts are described below.

[0119] In implementation mode 3, Fig. 9 In step S12", it is determined whether the difference between the DC current sensor value Idcs and the simulated DC current value Idcu at the time of the first fault of the U phase is less than a threshold value 1, and whether the difference between the DC current sensor value Idcs and the simulated DC current value Idcu2 at the time of the second fault of the U phase is less than a threshold value 1. In this embodiment, Fig.11In step S12””, it is determined whether the difference between the simulated DC current value Idcu during the first fault of the U phase and the simulated DC current value Idcu2 during the second fault of the U phase is less than threshold 1. In implementation mode 3, when the conditions that the difference between the DC current sensor value Idcs and the simulated DC current value Idcu during the first fault of the U phase is less than threshold 1, and the difference between the DC current sensor value Idcs and the simulated DC current value Idcu2 during the second fault of the U phase is less than threshold 1 are met, the difference between the simulated DC current value Idcu during the first fault of the U phase and the simulated DC current value Idcu2 during the second fault of the U phase also converges within the specified range. Therefore, by setting it as the judgment condition of this implementation mode, the judgment condition can be simplified compared with implementation mode 3, and the judgment equivalent to the judgment condition of implementation mode 3 can be performed.

[0120] exist Fig.11 In step S22””, it is determined whether the difference between the simulated DC current value Idcv at the time of the first fault of the V phase and the simulated DC current value Idcv2 at the time of the second fault of the V phase is less than a threshold value 1.

[0121] exist Fig.11 In step S32””, it is determined whether the difference between the simulated DC current value Idcw at the time of the first fault of the W phase and the simulated DC current value Idcw2 at the time of the second fault of the W phase is less than the threshold value 1.

[0122] According to the above-described embodiment, the following effects can be obtained.

[0123] (1) The power conversion device 100 includes: a power conversion circuit 60, which corresponds to each phase of the multi-phase motor 20, is composed of an upper arm circuit and a lower arm circuit, and converts a DC current into a multi-phase AC current; a control circuit 40, which outputs a PWM signal to the upper arm circuit and the lower arm circuit; a simulated DC current calculation unit 451, which calculates a first fault-time simulated DC current based on the AC current value of the remaining phases when one phase of the multi-phase fails, based on the AC current output by the power conversion circuit 60 and the duty ratio of the PWM signal; and a fault determination unit 452, which detects a fault in the upper arm circuit or the lower arm circuit of any phase based on the DC current input to the power conversion circuit 60 or the DC current according to the AC current value output from the power conversion circuit 60, the duty ratio of the PWM signal, and the first fault-time simulated DC current. Thus, it is possible to determine which part of the power semiconductor constituting the upper arm circuit and the lower arm circuit has failed.

[0124] (2) In the control method of the power conversion device 100, the power conversion circuit 60 is composed of an upper arm circuit and a lower arm circuit corresponding to each phase of the multi-phase motor 20, and a DC current is converted into a multi-phase AC current, and a PWM signal is output to the upper arm circuit and the lower arm circuit. Based on the AC current output by the power conversion circuit 60 and the duty ratio of the PWM signal, a first fault-time simulated DC current based on the AC current value of the remaining phases when one phase of the multi-phase fails is calculated, and based on the DC current input to the power conversion circuit 60 or the DC current according to the AC current value output from the power conversion circuit 60, the duty ratio of the PWM signal, and the first fault-time simulated DC current, a fault of the upper arm circuit or the lower arm circuit of any phase is detected. Thus, it is possible to determine which part of the power semiconductor constituting the upper arm circuit and the lower arm circuit has failed.

[0125] (Variation Example)

[0126] The present invention can be implemented by modifying the above-described first to fifth embodiments as follows.

[0127] (1) The motor 20 has been described as a three-phase motor having three windings therein, but the motor is not limited to three-phase and may be a multi-phase motor. In this case, a failure in an upper arm circuit or a lower arm circuit of any phase can be detected.

[0128] (2) The power conversion device 100 has an AC current sensor 90 corresponding to three phases, but may have only two phases. In this case, the AC current of the remaining one phase can be calculated by using the fact that the sum of the AC currents of the three phases is 0, and similarly to the case of having an AC current sensor 90 corresponding to three phases, a fault in the upper arm circuit or the lower arm circuit of any phase can be detected.

[0129] The present invention is not limited to the above-described embodiments, and other embodiments that can be considered within the technical concept of the present invention are also included in the scope of the present invention as long as the features of the present invention are not impaired. In addition, a configuration combining the above-described embodiments is also possible.

[0130] Description of symbols

[0131] 10 DC power supply

[0132] 20 Electric Motor

[0133] 40 Control circuit

[0134] 41 Motor speed calculation unit

[0135] 42 Target current calculation unit

[0136] 43 Duty cycle calculation unit

[0137] 44 PWM signal generation unit

[0138] 45 Power Semiconductor Diagnosis Department

[0139] 50 drive circuit

[0140] 60 Power conversion circuit

[0141] 100 Power conversion device

[0142] 451 Analog DC current calculation unit

[0143] 452 Fault determination unit.

Claims

1. A power conversion device, characterized in that: include: A power conversion circuit, which is composed of an upper arm circuit and a lower arm circuit corresponding to each phase of the multi-phase motor and converts a direct current into a multi-phase alternating current; a control circuit, the control circuit outputting a PWM signal to the upper arm circuit and the lower arm circuit; a simulated DC current calculation unit that calculates a first fault-time simulated DC current based on the AC current values ​​of the remaining phases when one phase among the multiple phases fails, based on the AC current output by the power conversion circuit and the duty ratio of the PWM signal; as well as a fault determination unit for detecting a fault of the upper arm circuit or the lower arm circuit of any phase based on a DC current input to the power conversion circuit or a DC current according to an AC current value output from the power conversion circuit, a duty ratio of the PWM signal, and the first fault-time simulated DC current, When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below a specified value, the fault judgment unit determines which of the upper arm circuit and the lower arm circuit of the phase has a fault based on the relationship between the duty cycle of the phase and a threshold value, depending on whether the motor is in power operation or regeneration.

2. The power conversion device according to claim 1, characterized in that: A DC current sensor is provided for measuring the DC current input to the power conversion circuit. The failure determination unit detects a failure of the upper arm circuit or the lower arm circuit of an arbitrary phase based on the DC current measured by the DC current sensor.

3. The power conversion device according to claim 1, characterized in that: The simulated DC current calculation unit calculates the DC current according to the AC current value output from the power conversion circuit based on the AC current value output from the power conversion circuit and the duty ratio of the PWM signal, The failure determination unit detects a failure of the upper arm circuit or the lower arm circuit of an arbitrary phase based on the calculated DC current.

4. The power conversion device according to any one of claims 1 to 3, characterized in that: The simulated DC current calculation unit calculates a second fault-time simulated DC current based on all AC current values ​​of the multi-phases, and detects a fault in the upper arm circuit and the lower arm circuit of any phase based on the first fault-time simulated DC current and the second fault-time simulated DC current.

5. The power conversion device according to any one of claims 1 to 3, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below a specified value, if the duty cycle of the phase is above the threshold during power operation of the motor, or the duty cycle of the phase is below the threshold during regeneration of the motor, the fault judgment unit determines that a fault has occurred in the upper arm circuit of the phase.

6. The power conversion device according to claim 5, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below a specified value for more than a specified time, if the duty cycle of the phase is above the threshold during power operation of the motor, or is below the threshold during regeneration of the motor, the fault judgment unit determines that a fault has occurred in the upper arm circuit of the phase.

7. The power conversion device according to claim 5, characterized in that: When the fault judgment unit determines that a fault has occurred in the upper arm circuit, the control circuit outputs the PWM signal to turn off all power semiconductors of the upper arm circuit and the lower arm circuit constituting the power conversion circuit, or to turn on all power semiconductors of the lower arm circuit constituting the power conversion circuit.

8. The power conversion device according to any one of claims 1 to 3, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below a specified value, if the duty cycle of the phase is below the threshold value during power operation of the motor, or the duty cycle of the phase is above the threshold value during regeneration of the motor, the fault judgment unit determines that a fault has occurred in the lower arm circuit of the phase.

9. The power conversion device according to claim 8, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below a specified value for more than a specified time, if the duty cycle of the phase is below the threshold value during power operation of the motor, or the duty cycle of the phase is above the threshold value during regeneration of the motor, the fault judgment unit determines that a fault has occurred in the lower arm circuit of the phase.

10. The power conversion device according to claim 8, characterized in that: When the fault judgment unit determines that a fault has occurred in the lower arm circuit, the control circuit outputs the PWM signal for turning off all the power semiconductors of the upper arm circuit and the lower arm circuit constituting the power conversion circuit, or outputs the PWM signal for turning on all the power semiconductors of the upper arm circuit constituting the power conversion circuit.

11. A control method for a power conversion device, characterized in that: The power conversion circuit corresponding to each phase of the multi-phase motor is composed of an upper arm circuit and a lower arm circuit, which converts the DC current into a multi-phase AC current. outputting a PWM signal to the upper arm circuit and the lower arm circuit, calculating a first fault-time simulated DC current based on the AC current values ​​of the remaining phases when one phase among the multiple phases fails, based on the AC current output by the power conversion circuit and the duty ratio of the PWM signal; detecting a fault of the upper arm circuit or the lower arm circuit of any phase based on a DC current input to the power conversion circuit or a DC current according to an AC current value output from the power conversion circuit, a duty ratio of the PWM signal, and the first fault-time simulated DC current, When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below a specified value, it is determined which of the upper arm circuit and the lower arm circuit of the phase has a fault based on the relationship between the duty cycle of the phase and the threshold value, depending on whether the motor is in power operation or regeneration.

12. The control method of the power conversion device according to claim 11, characterized in that: A DC current sensor is provided for measuring the DC current input to the power conversion circuit. A failure of the upper arm circuit or the lower arm circuit of any phase is detected based on the DC current measured by the DC current sensor.

13. The control method of the power conversion device according to claim 11, characterized in that: calculating the direct current according to the alternating current value output from the power conversion circuit based on the alternating current value output from the power conversion circuit and the duty ratio of the PWM signal, A failure of the upper arm circuit or the lower arm circuit of any phase is detected based on the calculated DC current.

14. The control method of a power conversion device according to any one of claims 11 to 13, characterized in that: A second fault-time simulated DC current based on all the AC current values ​​of the multi-phases is calculated, and a fault of the upper arm circuit and the lower arm circuit of any phase is detected based on the first fault-time simulated DC current and the second fault-time simulated DC current.

15. The control method of a power conversion device according to any one of claims 11 to 13, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below the specified value, if the duty cycle of the phase is above the threshold during power operation of the motor, or is below the threshold during regeneration of the motor, it is determined that a fault has occurred in the upper arm circuit of the phase.

16. The control method of the power conversion device according to claim 15, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below the specified value for more than the specified time, if the duty cycle of the phase is above the threshold during power operation of the motor, or is below the threshold during regeneration of the motor, it is determined that a fault has occurred in the upper arm circuit of the phase.

17. The control method of the power conversion device according to claim 15, characterized in that: When it is determined that the upper arm circuit has failed, the PWM signal is output to turn off all power semiconductors of the upper arm circuit and the lower arm circuit constituting the power conversion circuit, or to turn on all power semiconductors of the lower arm circuit constituting the power conversion circuit.

18. The control method of a power conversion device according to any one of claims 11 to 13, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below the specified value, if the duty cycle of the phase is below the threshold during power operation of the motor, or the duty cycle of the phase is above the threshold during regeneration of the motor, it is determined that a fault has occurred in the lower arm circuit of the phase.

19. The control method of the power conversion device according to claim 18, characterized in that: When the difference between the DC current and the simulated DC current during the first fault of a certain phase is below the specified value for more than the specified time, if the duty cycle of the phase is below the threshold value during power operation of the motor, or the duty cycle of the phase is above the threshold value during regeneration of the motor, it is determined that a fault has occurred in the lower arm circuit of the phase.

20. The control method of the power conversion device according to claim 18, characterized in that: When it is determined that a fault has occurred in the lower arm circuit, the PWM signal is output to turn off all the power semiconductors of the upper arm circuit and the lower arm circuit constituting the power conversion circuit, or the PWM signal is output to turn on all the power semiconductors of the upper arm circuit constituting the power conversion circuit.

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