Doherty amplifier and communication device

Abstract

The invention comprises: a carrier amplifier (17) for amplifying a first signal and outputting the amplified first signal; a peak amplifier (18) having a nonlinear output capacitor, for amplifying a second signal and outputting the amplified second signal; a first output circuit (19) for transmitting the first signal outputted from the carrier amplifier (17); a second output circuit (20) for functioning as a virtual short-circuit stub when the peak amplifier (18) is not performing an amplification operation and transmitting the second signal outputted from the peak amplifier (18); and a synthesizing circuit (24) for synthesizing the first signal transmitted by the first output circuit (19) and the second signal transmitted by the second output circuit (20) and outputting a synthesized signal of the first signal and the second signal, wherein when the peak amplifier (18) is performing an amplification operation, the second output circuit (20) changes the impedance of the synthesizing circuit (24) when viewed from the peak amplifier (18) to an impedance in the inductive region.

Description

Technical Field

[0001] The invention relates to a Doherty amplifier and a communication device. Background Art

[0002] In a general Doherty amplifier in which the saturated output power of the carrier amplifier is the same as the saturated output power of the peak amplifier, based on the operating principle, the efficiency peak point when outputting a power lower than the saturated output power appears at a point that is 6 dB back-off from the saturated output power.

[0003] Patent Document 1 below discloses a Doherty amplifier in which an efficiency peak point appears when the back-off from the saturated output power is greater than 6 dB, thereby improving the efficiency when the signal level of the input signal is small.

[0004] In the Doherty amplifier disclosed in Patent Document 1, a first phase line is connected to the output side of a carrier amplifier.

[0005] Furthermore, in the Doherty amplifier disclosed in Patent Document 1, the second phase line is connected to the input side of the peak amplifier, and the third phase line is connected to the output side of the peak amplifier.

[0006] In the Doherty amplifier disclosed in Patent Document 1, when the signal level of the input signal is low, the electrical lengths of the first phase line and the third phase line are set so that the impedance when the output side is viewed from the impedance reference point on the output side of the carrier amplifier becomes 2R+α. In addition, the electrical length of the second phase line is set to the difference between the electrical length of the first phase line and the electrical length of the third phase line. R is a load resistance, and α is a positive value.

[0007] Prior art literature

[0008] Patent Literature

[0009] Patent Document 1: International Publication No. 2007 / 015462 Summary of the invention

[0010] Problems to be solved by the invention

[0011] When the peak amplifier disclosed in Patent Document 1 outputs power lower than the saturated output power, the impedance when the output synthesis point is viewed from the peak amplifier becomes the impedance of the capacitive region. In addition, the capacitive component of the impedance that becomes the capacitive region further increases according to the output capacitance of the peak amplifier, and the distance from the real axis increases.

[0012] Therefore, when the peak amplifier disclosed in Patent Document 1 outputs a power lower than the saturated output power, there is a problem that the efficiency of the Doherty amplifier may deteriorate.

[0013] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a Doherty amplifier and a communication device capable of preventing efficiency degradation when a peak amplifier outputs power lower than saturation output power.

[0014] Means for solving problems

[0015] The Doherty amplifier of the present invention comprises: a carrier amplifier, which amplifies a first signal and outputs the amplified first signal; a peak amplifier, which has a nonlinear output capacitance, amplifies a second signal and outputs the amplified second signal; a first output circuit, which transmits the first signal output from the carrier amplifier; a second output circuit, which functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits the second signal output from the peak amplifier; and a synthesis circuit, which synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal. When the peak amplifier performs an amplification operation, the second output circuit changes the impedance of the synthesis circuit when viewed from the peak amplifier to an impedance in the inductive region, and the peak amplifier reduces the inductive component of the impedance of the synthesis circuit when viewed from the peak amplifier based on its own nonlinear output capacitance.

[0016] Effects of the Invention

[0017] According to the present invention, the Doherty amplifier is configured such that when the peak amplifier performs an amplification operation, the second output circuit changes the impedance of the synthesizing circuit as viewed from the peak amplifier to an impedance in the inductive region. Therefore, the Doherty amplifier of the present invention can prevent efficiency degradation when the peak amplifier outputs power lower than the saturation output power. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 1 is a diagram showing a configuration of a communication device including the Doherty amplifier 1 according to the first embodiment.

[0019] Figure 2 1 is a diagram showing the configuration of the Doherty amplifier 1 according to the first embodiment.

[0020] Figure 3 It is an explanatory diagram showing the operation of the Doherty amplifier 1 during fallback.

[0021] Figure 4 It is an explanatory diagram showing a load change during the fallback operation of the Doherty amplifier 1 .

[0022] Figure 5 1 is an explanatory diagram showing the operation of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power.

[0023] Figure 61 is an explanatory diagram showing a load change of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power.

[0024] Figure 7 It is an explanatory diagram showing simulation results of the efficiency of the Doherty amplifier 1 according to the first embodiment and the efficiency of the Doherty amplifier 1 described in Patent Document 1.

[0025] Figure 8 It is an explanatory diagram showing the operation of the Doherty amplifier 1 during fallback.

[0026] Fig. 9 It is an explanatory diagram showing a load change during the fallback operation of the Doherty amplifier 1 .

[0027] Fig.10 1 is an explanatory diagram showing the operation of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power.

[0028] Fig.11 1 is an explanatory diagram showing a load change of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power.

[0029] Fig.12 1 is a diagram showing the configuration of a Doherty amplifier 1 according to a third embodiment.

[0030] Fig.13 1 is a diagram showing the configuration of a Doherty amplifier 1 according to a fourth embodiment.

[0031] Fig.14 It is an explanatory diagram showing the operation of the Doherty amplifier 1 during fallback.

[0032] Fig.15 It is an explanatory diagram showing a load change during the fallback operation of the Doherty amplifier 1 .

[0033] Fig.16 1 is a diagram showing the configuration of a Doherty amplifier 1 according to a fifth embodiment.

[0034] Fig.17 1 is a diagram showing the configuration of a Doherty amplifier 1 according to a sixth embodiment. DETAILED DESCRIPTION

[0035] Hereinafter, in order to explain the present invention in more detail, a mode for carrying out the present invention will be described with reference to the accompanying drawings.

[0036] Implementation Method 1

[0037] Figure 1 1 is a diagram showing a configuration of a communication device including the Doherty amplifier 1 according to the first embodiment.

[0038] exist Figure 1In the embodiment, the Doherty amplifier 1 divides the communication signal into a first signal and a second signal, and amplifies the first signal and the second signal respectively.

[0039] Figure 2 1 is a diagram showing the configuration of the Doherty amplifier 1 according to the first embodiment.

[0040] exist Figure 2 In FIG. 1 , the input terminal 11 is a terminal to which a communication signal is input.

[0041] The input matching circuit 12 is realized by, for example, a circuit using a lumped constant element, a circuit using a distributed constant line, a circuit combining a lumped constant and a distributed constant, an LC type matching circuit using a coil and a capacitor, or a quarter wavelength line.

[0042] One end of the input matching circuit 12 is connected to the input terminal 11 , and the other end of the input matching circuit 12 is connected to the input terminal 13 a of the distributor 13 .

[0043] The input matching circuit 12 converts the impedance of the input terminal 11 into the input impedance of the distributor 13 , and outputs the communication signal input from the input terminal 11 to the distributor 13 .

[0044] The distributor 13 is implemented by, for example, a Wilkinson distributor or a hybrid circuit.

[0045] An input terminal 13 a of the distributor 13 is connected to the other end of the input matching circuit 12 .

[0046] An output terminal 13 b of the distributor 13 is connected to one end of the phase correction circuit 14 , and an output terminal 13 c of the distributor 13 is connected to one end of the input matching circuit 16 .

[0047] The distributor 13 distributes the communication signal output from the input matching circuit 12 into a first signal and a second signal, outputs the first signal from an output terminal 13 b to the phase correction circuit 14 , and outputs the second signal from an output terminal 13 c to the input matching circuit 16 .

[0048] The phase correction circuit 14 is realized by, for example, a circuit using a lumped constant element, a circuit using a distributed constant line, a circuit combining a lumped constant and a distributed constant, an LC type matching circuit, or a quarter wavelength line.

[0049] The phase correction circuit 14 is a circuit that aligns the electrical length of the path on the carrier amplifier 17 side from the output terminal 13b of the distributor 13 to the synthesis point 25 of the synthesis circuit 24 and the electrical length of the path on the peak amplifier 18 side from the output terminal 13c of the distributor 13 to the synthesis point 25 to the same electrical length.

[0050] However, the electrical length of the path on the carrier amplifier 17 side and the electrical length of the path on the peak amplifier 18 side are not limited to being strictly the same electrical length, and the electrical length of the path on the carrier amplifier 17 side and the electrical length of the path on the peak amplifier 18 side may be different within a range that does not cause practical problems.

[0051] The input matching circuit 15 is realized by, for example, a circuit using a lumped constant element, a circuit using a distributed constant line, a circuit combining a lumped constant and a distributed constant, an LC type matching circuit, or a quarter wavelength line.

[0052] One end of the input matching circuit 15 is connected to the other end of the phase correction circuit 14 , and the other end of the input matching circuit 15 is connected to the input terminal 17 a of the carrier amplifier 17 .

[0053] The input matching circuit 15 converts the impedance of the phase correction circuit 14 into the input impedance of the carrier amplifier 17 , and outputs the first signal output from the phase correction circuit 14 to the input terminal 17 a of the carrier amplifier 17 .

[0054] The input matching circuit 16 is realized by, for example, a circuit using a lumped constant element, a circuit using a distributed constant line, a circuit combining a lumped constant and a distributed constant, an LC type matching circuit, or a quarter wavelength line.

[0055] One end of the input matching circuit 16 is connected to the output terminal 13 c of the distributor 13 , and the other end of the input matching circuit 16 is connected to the input terminal 18 a of the peak amplifier 18 .

[0056] The input matching circuit 16 converts the impedance of the output terminal 13 c of the distributor 13 into the input impedance of the peak amplifier 18 , and outputs the second signal output from the output terminal 13 c of the distributor 13 to the input terminal 18 a of the peak amplifier 18 .

[0057] The carrier amplifier 17 is realized by, for example, a FET (Field Effect Transistor), an HBT (Heterojunction Bipolar Transistor), or a HEMT (High Electron Mobility Transistor).

[0058] exist Figure 2 In the Doherty amplifier 1 shown, the carrier amplifier 17 is an example of a source-grounded transistor. The input terminal 17a, i.e., the gate terminal, of the carrier amplifier 17 is connected to the other end of the input matching circuit 15, and the output terminal 17b, i.e., the drain terminal, of the carrier amplifier 17 is connected to one end of the first output circuit 19. The first output circuit 19 will be described later.

[0059] The input terminal 17 a of the carrier amplifier 17 is biased between the A class and the B class.

[0060] The carrier amplifier 17 has a nonlinear output capacitance, amplifies the first signal output from the input matching circuit 15 , and outputs the amplified first signal to the first output circuit 19 .

[0061] When the carrier amplifier 17 is represented by an equivalent circuit, the carrier amplifier 17 can be represented by a current source 31 and a capacitor 32 having an output capacitance.

[0062] The peak amplifier 18 is implemented by, for example, FET, HBT, or HEMT.

[0063] exist Figure 2 In the Doherty amplifier 1 shown, an example is shown in which the peak amplifier 18 is a source-grounded transistor. The input terminal 18a, i.e., the gate terminal, of the peak amplifier 18 is connected to the other end of the input matching circuit 16, and the output terminal 18b, i.e., the drain terminal, of the peak amplifier 18 is connected to one end of the second output circuit 20. The second output circuit 20 will be described later.

[0064] The input terminal 18 a of the peak amplifier 18 is biased in C class.

[0065] The peak amplifier 18 amplifies the second signal output from the input matching circuit 16 , and outputs the amplified second signal to the second output circuit 20 .

[0066] When the peak amplifier 18 is represented by an equivalent circuit, the peak amplifier 18 can be represented by a current source 41 and a capacitor 42 having an output capacitance.

[0067] Capacitor 42 has an output capacitance that increases nonlinearly as the output power of peak amplifier 18 increases.

[0068] The peak amplifier 18 plays a role of reducing the inductive component of the impedance when the synthesizer circuit 24 is viewed from the peak amplifier 18 , by its own nonlinear output capacitance.

[0069] The first output circuit 19 is implemented by, for example, a transmission line having an electrical length of less than 90 degrees.

[0070] One end of the first output circuit 19 is connected to the output terminal 17 b of the carrier amplifier 17 , and the other end of the first output circuit 19 is connected to the input terminal 24 a of the synthesizing circuit 24 .

[0071] The first output circuit 19 transmits the first signal output from the carrier amplifier 17 and outputs the first signal to the synthesizing circuit 24 .

[0072] When the peak amplifier 18 is not performing an amplification operation, the first output circuit 19 has an electrical length of less than 90 degrees for compensating for the reactance of the second output circuit 20 when viewed from the output side of the carrier amplifier 17 .

[0073] The characteristic impedance of the first output circuit 19 is consistent with the optimal load impedance Ropt when the output power of the carrier amplifier 17 is the saturated output power. However, the characteristic impedance of the first output circuit 19 is not limited to being strictly consistent with the optimal load impedance Ropt, and may be deviated from the optimal load impedance Ropt within a range that does not cause practical problems.

[0074] The second output circuit 20 has an electrical length greater than 90 degrees and less than 180 degrees, and has two transmission lines, namely, a transmission line 21 and a transmission line 23. The connection point 22 is a point at which the transmission line 21 and the transmission line 23 are connected.

[0075] exist Figure 2 In the Doherty amplifier shown in the figure, the second output circuit 20 includes the transmission line 21 and the transmission line 23. However, this is just an example, and the second output circuit 20 may be realized by a single transmission line in which the transmission line 21 and the transmission line 23 are integrally formed.

[0076] One end of the second output circuit 20 is connected to the output terminal 18 b of the peak amplifier 18 , and the other end of the second output circuit 20 is connected to the input terminal 24 b of the synthesizing circuit 24 .

[0077] The second output circuit 20 transmits the second signal output from the peak amplifier 18 , and outputs the second signal to the synthesizing circuit 24 .

[0078] The characteristic impedance of the second output circuit 20 is consistent with the optimal load impedance Ropt when the output power of the peak amplifier 18 is the saturated output power. However, the characteristic impedance of the second output circuit 20 is not limited to being strictly consistent with the optimal load impedance Ropt, and may be deviated from the optimal load impedance Ropt within a range that does not cause practical problems.

[0079] Here, the second output circuit 20 is shown to have an electrical length greater than 90 degrees and less than 180 degrees. However, this is just an example, and the second output circuit 20 may have an electrical length greater than -90 degrees and less than 0 degrees under the left-hand rule. When the second output circuit 20 has an electrical length greater than -90 degrees and less than 0 degrees under the left-hand rule, the second output circuit 20 has a filter circuit of the left-hand rule.

[0080] When the peak amplifier 18 performs an amplification operation, the second output circuit 20 changes the impedance of the synthesizing circuit 24 viewed from the peak amplifier 18 to an impedance in the inductive region.

[0081] In the fallback state when the peak amplifier 18 stops, the second output circuit 20 forms a short-circuit point at the connection point 22 between the peak amplifier 18 and the combining circuit 24 .

[0082] When the peak amplifier 18 outputs power lower than the saturated output power, the second output circuit 20 changes the impedance of the synthesizing circuit 24 viewed from the peak amplifier 18 to an impedance in the inductive region according to the back-off amount of the peak amplifier 18 .

[0083] At this time, the peak amplifier 18 reduces the inductive component of the impedance when the peak amplifier 18 views the synthesizing circuit 24 based on the output capacitance of the capacitor 42 .

[0084] The transmission line 21 has an electrical length of 90 degrees.

[0085] One end of the transmission line 21 is connected to the output terminal 18 b of the peak amplifier 18 , and the other end of the transmission line 21 is connected to the connection point 22 .

[0086] The transmission line 23 has an electrical length less than 90 degrees.

[0087] One end of the transmission line 23 is connected to the connection point 22 , and the other end of the transmission line 23 is connected to the input terminal 24 b of the combining circuit 24 .

[0088] The synthesizing circuit 24 includes a synthesizing point 25 for synthesizing the first signal output from the first output circuit 19 and the second signal output from the second output circuit 20 .

[0089] An input terminal 24 a of the synthesizing circuit 24 is connected to the other end of the first output circuit 19 .

[0090] An input terminal 24 b of the combining circuit 24 is connected to the other end of the transmission line 23 .

[0091] The synthesizing circuit 24 synthesizes the first signal output from the first output circuit 19 and the second signal output from the second output circuit 20 .

[0092] The synthesizing circuit 24 outputs a synthesized signal of the first signal and the second signal to the output matching circuit 26 .

[0093] The combining point 25 is a combining point of the first signal output from the first output circuit 19 and the second signal output from the second output circuit 20. To the combining point 25, one end of an output matching circuit 26 is connected.

[0094] The output matching circuit 26 is realized by, for example, a circuit using a lumped constant element, a circuit using a distributed constant line, a circuit combining a lumped constant and a distributed constant, an LC type matching circuit, or a quarter-wavelength line.

[0095] One end of the output matching circuit 26 is connected to the combining point 25 , and the other end of the output matching circuit 26 is connected to a load 27 outside the Doherty amplifier 1 .

[0096] The output matching circuit 26 converts the impedance of the synthesis point 25 into the impedance of the load 27 .

[0097] The load 27 is a load external to the Doherty amplifier 1 connected to the other end of the output matching circuit 26 .

[0098] Next, Figure 2 The operation of the Doherty amplifier 1 shown will be described.

[0099] After receiving the communication signal input from the input terminal 11 , the input matching circuit 12 converts the impedance of the input terminal 11 into the input impedance of the distributor 13 , and outputs the communication signal to the distributor 13 .

[0100] After receiving the communication signal from the input matching circuit 12 , the distributor 13 distributes the communication signal into a first signal and a second signal.

[0101] The distributor 13 outputs the first signal from the output terminal 13 b to the phase correction circuit 14 , and outputs the second signal from the output terminal 13 c to the input matching circuit 16 .

[0102] After receiving the first signal from the output terminal 13 b of the distributor 13 , the phase correction circuit 14 outputs the first signal to the input matching circuit 15 .

[0103] At this time, the phase correction circuit 14 plays the following role: the electrical length of the path on the carrier amplifier 17 side from the output terminal 13b of the distributor 13 to the synthesis point 25 and the electrical length of the path on the peak amplifier 18 side from the output terminal 13c of the distributor 13 to the synthesis point 25 are aligned to the same electrical length.

[0104] After receiving the first signal from the phase correction circuit 14 , the input matching circuit 15 converts the impedance of the phase correction circuit 14 into the input impedance of the carrier amplifier 17 , and outputs the first signal to the input terminal 17 a of the carrier amplifier 17 .

[0105] After receiving the first signal from the input matching circuit 15 , the carrier amplifier 17 amplifies the first signal and outputs the amplified first signal to the first output circuit 19 .

[0106] After receiving the amplified first signal from the carrier amplifier 17 , the first output circuit 19 transmits the first signal and outputs the first signal to the synthesizing circuit 24 .

[0107] After receiving the second signal from the output terminal 13 c of the distributor 13 , the input matching circuit 16 converts the impedance of the output terminal 13 c of the distributor 13 into the input impedance of the peak amplifier 18 , and outputs the second signal to the input terminal 18 a of the peak amplifier 18 .

[0108] After receiving the second signal from the input matching circuit 16 , the peak amplifier 18 amplifies the second signal and outputs the amplified second signal to the second output circuit 20 .

[0109] After receiving the amplified second signal from the peak amplifier 18 , the second output circuit 20 transmits the second signal and outputs the second signal to the synthesizing circuit 24 .

[0110] The synthesizing circuit 24 synthesizes the first signal output from the first output circuit 19 and the second signal output from the second output circuit 20 .

[0111] The synthesizing circuit 24 outputs a synthesized signal of the first signal and the second signal to the output matching circuit 26 .

[0112] After receiving the synthesized signal from the synthesizing circuit 24 , the output matching circuit 26 converts the impedance of the synthesizing point 25 into the impedance of the external load 27 , and outputs the synthesized signal to the load 27 .

[0113] Next, the operation of the Doherty amplifier 1 during back-off when the peak amplifier 18 is stopped will be described.

[0114] Figure 3 1 is an explanatory diagram showing the back-off operation of the Doherty amplifier 1. Figure 3 In the figure, the description of the output matching circuit 26 is omitted.

[0115] Figure 4 It is an explanatory diagram showing a load change during the fallback operation of the Doherty amplifier 1 .

[0116] During back-off, the peak amplifier 18 is stopped, so that if Figure 3 As shown, the output impedance of the peak amplifier 18 is in an open circuit state.

[0117] The output impedance of the peak amplifier 18 is changed by the transmission line 21 having an electrical length of 90 degrees, and a short-circuit point is formed at the connection point 22 .

[0118] A short-circuit point is formed at the connection point 22 , and thus, when the peak amplifier 18 is viewed from the combining point 25 , the transmission line 23 functions as a virtual short-circuit stub.

[0119] The transmission line 23 functions as a virtual short-circuit stub, whereby Figure 4As shown, the impedance Γ1 when observing the load 27 from the synthesis point 25, that is, the output load Ropt, becomes the impedance Γ2.

[0120] like Figure 4 As shown, the impedance Γ2 is transformed into the impedance Γ3 on the real axis through the first output circuit 19.

[0121] Impedance Γ3 is the output load impedance of the carrier amplifier 17, which is larger than the output load impedance 2×Ropt of the carrier amplifier in a general Doherty amplifier. The general Doherty amplifier here refers to a Doherty amplifier in which the saturated output power of the carrier amplifier is the same as the saturated output power of the peak amplifier, and is a Doherty amplifier with a back-off amount of 6 dB.

[0122] Therefore, it is possible to Figure 2 The back-off of the Doherty amplifier 1 shown is larger than the back-off of a typical Doherty amplifier.

[0123] Next, the operation of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power will be described.

[0124] Figure 5 1 is an explanatory diagram showing the operation of the Doherty amplifier 1 when the peak amplifier 18 outputs power lower than the saturated output power. Figure 5 In the figure, the description of the output matching circuit 26 is omitted.

[0125] Figure 6 1 is an explanatory diagram showing a load change of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power.

[0126] First, as shown in the following equations (1) and (3), the electrical length EL1 of the first output circuit 19 is determined according to the desired back-off amount OBO.

[0127] As shown in the following equations (2) and (3), the electrical length EL2 of the second output circuit 20 is determined according to the desired back-off amount OBO.

[0128]

[0129]

[0130] OBO=10logy[dB] (3)

[0131] Regarding the output load impedance of the carrier amplifier 17, the load varies according to the output power of the peak amplifier 18. Specifically, regarding the output load impedance of the carrier amplifier 17, as Figure 6As shown, the load changes from the impedance Γ3 on the real axis to the impedance Γ0 on the real axis. Impedance Γ0 is the optimal load impedance Ropt when the output power of the carrier amplifier 17 is the saturated output power.

[0132] The output load impedance of the peak amplifier 18 changes as follows.

[0133] Here, for the sake of convenience, Figure 5 As shown, the output capacitance of the peak amplifier 18, i.e., the output capacitance of the capacitor 42, is decomposed into a capacitor 43 having an output capacitance when the signal level of the second signal is small, and a capacitor 44 having an increased amount of output capacitance increased due to an increase in the signal level of the second signal.

[0134] When the peak amplifier 18 outputs a power lower than the saturated output power, as Figure 6 As shown, the impedance Γ5 when observing the synthesis point 25 from the transmission line 23 is the impedance of the capacitive region.

[0135] The impedance Γ5 changes by the electrical length of the transmission line 23 that is less than 90 degrees, and the impedance when the transmission line 23 is viewed from the connection point 22 becomes Γ6. Figure 6 As shown, impedance Γ6 is the impedance of the capacitive region.

[0136] The impedance Γ6 changes by the 90-degree electrical length of the transmission line 21 , and the impedance when the transmission line 21 is viewed from between the capacitor 43 and the capacitor 44 becomes Γ7 .

[0137] The second output circuit 20 is an inductive circuit that functions as a virtual short-circuit stub when retreating. Figure 6 As shown, impedance Γ7 becomes the impedance of the inductive region.

[0138] exist Figure 2 In the Doherty amplifier 1 shown, the peak amplifier 18 has a capacitor 44 with an increased output capacitance. Therefore, the impedance Γ7 changes in a manner close to the real axis by the increased output capacitance of the capacitor 44, and the impedance when the synthesis point 25 is viewed from the current source 41 of the peak amplifier 18 becomes Γ8.

[0139] According to the output power of the peak amplifier 18, the impedance Γ8 when the synthesis point 25 is viewed from the current source 41 of the peak amplifier 18 becomes Figure 6 Arbitrary impedance on the solid line shown. Figure 6 The solid line shown exists in a region close to the real axis.

[0140] Therefore, during the period from when the output power of the peak amplifier 18 is zero to when the output power of the peak amplifier 18 reaches saturated output power, the output load impedance of the peak amplifier 18 is changed from the open point to the load impedance of the peak amplifier 18. Figure 6 The solid line shown becomes the impedance Γ0 on the real axis. Figure 6 In the figure, the open point is the point recorded as "P small", "P small" means that the output power is zero. Γ0 is the point recorded as "P large", "P large" means that the output power is the saturated output power.

[0141] In the Doherty amplifier disclosed in Patent Document 1, when the peak amplifier outputs a power lower than the saturated output power, the impedance at the output synthesis point viewed from the peak amplifier becomes the impedance of the capacitive region. The distance from the real axis to the impedance at the output synthesis point viewed from the peak amplifier is the same as that from the real axis. Figure 2 The impedance Γ7' shown when the peak amplifier 18 looks into the synthesis circuit 24 is approximately the same distance from the real axis.

[0142] Furthermore, in the Doherty amplifier disclosed in Patent Document 1, the capacitive component of the impedance when the output synthesis point is viewed from the peak amplifier further increases according to the output capacitance of the peak amplifier. Therefore, according to the output capacitance of the peak amplifier, the impedance when the output synthesis point is viewed from the peak amplifier changes in such a manner that the distance of the impedance when the output synthesis point is viewed from the peak amplifier from the real axis increases.

[0143] exist Figure 2 In the Doherty amplifier 1 shown, the inductive component of the impedance Γ7 in the inductive region is reduced according to the increase in the output capacitance of the capacitor 44. Therefore, the distance from the real axis of the impedance Γ8 when the synthesis point 25 is observed from the current source 41 of the peak amplifier 18 is smaller than the distance from the real axis of the impedance when the output synthesis point is observed from the peak amplifier in the Doherty amplifier disclosed in Patent Document 1.

[0144] Therefore, in Figure 2 In the Doherty amplifier 1 shown, compared with the Doherty amplifier disclosed in Patent Document 1, it is possible to realize impedance change in a region close to the real axis.

[0145] Figure 7 This is an explanatory diagram showing simulation results of the efficiency of the Doherty amplifier 1 according to the first embodiment and the efficiency of the Doherty amplifier 1 described in Patent Document 1.

[0146] In the Doherty amplifier described in Patent Document 1, Figure 7 As shown, the efficiency of the peak amplifier deteriorates significantly during the period from the power at the efficiency peak point to the saturated output power. That is, there is an output power with significantly deteriorated efficiency during the period from the power of zero to the saturated output power.

[0147] In the Doherty amplifier 1 of the first embodiment, there is no output power at which efficiency is significantly degraded during the period from zero power to saturated output power of the peak amplifier 18 , and the efficiency is higher than that of the Doherty amplifier described in Patent Document 1.

[0148] In the above-described first embodiment, the Doherty amplifier 1 is configured such that when the peak amplifier 18 performs an amplification operation, the second output circuit 20 changes the impedance of the synthesizing circuit 24 viewed from the peak amplifier 18 to an impedance in the inductive region. Therefore, the Doherty amplifier 1 can prevent the efficiency from being degraded when the peak amplifier 18 outputs a power lower than the saturated output power.

[0149] Implementation Method 2

[0150] In the second embodiment, the Doherty amplifier 1 in which the saturated output power of the peak amplifier 18 is larger than the saturated output power of the carrier amplifier 17 will be described.

[0151] The structure of the Doherty amplifier 1 in the second embodiment is the same as that of the Doherty amplifier 1 in the first embodiment. A structural diagram showing the Doherty amplifier 1 in the second embodiment is shown in FIG. Figure 2 .

[0152] Next, the operation of the Doherty amplifier 1 during back-off when the peak amplifier 18 is stopped will be described.

[0153] Figure 8 1 is an explanatory diagram showing the back-off operation of the Doherty amplifier 1. Figure 8 In the figure, the description of the output matching circuit 26 is omitted.

[0154] Fig. 9 It is an explanatory diagram showing a load change during the fallback operation of the Doherty amplifier 1 .

[0155] In the Doherty amplifier 1 of the second embodiment, the optimal load impedance when the output power of the carrier amplifier 17 is saturated output power is Ropt, and the optimal load impedance when the output power of the peak amplifier 18 is saturated output power is K×Ropt. K is a value less than 1 and greater than 0.

[0156] The impedance Γ1 when the load 27 is viewed from the synthesis point 25 becomes the synthesis impedance of the optimal load impedance Ropt and the optimal load impedance K×Ropt. Therefore, Fig. 9 As shown, the impedance becomes smaller than 0.5×Ropt.

[0157] Therefore, the impedance Γ1 in the Doherty amplifier 1 according to the second embodiment becomes smaller than the impedance Γ1 in the Doherty amplifier 1 according to the first embodiment.

[0158] During back-off, the peak amplifier 18 is stopped, so that if Figure 8 As shown, the output impedance of the peak amplifier 18 is in an open circuit state.

[0159] The output impedance of the peak amplifier 18 is changed by the transmission line 21 having an electrical length of 90 degrees, and a short-circuit point is formed at the connection point 22 .

[0160] A short-circuit point is formed at the connection point 22 , and thus, when the peak amplifier 18 is viewed from the combining point 25 , the transmission line 23 functions as a virtual short-circuit stub.

[0161] The transmission line 23 functions as a virtual short-circuit stub, whereby the impedance Γ1 when the load 27 is viewed from the synthesis point 25, that is, the output load L×0.5×Ropt, becomes the impedance Γ2. L is a value smaller than 1 and larger than 0.

[0162] like Fig. 9 As shown, the impedance Γ2 is transformed into the impedance Γ3 on the real axis by the first output circuit 19.

[0163] Impedance Γ3 is the output load impedance of the carrier amplifier 17, and is larger than the impedance 2×Ropt of a general Doherty amplifier when the back-off amount is 6 dB.

[0164] Therefore, the back-off amount of the Doherty amplifier 1 according to the second embodiment can be made larger than the back-off amount of a general Doherty amplifier.

[0165] Next, the operation of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power will be described.

[0166] Fig.10 1 is an explanatory diagram showing the operation of the Doherty amplifier 1 when the peak amplifier 18 outputs power lower than the saturated output power. Fig.10 In the figure, the description of the output matching circuit 26 is omitted.

[0167] Fig.11 1 is an explanatory diagram showing a load change of the Doherty amplifier 1 when the peak amplifier 18 outputs a power lower than the saturated output power.

[0168] Regarding the output load impedance of the carrier amplifier 17, the load varies according to the output power of the peak amplifier 18. Specifically, regarding the output load impedance of the carrier amplifier 17, as Fig.11 As shown, the load changes from the impedance Γ3 on the real axis to the impedance Γ0 on the real axis. Impedance Γ0 is the optimal load impedance Ropt when the output power of the carrier amplifier 17 is the saturated output power.

[0169] The output load impedance of the peak amplifier 18 changes as follows.

[0170] When the peak amplifier 18 outputs a power lower than the saturated output power, as Fig.11 As shown, the impedance Γ5 when observing the synthesis point 25 from the transmission line 23 is the impedance of the capacitive region.

[0171] The impedance Γ5 changes by the electrical length of the transmission line 23 that is less than 90 degrees, and the impedance when the transmission line 23 is viewed from the connection point 22 becomes Γ6. Fig.11 As shown, impedance Γ6 is the impedance of the capacitive region.

[0172] The impedance Γ6 changes by the 90-degree electrical length of the transmission line 21 , and the impedance when the transmission line 21 is viewed from between the capacitor 43 and the capacitor 44 becomes Γ7 .

[0173] The second output circuit 20 is an inductive circuit that functions as a virtual short-circuit stub when retreating. Fig.11 As shown, impedance Γ7 becomes the impedance of the inductive region.

[0174] In the Doherty amplifier 1 of the second embodiment, the peak amplifier 18 includes a capacitor 44 having an increased amount of output capacitance. Therefore, the impedance Γ7 changes in a manner close to the real axis by the increased amount of output capacitance of the capacitor 44, and the impedance when the synthesis point 25 is viewed from the current source 41 of the peak amplifier 18 becomes Γ8.

[0175] According to the output power of the peak amplifier 18, the impedance Γ8 when the synthesis point 25 is viewed from the current source 41 of the peak amplifier 18 becomes Fig.11 Arbitrary impedance on the solid line shown. Fig.11 The solid line shown exists in a region close to the real axis.

[0176] Therefore, during the period from when the output power of the peak amplifier 18 is zero to when the output power of the peak amplifier 18 reaches saturated output power, the output load impedance of the peak amplifier 18 is changed from the open point to the load impedance of the peak amplifier 18. Fig.11 The solid line shown changes to impedance Γ0 on the real axis.

[0177] In the Doherty amplifier disclosed in Patent Document 1, when the peak amplifier outputs a power lower than the saturated output power, the impedance at the output synthesis point viewed from the peak amplifier becomes the impedance of the capacitive region. The distance from the real axis to the impedance at the output synthesis point viewed from the peak amplifier is the same as the distance from the real axis to the output synthesis point. Figure 2 The impedance Γ7' shown when the peaking amplifier 18 looks into the combining circuit 24 is approximately equidistant from the real axis.

[0178] Furthermore, in the Doherty amplifier disclosed in Patent Document 1, the capacitive component of the impedance when the output synthesis point is viewed from the peak amplifier further increases according to the output capacitance of the peak amplifier. Therefore, according to the output capacitance of the peak amplifier, the impedance when the output synthesis point is viewed from the peak amplifier changes in such a manner that the distance of the impedance when the output synthesis point is viewed from the peak amplifier from the real axis increases.

[0179] In the Doherty amplifier 1 of the second embodiment, the inductive component of the impedance Γ7 in the inductive region is reduced according to the increase in the output capacitance of the capacitor 44. Therefore, the distance from the real axis of the impedance Γ8 when the synthesis point 25 is observed from the current source 41 of the peak amplifier 18 is smaller than the distance from the real axis of the impedance when the output synthesis point is observed from the peak amplifier in the Doherty amplifier disclosed in Patent Document 1.

[0180] Thus, in the Doherty amplifier 1 according to the second embodiment, compared with the Doherty amplifier disclosed in Patent Document 1, it is possible to realize impedance change in a region close to the real axis.

[0181] In the Doherty amplifier 1 in which the saturated output power of the peak amplifier 18 is greater than the saturated output power of the carrier amplifier 17 , similarly to the Doherty amplifier 1 in the first embodiment, it is possible to prevent efficiency degradation when the peak amplifier 18 outputs power lower than the saturated output power.

[0182] By configuring the Doherty amplifier 1 so that the saturated output power of the peak amplifier 18 is larger than the saturated output power of the carrier amplifier 17 , the amount of fallback at which the efficiency peak point appears can be increased compared to the Doherty amplifier 1 in the first embodiment.

[0183] Implementation 3

[0184] In the third embodiment, a Doherty amplifier 1 including a first output matching circuit 51 and a second output matching circuit 52 will be described.

[0185] Fig.12 1 is a diagram showing a configuration of a communication device having a Doherty amplifier 1 according to Embodiment 3. Fig.12 In, with Figure 2 The same reference numerals denote the same or corresponding parts, and thus their descriptions are omitted.

[0186] The first output matching circuit 51 is realized by, for example, a circuit using a lumped constant element, a circuit using a distributed constant line, a circuit combining a lumped constant and a distributed constant, an LC type matching circuit, or a quarter-wavelength line.

[0187] One end of the first output matching circuit 51 is connected to the output terminal 17 b of the carrier amplifier 17 , and the other end of the first output matching circuit 51 is connected to one end of the first output circuit 19 .

[0188] The first output matching circuit 51 converts the output impedance of the carrier amplifier 17 into the impedance of the first output circuit 19 .

[0189] The second output matching circuit 52 is realized by, for example, a circuit using a lumped constant element, a circuit using a distributed constant line, a circuit combining a lumped constant and a distributed constant, an LC matching circuit, or a quarter-wavelength line.

[0190] One end of the second output matching circuit 52 is connected to the output terminal 18 b of the peak amplifier 18 , and the other end of the second output matching circuit 52 is connected to one end of the second output circuit 20 .

[0191] The second output matching circuit 52 converts the output impedance of the peak amplifier 18 into the impedance of the second output circuit 20 .

[0192] In addition to having the first output matching circuit 51 and the second output matching circuit 52, Fig.12 The Doherty amplifier 1 shown with Figure 2 The Doherty amplifier 1 shown is identical.

[0193] Fig.12 The Doherty amplifier 1 shown includes the first output matching circuit 51 , thereby preventing the first signal output from the carrier amplifier 17 from being reflected to the first output circuit 19 .

[0194] Fig.12 The Doherty amplifier 1 shown includes the second output matching circuit 52 , thereby preventing the second signal output from the peak amplifier 18 from being reflected to the second output circuit 20 .

[0195] Implementation 4

[0196] In the fourth embodiment, a Doherty amplifier 1 in which a broadband circuit 60 for changing the impedance when the load 27 is viewed from the combining circuit 24 is inserted between the combining circuit 24 and the load 27 is described.

[0197] Fig.13 1 is a diagram showing the structure of the Doherty amplifier 1 according to the fourth embodiment. Fig.13 In, with Figure 2 The same reference numerals denote the same or corresponding parts, and thus their descriptions are omitted.

[0198] The broadband circuit 60 includes a transmission line 61 and an open stub 62 .

[0199] One end of the broadband circuit 60 is connected to the combining point 25 of the combining circuit 24 , and the other end of the broadband circuit 60 is connected to one end of the output matching circuit 26 .

[0200] When the peak amplifier 18 is stopped, if the frequency of the first signal amplified by the carrier amplifier 17 is shifted to the lower frequency side than the center frequency, the broadband circuit 60 changes the impedance of the load 27 viewed from the synthesizing circuit 24 to the impedance in the capacitive region.

[0201] When the frequency of the first signal is shifted to the higher frequency side than the center frequency of the first signal, the broadband circuit 60 changes the impedance of the load 27 viewed from the synthesizing circuit 24 to an impedance in the inductive region.

[0202] Fig.13 The Doherty amplifier 1 shown is a Figure 2 The Doherty amplifier 1 shown in the figure is a Doherty amplifier using a broadband circuit 60. However, this is only an example, and the Doherty amplifier 1 shown in the figure may be a Doherty amplifier using a broadband circuit 60. Fig.12 The Doherty amplifier 1 shown is a Doherty amplifier using a broadbandization circuit 60 .

[0203] The transmission line 61 is a line having an electrical length of EL3.

[0204] One end of the transmission line 61 is connected to the combining point 25 of the combining circuit 24 , and the other end of the transmission line 61 is connected to the connection point 63 .

[0205] The electrical length obtained by subtracting the electrical length EL1 of the first output circuit 19 from the electrical length of 90 degrees is θ a When , the electrical length EL3 of the transmission line 61 is expressed as the following formula (4).

[0206] EL3=sin -1 [2sin(2θ a )] (4)

[0207] One end of the open stub 62 is connected to a connection point 63 .

[0208] The electrical length of the open stub 62 is 180 degrees, and the characteristic impedance of the open stub 62 is half of the optimal load impedance Ropt when the output power of the carrier amplifier 17 is the saturated output power.

[0209] The other end of the transmission line 61 , one end of the open stub 62 , and one end of the output matching circuit 26 are connected to the connection point 63 .

[0210] Next, Fig.13 The operation of the Doherty amplifier 1 shown in FIG. 6 is described below. However, in addition to the broadband circuit 60, Figure 2 The Doherty amplifier 1 shown is the same, and therefore, the operation of the broadband circuit 60 will be mainly described here.

[0211] If the frequency of the first signal output from the distributor 13 does not deviate from the center frequency when the peak amplifier 18 is stopped, the broadband circuit 60 does not change the impedance when the load 27 is viewed from the combining circuit 24 .

[0212] If the frequency of the first signal is shifted to the lower frequency side than the center frequency, the broadband circuit 60 changes the impedance of the load 27 viewed from the synthesizing circuit 24 to the impedance in the capacitive region.

[0213] If the frequency of the first signal is shifted to the higher frequency side than the center frequency, the broadband circuit 60 changes the impedance of the load 27 viewed from the synthesizing circuit 24 to an impedance in the inductive region.

[0214] Next, the impedance change caused by the broadband circuit 60 will be described in detail.

[0215] Fig.14 1 is an explanatory diagram showing the back-off operation of the Doherty amplifier 1. Fig.14 In the figure, the description of the output matching circuit 26 is omitted.

[0216] Fig.15 It is an explanatory diagram showing a load change during the fallback operation of the Doherty amplifier 1 .

[0217] During back-off, the peak amplifier 18 is stopped, so that if Fig.14 As shown, the output impedance of the peak amplifier 18 is in an open circuit state.

[0218] The output impedance of the peak amplifier 18 is changed by the transmission line 21 having an electrical length of 90 degrees, and a short-circuit point is formed at the connection point 22 .

[0219] A short-circuit point is formed at the connection point 22 , and thus, when the peak amplifier 18 is viewed from the combining point 25 , the transmission line 23 functions as a virtual short-circuit stub.

[0220] The transmission line 23 functions as a virtual short-circuit stub, whereby Fig.15 As shown, the impedance Γ1' when the load 27 is viewed from the synthesis point 25, that is, the output load 0.5×Ropt becomes the impedance Γ2'.

[0221] like Fig.15 As shown, the impedance Γ2' is transformed into the impedance Γ3' on the real axis by the first output circuit 19.

[0222] Impedance Γ3 ′ is the output load impedance of the carrier amplifier 17 , and is larger than 2×Ropt, an impedance of a general Doherty amplifier when the back-off amount is 6 dB.

[0223] Therefore, it is possible to Fig.13The back-off of the Doherty amplifier 1 shown is larger than the back-off of a typical Doherty amplifier.

[0224] exist Fig.13 In the Doherty amplifier 1 shown in FIG. 1 , one end of the open stub 62 is connected to the connection point 63. Therefore, if the frequency of the first signal is shifted toward the low frequency side relative to the center frequency, Fig.15 As shown, the impedance Γ9 when the load 27 is viewed from the other end of the transmission line 61 is the impedance in the inductive region.

[0225] If the frequency of the first signal is shifted toward the high frequency side relative to the center frequency, then Fig.15 As shown, the impedance Γ9 when observing the load 27 from the other end of the transmission line 61 is the impedance of the capacitive region.

[0226] Impedance Γ9 is transmitted through the transmission line 61. Fig.15 Rotating clockwise on the Smith chart shown, this becomes impedance Γ1'.

[0227] At this time, if the frequency of the first signal is shifted to the lower frequency side than the center frequency, the impedance Γ9 becomes the impedance Γ1' of the capacitive region. If the frequency of the first signal is shifted to the higher frequency side than the center frequency, the impedance Γ9 becomes the impedance Γ1' of the inductive region.

[0228] The transmission line 23 functions as a virtual short-circuit stub, whereby Fig.15 As shown, the impedance Γ1' becomes the impedance Γ2' in the inductive region.

[0229] Even if the frequency of the first signal changes from a frequency lower than the center frequency to a frequency higher than the center frequency, as shown in FIG. Fig.15 As shown, the impedance Γ2' also rotates only clockwise.

[0230] like Fig.15 As shown, the impedance Γ2' is converted into the impedance Γ3' by the first output circuit 19. If the broadband circuit 60 is not connected to the output side of the synthesizing circuit 24, when the frequency of the first signal deviates from the center frequency, as shown in FIG. Fig.15 As shown, the impedance Γ3' sometimes deviates significantly from the real axis.

[0231] exist Fig.13 In the Doherty amplifier 1 shown in FIG. 1 , a broadband circuit 60 is connected to the output side of the synthesizing circuit 24. Therefore, even if the frequency of the first signal is offset from the center frequency, as shown in FIG. Fig.15 As shown, the impedance Γ3' also varies approximately on the real axis.

[0232] In the above-mentioned fourth embodiment, when the peak amplifier 18 is stopped, if the frequency of the first signal is shifted to the low frequency side compared to the center frequency, the broadband circuit 60 changes the impedance of the load 27 viewed from the synthesizing circuit 24 to the impedance of the capacitive region. The Doherty amplifier 1 is configured as follows: if the frequency of the first signal is shifted to the high frequency side compared to the center frequency, the broadband circuit 60 changes the impedance of the load 27 viewed from the synthesizing circuit 24 to the impedance of the inductive region. Therefore, the Doherty amplifier 1 is similar to Figure 2 The Doherty amplifier 1 shown can also prevent efficiency degradation when the peak amplifier 18 outputs power lower than the saturated output power. In addition, even if the frequency of the first signal deviates from the center frequency, efficiency degradation when the peak amplifier 18 is stopped can be prevented.

[0233] Implementation method 5

[0234] In the fifth embodiment, a Doherty amplifier 1 including a first transmission line 71 and a second transmission line 72 will be described.

[0235] Fig.16 1 is a diagram showing the structure of the Doherty amplifier 1 according to the fifth embodiment. Fig.16 In, with Figure 2 , Fig.12 and Fig.13 The same reference numerals denote the same or corresponding parts, and thus their descriptions are omitted.

[0236] The first transmission line 71 is a line having an electrical length of n (n is a positive or negative integer) times 180 degrees.

[0237] One end of the first transmission line 71 is connected to the other end of the first output circuit 19 , and the other end of the first transmission line 71 is connected to the input terminal 24 a of the combining circuit 24 .

[0238] The second transmission line 72 is a line having an electrical length of m (m is a positive or negative integer) times 180 degrees.

[0239] One end of the second transmission line 72 is connected to the other end of the second output circuit 20 , and the other end of the second transmission line 72 is connected to the input terminal 24 b of the combining circuit 24 .

[0240] Fig.16 The Doherty amplifier 1 shown is a Figure 2 The Doherty amplifier 1 shown in the figure is a Doherty amplifier using the first transmission line 71 and the second transmission line 72. However, this is only an example, and it is also possible to Fig.12 or Fig.13 The Doherty amplifier 1 shown uses Doherty amplifiers of a first transmission line 71 and a second transmission line 72 .

[0241] In addition to having the first transmission line 71 and the second transmission line 72, Fig.16 The Doherty amplifier 1 shown is Figure 2 The Doherty amplifier 1 shown is identical.

[0242] exist Fig.16 In the Doherty amplifier 1 shown in FIG. 1 , even if the first transmission line 71 and the second transmission line 72 are provided, Figure 2 The Doherty amplifier 1 shown can also prevent efficiency degradation when the peak amplifier 18 outputs a power lower than the saturated output power.

[0243] exist Fig.16 In the Doherty amplifier 1 shown in the figure, by having the first transmission line 71 and the second transmission line 72, for example, it is possible to install Fig.16 The dimensions of the substrate of the Doherty amplifier 1 shown are such that the first transmission line 71 and the second transmission line 72 are routed separately.

[0244] Implementation 6

[0245] In the sixth embodiment, a Doherty amplifier 1 including a first input signal source 81 and a second input signal source 82 will be described.

[0246] Fig.17 1 is a diagram showing the structure of the Doherty amplifier 1 according to the sixth embodiment. Fig.17 In, with Figure 2 , Fig.12 , Fig.13 and Fig.16 The same reference numerals denote the same or corresponding parts, and thus their descriptions are omitted.

[0247] The signal source 80 includes a first input signal source 81 and a second input signal source 82 .

[0248] The signal source 80 divides the communication signal input to the signal source 80 into two signals.

[0249] The signal source 80 outputs one of the two signals to a first input signal source 81 , and outputs the other signal to a second input signal source 82 .

[0250] The first input signal source 81 is realized by, for example, a quadrature modulator, a DAC (Digital Analog Convertor), and a DDS (Direct Digital Synthesize).

[0251] The first input signal source 81 outputs the first signal to the input terminal 17a of the carrier amplifier 17 via the input matching circuit 15. The first signal includes the same information as that included in one signal.

[0252] The second input signal source 82 is realized by, for example, a quadrature modulator, a DAC, and a DDS.

[0253] The second input signal source 82 outputs the second signal to the input terminal 18a of the peak amplifier 18 via the input matching circuit 16. The second signal includes the same information as that included in the other signal.

[0254] Fig.17 The Doherty amplifier 1 shown is a Figure 2 The Doherty amplifier 1 shown in the figure is a Doherty amplifier using a signal source 80. However, this is only an example and may also be a Fig.12 , Fig.13 or Fig.16 The Doherty amplifier 1 shown uses a Doherty amplifier of a signal source 80 .

[0255] exist Fig.17 In the Doherty amplifier 1 shown, a bias voltage substantially equal to the boundary voltage is applied to the input terminal 17a of the carrier amplifier 17. If the voltage of the input terminal 17a is greater than the boundary voltage, the carrier amplifier 17 amplifies the signal, and if the voltage of the input terminal 17a is less than the boundary voltage, the carrier amplifier 17 does not amplify the signal.

[0256] Therefore, the operation of the carrier amplifier 17 can be switched according to the presence or absence of the first signal to the input terminal 17 a of the carrier amplifier 17 .

[0257] A bias voltage substantially equal to the boundary voltage is applied to the input terminal 18a of the peak amplifier 18. If the voltage at the input terminal 18a is greater than the boundary voltage, the peak amplifier 18 amplifies the signal, and if the voltage at the input terminal 18a is less than the boundary voltage, the peak amplifier 18 does not amplify the signal.

[0258] Therefore, the operation of the peak amplifier 18 can be switched according to the presence or absence of the second signal to the input terminal 18 a of the peak amplifier 18 .

[0259] Next, Fig.17 The operation of the Doherty amplifier 1 shown will be described.

[0260] The signal source 80 divides the communication signal input to the signal source 80 into two signals.

[0261] The signal source 80 outputs one of the two signals to a first input signal source 81 , and outputs the other signal to a second input signal source 82 .

[0262] After receiving one signal, the first input signal source 81 outputs the first signal to the input terminal 17 a of the carrier amplifier 17 via the input matching circuit 15 .

[0263] The carrier amplifier 17 amplifies the first signal, and outputs the amplified first signal to the first output circuit 19 .

[0264] After receiving the other signal, the second input signal source 82 outputs the second signal to the input terminal 18 a of the peak amplifier 18 via the input matching circuit 16 .

[0265] However, in the back-off state, the second input signal source 82 does not output the second signal to the input terminal 18a of the peak amplifier 18 via the input matching circuit 16. If the second signal is not output from the second input signal source 82, the peak amplifier 18 does not amplify the signal.

[0266] When the Doherty amplifier 1 outputs a power greater than that at the back-off time, the second input signal source 82 outputs the second signal to the input terminal 18 a of the peak amplifier 18 via the input matching circuit 16 .

[0267] The peak amplifier 18 amplifies the second signal and outputs the amplified second signal to the second output circuit 20 .

[0268] In the Doherty amplifier 1 having the first input signal source 81 and the second input signal source 82, Figure 2 The Doherty amplifier 1 shown can also prevent efficiency degradation when the peak amplifier 18 outputs a power lower than the saturated output power.

[0269] exist Fig.17 In the Doherty amplifier 1 shown in FIG. 1 , the amplification operation of the signal in the peak amplifier 18 is controlled by having a first input signal source 81 and a second input signal source 82. Figure 2 Compared with the Doherty amplifier 1 shown, the efficiency can be improved.

[0270] In addition, the present application can freely combine the various embodiments, modify the arbitrary components of the various embodiments, or omit the arbitrary components of the various embodiments within the scope of the invention.

[0271] Industrial Applicability

[0272] The invention is applicable to a Doherty amplifier and a communication device.

[0273] Description of symbols

[0274] 1: Doherty amplifier; 11: input terminal; 12: input matching circuit; 13: distributor; 13a: input terminal; 13b: output terminal; 13c: output terminal; 14: phase correction circuit; 15: input matching circuit; 16: input matching circuit; 17: carrier amplifier; 17a: input terminal; 17b: output terminal; 18: peak amplifier; 18a: input terminal; 18b: output terminal; 19: first output circuit; 20: second output circuit; 21: transmission line; 22: connection point; 23: transmission line 1: first output matching circuit; 2: second output matching circuit; 3: first transmission line; 4: second transmission line; 5: first signal source; 6: first input signal source; 7: second input signal source; 8: first signal source; 9: first input signal source; 10: first signal source; 11: first input signal source; 12: first signal source; 13: first input signal source; 14: first signal source; 15: first signal source; 16: first input signal source; 17: first signal source; 18: first signal source; 19: first signal source; 20: first signal source; 21: first signal source; 22: first signal source; 23: first signal source; 24: synthesis circuit; 24a, 24b: input terminals; 25: synthesis point; 26: output matching circuit; 27: load; 31: current source; 32: capacitor; 41: current source; 42, 43, 44: capacitors; 51: first output matching circuit; 52: second output matching circuit; 60: broadband circuit; 61: transmission line; 62: open-circuit stub; 63: connection point; 71: first transmission line; 72: second transmission line; 80: signal source; 81: first input signal source; 82: second input signal source.

Claims

1. A Doherty amplifier, characterized in that: The Doherty amplifier has: a carrier amplifier that amplifies the first signal and outputs the amplified first signal; a peak amplifier having a nonlinear output capacitor, amplifying the second signal and outputting the amplified second signal; a first output circuit for transmitting a first signal output from the carrier amplifier; a second output circuit that functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits a second signal output from the peak amplifier; and a synthesis circuit that synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal, When the peak amplifier performs an amplification operation, the impedance of the second output circuit when the peak amplifier views the synthesizing circuit changes to an impedance in the inductive region. The peak amplifier reduces the inductive component of the impedance when the synthesizer circuit is viewed from the peak amplifier, based on its own nonlinear output capacitance.

2. A Doherty amplifier, characterized in that: The Doherty amplifier has: a carrier amplifier that amplifies the first signal and outputs the amplified first signal; a peak amplifier having a nonlinear output capacitor, amplifying the second signal and outputting the amplified second signal; a first output circuit for transmitting a first signal output from the carrier amplifier; a second output circuit that functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits a second signal output from the peak amplifier; and a synthesis circuit that synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal, When the peak amplifier performs an amplification operation, the impedance of the second output circuit when the peak amplifier views the synthesizing circuit changes to an impedance in the inductive region. The second output circuit has an electrical length greater than 90 degrees and less than 180 degrees.

3. A Doherty amplifier, characterized in that: The Doherty amplifier has: a carrier amplifier that amplifies the first signal and outputs the amplified first signal; a peak amplifier having a nonlinear output capacitor, amplifying the second signal and outputting the amplified second signal; a first output circuit for transmitting a first signal output from the carrier amplifier; a second output circuit that functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits a second signal output from the peak amplifier; and a synthesis circuit that synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal, When the peak amplifier performs an amplification operation, the impedance of the second output circuit when the peak amplifier views the synthesizing circuit changes to an impedance in the inductive region. The second output circuit has an electrical length greater than -90 degrees and less than 0 degrees under the left-hand rule.

4. A Doherty amplifier, characterized in that: The Doherty amplifier has: a carrier amplifier that amplifies the first signal and outputs the amplified first signal; a peak amplifier having a nonlinear output capacitor, amplifying the second signal and outputting the amplified second signal; a first output circuit for transmitting a first signal output from the carrier amplifier; a second output circuit that functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits a second signal output from the peak amplifier; and a synthesis circuit that synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal, When the peak amplifier performs an amplification operation, the impedance of the second output circuit when the peak amplifier views the synthesizing circuit changes to an impedance in the inductive region. The saturated output power of the peak amplifier is greater than the saturated output power of the carrier amplifier.

5. A Doherty amplifier, characterized in that: The Doherty amplifier has: a carrier amplifier that amplifies the first signal and outputs the amplified first signal; a peak amplifier having a nonlinear output capacitor, amplifying the second signal and outputting the amplified second signal; a first output circuit for transmitting a first signal output from the carrier amplifier; a second output circuit that functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits a second signal output from the peak amplifier; and a synthesis circuit that synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal, When the peak amplifier performs an amplification operation, the impedance of the second output circuit when the peak amplifier views the synthesizing circuit changes to an impedance in the inductive region. The Doherty amplifier has a broadband circuit, which is inserted between the synthesis circuit and the load. When the peak amplifier stops, if the frequency of the first signal amplified by the carrier amplifier shifts toward the low frequency side compared to the center frequency of the frequency, the broadband circuit changes the impedance of the load observed from the synthesis circuit to the impedance of the capacitive region. If the frequency of the first signal amplified by the carrier amplifier shifts toward the high frequency side compared to the center frequency, the broadband circuit changes the impedance of the load observed from the synthesis circuit to the impedance of the inductive region.

6. A Doherty amplifier, characterized in that: The Doherty amplifier has: a carrier amplifier that amplifies the first signal and outputs the amplified first signal; a peak amplifier having a nonlinear output capacitor, amplifying the second signal and outputting the amplified second signal; a first output circuit for transmitting a first signal output from the carrier amplifier; a second output circuit that functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits a second signal output from the peak amplifier; and a synthesis circuit that synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal, When the peak amplifier performs an amplification operation, the impedance of the second output circuit when the peak amplifier views the synthesizing circuit changes to an impedance in the inductive region. The Doherty amplifier has: a first transmission line inserted between the first output circuit and the synthesizing circuit and having an electrical length that is an integral multiple of 180 degrees; as well as The second transmission line is inserted between the second output circuit and the combining circuit and has an electrical length that is an integral multiple of 180 degrees.

7. A Doherty amplifier, characterized in that: The Doherty amplifier has: a carrier amplifier that amplifies the first signal and outputs the amplified first signal; a peak amplifier having a nonlinear output capacitor, amplifying the second signal and outputting the amplified second signal; a first output circuit for transmitting a first signal output from the carrier amplifier; a second output circuit that functions as a virtual short-circuit stub when the peak amplifier is not performing an amplification operation, and transmits a second signal output from the peak amplifier; and a synthesis circuit that synthesizes the first signal transmitted by the first output circuit and the second signal transmitted by the second output circuit, and outputs a synthesis signal of the first signal and the second signal, When the peak amplifier performs an amplification operation, the impedance of the second output circuit when the peak amplifier views the synthesizing circuit changes to an impedance in the inductive region. The second output circuit includes a left-hand rule filter circuit.

8. The Doherty amplifier according to any one of claims 1 to 7, characterized in that: The first output circuit has an electrical length smaller than 90 degrees for compensating for the reactance of the second output circuit when viewed from the output side of the carrier amplifier when the peak amplifier is not performing an amplification operation.

9. The Doherty amplifier according to any one of claims 1 to 7, characterized in that: The Doherty amplifier has: a first output matching circuit that converts the output impedance of the carrier amplifier into the impedance of the first output circuit; and The second output matching circuit converts the output impedance of the peak amplifier into the impedance of the second output circuit.

10. The Doherty amplifier according to claim 8, characterized in that: The Doherty amplifier has: a first output matching circuit that converts the output impedance of the carrier amplifier into the impedance of the first output circuit; and The second output matching circuit converts the output impedance of the peak amplifier into the impedance of the second output circuit.

11. A communication device, characterized in that: The communication device includes the Doherty amplifier according to any one of claims 1 to 10 as an amplifier for amplifying a first signal and a second signal, which are communication signals.

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