Display device

Abstract

A display device is provided. The display device includes a display panel, a first connection circuit board, and a second connection circuit board, the display panel includes a first pad arranged in a first direction and a second pad spaced apart from the first pad, the first connection circuit board is electrically connected to the first pad, and the second connection circuit board is electrically connected to the second pad. The first connection circuit board includes: a first output pad electrically connected to the first pad; and at least two first protrusions spaced apart in the first direction and protruding in a second direction intersecting the first direction. The second connection circuit board includes: a second output pad electrically connected to the second pad; and at least one second protrusion, the at least one second protrusion protruding in the second direction and located between the at least two first protrusions when viewed on a plane parallel to the surface of the display panel.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2020-0085296, filed on Jul. 10, 2020, which is hereby incorporated by reference in its entirety. Technical Field

[0003] Aspects of exemplary embodiments of the present disclosure relate to a display device, and more particularly, to a display device having improved display efficiency and durability. Background Art

[0004] Generally, after manufacturing the display panel, the circuit board is connected to the display panel. For example, in a tape automated bonding (TAB) mounting method, the circuit board is bonded to the display panel by using an anisotropic conductive film (ACF).

[0005] Recently, although a bezel area (or non-display area) is reduced, design schemes for a display device having strong durability have been actively studied.

[0006] The above information disclosed in this Background section is for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute prior art. Summary of the invention

[0007] One or more exemplary embodiments of the present disclosure are directed to a display device including a connection circuit board, which may be applied to a high-resolution display device while reducing an inefficient area and preventing or substantially preventing defects such as curling and tearing from occurring.

[0008] According to one or more exemplary embodiments of the present disclosure, a display device includes a display panel, a first connection circuit board, and a second connection circuit board, the display panel includes a first pad arranged in a first direction and a second pad spaced apart from the first pad, the first connection circuit board is electrically connected to the first pad, and the second connection circuit board is electrically connected to the second pad. The first connection circuit board includes: a first output pad electrically connected to the first pad; and at least two first protrusions spaced apart in the first direction and protruding in a second direction intersecting the first direction. The second connection circuit board includes: a second output pad electrically connected to the second pad; and at least one second protrusion, the at least one second protrusion protruding in the second direction and located between the at least two first protrusions when viewed on a plane parallel to the surface of the display panel.

[0009] In an exemplary embodiment, the display device may further include a main circuit board electrically connected to the first connection circuit board and the second connection circuit board.

[0010] In an exemplary embodiment, the first connection circuit board may further include a first input pad located on each of the at least two first protrusions and electrically connected to the main circuit board, and the second connection circuit board may further include a second input pad located on the second protrusion and electrically connected to the main circuit board.

[0011] In an exemplary embodiment, at least two first protrusions may not overlap with the second protrusion when viewed on a plane.

[0012] In an exemplary embodiment, the at least two first protrusions may be symmetrical to each other with respect to a first reference line extending through a center of the first connection circuit board in a direction perpendicular to the first direction.

[0013] In an exemplary embodiment, the first connection circuit board may further include a plurality of first signal lines electrically connected to the plurality of first output pads, and the plurality of first signal lines may have a symmetrical shape with respect to the first reference line.

[0014] In an exemplary embodiment, the second protrusion may have a symmetrical shape with respect to a second reference line extending through a center of the second connection circuit board in a direction perpendicular to the first direction.

[0015] In an exemplary embodiment, the second connection circuit board may further include a plurality of second signal lines electrically connected to the plurality of second output pads, and the plurality of second signal lines may have a symmetrical shape with respect to the second reference line.

[0016] In an exemplary embodiment, the second connection circuit board may further include hatched portions extending in a direction between the first direction and the second direction, the second protrusion being located between the hatched portions.

[0017] In an exemplary embodiment, the first connection circuit board may further include at least one first additional protrusion located between the at least two first protrusions and spaced apart from the at least two first protrusions in the first direction.

[0018] In an exemplary embodiment, the at least one second protrusion may include a plurality of second protrusions, and the at least one second recess may be defined between the plurality of second protrusions in the second connection circuit board.

[0019] In an exemplary embodiment, the first connection circuit board may be located on the second connection circuit board.

[0020] In an exemplary embodiment, the second connection circuit board may be located on the first connection circuit board.

[0021] In an exemplary embodiment, the first recess may be defined between a plurality of first protrusions, the plurality of first protrusions may include a first sub-protrusion and a second sub-protrusion spaced apart from the first sub-protrusion along a first direction, the first recess is located between the first sub-protrusion and the second sub-protrusion, and the first sub-protrusion and the second sub-protrusion may have the same shape as each other.

[0022] In an exemplary embodiment, the first connection circuit board may further include a first driving circuit between the first output pad and the first protrusion, and the second connection circuit board may further include a second driving circuit between the second output pad and the second protrusion.

[0023] In an exemplary embodiment, the first driving circuit and the second driving circuit may not overlap each other when viewed on a plane.

[0024] According to one or more exemplary embodiments of the present disclosure, a display device includes: a display panel including a first pad and a second pad; a first connection circuit board electrically connected to the first pad; and a second connection circuit board electrically connected to the second pad. The first connection circuit board includes: a first connection portion electrically connected to the first pad; and a first pattern portion defining at least two first protrusions, the at least two first protrusions being spaced apart in a first direction and protruding in a second direction intersecting the first direction. The second connection circuit board includes: a second connection portion electrically connected to the second pad; and a second pattern portion, the second pattern portion protruding in the second direction and defining at least one second protrusion that does not overlap with the first protrusion when viewed on a plane parallel to the surface of the display panel. At least two first protrusions have a symmetrical shape relative to a first reference line, the first reference line extending through the center of the first connection circuit board in a direction perpendicular to the first direction, and the second protrusion has a symmetrical shape relative to the second reference line, the second reference line extending through the center of the second connection circuit board in a direction perpendicular to the first direction.

[0025] In an exemplary embodiment, the first recess may be defined between at least two first protrusions in the first pattern portion, and the second protrusion may overlap the first recess when viewed on a plane.

[0026] In an exemplary embodiment, the display device may further include a main circuit board electrically connected to the first connection circuit board and the second connection circuit board, the first connection circuit board may further include a first input pad located on the first protrusion and electrically connected to the main circuit board, and the second connection circuit board may further include a second input pad located on the second protrusion and electrically connected to the main circuit board.

[0027] In an exemplary embodiment, at least two first protrusions may include a first sub-protrusion and a second sub-protrusion spaced apart from the first sub-protrusion along a first direction, the first recess is located between the first sub-protrusion and the second sub-protrusion, and the first sub-protrusion and the second sub-protrusion may be symmetrical to each other relative to the first reference line. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other aspects and features of the present disclosure will become more apparent to those skilled in the art through the following detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings. In the accompanying drawings:

[0029] Figure 1A is a perspective view of a display device according to an embodiment of the present disclosure;

[0030] Figure 1B is a cross-sectional view of a display device according to an embodiment of the present disclosure;

[0031] Figure 2 is a plan view of a display device according to an embodiment of the present disclosure;

[0032] Figure 3 is a partial cross-sectional view of a display panel according to an embodiment of the present disclosure;

[0033] Figure 4A is an enlarged plan view of a portion of a display device according to an embodiment of the present disclosure;

[0034] Figure 4B is an enlarged plan view of a portion of a display panel according to an embodiment of the present disclosure;

[0035] Figure 4C is a partial cross-sectional view of a display device according to an embodiment of the present disclosure;

[0036] Figure 5A is a rear view of a first connection circuit board according to an embodiment of the present disclosure;

[0037] Figure 5B is a rear view of a second connection circuit board according to an embodiment of the present disclosure;

[0038] Fig. 6A is an enlarged plan view of a portion of a display device according to an embodiment of the present disclosure;

[0039] Figure 6B is an enlarged plan view of a portion of a display panel according to an embodiment of the present disclosure;

[0040] Figure 6C is a partial cross-sectional view of a display device according to an embodiment of the present disclosure;

[0041] Fig. 7A is an enlarged plan view of a portion of a display device according to an embodiment of the present disclosure;

[0042] Figure 7B is a rear view of a first connection circuit board according to an embodiment of the present disclosure; and

[0043] Figure 7C is a rear view of a second connection circuit board according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] Hereinafter, exemplary embodiments will be described in more detail with reference to the accompanying drawings, in which similar reference numerals always refer to similar elements. However, the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments shown herein. On the contrary, these embodiments are provided as examples so that the present disclosure will be thorough and complete, and the aspects and features of the present disclosure will be fully communicated to those skilled in the art. Accordingly, it is not necessary for those of ordinary skill in the art to fully understand the aspects and features of the present disclosure, processes, elements and techniques may not be described. Unless otherwise noted, similar reference numerals represent identical elements throughout the drawings and written descriptions, and therefore their descriptions may not be repeated.

[0045] In the accompanying drawings, for the sake of clarity, the relative sizes of elements, layers and zones may be exaggerated and / or simplified. Spatial relative terms, such as "beneath", "below", "lower", "lower side", "under", "above", "upper" and "upper side", etc., may be used herein for the convenience of explanation to describe the relationship between an element or feature and another element or feature as shown in the figure. In other words, these terms are described as relative concepts based on the directions shown in the accompanying drawings. It will be understood that, in addition to the orientations shown in the accompanying drawings, spatial relative terms are intended to also cover different orientations of the device in use or operation. For example, if the device in the figure is turned over, the element described as "below" or "beneath" or "under" of other elements or features will be subsequently oriented to "above" of other elements or features. Therefore, the exemplary terms "below" and "under" can cover both the orientations above and below. The device may be otherwise oriented (eg, rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0046] It will be understood that, although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, the first element, component, region, layer or part discussed below can be referred to as a second element, component, region, layer or part without departing from the spirit and scope of the present disclosure.

[0047] It will be understood that when an element or layer is referred to as being “on,” “connected to” or “coupled to” another element or layer, it can be directly on, directly connected to or coupled to the other element or layer, or one or more intervening elements or layers may be present. Additionally, it will be understood that when an element or layer is referred to as being “between” two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.

[0048] The technical terms used herein are for the purpose of describing specific embodiments and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, the singular forms "a" and "an" as used herein are also intended to include plural forms. It will also be understood that the terms "comprises", "comprising", "includes", "including", "has", "have" and "having", when used in this specification, indicate the existence of the stated features, integers, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, integers, steps, operations, elements, parts and / or their clusters. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of..." after a column of elements modify the entire column of elements, rather than modifying the individual elements in the column.

[0049] As used herein, the terms "substantially," "about," and similar terms are used as terms of approximation rather than terms of degree, and are intended to take into account the inherent deviations of measurements or calculations that one of ordinary skill in the art will recognize. In addition, "may" used when describing embodiments of the present disclosure refers to "one or more embodiments of the present disclosure." As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively. In addition, the term "exemplar" is intended to indicate an example or illustration.

[0050] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as those commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined as such herein, terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and / or specification, and should not be interpreted in an idealized or overly formal sense.

[0051] Figure 1A is a perspective view of a display device DD according to an embodiment of the present disclosure. Figure 1B is a cross-sectional view of a display device DD according to an embodiment of the present disclosure. For example, Figure 1B Shown along Figure 1A A cross section taken along line II'. Figure 2 is a plan view of a display device DD according to an embodiment of the present disclosure.

[0052] Reference Figure 1A , Figure 1B and Figure 2 , the display device DD includes a display panel DP, a connection circuit board FPCB and a main circuit board MPCB. In an embodiment, a driving circuit may be installed on the connection circuit board FPCB, but the present disclosure is not limited thereto. For example, the driving circuit may not be installed on the connection circuit board FPCB, but may be installed on the display panel DP or the main circuit board MPCB. The connection circuit board FPCB may include a first connection circuit board FPCB1 and a second connection circuit board FPCB2. The driving circuit installed on the first connection circuit board FPCB1 may be referred to as a first driving circuit, and the driving circuit installed on the second connection circuit board FPCB2 may be referred to as a second driving circuit.

[0053] In some embodiments, the display device DD may further include a chassis member or a molding member according to the type of the display panel DP, and may further include a backlight unit (eg, backlight).

[0054] The display panel DP may be any suitable one of a liquid crystal display panel, a plasma display panel, an electrophoretic display panel, a microelectromechanical system (MEMS) display panel, an electrowetting display panel, an organic light-emitting display panel, and a quantum dot light-emitting display panel, but is not particularly limited thereto. The emission layer of the organic light-emitting display panel may include an organic light-emitting material. The emission layer of the quantum dot light-emitting display panel may include quantum dots or quantum rods. In the following, for ease of illustration and description, the display panel DP is described as an organic light-emitting display panel, but the present disclosure is not limited thereto, and the display panel DP may be any suitable type of display panel, for example, such as a liquid crystal display panel.

[0055] The display panel DP may include a first substrate 100 and a second substrate 200 facing the first substrate 100 and spaced apart from the first substrate 100. A cell gap may be formed between the first substrate 100 and the second substrate 200. The cell gap may be maintained by a sealant SLM connecting the first substrate 100 and the second substrate 200 to each other. A filling layer FL (for example, see FIG. 1 ) formed of an insulating material or the like may be filled in the cell gap formed between the first substrate 100 and the second substrate 200. Figure 3 ). However, the present disclosure is not limited thereto, and an air layer may be arranged in the cell gap formed between the first substrate 100 and the second substrate 200. A grayscale display layer for generating an image may be arranged between the first substrate 100 and the second substrate 200. Depending on the type of the display panel DP, the grayscale display layer may include a liquid crystal layer, an organic emission layer, an electrophoretic layer, and / or a quantum dot emission layer. However, the present disclosure is not limited thereto, and in some embodiments, one of the first substrate 100 or the second substrate 200 may be omitted, and the display panel DP may include one display substrate.

[0056] like Figure 1A As shown in , the display panel DP may display an image through a display surface DP-IS. The display surface DP-IS is parallel to or substantially parallel to a surface defined by a first direction DR1 and a second direction DR2. The display surface DP-IS may include a display area DA and a non-display area NDA. The non-display area NDA is defined along an edge of the display surface DP-IS. The display area DA may be surrounded by the non-display area NDA (e.g., around the periphery of the non-display area NDA). However, the present disclosure is not limited thereto, and in an embodiment of the present disclosure, the non-display area NDA may be adjacent to only one area of ​​the display area DA adjacent to the plurality of connection circuit boards FPCB1 and FPCB2.

[0057] The third direction DR3 shown in the figure indicates the normal direction of the display surface DP-IS, for example, the thickness direction of the display panel DP. The front surface (or upper surface) and the rear surface (or lower surface) of each of the layers and / or units described in more detail below are divided by the third direction DR3. However, the first direction DR1, the second direction DR2, and the third direction DR3 shown in the figure are only examples, and the present disclosure is not limited thereto. Unless otherwise described, as used in this specification, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 may indicate various suitable directions that are parallel or substantially parallel to each other.

[0058] In the embodiments of the present disclosure, a display panel DP having a flat or substantially flat display surface is shown, but the present disclosure is not limited thereto. For example, in other embodiments, the display device DD may include a curved display surface or a three-dimensional display surface. The three-dimensional display surface may include a plurality of display areas indicating (e.g., facing) different directions from each other.

[0059] A signal control unit (eg, signal controller) SCP may be mounted on the main circuit board MPCB. The signal control unit SCP receives image data and control signals from an external graphics control unit (eg, external graphics controller). The signal control unit SCP may provide a control signal to the display panel DP.

[0060] The connection circuit board FPCB is electrically connected to each of the display panel DP and the main circuit board MPCB. The connection circuit board FPCB may transmit a signal from the main circuit board MPCB to the drive circuit, and may transmit a signal from the drive circuit to the display panel DP. In the present embodiment, the drive circuit may be a data drive circuit. The drive circuit may be mounted on the connection circuit board FPCB, and may be mounted on each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2. The specific arrangement relationship of the drive circuit mounted on the connection circuit board FPCB will be described in more detail below.

[0061] In an embodiment of the present disclosure, the connection circuit board FPCB may transmit a signal from the signal control unit SCP to the display panel DP. The connection circuit board FPCB may include a base layer including a flexible material.

[0062] The connection circuit board FPCB may be connected to each of the display panel DP and the main circuit board MPCB through a conductive adhesive member. The conductive adhesive member may include an anisotropic conductive film ACF. Hereinafter, for convenience, the conductive adhesive member may be described as an anisotropic conductive film ACF.

[0063] In the present embodiment, the connection circuit board FPCB may include two (e.g., two types) connection circuit boards FPCB1 and FPCB2. The first connection circuit board FPCB1 and the second connection circuit board FPCB2 are connected to different pad rows arranged at a pad area PDA (e.g., in a pad area PDA or on a pad area PDA). In the present embodiment, the pad area PDA is shown as being arranged on the first substrate 100, but the present disclosure is not limited thereto. For example, in another embodiment of the present disclosure, the pad area PDA may be arranged on the second substrate 200. The two (e.g., two types) connection circuit boards FPCB1 and FPCB2 will be described in more detail below.

[0064] exist Figure 2 , the arrangement relationship of a plurality of panel signal lines GL1 to GLn, DL1 to DLm, PL-G and PL-D and a plurality of pixels PX11 to PXnm on a plane is shown. The plurality of panel signal lines GL1 to GLn, DL1 to DLm, PL-G and PL-D include a plurality of gate lines GL1 to GLn, a plurality of data lines DL1 to DLm and a plurality of auxiliary signal lines PL-G and PL-D.

[0065] A plurality of gate lines GL1 to GLn extend in a first direction DR1 and are arranged in a second direction DR2. A plurality of data lines DL1 to DLm are insulated from and intersect the plurality of gate lines GL1 to GLn. A plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm are arranged at a display area DA (e.g., in or on the display area DA). A plurality of auxiliary signal lines PL-G and PL-D are arranged at a non-display area NDA (e.g., in or on the non-display area NDA) and are connected to the plurality of gate lines GL1 to GLn and the plurality of data lines DL1 to DLm. A plurality of auxiliary signal lines PL-G and PL-D include a gate auxiliary signal line PL-G and a data auxiliary signal line PL-D.

[0066] The plurality of gate auxiliary signal lines PL-G are connected to the plurality of gate lines GL1 to GLn and may be arranged at the same layer as the plurality of gate lines GL1 to GLn (e.g., in the same layer as the plurality of gate lines GL1 to GLn or on the same layer as the plurality of gate lines GL1 to GLn) to form an overall shape. Figure 2, the plurality of gate lines GL1 to GLn and the plurality of gate auxiliary signal lines PL-G are shown as the same signal line. Each of the plurality of gate lines GL1 to GLn and a corresponding one of the plurality of gate auxiliary signal lines PL-G connected to each other may be defined as different parts of one signal line. However, the present disclosure is not limited thereto, and the plurality of gate lines GL1 to GLn and the plurality of gate auxiliary signal lines PL-G connected to each other may be defined as being separated from each other.

[0067] A plurality of data auxiliary signal lines PL-D are connected to the plurality of data lines DL1 to DLm and may be arranged at a layer different from that of the plurality of data lines DL1 to DLm (e.g., in a layer different from that of the plurality of data lines DL1 to DLm or on a layer different from that of the plurality of data lines DL1 to DLm). The plurality of data lines DL1 to DLm may be electrically connected to corresponding signal lines among the plurality of data auxiliary signal lines PL-D through contact holes CH. The contact holes CH pass through at least one insulating layer arranged between the plurality of data lines DL1 to DLm and the plurality of data auxiliary signal lines PL-D. Figure 2 , two contact holes CH are shown by way of example.

[0068] However, the present disclosure is not limited thereto, and in an embodiment of the present disclosure, the contact hole CH may be omitted. In this case, the plurality of data lines DL1 to DLm and the plurality of data auxiliary signal lines PL-D may be arranged at the same layer as each other (e.g., in the same layer as each other or on the same layer as each other), and among the plurality of data lines DL1 to DLm and the plurality of data auxiliary signal lines PL-D, the connected one of the plurality of data lines DL1 to DLm and the connected one of the plurality of data auxiliary signal lines PL-D may be defined as one signal line. In this case, the data line and the data auxiliary signal line connected to each other may be defined as different parts of the same signal line.

[0069] Each of the plurality of pixels PX11 to PXnm is connected to a corresponding gate line among the plurality of gate lines GL1 to GLn and a corresponding data line among the plurality of data lines DL1 to DLm. Each of the plurality of pixels PX11 to PXnm may include a pixel driving circuit and a display element.

[0070] The plurality of pixels PX11 to PXnm may be arranged in a matrix shape along each of the first direction DR1 and the second direction DR2. However, the present disclosure is not limited thereto, and the plurality of pixels PX11 to PXnm may be arranged in an RGBG structure (eg, The pixels PX11 to PXnm may be arranged in a rhombus shape or a stripe shape.

[0071] like Figure 2As shown in , two pad rows PD1 and PD2 are arranged at each of a plurality of pad areas PDA (e.g., in each of a plurality of pad areas PDA or on each of a plurality of pad areas PDA). Each of the two pad rows PD1 and PD2 includes a plurality of pads arranged along a first direction DR1. The first pad row PD1 is arranged to be spaced apart from the second pad row PD2 in a direction intersecting the first direction DR1 (e.g., the second direction DR2). In an embodiment, in the second direction DR2, the second pad row PD2 is spaced apart from the edge E-DP of the display panel DP further than the first pad row PD1, and is arranged adjacent to the display area DA. However, the present disclosure is not limited thereto, and in another embodiment, the second pad row PD2 may be arranged to be closer to the edge E-DP of the display panel DP than the first pad row PD1, and spaced apart from the display area DA. Multiple pads arranged at the first pad row PD1 (e.g., in or on the first pad row PD1) and multiple pads arranged at the second pad row PD2 (e.g., in or on the second pad row PD2) are respectively connected to multiple data auxiliary signal lines PL-D.

[0072] The gate driving circuit GDC may be integrated on the display panel DP through an oxide silicon gate driver circuit (OSG) process or an amorphous silicon gate driver circuit (ASG) process. The gate auxiliary signal line PL-G receives a gate signal from the gate driving circuit GDC.

[0073] Figure 3 FIG. 1 is a partial cross-sectional view of a display panel DP according to an embodiment of the present disclosure. Figure 3 , a cross section corresponding to a pixel (eg, one pixel) PX included in the display panel DP is shown.

[0074] As described above, the display panel DP may be an organic light emitting display panel. Figure 3 As shown in , a pixel PX of the display panel DP may include a switching transistor T1, a driving transistor T2, and a light emitting element OLED.

[0075] The display panel DP may include a first substrate 100 and a second substrate 200. In the display panel DP, the first substrate 100 may be referred to as a display substrate, and the second substrate 200 may be referred to as a sealing substrate. The first substrate 100 may include a first base substrate BS1, a circuit element layer DP-CL arranged on the first base substrate BS1, and a display element layer DP-OLED arranged on the circuit element layer DP-CL. The second substrate 200 may include a second base substrate BS2, a black matrix layer BM, and a color conversion layer CCL. The black matrix layer BM and the color conversion layer CCL may be arranged under the second base substrate BS2. However, the present disclosure is not limited thereto, and in an embodiment, at least one of the second base substrate BS2 and the color conversion layer CCL included in the second substrate 200 may be omitted.

[0076] The first base substrate BS1 may include a synthetic resin substrate or a glass substrate. The circuit element layer DP-CL includes at least one insulating layer and at least one circuit element. The circuit element includes a signal line and a pixel driving circuit, etc. Each of the insulating layer, the semiconductor layer, and the conductive layer included in the circuit element layer DP-CL may be patterned and formed by a photolithography process.

[0077] In the present embodiment, the circuit element layer DP-CL may include a buffer layer BFL, a first insulating layer 10, a second insulating layer 20, and a third insulating layer 30. Each of the first insulating layer 10 and the second insulating layer 20 may be an inorganic layer, and the third insulating layer 30 may be an organic layer. The third insulating layer 30 may be referred to as an intermediate organic layer.

[0078] By way of example Figure 3 The arrangement relationship between the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, the first control electrode GE1, the second control electrode GE2, the connection signal line SCL and the connection electrode CNE constituting the switch transistor T1 and the drive transistor T2 is shown in FIG. Figure 3 The first through hole CH1 is also shown in FIG. Figure 3 Although not shown in the drawings, each of the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2 may be connected to an input electrode and an output electrode constituting the switching transistor T1 and the driving transistor T2. Figure 3 Although not shown, the connection signal line SCL may be connected to any suitable one of the transistors constituting the pixel circuit on a plane. In another embodiment, the connection signal line SCL may be omitted, and the connection electrode CNE may be connected to the semiconductor pattern of the transistor through the first through hole CH1.

[0079] The display element layer DP-OLED includes a light emitting element OLED. The display element layer DP-OLED may include an organic light emitting diode as the light emitting element OLED. The display element layer DP-OLED includes a pixel defining layer PDL. For example, the pixel defining layer PDL may be an organic layer.

[0080] The first electrode AE ​​is arranged on the third insulating layer 30. The first electrode AE ​​is connected to the connection electrode CNE through the second through hole CH2 passing through the third insulating layer 30. An opening portion OP is defined in the pixel defining layer PDL. The opening portion OP of the pixel defining layer PDL exposes at least a portion of the first electrode AE. The opening portion OP of the pixel defining layer PDL is called a light emitting opening portion to distinguish it from other opening portions.

[0081] like Figure 3 As shown in , the display panel DP may include an emission area PXA and a non-emission area NPXA adjacent to the emission area PXA. The non-emission area NPXA may surround the emission area PXA (e.g., around the periphery of the emission area PXA). In the present embodiment, the emission area PXA is defined to correspond to a partial area of ​​the first electrode AE ​​exposed by the light emitting opening portion OP.

[0082] The hole control layer HCL may be commonly arranged at the emission region PXA and the non-emission region NPXA (e.g., in the emission region PXA and the non-emission region NPXA or on the emission region PXA and the non-emission region NPXA). The hole control layer HCL may include a hole transport layer, and may also include a hole injection layer. The emission layer EML is arranged on the hole control layer HCL. The emission layer EML may be commonly arranged at the emission region PXA and the non-emission region NPXA (e.g., in the emission region PXA and the non-emission region NPXA or on the emission region PXA and the non-emission region NPXA). However, the present disclosure is not limited thereto, and the emission layer EML may be patterned to be arranged only at the emission region PXA (e.g., in the emission region PXA or on the emission region PXA), and may not be arranged at the non-emission region NPXA (e.g., in the non-emission region NPXA or on the non-emission region NPXA). The emission layer EML may include an organic material and / or an inorganic material. The emission layer EML may include a light emitting material that generates a desired (eg, predetermined) first color light (eg, such as blue light).

[0083] The electron control layer ECL is arranged on the emission layer EML. The electron control layer ECL may include an electron transport layer and may also include an electron injection layer. The electron control layer ECL may be commonly arranged at the emission region PXA and the non-emission region NPXA (for example, in the emission region PXA and the non-emission region NPXA or on the emission region PXA and the non-emission region NPXA). The hole control layer HCL and the electron control layer ECL may be commonly formed in a plurality of pixels PX using an open mask. The second electrode CE is arranged on the electron control layer ECL. The second electrode CE is commonly arranged in a plurality of pixels PX. A covering layer CL for protecting the second electrode CE may be arranged on the second electrode CE. The covering layer CL may include an organic material or an inorganic material.

[0084] The second base substrate BS2 is arranged to be spaced apart from the cover layer CL. The filling layer FL may be arranged between the second base substrate BS2 and the cover layer CL, and may fill the separation space between the second base substrate BS2 and the cover layer CL. However, the present disclosure is not limited thereto, and in an embodiment, the filling layer FL may be omitted. The second base substrate BS2 may include a synthetic resin substrate or a glass substrate. The color conversion layer CCL may transmit the first color light, or may convert the first color light into a color light having a different wavelength according to the pixel PX, for example, such as a second color light or a third color light. In an embodiment, the second color light may be green light, and the third color light may be red light. The color conversion layer CCL may include a light emitter, for example, such as a quantum dot.

[0085] In an embodiment of the present disclosure, a thin film sealing layer may be further arranged on the display element layer DP-OLED of the first substrate 100. The thin film sealing layer may be arranged between the display element layer DP-OLED and the second substrate 200. When the thin film sealing layer is arranged on the display element layer DP-OLED of the first substrate 100, the second base substrate BS2 of the second substrate 200 may be omitted. In this case, the black matrix layer BM and the color conversion layer CCL may be directly arranged on the thin film sealing layer.

[0086] Figure 4A is an enlarged plan view of a portion of the display device DD according to an embodiment of the present disclosure. Figure 4B is an enlarged plan view of a portion of the display panel DP according to an embodiment of the present disclosure. Figure 4C is a partial cross-sectional view of a display device DD according to an embodiment of the present disclosure. Figure 5A is a rear view of the first connection circuit board FPCB1 according to an embodiment of the present disclosure. Figure 5B FIG. 1 is a rear view of the second connection circuit board FPCB2 according to an embodiment of the present disclosure. Figure 4A , the display panel DP and the connection circuit board FPCB are shown in Figure 2A plan view of a state where the two electrodes are connected to each other at the region A shown in FIG. Figure 4B In more detail, Figure 4A Among the areas shown in FIG. 1 , a pad area PDA is electrically connected to the connection circuit board FPCB in the display panel DP. Figure 4C In the figure, it is shown that Figure 4A The section corresponding to the line II-II' shown in FIG. FIG. 4A to FIG. 5B The connection circuit board FPCB included in the display device DD according to an embodiment of the present disclosure is described in more detail.

[0087] Reference Figure 1A , Figure 4A and Figure 4B , a first pad row PD1 and a second pad row PD2 arranged at a pad area PDA of the display panel DP (for example, in or on the pad area PDA of the display panel DP) are electrically connected to output pads of the connection circuit board FPCB. The connection circuit board FPCB includes two (for example, two types) connection circuit boards FPCB1 and FPCB2. The two connection circuit boards FPCB1 and FPCB2 include a first connection circuit board FPCB1 and a second connection circuit board FPCB2. The first pad row PD1 includes a plurality of first pads PD1-P, and the second pad row PD2 includes a plurality of second pads PD2-P. The first connection circuit board FPCB1 is electrically connected to the plurality of first pads PD1-P, and the second connection circuit board FPCB2 is electrically connected to the plurality of second pads PD2-P. The first pad row PD1 may be arranged to be spaced apart from the second pad row PD2 along the second direction DR2. In the second direction DR2, the second pad row PD2 is spaced farther from the edge E-DP of the display panel DP than the first pad row PD1 and is arranged adjacent to the display area DA. For example, the second pad row PD2 is arranged between the first pad row PD1 and the display area DA.

[0088] Reference Figure 1A and FIG. 4A to FIG. 4C, the first connection circuit board FPCB1 and the second connection circuit board FPCB2 are arranged to overlap each other in a plane, and in a cross-section, the second connection circuit board FPCB2 may be arranged above the first connection circuit board FPCB1. Because the second connection circuit board FPCB2 is arranged above the first connection circuit board FPCB1, the second gap G2 between the first substrate 100 of the display panel DP and the second connection circuit board FPCB2 may be greater than the first gap G1 between the first substrate 100 of the display panel DP and the first connection circuit board FPCB1. In an embodiment, the first connection circuit board FPCB1 is electrically connected to the first pad PD1-P through the first output pad PO1, and the second connection circuit board FPCB2 is electrically connected to the second pad PD2-P through the second output pad PO2. The sum of the thicknesses of the second output pad PO2 and the second pad PD2-P may be greater than the sum of the thicknesses of the first output pad PO1 and the first pad PD1-P. In some embodiments, a conductive adhesive member, for example, such as an anisotropic conductive film ACF (for example, see Figure 1B ) may also be arranged between the first output pad PO1 and the first pad PD1-P, and between the second output pad PO2 and the second pad PD2-P. In this case, Figure 4C Unlike the embodiment shown in , the sum of the thicknesses of the second output pad PO2 and the second pad PD2-P and the sum of the thicknesses of the first output pad PO1 and the first pad PD1-P may be the same or substantially the same as each other, and the thickness of the anisotropic conductive film ACF arranged between the second output pad PO2 and the second pad PD2-P may be greater than the thickness of the anisotropic conductive film ACF arranged between the first output pad PO1 and the first pad PD1-P. However, the present disclosure is not limited thereto, and in some embodiments, a separate component for compensating for the difference between the second gap G2 and the first gap G1 may also be arranged between the second output pad PO2 and the second pad PD2-P.

[0089] The second input pad PI2 included at the second connection circuit board FPCB2 (e.g., in the second connection circuit board FPCB2 or on the second connection circuit board FPCB2) may be electrically connected to the second substrate pad PD-M2 arranged on the main circuit board MPCB. In some embodiments, the first input pad PI1 (e.g., see FIG. 1 ) included at the first connection circuit board FPCB1 (e.g., in the first connection circuit board FPCB1 or on the first connection circuit board FPCB1) may be electrically connected to the second substrate pad PD-M2 arranged on the main circuit board MPCB. Figure 5A ) can be electrically connected to the first substrate pad arranged on the main circuit board MPCB.

[0090] Reference FIG. 4A to FIG. 4C , Figure 5A and Figure 5B, according to the embodiment, the first connection circuit board FPCB1 and the second connection circuit board FPCB2 include the first connection part CP1 and the second connection part CP2 and the first pattern part PP1 and the second pattern part PP2. The first connection circuit board FPCB1 and the second connection circuit board FPCB2 may also include the first mounting part MP1 and the second mounting part MP2 arranged between the first connection part CP1 and the second connection part CP2 and the first pattern part PP1 and the second pattern part PP2. For example, the first connection circuit board FPCB1 includes the first connection part CP1, the first pattern part PP1, and the first mounting part MP1 arranged between the first connection part CP1 and the first pattern part PP1. The second connection circuit board FPCB2 includes the second connection part CP2, the second pattern part PP2, and the second mounting part MP2 arranged between the second connection part CP2 and the second pattern part PP2.

[0091] The first connection circuit board FPCB1 includes a first connection portion CP1, and the second connection circuit board FPCB2 includes a second connection portion CP2. The first connection portion CP1 and the second connection portion CP2 are portions electrically connected to a plurality of first pads PD1-P arranged at (e.g., in or on) the first pad row PD1 and a plurality of second pads PD2-P arranged at (e.g., in or on) the second pad row PD2. The first output pad PO1 electrically connected to the first pad PD1-P is arranged at (e.g., in or on) the first connection portion CP1, and the second output pad PO2 electrically connected to the second pad PD2-P is arranged at (e.g., in or on) the second connection portion CP2.

[0092] The first connecting circuit board FPCB1 may include a first mounting portion MP1, and the second connecting circuit board FPCB2 may include a second mounting portion MP2. Each of the first mounting portion MP1 and the second mounting portion MP2 may be a portion on which a driving circuit is mounted. The first driving circuit DC1 may be mounted on the first mounting portion MP1, and the second driving circuit DC2 may be mounted on the second mounting portion MP2. In a state in which each of the first connecting circuit board FPCB1 and the second connecting circuit board FPCB2 is connected to the display panel DP and the main circuit board MPCB, the first driving circuit DC1 and the second driving circuit DC2 may be arranged so as not to overlap each other on a plane. Figure 4A, it is shown as an example that the first drive circuit DC1 mounted on the first connection circuit board FPCB1 is arranged adjacent to the display panel DP, and the second drive circuit DC2 mounted on the second connection circuit board FPCB2 is arranged to be spaced farther from the display panel DP when compared with the first drive circuit DC1. However, the present disclosure is not limited thereto, and the second drive circuit DC2 may be arranged adjacent to the display panel DP closer to the display panel DP when compared with the first drive circuit DC1. In some embodiments, drive circuits such as the first drive circuit DC1 and the second drive circuit DC2 may be mounted on the main circuit board MPCB or the display panel DP instead of being mounted on the first connection circuit board FPCB1 and the second connection circuit board FPCB2.

[0093] The first connection circuit board FPCB1 includes a first pattern portion PP1, and the second connection circuit board FPCB2 includes a second pattern portion PP2. Each of the first pattern portion PP1 and the second pattern portion PP2 may be a portion electrically connected to the main circuit board MPCB.

[0094] The first pattern portion PP1 of the first connection circuit board FPCB1 includes at least two first protrusions PC1 spaced apart from each other in the first direction DR1. A first recess CC1 may be defined at the center of the first connection circuit board FPCB1. The first recess CC1 may be defined between two of the plurality of first protrusions PC1 spaced apart from each other in the first direction DR1. The plurality of first protrusions PC1 may include a first sub-protrusion PC1-S1 arranged at the left side of the first connection circuit board FPCB1 based on the first recess CC1, and a second sub-protrusion PC1-S2 arranged at the right side of the first connection circuit board FPCB1 based on the first recess CC1. The first protrusion PC1 may have a shape protruding in a direction away from the first connection portion CP1 connected to the display panel DP in a direction opposite to the second direction DR2. Based on the short side of the first connection circuit board FPCB1, that is, the side extending in the second direction DR2, the plurality of first protrusions PC1 may include a first sub-protrusion PC1-S1 arranged parallel to or substantially parallel to the left side, and a second sub-protrusion PC1-S2 arranged parallel to or substantially parallel to the right side. The first concave portion CC1 may be a portion recessed toward the first connection portion CP1 in the second direction DR2 between the first sub-protrusion PC1 - S1 and the second sub-protrusion PC1 - S2 spaced apart from each other in the first direction DR1 .

[0095] The first input pad PI1 may be arranged on the first protrusion PC1. The first input pad PI1 may be configured to be electrically connected to the main circuit board MPCB. In more detail, the first input pad PI1 may be electrically connected to the first substrate pad arranged on the main circuit board MPCB. A plurality of first input pads PI1 may be provided on the first protrusion PC1.

[0096] The second pattern portion PP2 of the second connection circuit board FPCB2 includes a second protrusion PC2 arranged at the center of the second connection circuit board FPCB2. The second protrusion PC2 may have a shape protruding in a direction away from the second connection portion CP2 connected to the display panel DP in a direction opposite to the second direction DR2 at the center of the second connection circuit board FPCB2. The second pattern portion PP2 may also include a hatched portion SC extending in a direction between the first direction DR1 and the second direction DR2, and the second protrusion PC2 is located between a plurality of hatched portions SC. A plurality of hatched portions SC may be arranged on the left and right sides of the second protrusion PC2. Since the hatched portions SC are formed on the second pattern portion PP2, when the second connection circuit board FPCB2 is connected to the main circuit board MPCB, defects caused by curling and / or tearing of the second connection circuit board FPCB2 may be prevented or substantially prevented. However, the present disclosure is not limited thereto, and the hatched portion SC may not be included at the second pattern portion PP2 (e.g., in or on the second pattern portion PP2), and a portion other than the portion where the second protrusion PC2 is arranged may have a right angle shape without an inclined shape.

[0097] The second input pad PI2 may be arranged on the second protrusion PC2. The second input pad PI2 may be electrically connected to the main circuit board MPCB. In more detail, the second input pad PI2 may be electrically connected to the second substrate pad PD-M2 arranged on the main circuit board MPCB. A plurality of second input pads PI2 may be provided on the second protrusion PC2.

[0098] The first protrusion PC1 of the first pattern portion PP1 and the second protrusion PC2 of the second pattern portion PP2 may not overlap each other on a plane. In other words, the second protrusion PC2 of the second pattern portion PP2 overlaps with the portion of the first pattern portion PP1 where the first recess CC1 is defined, and does not overlap with the portion where the first protrusion PC1 is arranged. In the second pattern portion PP2, a separate pattern may not be arranged at a portion overlapping with the first protrusion PC1 of the first pattern portion PP1 (for example, in a portion overlapping with the first protrusion PC1 of the first pattern portion PP1 or on a portion overlapping with the first protrusion PC1 of the first pattern portion PP1). The first protrusion PC1 of the first pattern portion PP1 may overlap with a portion of an area where the hatched portion SC is arranged at the second pattern portion PP2 (for example, in the second pattern portion PP2 or on the second pattern portion PP2) on a plane.

[0099] The first connection circuit board FPCB1 may also include a plurality of first signal lines SL1. Each of the plurality of first signal lines SL1 may be connected to the first output pad PO1. Each of the plurality of first signal lines SL1 may be connected to at least one of the first output pad PO1 and the first input pad PI1. The plurality of first signal lines SL1 may include a first bypass signal line SL1-B that directly connects the first output pad PO1 and the first input pad PI1 to each other, and a first main signal line SL1-D that connects the first output pad PO1 and the first input pad PI1 to the first drive circuit DC1 through the first connection pad CPD1.

[0100] The second connection circuit board FPCB2 may also include a plurality of second signal lines SL2. Each of the plurality of second signal lines SL2 may be connected to the second output pad PO2. Each of the plurality of second signal lines SL2 may be connected to at least one of the second output pad PO2 and the second input pad PI2. The plurality of second signal lines SL2 may include a second bypass signal line SL2-B that directly connects the second output pad PO2 and the second input pad PI2 to each other, and a second main signal line SL2-D that connects the second output pad PO2 and the second input pad PI2 to the second drive circuit DC2 through the second connection pad CPD2.

[0101] Each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2 may have a symmetrical shape based on a reference line defined at a center thereof.

[0102] In the first connection circuit board FPCB1, the first reference line VL1 is defined extending along the second direction DR2 and is defined at the center of the first connection circuit board FPCB1 in the first direction DR1. The first connection circuit board FPCB1 may have a symmetrical shape based on the first reference line VL1. The two first protrusions PC1 included in the first pattern portion PP1 of the first connection circuit board FPCB1 may have a symmetrical shape based on the first reference line VL1. In other words, based on the first reference line VL1, the first sub-protrusion PC1-S1 and the second sub-protrusion PC1-S2 may have the same or substantially the same separation distance as each other, and the same or substantially the same shape as each other. As used in this specification, "substantially the same" refers to the values ​​of each component such as intervals and widths, which are not only the same as each other, but also the same as each other within the range including differences that may occur due to errors in the process despite the same design. At least one of the first output pad PO1, the first input pad PI1, and the first signal line SL1 included in the first connection circuit board FPCB1 may be arranged to be symmetrical based on the first reference line VL1.

[0103] In the second connection circuit board FPCB2, the second reference line VL2 may be defined extending along the second direction DR2 and defined at the center of the second connection circuit board FPCB2 in the first direction DR1. The second connection circuit board FPCB2 may have a symmetrical shape based on the second reference line VL2. The second protrusion PC2 included in the second pattern portion PP2 of the second connection circuit board FPCB2 may have a symmetrical shape based on the second reference line VL2. The second protrusion PC2 may have the same or substantially the same width arranged to overlap with the second reference line VL2 and extend to the left and right based on the second reference line VL2. At least one of the second output pad PO2, the second input pad PI2, and the second signal line SL2 included in the second connection circuit board FPCB2 may be arranged to be symmetrical based on the second reference line VL2.

[0104] In the display device DD according to the embodiment of the present disclosure, with respect to each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2, the protruding patterns of the first pattern portion PP1 and the second pattern portion PP2 connected to the main circuit board MPCB are arranged so as not to overlap each other on a plane, and based on the reference line defined at the center of each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2, the first connection circuit board FPCB1 and the second connection circuit board FPCB2 may have a symmetrical shape. Since each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2 is symmetrically designed, an inefficient area in a case where it may be difficult to arrange wiring and / or the like in a connection circuit board having an asymmetrical shape can be reduced, and the input / output pads and signal lines included in each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2 can also be designed to be symmetrically arranged so that the wiring connection efficiency of the connection circuit board can be increased. In addition, the occurrence of defects (e.g., such as curling and / or tearing) caused by heat in an inefficient area of ​​the connection circuit board having an asymmetrical shape can be minimized or reduced, so that the reliability of the connection circuit board can be improved. Accordingly, the display efficiency and durability of the display device DD including the first connection circuit board FPCB1 and the second connection circuit board FPCB2 may be improved.

[0105] Fig. 6A is an enlarged plan view of a portion of a display device according to another embodiment of the present disclosure. Figure 6B is an enlarged plan view of a portion of a display panel according to another embodiment of the present disclosure. Figure 6C is a partial cross-sectional view of a display device according to another embodiment of the present disclosure. Fig. 6A An enlarged view of a portion of a display device is shown in which a display panel and a main circuit board are connected to each other through a connection circuit board. Figure 6BA pad area in the display panel that is electrically connected to a connection circuit board is shown. Figure 6C is with Fig. 6A The cross section corresponding to the line III-III' shown in FIG. FIG. 6A to FIG. 6C In describing a connection circuit board included in a display device according to an embodiment of the present disclosure, the same reference numerals are assigned to components that are the same as or substantially the same as those described above, and thus redundant descriptions thereof may not be repeated.

[0106] Reference Figure 5A , Figure 5B and FIG. 6A to FIG. 6C , the first connection circuit board FPCB1 and the second connection circuit board FPCB2 are arranged to overlap each other in a plane, and in a cross section, the first connection circuit board FPCB1 may be arranged above the second connection circuit board FPCB2. Figure 5A As shown in FIG. 1 , a first connection circuit board FPCB1 including two first protrusions PC1 and defining a first recess CC1 between the two first protrusions PC1 is arranged at the upper side, and as shown in FIG. Figure 5B As shown in , the second connection circuit board FPCB2 including the second protrusion PC2 arranged at the center may be arranged at the lower side. In the display device DD according to the embodiment of the present disclosure, as in FIG. 4A to FIG. 4C In the embodiment shown in , the first connection circuit board FPCB1 may be arranged at the lower side, and the second connection circuit board FPCB2 may be arranged at the upper side, and as in FIG. 6A to FIG. 6C In the embodiment shown in , the second connection circuit board FPCB2 may be arranged at the lower side, and the first connection circuit board FPCB1 may be arranged at the upper side.

[0107] Refer again Figure 5A , Figure 5B and FIG. 6A to FIG. 6C , in order to connect with the first connection circuit board FPCB1 arranged at the upper side, the first pad row PD1 including the plurality of first pads PD1-P is arranged to be spaced apart from the edge E-DP of the display panel DP further than the second pad row PD2, and may be arranged adjacent to the display area DA. In addition, in order to connect to the second connection circuit board FPCB2 arranged at the lower side, the second pad row PD2 including the plurality of second pads PD2-P is arranged to be spaced apart from the display area DA of the display panel DP further than the first pad row PD1, and may be arranged adjacent to the edge E-DP.

[0108] Because the first connection circuit board FPCB1 is arranged above the second connection circuit board FPCB2, the first gap G1 between the first substrate 100 of the display panel DP and the first connection circuit board FPCB1 may be greater than the second gap G2 between the first substrate 100 of the display panel DP and the second connection circuit board FPCB2. In an embodiment, the first connection circuit board FPCB1 is electrically connected to the first pad PD1-P through the first output pad PO1, and the second connection circuit board FPCB2 is electrically connected to the second pad PD2-P through the second output pad PO2. The sum of the thicknesses of the first output pad PO1 and the first pad PD1-P may be greater than the sum of the thicknesses of the second output pad PO2 and the second pad PD2-P. In some embodiments, the conductive adhesive member, for example, such as an anisotropic conductive film ACF (for example, see Figure 1B ) may also be arranged between the first output pad PO1 and the first pad PD1-P, and between the second output pad PO2 and the second pad PD2-P. In this case, Figure 6C Unlike the embodiment shown in , the sum of the thickness of the first output pad PO1 and the first pad PD1-P and the sum of the thickness of the second output pad PO2 and the second pad PD2-P may be the same or substantially the same as each other, and the thickness of the anisotropic conductive film ACF arranged between the first output pad PO1 and the first pad PD1-P may be greater than the thickness of the anisotropic conductive film ACF arranged between the second output pad PO2 and the second pad PD2-P. However, the present disclosure is not limited thereto, and in some embodiments, a separate component for compensating for the difference between the second gap G2 and the first gap G1 may also be arranged between the first output pad PO1 and the first pad PD1-P.

[0109] The second input pads PI2 included in the second connection circuit board FPCB2 may be electrically connected to the second substrate pads PD-M2 arranged on the main circuit board MPCB. In some embodiments, the first input pads PI1 included in the first connection circuit board FPCB1 may be electrically connected to the first substrate pads arranged on the main circuit board MPCB.

[0110] Fig. 7A is an enlarged plan view of a portion of a display device according to another embodiment of the present disclosure. Figure 7B is a rear view of a first connection circuit board according to another embodiment of the present disclosure. Figure 7C is a rear view of a second connection circuit board according to another embodiment of the present disclosure. 7A to 7C In describing a connection circuit board included in a display device according to an embodiment of the present disclosure, the same reference numerals are assigned to components that are the same as or substantially the same as those described above, and thus redundant descriptions thereof may not be repeated.

[0111] Reference 7A to 7C , according to the embodiment, the first connection circuit board FPCB1-1 and the second connection circuit board FPCB2-1 are arranged to overlap each other on a plane. The first connection circuit board FPCB1-1 and the second connection circuit board FPCB2-1 include a first connection portion CP1 and a second connection portion CP2 and a first pattern portion PP1-1 and a second pattern portion PP2-1. The first connection circuit board FPCB1-1 and the second connection circuit board FPCB2-1 may also include a first mounting portion MP1 and a second mounting portion MP2 arranged between the first connection portion CP1 and the second connection portion CP2 and the first pattern portion PP1-1 and the second pattern portion PP2-1. For example, the first connection circuit board FPCB1-1 includes a first connection portion CP1, a first pattern portion PP1-1, and a first mounting portion MP1 arranged between the first connection portion CP1 and the first pattern portion PP1-1. The second connection circuit board FPCB2-1 includes a second connection portion CP2, a second pattern portion PP2-1, and a second mounting portion MP2 arranged between the second connection portion CP2 and the second pattern portion PP2-1. Fig. 7A It is shown that the second connection circuit board FPCB2 - 1 is arranged above the first connection circuit board FPCB1 - 1 , but the present disclosure is not limited thereto, and in other embodiments, the first connection circuit board FPCB1 - 1 may be arranged above the second connection circuit board FPCB2 - 1 .

[0112] The first connection circuit board FPCB1-1 according to the embodiment includes a first pattern portion PP1-1, and the first pattern portion PP1-1 may include at least two first protrusions PC1-1. In the first pattern portion PP1-1, the first concave portion CC1 (for example, see Figure 5A ) may be defined between the two first protrusions PC1-1, and the two first protrusions PC1-1 may include a first sub-protrusion PC1-S1' and a second sub-protrusion PC1-S2'. The first pattern portion PP1-1 may include a first concave portion CC1 (eg, see Figure 5A ) in at least one first additional protrusion PC1-a. The first additional protrusion PC1-a may be arranged between the first sub-protrusion PC1-S1' and the second sub-protrusion PC1-S2', and may be spaced apart from each of the first sub-protrusion PC1-S1' and the second sub-protrusion PC1-S2' along the first direction DR1. When the first additional protrusion PC1-a is arranged, at least one first sub-opening portion CC1-1 may be defined between the first additional protrusion PC1-a and the first sub-protrusion PC1-S1', and at least one second sub-opening portion CC1-2 may be defined between the first additional protrusion PC1-a and the second sub-protrusion PC1-S2'. Figure 7BIt is shown that one first additional protrusion PC1-a is arranged as an example, but the present disclosure is not limited thereto, and a plurality of first additional protrusions PC1-a may be arranged. At least one of the plurality of first additional protrusions PC1-a may overlap with the first reference line VL1-1. The first sub-protrusion PC1-S1' and the second sub-protrusion PC1-S2' may be arranged symmetrically based on the first reference line VL1-1, and may have a symmetrical shape. The first additional protrusion PC1-a may be arranged symmetrically based on the first reference line VL1-1, and may have a symmetrical shape. The first input pad PI1 electrically connected to the main circuit board MPCB may be arranged at each of the first sub-protrusion PC1-S1', the second sub-protrusion PC1-S2' and the first additional protrusion PC1-a (for example, in each of the first sub-protrusion PC1-S1', the second sub-protrusion PC1-S2' and the first additional protrusion PC1-a or on each of the first sub-protrusion PC1-S1', the second sub-protrusion PC1-S2' and the first additional protrusion PC1-a).

[0113] The second connection circuit board FPCB2-1 according to the embodiment includes a second pattern portion PP2-1, and in the second pattern portion PP2-1, a plurality of second protrusions PC2-1 may be provided. The plurality of second protrusions PC2-1 may include a third sub-protrusion PC2-S1 and a fourth sub-protrusion PC2-S2 spaced apart from each other along the first direction DR1. A second recess CC2 may be defined between the plurality of second protrusions PC2-1. In an embodiment, the second recess CC2 may be defined between the third sub-protrusion PC2-S1 and the fourth sub-protrusion PC2-S2 spaced apart from each other along the first direction DR1. The second recess CC2 may be a portion recessed toward the second connection portion CP2 along the second direction DR2 between the third sub-protrusion PC2-S1 and the fourth sub-protrusion PC2-S2 spaced apart from each other along the first direction DR1. Figure 7CIt is schematically shown that the plurality of second protrusions PC2-1 include a third sub-protrusion PC2-S1 and a fourth sub-protrusion PC2-S2, that is, two protrusions, but the present disclosure is not limited thereto, and the plurality of second protrusions PC2-1 may include three or more protrusions. When the plurality of second protrusions PC2-1 include three or more protrusions, the second recess CC2 may be defined as a plurality. The second recess CC2 may overlap with the second reference line VL2-1. The third sub-protrusion PC2-S1 and the fourth sub-protrusion PC2-S2 may be symmetrically arranged based on the second reference line VL2-1, and may have a symmetrical shape. A plurality of shadow line portions SC-1 may be arranged on the left side of the third sub-protrusion PC2-S1 and on the right side of the fourth sub-protrusion PC2-S2. The second input pad PI2 electrically connected to the main circuit board MPCB may be arranged at each of the third sub-protrusion PC2-S1 and the fourth sub-protrusion PC2-S2 (for example, in each of the third sub-protrusion PC2-S1 and the fourth sub-protrusion PC2-S2 or on each of the third sub-protrusion PC2-S1 and the fourth sub-protrusion PC2-S2).

[0114] The first protrusion PC1-1 of the first pattern portion PP1-1 and the second protrusion PC2-1 of the second pattern portion PP2-1 may not overlap each other on a plane. In addition, the first additional protrusion PC1-a and the second protrusion PC2-1 of the first pattern portion PP1-1 may not overlap each other on a plane. In other words, the third sub-protrusion PC2-S1 of the plurality of second protrusions PC2-1 of the second pattern portion PP2-1 overlaps with the portion defined with the first sub-opening CC1-1, and the fourth sub-protrusion PC2-S2 overlaps with the portion defined with the second sub-opening CC1-2, so that the portion where the first protrusion PC1-1 and the first additional protrusion PC1-a are arranged may not overlap with the portion where the second protrusion PC2-1 is arranged. The first additional protrusion PC1-a may be arranged to overlap with the second concave portion CC2 defined between the third sub-protrusion PC2-S1 and the fourth sub-protrusion PC2-S2. In the second pattern portion PP2-1, a separate pattern may not be arranged in the portion overlapping with the first protrusion PC1-1 of the first pattern portion PP1-1. The first protrusion PC1-1 of the first pattern portion PP1-1 may overlap a portion of the area in which the hatched portion SC-1 is arranged in the second pattern portion PP2-1 on a plane. In the display device according to the embodiment of the present disclosure, even if a plurality of first additional protrusions PC1-a are included in the first pattern portion PP1-1 of the first connection circuit board FPCB1-1, and a plurality of second protrusions PC2-1 included in the second pattern portion PP2-1 of the second connection circuit board FPCB2-1 are provided, the protrusion patterns of the first pattern portion PP1-1 and the second pattern portion PP2-1 are arranged so as not to overlap each other on a plane, and the first connection circuit board FPCB1-1 and the second connection circuit board FPCB2-1 may have a symmetrical shape based on a reference line defined at the center of each of the first connection circuit board FPCB1-1 and the second connection circuit board FPCB2-1. Accordingly, an inefficient area where it is difficult to arrange wiring or the like can be minimized or reduced, and the display efficiency and durability of the display device including the first connection circuit board FPCB1-1 and the second connection circuit board FPCB2-1 can be improved.

[0115] According to an embodiment of the present disclosure, two (e.g., two types) connection circuit boards can be applied to a high-resolution display device, and each of the two connection circuit boards is symmetrically designed so that an inefficient area can be minimized or reduced, and defects (e.g., such as curling and / or tearing) can be prevented or substantially prevented from occurring in the connection circuit boards. Accordingly, the display efficiency and durability of a display device including the connection circuit boards according to one or more embodiments of the present disclosure can be improved.

[0116] Although some exemplary embodiments have been described, it will be readily understood by those skilled in the art that various modifications in the exemplary embodiments are possible without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Therefore, unless otherwise specifically indicated, the features, characteristics and / or elements described in conjunction with a particular embodiment as will be apparent to those of ordinary skill in the art may be used alone or in combination with the features, characteristics and / or elements described in conjunction with other embodiments. Therefore, it will be understood that the foregoing is an illustration of various exemplary embodiments and will not be interpreted as being limited to the specific exemplary embodiments disclosed herein, and it will be understood that various modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the spirit and scope of the present disclosure as defined in the appended claims and their equivalents.

Claims

1. A display device, comprising: A display panel, the display panel comprising first pads arranged along a first direction and second pads spaced apart from the first pads; a first connecting circuit board, the first connecting circuit board being electrically connected to the first pad; as well as a second connecting circuit board, the second connecting circuit board being electrically connected to the second pad, Wherein, the first connecting circuit board comprises: a first output pad electrically connected to the first pad, the first output pad being positioned at a first end of the first connection circuit board; and at least two first protrusions, the at least two first protrusions being spaced apart along the first direction and protruding away from the first end of the first connecting circuit board in a second direction intersecting the first direction, the at least two first protrusions comprising first input pads to be electrically connected to a main circuit board, and Wherein, the second connecting circuit board comprises: a second output pad electrically connected to the second pad; and At least one second protrusion, the at least one second protrusion protruding in the second direction and located between the at least two first protrusions when viewed on a plane parallel to the surface of the display panel, the at least one second protrusion including a second input pad to be electrically connected to the main circuit board and located between the first input pads of the at least two first protrusions. 2 . The display device of claim 1 , further comprising the main circuit board electrically connected to the first input pad of the first connection circuit board and the second input pad of the second connection circuit board.

3. The display device according to claim 1, wherein: When viewed on the plane, the at least two first protrusions do not overlap with the second protrusion.

4. The display device according to claim 1, wherein: The at least two first protrusions are symmetrical to each other with respect to a first reference line extending through a center of the first connection circuit board in a direction perpendicular to the first direction.

5. The display device according to claim 4, wherein: The first connection circuit board further includes a plurality of first signal lines electrically connected to the plurality of first output pads, and The plurality of first signal lines have a symmetrical shape relative to the first reference line.

6. The display device according to claim 1, wherein: The second protrusion has a symmetrical shape with respect to a second reference line extending through a center of the second connection circuit board in a direction perpendicular to the first direction.

7. The display device according to claim 6, wherein: The second connection circuit board further includes a plurality of second signal lines electrically connected to the plurality of second output pads, and The plurality of second signal lines have a symmetrical shape relative to the second reference line.

8. The display device according to claim 1, wherein: The first connection circuit board further includes at least one first additional protrusion located between the at least two first protrusions and spaced apart from the at least two first protrusions along the first direction.

9. The display device according to claim 1, wherein: The at least one second protrusion comprises a plurality of second protrusions, and Wherein, at least one second recess is defined between the plurality of second protrusions in the second connecting circuit board.

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