A FPGA wiring method for reducing the memory occupied by wiring diagram

Abstract

The present application discloses an FPGA wiring method for reducing the memory occupied by a wiring diagram, and relates to the field of FPGA. The method stores all cost variables of nodes in integer type, and during the operation of the wiring algorithm, obtains an integer wiring cost based on the cost variable, and then calculates and stores the integer wiring cost. The method can greatly reduce the memory requirement on the basis of ensuring the FPGA wiring effect, so that the software tools of high-end capacity FPGA can run on common hardware systems without the need to use specific high-end servers.

Description

Technical Field

[0001] The invention relates to the field of FPGA, and in particular to an FPGA wiring method for reducing memory occupied by a wiring diagram. Background Art

[0002] FPGA routing is the process of connecting the occupied logic units using the device's programmable interconnection resources after the chip is laid out. When routing the FPGA, it is generally necessary to abstract the programmable logic resources on the FPGA, including the interconnection resources, into a routing diagram G = (V, E). The wiring diagram has representations of all underlying modules, architectures, and interconnection resources. Each point n in V represents a routing resource or port of a resource module in the FPGA, and each directed edge e = (n1, n2) in E represents a switch from point n1 to point n2. The wire net N in the user's design netlist i When mapped to FPGA, the corresponding line network N i is the combination of its network endpoints, including the source point s i and several destination points t ij , wire network N i It can be regarded as a subset of V. i Routing, that is, finding a connection tree (Routing Tree) RT composed of routing resources (line segments) on G i Can i With all the t ij All connected. When routing is complete, each signal in the netlist has the correct connection tree RT i , and no routing resource in the wiring diagram is shared or occupied by more than one signal, that is, there is no routing conflict.

[0003] The commonly used FPGA routing algorithm is the congestion negotiation algorithm, which is as follows. Please combine Figure 1 The process shown:

[0004] (1) Create a wiring diagram and read in the user design netlist and constraints.

[0005] (2) Select the network N in the user design netlist that does not have a connection tree or has a node in the existing connection tree that involves resource sharing conflicts. i If the line network N i If the tree is not connected yet, directly execute the following step (3). i If there is already a connection tree containing nodes involved in resource sharing conflicts, then the line network N i All existing connection trees are removed and cleared for rewiring, and then step (3) is executed.

[0006] (3) Set the wire network N i The source point iPut in connection tree RT i Middle pair connection tree RT i initialization.

[0007] (4) Initialize the priority queue PQ (PrioritQueue) and set it to the connection tree RT i , set the routing cost of all nodes in the priority queue PQ to 0. In the first cycle, the connection tree RT i There is only source point s i , so there is only source point s in the priority queue PQ i .

[0008] (5) Remove the node m with the lowest wiring cost from the priority queue PQ and check whether the node m is a node in the network N. i destination point.

[0009] (6) If node m is not a network N i The destination point t ij , traverse all fan-out nodes n of node m and add them to PQ, and determine the routing cost cost of each fan-out node n as cost = cn + Pim, where cn is the node cost of the fan-out node n and Pim is the source point s i The total cost to node m is expressed as the path cost of the fan-out node n. Then re-execute step (4).

[0010] (7) If node m is a network N i The destination point t ij , then the destination point t ij (Point m) traces back to the source point s i , update the node cost cn of all nodes on the path, and add all nodes on the path to the network N i Connection Tree RT i Update the connection tree RT i , execute steps (3) to (4) again until the network N is found i When updating the node cost cn, it is generally updated based on the number of resource conflicts, the length of the wiring resources, the timing redundancy, etc. of the node.

[0011] In the above method, the node cost cn of the node with resource sharing conflict increases cumulatively, so it is less likely to be selected as a path when searching for a new routing path, which can reduce the probability of resource sharing conflict. Repeat the above (2) to (7) to traverse each net in the user design netlist that has not been routed or has routing path conflicts, and iterate until the conflict is eliminated, all nets in the user design netlist are routed, and there is no resource sharing conflict between all connection trees.

[0012] In the above process, the wiring diagram generally contains at least two cost variables in the data structure of each node, one representing the node cost cn of the node, and the other representing the path cost Pim of the node. These cost variables are floating point numbers represented by float or double. Therefore, when calculating the wiring cost cost of the node, cn and Pim are directly read from the wiring diagram for calculation, making the calculation more convenient. However, in the C / C++ standard, float occupies 4 bytes and double occupies 8 bytes. The number of nodes in a high-capacity FPGA wiring diagram can reach hundreds of M (hundreds of millions) or even G (billion), which causes the wiring diagram to occupy a large amount of memory. In particular, as the scale of FPGA continues to increase significantly, the scale of the wiring diagram increases (that is, the device capacity is large), resulting in a higher maximum memory requirement when the FPGA software is running. Summary of the invention

[0013] In view of the above problems and technical requirements, the inventors have proposed an FPGA wiring method for reducing the memory occupied by the wiring diagram. The technical solution of the present invention is as follows:

[0014] An FPGA wiring method for reducing memory occupied by a wiring diagram, the method comprising:

[0015] A wiring diagram is constructed according to the wiring resources inside the FPGA. The wiring diagram includes a number of nodes and the connections between the nodes. The cost variables stored in each node are all integer types. The cost variables at least include the node cost cn and the path cost Pim of the node.

[0016] The preset routing algorithm is used to route each wire net in the user's designed netlist based on the routing diagram. When routing each wire net, the integer routing cost is calculated based on the integer cost variable of each node, and each destination point is searched in turn according to the routing cost of each node.

[0017] A further technical solution is that the cost variable stored in each node also includes the node's delay delay and / or timing criticality crit, and the delay delay and / or timing criticality crit are both integers and mapped to their respective corresponding preset intervals.

[0018] A further technical solution is that each cost variable of the node is stored as unsigned short or unsigned char.

[0019] A further technical solution is that when calculating the cost variable of each node: directly performing integer operations on the integer cost variable to obtain an integer wiring cost.

[0020] A further technical solution is that when calculating the cost variable of each node: using floating-point parameters as weighting coefficients to perform floating-point operations on integer cost variables to obtain floating-point results, and converting the obtained floating-point results into integer wiring costs.

[0021] A further technical solution is that when calculating the cost variable of each node: an integer operation is performed on the integer cost variable using the integer cost variable as a weighting coefficient to obtain an integer wiring cost.

[0022] A further technical solution is that the method further includes: for each wire net in the user's designed netlist, based on the distance between each wire net endpoint in the wire net, using a predetermined sorting algorithm to predict the process of searching and routing the wire net using a preset routing algorithm, and obtaining an access sequence with a source point of the wire net as the starting point and each destination point in the wire net sorted in sequence;

[0023] In the process of implementing wiring on the wire network using a preset wiring algorithm, each destination point is searched in turn according to the access order, and in the process of searching for a destination point, the shortest distance between the current node and the currently searched destination point is determined based on the access order and the corresponding future cost is obtained, and the integer wiring cost is calculated based on the integer cost variable of each node and the future cost.

[0024] Its further technical solution is that, in the process of calculating the wiring cost, the cost variable of the current node is combined with the future cost in the form of (1-a)*c+a*cf, where c is the integer result obtained by directly performing an integer operation on the integer cost variable of the node, cf is the future cost of the current node, a is a floating point parameter and 0 <a<1。

[0025] A further technical solution is that, in the process of implementing routing for the same wire network using a preset routing algorithm, when searching for different destination points from first to last in the access order, the value of the floating point parameter a decreases.

[0026] A further technical solution is that the future cost of the current node is the minimum number of resource segments formed by combining the wiring resource lengths to form the shortest distance between the current node and the current search destination.

[0027] A further technical solution is that when searching for each node, if there are at least two fan-out nodes with the smallest and equal wiring costs, a fan-out node with the best predetermined conditions and the smallest wiring cost is selected for searching.

[0028] A further technical solution is that the node cost cn of each node is obtained based on the weighting of several resource feature information, and the number of resource conflicts has the highest weight among all resource feature information.

[0029] The beneficial technical effects of the present invention are:

[0030] The present application discloses an FPGA wiring method for reducing the memory occupied by the wiring diagram. The method stores all cost variables of the nodes in integer type, and during the operation of the wiring algorithm, the integer wiring cost is also calculated. Therefore, the method can greatly reduce the memory requirement, so that the software tools of high-end capacity FPGA can run on general common hardware systems without the need to use specific high-end servers. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a flowchart of FPGA routing using the existing congestion negotiation algorithm.

[0032] Figure 2 It is a logical schematic diagram of the wiring cost obtained in the FPGA wiring method provided by this application. DETAILED DESCRIPTION

[0033] The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings.

[0034] The present application discloses an FPGA wiring method for reducing the memory occupied by the wiring diagram. The wiring method is implemented based on an existing preset wiring algorithm and can be considered as an improvement on the existing preset wiring algorithm. The existing preset wiring algorithms typically include a crowded negotiation wiring algorithm and a Lee's maze wiring algorithm. Regardless of the wiring process of the preset wiring algorithm, the FPGA wiring method of the present application mainly includes the following steps:

[0035] First, a wiring diagram is constructed based on the wiring resources inside the FPGA. As described in the background technology section, the wiring diagram represents the programmable logic resources on the FPGA in a flat manner and forms the form of G = (V, E). The wiring diagram includes at least a number of nodes and the lines between the nodes. Each node represents the wiring resource or the port of the resource module in the FPGA, and the lines between the nodes represent the switches passed by the directed edges between the two nodes.

[0036] Each node stores the cost variable of the node, and the cost variable includes at least the node cost cn and the path cost Pim of the node. The present application modifies the data structure in the wiring diagram, and sets the cost variables stored in each node to be integer type. In one embodiment, each cost variable of the node is stored in unsigned short and occupies 2 bytes. Compared with the existing storage of float or double, each cost variable of each node can save 2 bytes or 6 bytes. In another embodiment, each cost variable of the node is stored in unsigned char and occupies 1 byte, which further saves storage space. However, in actual operation, the fewer the number of bits of the cost variable, the easier it is to have points with the same wiring cost cost when searching during the wiring process. At this time, an additional mechanism is needed to solve this problem. If the solution is not reasonable enough, it may cause unnecessary expansion of some nodes during the search, thereby increasing the search time and memory consumption, which is also disadvantageous. Therefore, in actual operation, unsigned short storage is generally selected, which can save storage space while still ensuring a better wiring effect.

[0037] In one embodiment, the cost variables stored in each node include not only the node cost cn and the path cost Pim, but also the node's delay delay and / or timing criticality crt. The delay delay and / or timing criticality crt are both integers and mapped to their respective corresponding preset intervals. Generally, the delay of the line segment corresponding to each node is a floating point number after calculation, which is first converted to an integer type and then mapped to a matching interval, such as 0..100, and then stored. Similarly, the timing margin of each fan-out of the netlist signal obtained from the timing analysis result is generally a floating point number, which is also first converted to an integer type and then mapped to a matching interval, such as 0..100, and then stored.

[0038] If each node stores 4 cost variables, then using unsigned short storage can save 8 bytes per node compared to using float storage. Using unsigned short storage can save 24 bytes per node compared to using double storage. Considering that the number of nodes in a high-capacity FPGA wiring diagram can reach hundreds of M (hundreds of millions) or even G (billion), the memory occupied by the wiring diagram using this method can be greatly reduced.

[0039] The preset routing algorithm is used to route each wire net in the user's design netlist based on the wiring diagram. When routing each wire net, the integer routing cost is calculated based on the cost variable of each node, and each destination point is searched in turn according to the routing cost of each node. Taking the congestion negotiation routing algorithm as an example, the specific method of searching and iterative routing can be referred to the background technology and the attached Figure 1 The flowchart of Lee's maze routing algorithm and other preset routing algorithms are also known, and the specific operation of this application will not be described in detail. The main improvement of this application is that in the conventional preset routing algorithm process, the routing cost of the node calculated is also in float or double format, while the routing cost of the node calculated by this application is also set to an integer type, generally in unsigned short format to meet usage requirements. There are three methods for obtaining integer routing cost based on cost variables, please combine Figure 2 The schematic diagram shown:

[0040] Method 1: When calculating the cost variable of each node: directly perform integer operations on the integer cost variable to obtain the integer wiring cost cost. Typically, all integer cost variables that need to be used are directly added to obtain the wiring cost cost, such as the commonly used cost = cn + Pim.

[0041] Method 2: When calculating the cost variable of each node: use floating-point parameters as weighting coefficients to perform floating-point operations on integer cost variables to obtain floating-point results, and convert the obtained floating-point results into integer wiring costs. The floating-point parameters corresponding to the weight coefficients of different cost variables are the same or different.

[0042] Method 3: When calculating the cost variable of each node: perform integer operation on the integer cost variable as a weighting coefficient to obtain the integer wiring cost. The floating point parameter with the predetermined value is generally t2 s In the form of , t and s are both integer coefficients. Typically, floating-point parameters are used as weight coefficients to weight the integer cost variables that need to be used. The overall weighted calculation method can be considered as first performing integer operations on the denominator to obtain the result and then dividing it by 2 s , and divided by 2 s The operation can be realized by shifting s bits to the right, so although t2 s It is still a floating point number, but the calculation process is still an integer operation. For example, cost = (1-a)*cn+a*Pim. If a = 1 / 2, then cost only needs to be calculated (cn+Pim) and then shifted right by one place and divided by 2. If a = 1 / 4, then cost only needs to be calculated (3*cn+Pim) and then shifted right by two places and divided by 4.

[0043] On the basis of the above method, in another embodiment, not only is the wiring cost calculated based on the cost variable like the conventional preset wiring algorithm, but the future cost cf is creatively included in the wiring cost cost for consideration. In this wiring method, firstly, for each wire net in the user's design netlist, based on the distance between each wire net endpoint in the wire net, a predetermined sorting algorithm is used to predict the process of searching and wiring the wire net using the preset wiring algorithm, and an access sequence is obtained with the source point of the wire net as the starting point and each destination point in the wire net sorted in sequence. The predetermined sorting algorithm is Prim MST algorithm, Kruskal MST algorithm or Dijkstra shortest path algorithm.

[0044] In the process of implementing routing on the wire network using the preset routing algorithm, each destination point is searched in sequence according to the order specified by the access order, and in the process of searching for a destination point, the shortest distance between the current node and the currently searched destination point is determined based on the access order and the corresponding future cost cf is obtained, and then the integer routing cost is calculated based on the integer cost variable of each node and the future cost cf, such as Figure 2 As shown. In one embodiment, the shortest distance between the current node and the destination point currently searched is directly used as the future cost cf of the current node, and the Manhattan distance can be used here. In order to further compress the value interval of the future cost cf into a smaller range, the future cost cf of the current node is determined to be the minimum number of resource segments for the shortest distance between the current node and the destination point currently searched formed by the combination of wiring resource lengths, that is, the shortest distance is converted into the number of resource segments as the future low price cf. The types and quantities of the included wiring resource lengths are known. For the shortest distance between the current node and the destination point currently searched, it can be formed by one or more identical or different wiring resource lengths. For example, the included wiring resource lengths are 1, 2, 5, 12, and 18. Then, the shortest distance 3 can be formed by combining the wiring resource lengths 2 and 1, so that the future cost is the minimum number of resource segments 2; the shortest distance 16 can have multiple combinations, but the combination of wiring resource lengths 12, 2, and 2 has the least number of resource segments, so the future cost is determined to be the minimum number of resource segments 3, and the rest is deduced by analogy.

[0045] When calculating the integer routing cost based on the integer cost variable and future cost of each node, similar to the method of calculating the routing cost only based on the cost variable mentioned above, it also includes the above three methods. In actual applications, if the future cost cf is added, the second and third methods mentioned above are more commonly used to calculate the routing cost cost. And more typically, when performing weighted calculation in combination with floating-point parameters, the cost variable of the current node is combined with the future cost according to the form of (1 - a) * c + a * cf, where c is the integer result obtained by performing integer operation on the integer cost variable of the node directly, cf is the future cost of the current node, and a is a floating-point parameter and 0 < a < 1. Based on this calculation form, the floating-point result can be obtained first and then converted into an integer result according to the practice of the second method mentioned above, or the integer result can be directly obtained by performing integer operation on the floating-point parameter with a specific value according to the practice of the third method mentioned above.

[0046] In this embodiment, after adding the future cost cf, a depth-first DFS search algorithm towards the destination point direction can be formed on the basis of the conventional preset routing algorithm, so as to reach the destination point faster, which can speed up the routing speed, reduce the memory requirement, and improve the overall routing efficiency. Among them, the coefficient a is the same or different during the process of using the preset routing algorithm to route different nets, and the coefficient a is the same or different when searching for different destination points during the process of using the preset routing algorithm to route the same net. More typically, during the process of using the preset routing algorithm to route the same net, when searching for different destination points in the order of access from first to last, the value of the floating-point parameter a decreases. This is because at the beginning of the search, connection is mainly considered, and the points close to the currently searched destination point need to be expanded first, so the weight a of the future cost cf is larger; while as the routing process iterates forward, the importance of the distance to the destination point decreases, and resolving resource conflicts needs to be mainly considered, so the weight a of the future cost cf decreases.

[0047] After determining the wiring cost of the node, you can select the point with the smallest wiring cost according to the preset wiring algorithm to start searching. Since the cost variable and wiring cost in this application are both integer types, the problem that may arise is that there will be multiple nodes with the same wiring cost value, so it will be unclear when selecting the node with the smallest cost to access. Therefore, when searching for each node, if there are at least two fan-out nodes with the smallest and equal wiring costs, then select a fan-out node with the best predetermined conditions and the smallest wiring cost to start searching. The better the predetermined conditions, the better the wiring effect. The predetermined conditions include at least one of the minimum number of resource conflicts and the minimum future cost. In fact, they can also include other conditions such as timing. One or more predetermined conditions can be customized to ensure that there is only one node with the lowest wiring cost and the best predetermined conditions, so as to avoid confusion and cause detours during the search.

[0048] After obtaining the destination point of the line network, it is also necessary to update the node cost cn of the nodes involved in the line network. The node cost cn of each node is obtained based on the weighting of several resource feature information. The resource feature information includes the number of resource conflicts, the length of the wiring resources, the timing redundancy, etc. In this application, the number of resource conflicts has the highest weight among all resource feature information. In this way, the number of resource conflicts has an absolute weight and becomes the priority reduction target among all resource feature information. For example, the node cost cn occupies 2 bytes as an integer result, the number of resource conflicts occupies one byte, and the remaining resource feature information occupies another byte. The number of resource conflicts is calculated, and the cost is increased each time by the second byte in units of 256.

Claims

1. A FPGA wiring method for reducing the memory occupied by a wiring diagram, characterized in that: The method comprises: Constructing a wiring diagram according to the wiring resources inside the FPGA, wherein the wiring diagram includes a plurality of nodes and connections between the nodes, and the cost variables stored in each node are all integer types, and the cost variables at least include the node cost cn and the path cost Pim of the node; Use the preset routing algorithm to route each net in the user's design netlist based on the routing diagram. When routing each net, calculate the integer routing cost based on the integer cost variable of each node, and search for each destination point in turn according to the routing cost of each node; The method also includes: for each wire net in the user's designed netlist, based on the distance between each wire net endpoint in the wire net, using a predetermined sorting algorithm to predict the process of searching and implementing routing for the wire net using a preset routing algorithm, and obtaining an access sequence with the source point of the wire net as the starting point and each destination point in the wire net sorted in sequence; in the process of implementing routing for the wire net using the preset routing algorithm, searching for each destination point in sequence according to the access sequence, and in the process of searching for a destination point, determining the shortest distance between the current node and the currently searched destination point based on the access sequence and obtaining the corresponding future cost, and calculating an integer routing cost based on the integer cost variable of each node and the future cost.

2. The method according to claim 1, characterized in that The cost variable stored in each node also includes the delay delay and / or timing criticality crit of the node. The delay delay and / or timing criticality crit are both integers and mapped to their corresponding preset intervals.

3. The method according to claim 1, characterized in that Each cost variable of a node is stored as unsigned short or unsigned char.

4. The method according to any one of claims 1 to 3, characterized in that: When calculating the cost variable of each node: directly perform integer operations on the integer cost variable to obtain an integer wiring cost.

5. The method according to any one of claims 1 to 3, characterized in that: When calculating the cost variable of each node: using the floating-point parameter as a weighting coefficient to perform floating-point operation on the integer cost variable to obtain a floating-point result, and converting the obtained floating-point result into an integer wiring cost.

6. The method according to any one of claims 1 to 3, characterized in that: When calculating the cost variable of each node: an integer operation is performed on the integer cost variable using the integer as a weighting coefficient to obtain an integer wiring cost.

7. The method according to claim 1, characterized in that In the process of calculating the wiring cost, according to The cost variable of the current node is calculated in combination with the future cost in the form of It is the result of directly performing an integer operation on the integer cost variable of the node. is the future cost of the current node, is a floating point parameter and .

8. The method according to claim 7, characterized in that When the same wire network is routed using the preset routing algorithm, when searching for different destination points from the first to the last in the access order, the floating point parameter The value of decreases.

9. The method according to claim 1, characterized in that: The future cost of the current node is the minimum number of resource segments that are combined by the wiring resource lengths to form the shortest distance between the current node and the destination point currently searched.

10. The method according to claim 1, characterized in that When searching for each node, if there are at least two fan-out nodes with the smallest and equal routing costs, a fan-out node with the best predetermined condition and the smallest routing cost is selected for searching.

11. The method according to claim 1, characterized in that: The node cost cn of each node is obtained based on the weight of several resource feature information, and the number of resource conflicts has the highest weight among all resource feature information.

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