Data power-off preservation method, device and electronic equipment

Abstract

The present invention is applicable to the field of data storage technology and provides a method, device, and electronic device for data power-off surviving. The method cyclically stores the write index values of a data area using multiple index storage units, and sets a label area. The label area includes multiple bits that correspond one-to-one with the index storage units, and the bit values corresponding to the index storage unit where the current write index value of the data area is located are set to be different from the bit values corresponding to the other index storage units. By searching for a target bit in the label area that is different from the other bit values, the current write index value of the data area is determined, and the data to be stored is written into the data storage unit indicated by the current write index value. Embodiments of the present invention can achieve data power-off surviving.

Description

Technical Field

[0001] The present invention belongs to the technical field of data storage, and in particular relates to a method, device and electronic equipment for data storage after power failure. Background Art

[0002] The power modules in electric vehicles and their charging stations often need to locally store multiple consecutive pieces of data. Traditionally, to continuously store multiple pieces of data of the same type, an address area is allocated for that type of data. The address area consists of a data area and an index area. The data area is used to store data in a cyclic manner, while the index area is used to cyclically store the write index value of the data area, that is, the write location of the next piece of data in the data area.

[0003] However, when the system unexpectedly loses power and then powers on again, the system cannot determine the power failure location and cannot achieve data retrieval after the power failure because there is more than one write index value in the index area. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a method, device, and electronic device for data power-off persistence, so as to achieve data power-off persistence.

[0005] A first aspect of an embodiment of the present invention provides a method for data power-off surviving, the method being configured to store data to be stored in an address area, the address area comprising a data area, an index area, and a label area; the data area being divided into a plurality of data storage units, each of which cyclically stores the data to be stored; the index area being divided into a plurality of index storage units, each of which cyclically stores a write index value of the data area; the label area comprising a plurality of bits corresponding one-to-one to the index storage units, wherein the bit values corresponding to the index storage unit containing the current write index value of the data area are different from the bit values corresponding to the other index storage units;

[0006] The method includes:

[0007] Get the data to be stored;

[0008] Find the target bit in the marked area that has a different value from other bits;

[0009] Extract the write index value in the index storage unit corresponding to the target bit to obtain the current write index value of the data area;

[0010] The data to be stored is written into the data storage unit indicated by the current write index value.

[0011] Optionally, a method for controlling the bit value corresponding to the index storage unit where the current write index value of the data area is located to be different from the bit values corresponding to other index storage units includes:

[0012] When no write index value is stored in each index storage unit, each bit value in the initialization mark area is a first value;

[0013] Each time the current write index value of the data area is written into a certain index storage unit, the bit value corresponding to the index storage unit is set to the second value, and the bit value corresponding to the previous index storage unit of the index storage unit is set to the first value;

[0014] If the index storage unit is the first index storage unit of the index area, the previous index storage unit is the last index storage unit of the index area.

[0015] Optionally, search for target bits in the marked area that have values different from other bits, including:

[0016] Search the bit whose value in the marked area is the second value to obtain the target bit.

[0017] Optionally, if the search result shows that there are two bits with the second value in the marked area, the target bit is determined according to the following method:

[0018] Determine whether the positions of the bits of the two values ​​being the second value are continuous;

[0019] If the positions of the two bits whose values are the second value are consecutive, the bit whose value is the second value is determined as the target bit;

[0020] If the positions of the two bits whose values are the second value are not consecutive, the first bit in the marked area is determined as the target bit.

[0021] Optionally, a method for controlling the bit value corresponding to the index storage unit where the current write index value of the data area is located to be different from the bit values corresponding to other index storage units includes:

[0022] Each time the current write index value of the data area is written into a certain index storage unit, the bit value of each bit in the mark area is initialized to the first value;

[0023] The bit value corresponding to the index storage unit is set to the second value.

[0024] Optionally, the first value is 0 and the second value is 1;

[0025] Alternatively, the first value is 1 and the second value is 0.

[0026] Optionally, after obtaining the data to be stored, the following steps are also included:

[0027] According to the type of data to be stored, determine whether the data to be stored corresponds to the address area;

[0028] If the data to be stored corresponds to the address area, the data to be stored is stored in the address area; if the data to be stored does not correspond to the address area, the data to be stored is not stored.

[0029] A second aspect of an embodiment of the present invention provides a data power-off surviving device, the device being configured to store data to be stored in an address area, the address area including a data area, an index area, and a label area; the data area being divided into a plurality of data storage units, each of which cyclically stores the data to be stored; the index area being divided into a plurality of index storage units, each of which cyclically stores a write index value of the data area; the label area including a plurality of bits corresponding one-to-one to the index storage units, wherein the bit values corresponding to the index storage unit containing the current write index value of the data area are different from the bit values corresponding to the other index storage units;

[0030] The device includes:

[0031] An acquisition module, used to acquire data to be stored;

[0032] A search module is used to search for a target bit whose value is different from other bits in the marked area;

[0033] An extraction module is used to extract the write index value in the index storage unit corresponding to the target bit to obtain the current write index value of the data area;

[0034] The storage module is used to write the data to be stored into the data storage unit indicated by the current write index value.

[0035] A third aspect of an embodiment of the present invention provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned data power-off preservation method when executing the computer program.

[0036] A fourth aspect of an embodiment of the present invention provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps of the above-mentioned data power-off preservation method are implemented.

[0037] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0038] The power-off persistence method for data provided by an embodiment of the present invention sets a data area and an index area in an address area, wherein the data area cyclically stores the data to be stored, and the index area cyclically stores the write index value of the data area; then, by opening a label area in the address area, the label area includes multiple bits corresponding one-to-one to the index storage units, and the bit values corresponding to the index storage unit where the current write index value of the data area is located are set to be different from the bit values corresponding to the other index storage units. When the storage process is interrupted due to power failure and power is restored, the current write index value of the data area is determined by searching the target bit in the label area that is different from the other bit values, and the data to be stored is stored in the data storage unit indicated by the current write index value. The embodiment of the present invention can realize power-off persistence of data. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0040] Figure 1 is a schematic structural diagram of an address area provided by an embodiment of the present invention;

[0041] Figure 2 Schematic diagram of cyclic storage of write index values provided by an embodiment of the present invention;

[0042] Figure 3 is a schematic diagram of bits provided by an embodiment of the present invention;

[0043] Figure 4 1 is a schematic diagram of an implementation flow of a method for data power-off persistence provided by an embodiment of the present invention;

[0044] Figure 5 1 is a schematic diagram of an implementation flow of a method for data power-off persistence provided by an embodiment of the present invention;

[0045] Figure 6 1 is a schematic structural diagram of a data power-off persistence device provided by an embodiment of the present invention;

[0046] Figure 7 It is a structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0047] In the following description, specific details such as particular system structures and techniques are provided for purposes of illustration, not limitation, to facilitate a thorough understanding of the embodiments of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0048] In order to illustrate the technical solution of the present invention, specific embodiments are provided below.

[0049] When the power modules in electric vehicles and their charging piles operate under harsh conditions or encounter abnormal situations, operational failures may occur. When network communication is abnormal, the failure cannot be transmitted to the server in real time. At this time, it is necessary to locally store the failure when the abnormality occurs. When the network communication is normal, the local data is uploaded to the server, which is conducive to finding the problem and preventing accidents.

[0050] Therefore, an embodiment of the present invention provides a method for data power-off persistence, which is used to store data to be stored in an address area. The address area includes a data area, an index area, and a label area. The data area is divided into multiple data storage units, and each data storage unit cyclically stores the data to be stored. The index area is divided into multiple index storage units, and each index storage unit cyclically stores the write index value of the data area. The label area includes multiple bits that correspond one-to-one to the index storage units, and the bit values corresponding to the index storage unit where the current write index value of the data area is located are different from the bit values corresponding to other index storage units.

[0051] For example, see Figure 1 As shown, for continuous storage of the same type of data, corresponding address areas are allocated in the IIC memory. The address areas include a data area and an index area. The data area stores the data content, and the index area stores the write index value of the data area, that is, the data write location. The data area and the index area can be continuous. For example, in an embodiment of the present invention, the index area is connected to the data area.

[0052] The data area is divided into multiple data storage units to store the data to be stored cyclically. Figure 1In the data area, the size of DataLen is 28 bytes, and each byte is 8 bits. For a certain type of data with a length of 32 bits, each data needs to occupy 4 bytes, so the size of a data storage unit is ByteLen=4, and the data area can store n=7 data. When storing data, it starts from the first data storage unit. When the last data storage unit is also stored with data, the next data will be stored in the first data storage unit, overwriting the original data, and realizing the circular storage of data. The size of the data area DataLen can be set according to actual needs and is not limited here. Similarly, the index area also has multiple index storage units to cyclically store the write index values of the data area, and each index storage unit stores a write index value. The index area size IndexLen, the index storage unit size ByteLen, and the number m of write index values that can be stored in the index area can all be set according to actual needs and are not limited here.

[0053] When the system is powered off and then powered on again, since there is more than one index value stored in the index area, how to find the final write index value at the time of power failure from multiple write index values is the key to data survival. Figure 2 As shown in the figure, assuming the data area DataLen = 28, the data storage unit size ByteLen = 4, the index area size IndexLen = 16, the index storage unit size ByteLen = 4, and the number of write index values that can be stored in the index area m = 4. The write index values stored cyclically in the index area will range from 0 to 24, changing cyclically in steps of 4. During the first cycle, the write index value in the index area is 0 at the first position, 4 at the second position, 8 at the third position, and 12 at the fourth position. During the second cycle, the first position is first updated to 16, then the second position is updated to 20, then the third position is updated to 24, and finally, the fourth position, because the data has completed a cycle in the data area and needs to be stored from the beginning, is updated to 0. This continues for the third, fourth, and so on cycles. As can be seen, regardless of the time of power failure, the index area will always store four write index values when power is restored. Therefore, the current write index value of the data area must be found from among these four write index values.

[0054] In order to solve the above problem, the embodiment of the present invention also opens a mark area in the address area, which can be located after the index area and includes multiple bits corresponding to the index storage units. Figure 3 As shown, for the above-mentioned index area with 4 index storage units, the bit can be set to bit0-bit3, and the bit value corresponding to the index storage unit where the current write index value of the data area is located is set to be different from the bit values corresponding to other index storage units to achieve data power-off persistence.

[0055] See also Figure 4The specific power-off survival method is as follows:

[0056] Step S101: Acquire data to be stored.

[0057] Step S102: Search for a target bit in the marked area that has a value different from that of other bits.

[0058] Step S103: extract the write index value in the index storage unit corresponding to the target bit to obtain the current write index value of the data area.

[0059] Step S104 , writing the data to be stored into the data storage unit indicated by the current write index value.

[0060] It can be seen that the data power-off persistence method provided by the embodiment of the present invention sets a data area and an index area in the address area, the data area cyclically stores the data to be stored, and the index area cyclically stores the write index value of the data area; then, by opening a label area in the address area, the label area includes multiple bits corresponding to the index storage units one by one, and the bit values corresponding to the index storage unit where the current write index value of the data area is located are set to be different from the bit values corresponding to the other index storage units. When the storage process is interrupted due to power failure and power is restored, the current write index value of the data area is determined by searching the target bit in the label area that is different from the other bit values, and the data to be stored is stored in the data storage unit indicated by the current write index value. The embodiment of the present invention can realize data power-off persistence.

[0061] Optionally, a method for controlling the bit value corresponding to the index storage unit where the current write index value of the data area is located to be different from the bit values corresponding to other index storage units includes:

[0062] When no write index value is stored in any index storage unit, the bit values of each bit in the annotation area are initialized to the first value. Each time the current write index value of the data area is written to an index storage unit, the bit value corresponding to the index storage unit is set to the second value, and the bit value corresponding to the previous index storage unit is set to the first value. If the index storage unit is the first index storage unit in the index area, the previous index storage unit is the last index storage unit in the index area.

[0063] Optionally, search for target bits in the marked area that have values different from other bits, including:

[0064] Search the bit whose value in the marked area is the second value to obtain the target bit.

[0065] In the embodiment of the present invention, Figure 3For example, when the write index value 4 is written to the second index storage unit, its corresponding bit 1 is set to the second value, and the bit 0 corresponding to the previous index storage unit is set to the first value. When the write index value 8 is written to the third index storage unit, its corresponding bit 2 is set to the second value, and the bit 1 corresponding to the previous index storage unit is set to the first value. The previous index storage unit of the first index storage unit is the last index storage unit in the index area. This cycle ensures that during the loop storage process, there is only one bit in the marked area with the second value, that is, the bit corresponding to the index storage unit where the current write index value is located. Based on this bit, the current write index value of the data area can be determined.

[0066] Optionally, if the search result shows that there are two bits with the second value in the marked area, the target bit is determined according to the following method:

[0067] Determine whether the positions of the bits of the two values ​​being the second value are continuous;

[0068] If the positions of the two bits whose values are the second value are consecutive, the bit whose value is the second value is determined as the target bit;

[0069] If the positions of the two bits whose values are the second value are not consecutive, the first bit in the marked area is determined as the target bit.

[0070] In this embodiment of the present invention, an unexpected situation may occur: the bit corresponding to the index storage unit containing the current index value is set to the second value, but the system loses power before the bit corresponding to the previous index storage unit is set to the first value. In this case, two bits with the second value will exist in the marked area. In this case, if the two bits are consecutive, the latter bit is the target bit. If the two bits are not consecutive, the two bits are the first and last bits in the marked area, respectively, and the first bit is the target bit.

[0071] Optionally, a method for controlling the bit value corresponding to the index storage unit where the current write index value of the data area is located to be different from the bit values corresponding to other index storage units includes:

[0072] Each time the current write index value of the data area is written into a certain index storage unit, the bit value of each bit in the mark area is initialized to the first value;

[0073] The bit value corresponding to the index storage unit is set to the second value.

[0074] In an embodiment of the present invention, each time the current write index value of the data area is written into a certain index storage unit, by initializing all the bit values in the marked area to the first value and only setting the bit value corresponding to the index storage unit to the second value, it is also possible to achieve that the bit value corresponding to the index storage unit where the current write index value is located is different from the bit values corresponding to other index storage units.

[0075] Optionally, the first value is 0 and the second value is 1.

[0076] Alternatively, the first value is 1 and the second value is 0.

[0077] In the embodiment of the present invention, since the value of a bit can only be set to 0 or 1, the first value can be set to 0 and the second value can be set to 1, or the first value can be set to 1 and the second value can be set to 0.

[0078] Optionally, after obtaining the data to be stored, the following steps are also included:

[0079] According to the type of data to be stored, determine whether the data to be stored corresponds to the address area;

[0080] If the data to be stored corresponds to the address area, the data to be stored is stored in the address area; if the data to be stored does not correspond to the address area, the data to be stored is not stored.

[0081] In an embodiment of the present invention, the data to be stored may include fault conditions, operating time, working time, voltage and current data, etc. The IIC memory allocates a corresponding address area for each type of data, and multiple consecutive data of the same type are stored in the same address area. During the data storage process, the data to be stored must first be placed in a buffer, and then the data is read from the buffer and stored in the corresponding address area according to the data type. That is, the same address area stores the same type of data. Therefore, before storing the data, it is first determined whether the data to be stored corresponds to the address area based on the type of the data to be stored. If not, the data is not stored; alternatively, the data is stored in the address area corresponding to its type.

[0082] Based on the above, see Figure 5 As shown, the detailed process of the power-off data preservation method provided by the embodiment of the present invention is as follows:

[0083] (1) Find the bit in the marked area whose value is the second value.

[0084] (2) If there is only one bit in the marked area whose value is the second value, then the bit is determined as the target bit.

[0085] (3) If there are two bits with the second value in the marked area, determine whether the positions of the two bits are continuous. If they are continuous, the latter bit is determined as the target bit; if not, the first bit in the marked area is determined as the target bit.

[0086] (4) Determine the current write index value of the data area based on the target bit.

[0087] (5) The data to be stored is written into the data area according to the current write index value of the data area.

[0088] The power-off persistence method for data provided in an embodiment of the present invention opens a marking area after the index area. When power is restored after a power outage, the current position of the index area is determined by the bit value of the marking area, and the current write index value at the current position is obtained without traversal. It is suitable for use when the index area is long.

[0089] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0090] See also Figure 6 As shown, an embodiment of the present invention provides a data power-off survival device 60, which is used to store data to be stored in an address area, and the address area includes a data area, an index area, and a label area. The data area is divided into multiple data storage units, and each data storage unit cyclically stores the data to be stored. The index area is divided into multiple index storage units, and each index storage unit cyclically stores the write index value of the data area. The label area includes multiple bits that correspond one to one with the index storage units, and the bit value corresponding to the index storage unit where the current write index value of the data area is located is different from the bit values corresponding to other index storage units. The device 60 includes:

[0091] The acquisition module 61 is used to acquire data to be stored.

[0092] The search module 62 is configured to search for a target bit in the marked area that has a value different from that of other bits.

[0093] The extraction module 63 is configured to extract the write index value in the index storage unit corresponding to the target bit to obtain the current write index value of the data area.

[0094] The storage module 64 is configured to write the data to be stored into the data storage unit indicated by the current write index value.

[0095] Optionally, the storage module 64 is further configured to:

[0096] When no write index value is stored in each index storage unit, the bit value of each bit in the annotation area is initialized to the first value; each time the current write index value of the data area is written into a certain index storage unit, the bit value corresponding to the index storage unit is set to the second value, and the bit value corresponding to the previous index storage unit of the index storage unit is set to the first value; wherein, if the index storage unit is the first index storage unit in the index area, then its previous index storage unit is the last index storage unit in the index area.

[0097] Optionally, the search module 62 is specifically configured to:

[0098] Search the bit whose value in the marked area is the second value to obtain the target bit.

[0099] Optionally, the search module 62 is further configured to:

[0100] If the search result shows that there are two bits whose values are the second value in the marked area, then determining whether the positions of the two bits whose values are the second value are consecutive;

[0101] If the positions of the two bits whose values are the second value are consecutive, the bit whose value is the second value is determined as the target bit;

[0102] If the positions of the two bits whose values are the second value are not consecutive, the first bit in the marked area is determined as the target bit.

[0103] Optionally, the storage module 64 is further configured to:

[0104] Each time the current write index value of the data area is written into a certain index storage unit, the bit value of each bit in the mark area is initialized to the first value;

[0105] The bit value corresponding to the index storage unit is set to the second value.

[0106] Optionally, the first value is 0 and the second value is 1;

[0107] Alternatively, the first value is 1 and the second value is 0.

[0108] Optionally, after obtaining the data to be stored, the obtaining module 61 is further configured to:

[0109] According to the type of data to be stored, determine whether the data to be stored corresponds to the address area;

[0110] If the data to be stored corresponds to the address area, the data to be stored is stored in the address area; if the data to be stored does not correspond to the address area, the data to be stored is not stored.

[0111] Figure 7FIG is a schematic diagram of an electronic device 70 provided by an embodiment of the present invention. Figure 7 As shown, the electronic device 70 of this embodiment includes: a processor 71, a memory 72, and a computer program 73 stored in the memory 72 and executable on the processor 71, such as a data power-off preservation program. When the processor 71 executes the computer program 73, the steps in the above-mentioned data power-off preservation method embodiments are implemented, such as Figure 1 Alternatively, when the processor 71 executes the computer program 73, the functions of the modules in the above-mentioned device embodiments are realized, for example Figure 6 The functions of modules 61 to 64 are shown.

[0112] Exemplarily, the computer program 73 may be divided into one or more modules / units, one or more of which are stored in the memory 72 and executed by the processor 71 to implement the present invention. One or more modules / units may be a series of computer program instruction segments capable of performing specific functions, and the instruction segments are used to describe the execution process of the computer program 73 in the electronic device 70. For example, the computer program 73 may be divided into an acquisition module 61, a search module 62, an extraction module 63, and a storage module 64 (modules in the virtual device), and the specific functions of each module are as follows:

[0113] Acquisition module 61, for acquiring data to be stored.

[0114] The search module 62 is configured to search for a target bit in the marked area that has a value different from that of other bits.

[0115] The extraction module 63 is configured to extract the write index value in the index storage unit corresponding to the target bit to obtain the current write index value of the data area.

[0116] The storage module 64 is configured to write the data to be stored into the data storage unit indicated by the current write index value.

[0117] The electronic device 70 may be a computing device such as a desktop computer, a notebook computer, a PDA, or a cloud server. The electronic device 70 may include, but is not limited to, a processor 71 and a memory 72. Those skilled in the art will understand that Figure 7 It is merely an example of the electronic device 70 and does not constitute a limitation of the electronic device 70. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the electronic device 70 may also include input and output devices, network access devices, buses, etc.

[0118] The processor 71 may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0119] The memory 72 can be an internal storage unit of the electronic device 70, such as a hard drive or memory of the electronic device 70. The memory 72 can also be an external storage device of the electronic device 70, such as a plug-in hard drive, a Smart Media Card (SMC), a Secure Digital (SD) card, a flash memory card, etc. equipped on the electronic device 70. Furthermore, the memory 72 can include both an internal storage unit of the electronic device 70 and an external storage device. The memory 72 is used to store computer programs and other programs and data required by the electronic device 70. The memory 72 can also be used to temporarily store data that has been output or is about to be output.

[0120] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0121] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0122] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0123] In the embodiments provided by the present invention, it should be understood that the disclosed devices / electronic devices and methods can be implemented in other ways. For example, the device / electronic device embodiments described above are merely schematic. For example, the division of modules or units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0124] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0125] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0126] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the process in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and when the computer program is executed by the processor, it can implement the steps of each of the above-mentioned method embodiments. Among them, the computer program includes computer program code, which can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media does not include electric carrier signals and telecommunication signals.

[0127] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A method for data power-off preservation, characterized in that: The method is used to store data to be stored in an address area, wherein the address area includes a data area, an index area, and a markup area; the data area is divided into a plurality of data storage units, each of which cyclically stores the data to be stored; the index area is divided into a plurality of index storage units, each of which cyclically stores the write index value of the data area; the markup area includes a plurality of bits corresponding to the index storage units, and the bit values corresponding to the index storage unit where the current write index value of the data area is located are different from the bit values corresponding to the other index storage units; the method includes: Get the data to be stored; Searching for a target bit in the marked area that has a different value from other bits; Extracting a write index value from an index storage unit corresponding to the target bit to obtain a current write index value of the data area; Writing the data to be stored into the data storage unit indicated by the current write index value; The method for controlling the bit value corresponding to the index storage unit where the current write index value of the data area is located to be different from the bit values corresponding to other index storage units includes: When no write index value is stored in each index storage unit, initializing each bit value in the mark area to a first value; Each time the current write index value of the data area is written into a certain index storage unit, the bit value corresponding to the index storage unit is set to the second value, and the bit value corresponding to the previous index storage unit of the index storage unit is set to the first value; Wherein, if the index storage unit is the first index storage unit of the index area, the previous index storage unit is the last index storage unit of the index area; Searching for a target bit in the marked area that is different from the values of other bits includes: Searching for a bit whose value in the marked area is the second value to obtain the target bit; If the search result shows that there are two bits with the second value in the marked area, the target bit is determined according to the following method: Determining whether the positions of the bits of the two values ​​being the second value are continuous; If the positions of the two bits whose values are the second value are consecutive, the bit whose value is the second value is determined as the target bit; If the positions of the bits of the two values being the second value are not continuous, the first bit in the marked area is determined as the target bit.

2. The data power-off preservation method according to claim 1, wherein: The first value is 0, and the second value is 1; Alternatively, the first value is 1 and the second value is 0.

3. The data power-off preservation method according to claim 1, wherein: After obtaining the data to be stored, it also includes: According to the type of the data to be stored, determining whether the data to be stored corresponds to the address area; If the data to be stored corresponds to the address area, the data to be stored is stored in the address area; if the data to be stored does not correspond to the address area, the data to be stored is not stored.

4. A data power-off storage device, characterized in that: The device is used to store data to be stored in an address area, wherein the address area includes a data area, an index area, and a markup area; the data area is divided into a plurality of data storage units, each of which cyclically stores the data to be stored; the index area is divided into a plurality of index storage units, each of which cyclically stores the write index value of the data area; the markup area includes a plurality of bits corresponding to the index storage units, and the bit values corresponding to the index storage unit where the current write index value of the data area is located are different from the bit values corresponding to the other index storage units; the device includes: An acquisition module, used to acquire data to be stored; A search module, configured to search for a target bit in the marked area that has a different value from other bits; An extraction module, configured to extract a write index value from an index storage unit corresponding to the target bit to obtain a current write index value of the data area; A storage module, configured to write the data to be stored into the data storage unit indicated by the current write index value; The method for controlling the bit value corresponding to the index storage unit where the current write index value of the data area is located to be different from the bit values corresponding to other index storage units includes: When no write index value is stored in each index storage unit, initializing each bit value in the mark area to a first value; Each time the current write index value of the data area is written into a certain index storage unit, the bit value corresponding to the index storage unit is set to the second value, and the bit value corresponding to the previous index storage unit of the index storage unit is set to the first value; Wherein, if the index storage unit is the first index storage unit of the index area, the previous index storage unit is the last index storage unit of the index area; Searching for a target bit in the marked area that is different from the values of other bits includes: Searching for a bit whose value in the marked area is the second value to obtain the target bit; If the search result shows that there are two bits with the second value in the marked area, the target bit is determined according to the following method: Determining whether the positions of the bits of the two values ​​being the second value are continuous; If the positions of the two bits whose values are the second value are consecutive, the bit whose value is the second value is determined as the target bit; If the positions of the bits of the two values being the second value are not continuous, the first bit in the marked area is determined as the target bit.

5. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 3 are implemented.

6. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 3 are implemented.

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