A method for manufacturing a silicon germanium layer of FDSOI

Abstract

The present invention provides a method for fabricating a silicon-germanium layer for FDSOI, the method comprising: providing an SOI substrate; epitaxially forming a silicon-germanium layer on the top silicon layer of the SOI substrate; forming a silicon capping layer covering the silicon-germanium layer; depositing an oxide containing oxygen free radicals on the silicon capping layer to form an oxide material layer; thermally oxidizing the surface of the silicon-germanium layer to form an oxide layer, while simultaneously reducing the thickness of the silicon-germanium layer; utilizing the catalytic oxidation of oxygen free radicals in the oxide material layer to oxidize the silicon capping layer, and forming germanium condensation at the interface between the oxide layer and the silicon-germanium layer; performing thermal annealing to diffuse the germanium condensed at the interface between the oxide layer and the silicon-germanium layer throughout the silicon-germanium layer; and etching to remove the oxide material layer and the oxide layer. The present invention not only increases the germanium concentration in the silicon-germanium layer, but also reduces the time and thermal budget required to prepare the high-concentration silicon-germanium layer, while also ensuring the process quality of the silicon-germanium layer, making the silicon-germanium layer well suited for the fabrication of semiconductor devices and improving the performance of the semiconductor devices.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method for manufacturing a fully depleted silicon-germanium layer on a silicon-on-insulating layer. Background Art

[0002] As device size continues to shrink, the short channel effect problem of traditional MOSFET becomes more prominent, and a new FDSOI structure is needed to overcome this problem. In order to improve the carrier mobility, i.e., the hole mobility, of devices such as PMOS devices, it is usually necessary to dope germanium (Ge) into the top silicon layer. In this way, the channel region will be composed of a germanium-silicon layer. The germanium-silicon layer has a lattice structure that is conducive to improving the hole mobility, which can improve the carrier mobility of the PMOS device and thus improve the performance of the device.

[0003] The current methods for realizing high Ge concentration SiGe channels on FDSOI are as follows: Figure 1A-1D As shown, the method includes: epitaxially growing a germanium silicon epitaxial layer on a silicon surface to form a SiGe / Si structure; using a separation by implantation of oxygen (SIMOX) method to form a SiGe / SiO2 / SiGe / Si structure; performing thermal oxidation to form a top oxide layer on the surface of the germanium silicon layer, utilizing the characteristic that the Si-O bond has a stronger bonding ability than the Ge-O bond to make the top oxide layer silicon dioxide, and forming germanium condensation at the interface between the top oxide layer and the germanium silicon layer; performing thermal annealing to diffuse the germanium condensed at the interface between the top oxide layer and the germanium silicon layer into the entire germanium silicon layer, maintaining the thickness of the germanium silicon layer to be less than the diffusion length of germanium; and etching to remove the top oxide layer.

[0004] This method can obtain a SiGe channel with a high Ge concentration and uniform distribution, but it has the following disadvantages: 1. Thermal oxidation requires 1050 degrees Celsius. The high temperature causes the SiGe structure below the SiGe / SiO2 interface to be unable to withstand the high temperature and tends to rearrange, which greatly affects the structure and performance of the device; 2. The entire process takes 7 hours, which is too time-consuming. Summary of the Invention

[0005] In order to solve the problems existing in the above-mentioned prior art, the present invention provides a method for manufacturing a silicon-germanium layer of FDSOI, so as to solve the problem that the manufacturing time of the silicon-germanium layer is too long and the structure and performance are affected.

[0006] The present invention provides a method for manufacturing a germanium silicon layer of FDSOI, comprising the following steps:

[0007] Step 1: providing an SOI substrate, wherein the SOI substrate comprises a bottom bulk silicon, an insulating dielectric buried layer and a top silicon layer, wherein the insulating dielectric buried layer is located between the bottom bulk silicon and the top silicon layer;

[0008] Step 2: epitaxially growing a silicon-germanium epitaxial layer on the surface of the top silicon layer, wherein the top silicon layer and the silicon-germanium epitaxial layer are superimposed to form a silicon-germanium layer;

[0009] Step 3: forming a silicon cap layer covering the silicon germanium layer;

[0010] Step 4: depositing an oxide containing oxygen free radicals on the silicon capping layer to form an oxide material layer;

[0011] Step 5: thermally oxidizing the surface of the silicon-germanium layer to form an oxide layer, while reducing the thickness of the silicon-germanium layer. The silicon cap layer is oxidized by the catalytic oxidation of oxygen free radicals in the oxide material layer, and germanium condensation is formed at the interface between the oxide layer and the silicon-germanium layer.

[0012] Step 6: performing thermal annealing to condense and diffuse the germanium at the interface between the oxide layer and the germanium-silicon layer into the entire germanium-silicon layer;

[0013] Step seven: etching and removing the oxide material layer and the oxide layer.

[0014] Preferably, the insulating dielectric buried layer in step 1 is a silicon dioxide buried layer.

[0015] Preferably, the germanium concentration in the silicon-germanium epitaxial layer in step 2 has a gradient distribution that gradually increases from bottom to top.

[0016] Preferably, the germanium concentration in the silicon-germanium epitaxial layer in step 2 is 0-10%.

[0017] Preferably, the total thickness of the silicon germanium layer in step 2 and the silicon cap layer in step 3 is less than 35 nm.

[0018] Preferably, the silicon capping layer in step three is formed by a reduced pressure chemical vapor deposition process, with a thickness of 1-100 Å.

[0019] Preferably, the oxide material layer in step 4 is formed by an atomic layer deposition process and has a thickness of 1-10 nm.

[0020] Preferably, the oxide material layer in step 4 is a lanthanum oxide layer.

[0021] Preferably, the thermal oxidation in step five adopts dry oxygen oxidation at a temperature of 900-1000 degrees.

[0022] Preferably, steps five and six are performed under 5% oxygen partial pressure.

[0023] Preferably, in step seven, a SiCoNi cleaning process is used to remove the oxide material layer and the oxide layer.

[0024] Preferably, the germanium concentration in the germanium silicon layer in step six reaches 57%.

[0025] The present invention forms a germanium silicon layer by epitaxial growth on the top silicon of an SOI substrate with an insulating dielectric buried layer, forms a silicon cap layer and an oxide material layer by deposition, and then uses oxidation, annealing and etching processes to increase the germanium concentration in the germanium silicon layer. Utilizing an oxide material layer containing oxygen free radicals, low-temperature catalytic oxidation is performed at a 5% oxygen partial pressure. Compared with direct thermal oxidation of SiGe, this method increases the oxidation rate by 10 times, greatly shortening the oxidation time. At the same time, the oxidation temperature is reduced from a high temperature of 1050 degrees to 900-1000 degrees, thereby reducing the thermal budget in the preparation process of the germanium silicon layer, protecting the uncondensed germanium silicon layer structure below the interface during the germanium condensation process, reducing the rearrangement of the germanium silicon layer structure, and ultimately achieving that the germanium silicon layer is well suited for the manufacture of semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0027] Figure 1A Schematic diagram showing the formation of SiGe / Si structure in the production of silicon germanium layer of conventional FDSOI;

[0028] Figure 1B Schematic diagram showing the formation of SiGe / SiO2 / SiGe / Si structure in the production of silicon germanium layer of conventional FDSOI;

[0029] Figure 1C A schematic diagram showing the structure of a conventional FDSOI silicon germanium layer after forming a top oxide layer and condensed germanium is diffused into the silicon germanium layer;

[0030] Figure 1D Shown is a schematic diagram of the structure after removing the top oxide layer in the production of the germanium silicon layer of the existing FDSOI;

[0031] Figure 2 A flow chart showing a method for manufacturing a silicon germanium layer of FDSOI according to an embodiment of the present invention;

[0032] Figure 3A Shown is a schematic structural diagram of an SOI substrate according to an embodiment of the present invention;

[0033] Figure 3B Schematic diagram of the structure after forming the silicon germanium layer and the silicon cap layer according to an embodiment of the present invention;

[0034] Figure 3C Shown is a schematic structural diagram of an embodiment of the present invention after an oxide material layer is formed;

[0035] Figure 3DIt is a schematic diagram showing the structure after the oxide layer is formed and the condensed germanium is diffused into the germanium silicon layer according to an embodiment of the present invention;

[0036] Figure 3E Shown is a schematic diagram of the structure after the oxide material layer and the oxide layer are removed according to an embodiment of the present invention;

[0037] Figure 4 FIG. 1 is a schematic structural diagram showing a PMOS formed on a silicon germanium layer of an FDSOI according to an embodiment of the invention. DETAILED DESCRIPTION

[0038] The present invention is described below based on the following embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, certain specific details are described in detail. Those skilled in the art can fully understand the present invention without these details. To avoid obscuring the essence of the present invention, well-known methods, processes, procedures, components, and circuits are not described in detail.

[0039] Furthermore, persons of ordinary skill in the art will appreciate that the figures provided herein are for illustration purposes only and are not necessarily drawn to scale.

[0040] Unless the context clearly requires otherwise, words like “include”, “comprising” and the like throughout this application should be interpreted as including rather than exclusive or exhaustive; that is, as meaning “including but not limited to”.

[0041] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood to indicate or imply relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0042] SOI includes bulk silicon, a buried silicon dioxide layer, and top silicon. When the thickness of the top silicon is set to be thin, when the MOS transistor formed in the top silicon, such as NMOS or PMOS, is working, the area at the bottom of the channel composed of the inversion layer in the channel region will be completely depleted. The channel region is composed of top silicon, so the top silicon corresponding to the channel region will be completely depleted. At this time, SOI is called FDSOI.

[0043] In SOI, the buried silicon dioxide layer is typically formed using a separation by implantation of oxygen (SIMOX) process. Specifically, a silicon substrate is first provided; oxygen ions are then implanted into the silicon substrate to form the buried silicon dioxide layer. The silicon substrate at the bottom of the buried silicon dioxide layer forms the bulk silicon, while the silicon substrate on top of the buried silicon dioxide layer forms the top silicon layer.

[0044] like Figure 2 FIG. 1 is a flow chart of a method for manufacturing a silicon germanium layer of FDSOI according to an embodiment of the present invention; FIG. Figures 3A to 3E , which is a schematic diagram of the device structure in each step of the method for manufacturing the silicon-germanium layer of FDSOI according to an embodiment of the present invention; the method for manufacturing the silicon-germanium layer of FDSOI according to an embodiment of the present invention comprises the following steps:

[0045] Step 1: Figure 3A As shown, an SOI substrate is provided, which includes a bottom silicon body 1, an insulating dielectric buried layer 2 and a top silicon layer 101, wherein the insulating dielectric buried layer 2 is located between the bottom silicon body 1 and the top silicon layer 101.

[0046] In the embodiment of the present invention, the insulating dielectric buried layer 2 is a silicon dioxide buried layer. The SOI substrate is formed by an oxygen implantation isolation process.

[0047] Step 2: Figure 3B As shown, a silicon-germanium epitaxial layer 102 is epitaxially grown on the surface of the top silicon 101 , and the top silicon 101 and the silicon-germanium epitaxial layer 102 are stacked to form a silicon-germanium layer 3 .

[0048] In the embodiment of the present invention, the silicon germanium epitaxial layer 102 has a low concentration of germanium, and the germanium concentration in the silicon germanium epitaxial layer 102 has a gradient distribution that gradually increases from the bottom to the top, and the germanium concentration in the silicon germanium epitaxial layer 102 is 0-10%. For example, Figure 3B In the embodiment, the germanium concentration of the silicon-germanium epitaxial layer 102 is 10%, and the molecular formula of the silicon-germanium epitaxial layer 102 is Si0.9Ge0.1.

[0049] Step 3: Figure 3B As shown, a silicon cap layer 4 is formed to cover the silicon germanium layer.

[0050] In the embodiment of the present invention, the silicon capping layer 4 is formed by reduced pressure chemical vapor deposition (RP-CVD) process with a thickness of 1-100 Å. The total thickness of the silicon germanium layer 3 and the silicon capping layer 4 is less than 35 nm to avoid dislocation defects.

[0051] Step 4: Figure 3C As shown, an oxide containing oxygen radicals is deposited on the silicon cap layer 4 to form an oxide material layer 5 .

[0052] In the embodiment of the present invention, preferably, the oxide material layer 5 is a lanthanum oxide layer, formed by atomic layer deposition (ALD) process, with a thickness of 1-10 nm. Of course, other suitable oxide material layers can also be selected.

[0053] Step 5: Figure 3DAs shown, thermal oxidation is performed on the surface of the germanium-silicon layer 3 to form an oxide layer 6, and the thickness of the germanium-silicon layer is reduced at the same time. The silicon cap layer 4 is oxidized by utilizing the catalytic oxidation effect of the oxygen free radicals in the oxide material layer 5, and germanium condensation is formed at the interface between the oxide layer 6 and the germanium-silicon layer 3.

[0054] Figure 3D , the germanium-silicon layer after thickness reduction is separately marked with mark 3a. In an embodiment of the present invention, an oxide material layer containing oxygen free radicals is used to perform low-temperature catalytic oxidation under 5% oxygen partial pressure. Compared with direct thermal oxidation of SiGe, this method increases the oxidation rate by 10 times, greatly shortening the oxidation time. The thermal oxidation adopts dry oxygen oxidation, and the temperature of the thermal oxidation is 900-1000C. Compared with the existing method, the oxidation temperature is reduced from a high temperature of 1050 degrees to 900-1000 degrees, which reduces the thermal budget in the preparation process of the germanium-silicon layer, protects the uncondensed germanium-silicon layer structure below the interface during the germanium condensation process, and reduces the rearrangement of the germanium-silicon layer structure.

[0055] Step 6: Figure 3D As shown, thermal annealing is performed to condense and diffuse the germanium at the interface between the oxide layer 6 and the germanium silicon layer 3a to the entire germanium silicon layer 3a.

[0056] In the embodiment of the present invention, the oxide layer 6 and the insulating dielectric buried layer 2 serve as barrier layers for germanium diffusion.

[0057] In step 6, the thickness of the germanium silicon layer 3a is kept smaller than the diffusion length of germanium. Step 6 is performed under an oxygen partial pressure of 5%.

[0058] Step 7: Figure 3E As shown, the oxide material layer 5 and the oxide layer 6 are removed by etching.

[0059] In the embodiment of the present invention, in step seven, a SiCoNi cleaning process is used to remove the oxide material layer 5 and the oxide layer 6 .

[0060] Compared with the 7-hour one-cycle process in the prior art, the present invention utilizes an oxide material layer 5 containing oxygen free radicals to perform low-temperature catalytic oxidation at 5% oxygen partial pressure. Compared with direct thermal oxidation of SiGe, this method increases the oxidation rate by 10 times, greatly shortening the oxidation time.

[0061] According to the embodiment of the present invention, the germanium concentration of the silicon-germanium layer after the germanium concentration is increased reaches 57%.

[0062] As the steps proceed, the germanium concentration of the top silicon-germanium layer will continue to increase. The silicon-germanium layer 3 can be represented by the molecular formula Si1-xGex, as shown in FIG. Figure 3B and Figure 3C, x corresponds to the Ge concentration, and the germanium silicon layer 3a can be represented by the molecular formula Si1-zGez, as shown in Figure 3D and Figure 3E , z will be greater than x.

[0063] like Figure 4 , which is a structural diagram of forming a PMOS on a silicon-germanium layer of FDSOI according to an embodiment of the present invention. The silicon-germanium layer 3 a after the germanium concentration is increased is used to form the PMOS.

[0064] The PMOS device includes a gate structure, a source region 203 , a drain region 204 and a channel region.

[0065] The gate structure is formed on the surface of the silicon germanium layer 3a, and the source region 203 and the drain region 204 are self-alignedly formed in the silicon germanium layer 3a on both sides of the gate structure. The channel region is composed of the silicon germanium layer 3a located between the source region 203 and the drain region 204. The thickness of the silicon germanium layer 3a is sufficient to ensure that the channel region at the bottom of the inversion layer is completely depleted when the PMOS is turned on. The increase in the germanium concentration of the silicon germanium layer 3a is used to improve the mobility of hole carriers.

[0066] The gate structure includes a stacked gate dielectric layer 201 and a gate conductive material layer 202. In one embodiment of the present invention, the gate dielectric layer 201 is a gate oxide layer, and the gate conductive material layer 202 is a polysilicon gate. In other embodiments, the gate dielectric layer 201 may be a high-k dielectric layer, and the gate conductive material layer 202 may be a metal gate.

[0067] The present invention forms a germanium silicon layer by epitaxial growth on the top silicon of an SOI substrate with an insulating dielectric buried layer, forms a silicon cap layer and an oxide material layer by deposition, and then uses cyclic oxidation, annealing and etching processes to increase the germanium concentration in the germanium silicon layer. The oxide material layer containing oxygen free radicals is used to perform low-temperature catalytic oxidation under a 5% oxygen partial pressure. Compared with direct thermal oxidation of SiGe, this method increases the oxidation rate by 10 times and greatly shortens the oxidation time. At the same time, the oxidation temperature is reduced from a high temperature of 1050 degrees to 900-1000 degrees, thereby reducing the thermal budget in the preparation process of the SiGe layer, protecting the uncondensed germanium silicon layer structure below the interface during the germanium condensation process, reducing the rearrangement of the germanium silicon layer structure, and ultimately achieving that the germanium silicon layer is well suitable for the production of semiconductor devices.

[0068] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A method for manufacturing a silicon germanium layer of FDSOI, characterized in that: The following steps are involved: Step 1: providing an SOI substrate, wherein the SOI substrate comprises a bottom bulk silicon, an insulating dielectric buried layer and a top silicon layer, wherein the insulating dielectric buried layer is located between the bottom bulk silicon and the top silicon layer; Step 2: epitaxially growing a silicon-germanium epitaxial layer on the surface of the top silicon layer, wherein the top silicon layer and the silicon-germanium epitaxial layer are superimposed to form a silicon-germanium layer; Step 3: forming a silicon cap layer covering the silicon germanium layer; Step 4: depositing an oxide containing oxygen free radicals on the silicon capping layer to form an oxide material layer; Step 5: thermally oxidizing the surface of the silicon-germanium layer to form an oxide layer, while reducing the thickness of the silicon-germanium layer. The silicon cap layer is oxidized by the catalytic oxidation of oxygen free radicals in the oxide material layer, and germanium condensation is formed at the interface between the oxide layer and the silicon-germanium layer. Step 6: performing thermal annealing to condense and diffuse the germanium at the interface between the oxide layer and the germanium-silicon layer into the entire germanium-silicon layer; Step seven: etching and removing the oxide material layer and the oxide layer.

2. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, wherein: The insulating dielectric buried layer in step 1 is a silicon dioxide buried layer.

3. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, wherein: In step 2, the germanium concentration in the silicon-germanium epitaxial layer has a gradient distribution that gradually increases from bottom to top.

4. The method for manufacturing a silicon germanium layer of FDSOI according to claim 3, characterized in that: In step 2, the germanium concentration in the silicon-germanium epitaxial layer is greater than 0 and less than 10%.

5. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, characterized in that: The total thickness of the silicon germanium layer in step 2 and the silicon cap layer in step 3 is less than 35 nm.

6. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, characterized in that: The silicon capping layer in step 3 is formed by a reduced pressure chemical vapor deposition process and has a thickness of 1 to 100 Å.

7. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, characterized in that: The oxide material layer in step 4 is formed by an atomic layer deposition process, with a thickness of 1 to 10 nm.

8. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, characterized in that: The oxide material layer in step 4 is a lanthanum oxide layer.

9. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, characterized in that: The thermal oxidation in step 5 adopts dry oxygen oxidation at a temperature of 900-1000°C.

10. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, characterized in that: Steps 5 and 6 were performed under 5% oxygen partial pressure.

11. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, characterized in that: In step seven, a SiCoNi cleaning process is used to remove the oxide material layer and the oxide layer.

12. The method for manufacturing a silicon germanium layer of FDSOI according to claim 1, wherein: In step six, the germanium concentration in the silicon germanium layer reaches 57%.

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