Switch control circuit and LED drive circuit

Abstract

The present application discloses a switch control circuit and an LED driving circuit. The switch control circuit is configured to turn on a driving switch element by providing a gate signal to the driving switch element connected in series to an LED, and the switch control circuit is configured to: divide a PWM dimming signal into a normal PWM dimming part and a low PWM dimming part based on a timing selection signal; provide a gate signal of a first frequency to the driving switch element in the normal PWM dimming part; and provide a gate signal of a second frequency greater than the first frequency in the low PWM dimming part.

Description

Technical Field

[0001] The present disclosure relates to a switch control circuit and an LED driving circuit using the switch control circuit. Background Art

[0002] Light emitting diode (LED) devices enable excellent color reproduction and miniaturization, and are used in various lighting devices. In particular, LED devices are also used as backlight sources for liquid crystal displays (LCDs).

[0003] When the LED device is intended to be used as an LCD backlight, a pulse width modulation (PWM) drive caused by a DC-DC converter that controls a voltage level and inputs to the LED is required. The brightness of the LED device can be controlled by controlling the duty cycle of the PWM drive. That is, the average value of the current flowing through the LED device by the on and off operation of the switching transistor included in the DC-DC converter is related to the brightness of the LED device. Summary of the invention

[0004] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0005] In one general aspect, a switch control circuit is configured to turn on a drive switch element by providing a gate signal to the drive switch element connected in series to an LED, and the switch control circuit is configured to: divide a PWM dimming signal into a normal PWM dimming part and a low PWM dimming part based on a timing selection signal; provide a gate signal of a first frequency to the drive switch element in the normal PWM dimming part; and provide a gate signal of a second frequency greater than the first frequency in the low PWM dimming part.

[0006] The switch control circuit may also include: an off-time controller, which receives a timing selection signal, determines the length of the low PWM dimming part according to the voltage level of the timing selection signal, selects and outputs a control signal of a second frequency during the low PWM dimming part, and selects and outputs a control signal of a first frequency in the normal PWM dimming part; and a switch driving unit, which is configured to generate a gate signal according to the selected result.

[0007] The off-time controller may include: an off-time setting unit, which compares the capacitor voltage charged at the beginning of the low PWM dimming part with the voltage level of the timing selection signal and outputs a control selection signal; and a selection switch, which selects and outputs any one of the control signal of the first frequency and the control signal of the second frequency according to the control selection signal.

[0008] The off time setting unit may also be configured to output a control selection signal having a low level when the capacitor voltage is less than the voltage level of the timing selection signal, and to output a control selection signal having a high level when the capacitor voltage is equal to or higher than the voltage level of the timing selection signal. The selection switch may also be configured to output a control signal of a second frequency through a control selection signal having a low level, and to output a control signal of a first frequency through a control selection signal having a high level.

[0009] The off-time controller may include: an off-time setting unit, which compares a result value obtained by counting the clock in the low PWM dimming part with the voltage level of the timing selection signal and outputs a control selection signal; and a selection switch, which selects and outputs any one of the control signal of the first frequency and the control signal of the second frequency according to the control selection signal.

[0010] The off time setting unit may also be configured to output a control selection signal having a low level when the result value obtained by counting the clock is less than the voltage level of the timing selection signal, and may output a control selection signal having a high level when the result value obtained by counting the clock is equal to or greater than the voltage level of the timing selection signal. The selection switch may also be configured to output a control signal of a second frequency through a control selection signal having a low level, and may output a control signal of a first frequency through a control selection signal having a high level.

[0011] The off-time controller may include an off-time converter which receives a control signal of a second frequency in a frequency conversion part between a low PWM dimming part and a normal PWM dimming part, and outputs a control signal of a third frequency which is greater than the first frequency and less than the second frequency; and a selection switch which selects and outputs a control signal of the third frequency in the frequency conversion part.

[0012] The off-time converter may also be configured to output a control signal of a third frequency such that the frequency decreases over time in the frequency conversion portion.

[0013] The selection switch may further include a comparator that outputs a switch change signal when the third frequency is equal to or less than the first frequency. The selection switch may also be configured to select and output a control signal of the first frequency according to the switch change signal.

[0014] The switch control circuit may further include a comparison unit that compares a source terminal voltage of the driving switch element with a reference voltage. The switch driving unit may include an SR latch.

[0015] In another general aspect, an LED driving circuit includes a buck converter and a switch control circuit. The buck converter includes a driving switch element connected in series to an LED module, and the switch control circuit provides a gate signal to the driving switch element. The switch control circuit divides a PWM dimming signal into a normal PWM dimming portion and a low PWM dimming portion based on a timing selection signal, provides a gate signal of a first frequency to the driving switch element in the normal PWM dimming portion, and provides a gate signal of a second frequency greater than the first frequency in the low PWM dimming portion.

[0016] The buck converter may further include a capacitor connected in parallel with the LED module, an inductor connected in series with the LED module, a diode providing energy released from the inductor to the LED module, and a source resistor sensing a source terminal voltage of the driving switching element.

[0017] The LED driving circuit may further include: an off-time controller configured to: receive a timing selection signal, determine the length of the low PWM dimming part according to the voltage level of the timing selection signal, select and output a control signal of a second frequency during the low PWM dimming part, and select and output a control signal of a first frequency in the normal PWM dimming part; and a switch driving unit configured to generate a gate signal according to the selected result.

[0018] The off-time controller may include: an off-time setting unit, which is configured to: compare the capacitor voltage charged at the beginning of the low PWM dimming part with the voltage level of the timing selection signal, and output a control selection signal; and a selection switch, which is configured to select and output any one of the control signal of the first frequency and the control signal of the second frequency according to the control selection signal.

[0019] The off time setting unit may also be configured to output a control selection signal having a low level when the capacitor voltage is less than the voltage level of the timing selection signal, and output a control selection signal having a high level when the capacitor voltage is higher than the voltage level of the timing selection signal. The selection switch may also be configured to output a control signal of a second frequency through a control selection signal having a low level, and output a control signal of a first frequency through a control selection signal having a high level.

[0020] The off-time controller may include: an off-time setting unit, which is configured to: compare a result value obtained by counting the clock in the low PWM dimming part with the voltage level of the timing selection signal, and output a control selection signal; and a selection switch, which is configured to select and output any one of a control signal of a first frequency and a control signal of a second frequency according to the control selection signal.

[0021] The off time setting unit may also be configured to output a control selection signal having a low level when the result value obtained by counting the clock is less than the voltage level of the timing selection signal, and output a control selection signal having a high level when the result value obtained by counting the clock is greater than the voltage level of the timing selection signal. The selection switch may also be configured to output a control signal of a second frequency through a control selection signal having a low level, and output a control signal of a first frequency through a control selection signal having a high level.

[0022] The off-time controller may include: an off-time converter, which is configured to: receive a control signal of a second frequency in a frequency conversion part between a low PWM dimming part and a normal PWM dimming part, and output a control signal of a third frequency greater than the first frequency and less than the second frequency; and a selection switch, which is configured to select and output the control signal of the third frequency in the frequency conversion part.

[0023] The off-time converter may also be configured to output a control signal of the third frequency so that the third frequency decreases over time in the frequency conversion portion.

[0024] The selection switch may further include a comparator configured to output a switch change signal when the third frequency is equal to or less than the first frequency. The selection switch may further be configured to select and output a control signal of the first frequency according to the switch change signal.

[0025] In another general aspect, a switch control circuit includes an off-time controller and a switch driving unit. The off-time controller is configured to receive a timing selection signal, determine the length of a low PWM dimming portion of a PWM dimming signal according to a voltage level of the timing selection signal, select and output a control signal of a first frequency in a normal PWM dimming portion of the PWM dimming signal, and select and output a control signal of a second frequency greater than the first frequency during the low PWM dimming portion. The switch driving unit is configured to generate a gate signal of a driving switch element connected in series with an LED according to the selected result.

[0026] The off-time controller may include: an off-time setting unit, which is configured to: compare the capacitor voltage charged at the beginning of the low PWM dimming part with the voltage level of the timing selection signal, and output a control selection signal; and a selection switch, which is configured to select and output any one of the control signal of the first frequency and the control signal of the second frequency according to the control selection signal.

[0027] The off time setting unit may also be configured to output a control selection signal having a low level when the capacitor voltage is less than the voltage level of the timing selection signal, and output a control selection signal having a high level when the capacitor voltage is higher than the voltage level of the timing selection signal. The selection switch may also be configured to output a control signal of a second frequency through a control selection signal having a low level, or output a control signal of a first frequency through a control selection signal having a high level.

[0028] The off-time controller may include: an off-time setting unit, which is configured to: compare a result value obtained by counting the clock in the low PWM dimming part with the voltage level of the timing selection signal, and output a control selection signal; and a selection switch, which is configured to select and output any one of a control signal of a first frequency and a control signal of a second frequency according to the control selection signal.

[0029] Other features and aspects will be apparent from the following detailed description, the accompanying drawings, and the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 and Figure 2 is a timing diagram describing the operation of the LED device.

[0031] Figure 3 is an example of an LED driving circuit diagram according to one or more examples of the present disclosure.

[0032] Figure 4 is a diagram describing an example of an off-time setting unit.

[0033] Figure 5 Is a description Figure 4 The off-time setting unit is a timing diagram of its operation.

[0034] Figure 6 is a diagram describing another example of an off-time setting unit.

[0035] Figure 7 Is a description Figure 6 The off-time setting unit is a timing diagram of its operation.

[0036] Figure 8 is a timing diagram describing the operation of the LED driver circuit.

[0037] Fig. 9 is an example of an LED driving circuit diagram according to one or more other embodiments of the present disclosure.

[0038] Figures 10 to 12 is a timing diagram describing the operation of an LED driving circuit according to one or more other examples of the present disclosure.

[0039] Throughout the drawings and detailed description, the same reference numerals refer to the same elements. The drawings may not be drawn to scale, and the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0040] The following detailed description is provided to help the reader obtain a comprehensive understanding of the method, device and / or system described herein. However, after understanding the disclosure of the present application, various changes, modifications and equivalents of the method, device and / or system described herein will become apparent. For example, it is apparent after understanding the disclosure of the present application that, except for the operations that must occur in a specific order, the order of the operations described herein is only an example, and is not limited to the order set forth herein, and can be changed. In addition, for increased clarity and brevity, the description of features known in the art may be omitted.

[0041] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein are provided only to illustrate some of the many possible ways to implement the methods, devices, and / or systems described herein that will become apparent after understanding the disclosure of the present application.

[0042] Throughout the specification, when an element such as a layer, a region, or a substrate is described as being “on,” “connected to,” or “coupled to” another element, the element may be directly “on,” “connected to,” or “coupled to” the other element, or one or more other elements may be present between the element and the other element. In contrast, when an element is described as being “directly on,” “directly connected to,” or “directly coupled to” another element, no other elements may be interposed therebetween.

[0043] As used herein, the term "and / or" includes any one and any combination of any two or more of the associated listed items.

[0044] Although terms such as "first", "second", and "third" may be used herein to describe various members, components, regions, layers, or portions, these members, components, regions, layers, or portions are not limited by these terms. Moreover, these terms are only used to distinguish one member, component, region, layer, or portion from another member, component, region, layer, or portion. Therefore, without departing from the teachings of this example, what is referred to as the first member, first component, first region, first layer, or first portion in the examples described herein may also be referred to as the second member, second component, second region, second layer, or second portion.

[0045] To facilitate description of the relationship of one element to another element as shown in the figure, spatially related terms such as "above", "above", "below", and "below" may be used herein. In addition to the orientation depicted in the figure, such spatially related terms are also intended to include different orientations of the device in use or operation. For example, if the device in the figure is turned over, an element described as "above" or "above" another element relative to another element will be "below" or "below" another element relative to the other element. Therefore, depending on the spatial orientation of the device, the term "above" includes both the orientations of "above" and "below". The device can also be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially related terms used in this article are understood accordingly.

[0046] The terms used in this article are only for describing various examples and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form and "the" are also intended to include the plural form. The terms "comprise", "include" and "have" specify the presence of the features, numbers, operations, components, elements and / or their combinations, but do not exclude the presence or addition of one or more other features, numbers, operations, components, elements and / or their combinations.

[0047] It will be apparent after understanding the disclosure of the present application that the features of the examples described herein can be combined in various ways. In addition, as will become apparent after understanding the disclosure of the present application, although the examples described herein have a variety of configurations, other configurations are possible.

[0048] An object of the present disclosure is to provide a switch control circuit that turns on a driving switch element connected to an LED device and can convert switching frequencies of a low PWM dimming part and a normal PWM dimming part.

[0049] An object of the present disclosure is to provide an LED driving circuit including a switch control circuit capable of converting a switching frequency of a low PWM dimming part and a normal PWM dimming part.

[0050] The switch control circuit and LED control device according to the examples of the present disclosure separate the normal PWM dimming part from the low PWM dimming part, and switch to a frequency sufficiently greater than the PWM dimming frequency in the part requiring low PWM dimming, so that the linearity of the LED current can be obtained.

[0051] In addition, the LED control device is switched to the second frequency in the low PWM dimming part, and is switched to the first frequency which is lower than the second frequency in the remaining normal PWM dimming part. In this way, the power consumption and heat generation of the driving switch element can be reduced in the part where low PWM dimming is not required.

[0052] Figure 1 and Figure 2 is a timing diagram describing the driving of the LED device. In the timing diagram shown, the PWM signal is the timing at which PWM dimming occurs for PWM driving. The gate signal is supplied to the gate of the switching transistor and turns on the switching transistor. The inductor current is the magnitude of the current flowing through the inductor connected in series with the LED device by the on-operation of the switching transistor.

[0053] In order to drive the LED device at minimum brightness, an operating method that allows the LED device to operate at a duty cycle equal to or less than 5% may be required; in other words, low PWM dimming driving may be required. When PWM driving occurs, a delay may occur until the current flowing through the LED device increases to a target value. Such a delay may cause an error in the average current control of the above-mentioned LED device.

[0054] Figure 1 It is shown that PWM dimming operates at 0.1%, 0.2%, 0.3% and 0.4% of the PWM dimming period, and the switching frequency of the switching transistor operates at 333 times the PWM dimming frequency. When PWM driving occurs, the PWM duty cycle operates at two, three and four times 0.1%. However, it can be seen that the increase in the inductor current does not match the increase in the PWM duty cycle due to the mismatch between the gate signal and the PWM duty cycle.

[0055] When the increase in inductor current does not match the increase in PWM duty cycle, this may cause the following problems: Figure 2 As shown in FIG. 1 , when PWM driving occurs, the LED current does not increase linearly. This may cause the following problem: it is difficult to linearly control the LED current according to the duty cycle during low PWM dimming. Therefore, it is necessary to set the switching frequency of the switching transistor when PWM driving occurs to be sufficiently greater than the frequency of the PWM dimming cycle.

[0056] Figure 3 is a diagram of an LED driving circuit according to one or more embodiments of the present disclosure.

[0057] Reference Figure 3 , the LED driving circuit 10 may include a buck converter and a switch control circuit 200. The buck converter may include an LED module 110, an inductor 120, a diode 130, a driving switch element 140, a source resistor 150, and a capacitor 160.

[0058] The LED module 110 may be formed by arranging one or more LEDs in series or in parallel or both. The LED module 110 may be connected to the LED module 110 by applying an input voltage V IN To drive the LED module 110 .

[0059] The inductor 120 may be connected in series with the LED module 110. The inductor 120 may store the voltage V IN The energy provided may be released or the stored energy may be released. As the inductance of the inductor 120 changes, the on-period of the driving switching element 140 may change based on the change in the inductance of the inductor 120. Therefore, the switching frequency of the driving switching element 140 may change accordingly.

[0060] When energy is released from the inductor 120, the diode 130 may form a current movement path capable of supplying energy to the LED module 110. Specifically, when the driving switching element 140 is turned off, the diode 130 may allow energy stored in the inductor 120 to flow into the LED module 110 and be consumed.

[0061] The driving switching element 140 connected in series with the LED module 110 and the inductor 120 repeatedly performs on and off operations to control the amount of current flowing through the LED module 110 .

[0062] Specifically, the driving switch element 140 can be turned on by the gate signal GATE provided from the switch control circuit 200. When the high-level gate signal GATE is applied, the driving switch element 140 is turned on, and the current flows through the input voltage V IN Flows through the LED module 110 and the inductor 120. The current may allow energy to be accumulated in the inductor 120, and flows to the source resistor 150 through the driving switching element 140. The source terminal voltage of the driving switching element 140 may be sensed by the source resistor 150.

[0063] Subsequently, when a low-level gate signal GATE is applied, the driving switch element 140 is turned off. A current path is formed so that an inductor current from the energy accumulated in the inductor 120 flows to the LED module 110 through the diode 130. The inductor current may decrease until the driving switch element 140 is turned on. During the PWM dimming cycle, a high level and a low level are repeatedly applied to the gate signal GATE, thereby turning on and off the driving switch element 140.

[0064] The switch control circuit 200 may include an off-time controller 210 , a switch driving unit 220 , a gate signal output unit 230 , and a comparison unit 240 .

[0065] The off time controller 210 may generate a switch input signal SW_IN provided to the switch driving unit 220 based on a timing selection signal TSEL provided from the outside. The switch input signal SW_IN may have a first frequency or a second frequency according to the timing selection signal TSEL.

[0066] That is, when the LED driving circuit 10 operates in the normal PWM dimming section, the off-time controller 210 may output the switching input signal SW_IN of the first frequency to the switch driving unit 220. When the LED driving circuit 10 operates in the low PWM dimming section, the switch control circuit 200 may output the switching input signal SW_IN of the second frequency to the switch driving unit 220. In one or more embodiments of the present disclosure, the second frequency may be greater than the first frequency.

[0067] In addition, the second frequency may be substantially greater than the frequency of the PWM dimming cycle. For example, the second frequency may be 1000 times greater than the frequency of the PWM dimming cycle.

[0068] The off-time controller 210 may include an off-time setting unit 211 , a first control unit 212 , a second control unit 213 , and a selection switch 214 .

[0069] The off time setting unit 211 may be provided with a timing selection signal TSEL and a PWM signal PWM from the outside, and may output a control selection signal SEL_CON. The PWM signal PWM may be a signal for distinguishing a PWM dimming part. The PWM signal PWM is a pulse signal having a high level and a low level in a constant cycle, and the brightness of the LED module 110 may be adjusted according to the duty cycle of the PWM signal PWM.

[0070] The first control unit 212 and the second control unit 213 may respectively output a first control signal CON1 of a first frequency and a second control signal CON2 of a second frequency. The first control signal CON1 having the first frequency is used to generate a gate signal GATE for driving the driving switch element 140 in the normal PWM dimming section. The second control signal CON2 having the second frequency is used to generate a gate signal GATE for driving the driving switch element 140 in the low PWM dimming section.

[0071] The first control unit 212 and the second control unit 213 may receive the first turn-off signal TOFF1 and the second turn-off signal TOFF2, respectively, and may generate the first control signal CON1 and the second control signal CON2. In one or more embodiments, the first turn-off signal TOFF1 and the second turn-off signal TOFF2 are the same clock signal. The first control unit 212 and the second control unit 213 may generate the first control signal CON1 and the second control signal CON2 by different frequency division ratios, and are not limited thereto. The first turn-off signal TOFF1 and the second turn-off signal TOFF2 have the first frequency and the second frequency, respectively, and the first control unit 212 and the second control unit 213 may be used as buffers.

[0072] The selection switch 214 may select one of the first control signal CON1 and the second control signal CON2 based on the control selection signal SEL_CON, and may provide the selected control signal as the switch input signal SW_IN to the switch driving unit 220. Specifically, when the low-level control selection signal SEL_CON is provided to the selection switch 214, the selection switch 214 may provide the second control signal CON2 as the switch input signal SW_IN to the switch driving unit 220. When the high-level control selection signal SEL_CON is provided to the selection switch 214, the selection switch 214 may provide the first control signal CON1 as the switch input signal SW_IN to the switch driving unit 220.

[0073] The switch driving unit 220 may perform a NOR or NAND logic operation on the reset signal RS as the output of the comparison unit 240 and the switch input signal SW_IN as the output of the off time controller 210 , and may provide the operation result to the gate signal output unit 230 .

[0074] In one or more embodiments, the switch driving unit 220 may include an SR latch formed using a NOR or NAND logic gate for switching the input signal SW_IN and the reset signal RS. However, the present disclosure is not limited thereto.

[0075] For example, when a high-level switch input signal SW_IN is input to the set terminal S of the switch driving unit 220, the switch driving unit 220 may output a high-level signal through the output terminal Q. In addition, when a high-level reset signal RS is provided to the reset terminal R, the switch driving unit 220 may output a low-level signal through the output terminal Q.

[0076] The comparison unit 240 may receive the voltage CS of the source terminal of the driving switching element 140 and the reference voltage ADIM, and may output the reset signal RS to the switch driving unit 220 based on a comparison result of the voltage CS of the source terminal and the reference voltage ADIM.

[0077] The PWM signal PWM may also be provided to the gate signal output unit 230. The gate signal output unit 230 may include, for example, an AND gate that performs an AND operation on the signal output from the switch driving unit 220 and the PWM signal PWM. The gate signal output unit 230 provides a gate signal GATE obtained by performing an AND operation on the PWM signal PWM and the output signal of the switch driving unit 220, thereby turning on or off the driving switching element 140.

[0078] Only when the PWM signal PWM and the output signal of the first frequency or the second frequency output from the switch driving unit 220 have a high level at the same time, the switch control circuit 200 can output the gate signal GATE to the driving switch element 140. Therefore, the driving switch element 140 can operate by being turned on by the gate signal GATE only in the high PWM dimming section.

[0079] As a result, the LED driving circuit 10 of the present disclosure includes a driving switching element 140 that switches to the first frequency or the second frequency during the PWM dimming section based on the output of the off-time controller 210, and the off-time controller 210 is controlled by the timing selection signal TSEL that divides the PWM dimming signal into the normal PWM dimming section and the low PWM dimming section. Therefore, in the LED driving circuit 10, the light emission of the LED module 110 is controlled by the driving switching element 140 that is switched to the first frequency in the normal PWM dimming section, and is controlled by the driving switching element 140 that is switched to the second frequency in the low PWM dimming section.

[0080] As described above, in the low PWM dimming section, the driving switch element 140 must be switched to a frequency that is sufficiently large compared to the PWM dimming period. As described above, in the low PWM dimming section, the driving switch element 140 may be switched at a second frequency that is greater than the first frequency. However, if the driving switch element 140 is switched to the second frequency over the entire PWM dimming section, the normal operation of the driving switch element 140 may not be guaranteed due to the heat generated in the driving switch element 140. Therefore, by driving the driving switch element 140 at the second frequency in the low PWM dimming section that accounts for a portion of the PWM dimming section, the linearity of the current flowing through the LED module 110 can be ensured. By driving the driving switch element 140 at a first frequency that is less than the second frequency in the normal PWM dimming section, the heat generated in the driving switch element 140 can be reduced.

[0081] Figure 4 is a diagram describing an example of an off-time setting unit. Figure 5 Is a description Figure 4 The off-time setting unit is a timing diagram of its operation.

[0082] Reference Figure 4 , the off-time setting unit 211 may include a comparator 251 , a current source 252 , and a capacitor 253 .

[0083] The comparator 251 may compare the voltage level of the timing selection signal TSEL with the voltage Vc charged in the capacitor 253 by the current flowing from the current source 252. The comparator 251 may output a low-level control selection signal SEL_CON when, for example, the voltage Vc charged in the capacitor is less than the voltage level of the timing selection signal TSEL, and may output a high-level control selection signal SEL_CON when, for example, the voltage Vc of the capacitor is greater than the timing selection signal TSEL.

[0084] The current source 252 may be turned on, for example, by a PWM signal PWM, and may then provide current to the capacitor 253 .

[0085] like Figure 5 As shown, at time point t1, the capacitor 253 is charged by current, so that the capacitor voltage Vc increases. At time point t2, when the capacitor voltage Vc is greater than the voltage level of the timing selection signal TSEL, the comparator 251 outputs a high-level control selection signal SEL_CON.

[0086] That is, at time point t1, the switch element 140 is driven by switching the gate signal GATE of the second frequency, thereby driving the switch control circuit 200 in the low PWM dimming part, and at time point t2, the switch element 140 is driven by switching the gate signal GATE of the first frequency, thereby driving the switch control circuit 200 in the normal PWM dimming part.

[0087] Therefore, in the LED driving circuit 10 of the present disclosure, the driving time in the low PWM dimming section and the normal PWM dimming section can be controlled according to the voltage level of the timing selection signal TSEL.

[0088] Figure 6 is a diagram describing another example of an off-time setting unit. Figure 7 Is a description Figure 6 The off-time setting unit is a timing diagram of its operation.

[0089] Reference Figure 6 and Figure 7 The off-time setting unit 211 may include a counter that receives the PWM signal PWM, the timing selection signal TSEL, and the clock signal CLK, and outputs a control selection signal SEL_CON.

[0090] At time point t1, when the timing selection signal TSEL is provided, the off time setting unit 211 may count the clock signal CLK. The off time setting unit 211 may include, for example, a table in which the count number of the clock signal CLK corresponding to the voltage amplitude of the timing selection signal TSEL is matched. The off time setting unit 211 may output a low-level control selection signal SEL_CON when counting the clock signal CLK during the reception of the timing selection signal TSEL. The selection switch 214 outputs the second control signal CON2 of the second frequency as the switch input signal SW_IN through the low-level control selection signal SEL_CON.

[0091] At time point t2, when the count value of the clock signal CLK reaches a predetermined value, the off time setting unit 211 can stop counting the clock signal CLK and output a high level control selection signal SEL_CON. The selection switch 214 outputs the first control signal CON1 of the first frequency as the switch input signal SW_IN through the high level control selection signal SEL_CON.

[0092] That is, at time point t1, the switch element 140 is switched and driven by the gate signal GATE of the second frequency, thereby driving the switch control circuit 200 in the low PWM dimming part, and at time point t2, the switch element 140 is switched and driven by the gate signal GATE of the first frequency, thereby driving the switch control circuit 200 in the normal PWM dimming part. Therefore, in the LED driving circuit 10 of the present disclosure, the driving time in the low PWM dimming part and the normal PWM dimming part can be controlled according to the voltage level of the timing selection signal TSEL.

[0093] Figure 8 is a timing diagram describing the operation of the LED driver circuit. Figure 8 The timing diagram has the same Figure 5 or Figure 7 The timing of the operation of the LED driving circuit 10 described is the same timing.

[0094] Reference Figure 8 , the LED driving circuit 10 operates in the low PWM dimming section at time point t1, and operates in the normal PWM dimming section at time point t2. In the low PWM dimming section, the gate signal GATE having the second frequency is provided to the driving switch element 140. In the normal PWM dimming section, the gate signal GATE having the first frequency is provided to the driving switch element 140.

[0095] As described above, since the second frequency is set to be sufficiently greater than the frequency of the PWM dimming period, the linearity of the LED current can be obtained by turning on and off the driving switching element 140 in the low PWM dimming section.

[0096] In addition, the LED driving circuit 10 is switched to the second frequency in the low PWM dimming part, and is switched to the first frequency which is lower than the second frequency in the normal PWM dimming part. In this way, the power consumption and heat generation of the driving switching element can be reduced in the part where low PWM dimming is not required.

[0097] However, if Figure 8 As shown in the "A" portion of FIG. 1 , when the driving switch element 140 switched to the second frequency in the low PWM dimming part is controlled to switch to the first frequency at time point t2, undershoot or overshoot may occur in the current flowing through the LED module 110 due to the difference in operating frequency. Fig. 9 A method for solving this problem is described in another embodiment.

[0098] Fig. 9 is a diagram of an LED driving circuit according to one or more other embodiments of the present disclosure.

[0099] Reference Fig. 9The LED driving circuit 20 may include a switch control circuit 300 which is different from the switch control circuit of the LED driving circuit 10 described above.

[0100] Specifically, the off time controller 310 of the switch control circuit 300 may further include an off time converter 315 between the second control unit 313 and the selection switch 314. Parts similar to the above embodiment (eg, the first control unit 312) are omitted, and the following description will focus on the differences therebetween.

[0101] The off time converter 315 may receive the control selection signal SEL_CON and the second control signal CON2 having the second frequency. The off time converter 315 may output the converted second control signal CON2_MOD to the selection switch 314. Figures 10 to 12 The operation of the off-time converter 315 is described in more detail.

[0102] Figures 10 to 12 is a timing diagram describing the operation of the LED driving circuit 20 according to one or more other embodiments of the present disclosure.

[0103] Fig.10 When the off time setting unit 311 has the same Figure 4 and Figure 5 The same structure as that of the described embodiment is the operation of the off-time controller 310. The off-time controller 310 outputs a comparison result of the capacitor voltage Vc of the capacitor charged therein and the timing selection signal TSEL as the control selection signal SEL_CON.

[0104] also, Fig.11 When the off time setting unit 311 has the same Figure 6 and Figure 7 The same structure as the structure of the described embodiment is the operation of the off-time controller 310. That is, the off-time controller 310 outputs the result of counting the clock signal CLK by the internal counter as the control selection signal SEL_CON.

[0105] When the second frequency is sufficiently greater than the first frequency (for example, 1000 times), when the driving switch element 140 switched to the second frequency is controlled to switch to the first frequency, undershoot or overshoot may occur in the current flowing through the LED module 110 due to the difference in operating frequency.

[0106] The off time converter 315 may convert the second control signal CON2 of the second frequency to prevent the operating frequency of the driving switch element 140 from suddenly changing. Then, the off time converter 315 may output the converted second control signal CON2_MOD having a third frequency different from the first and second frequencies to the selection switch 314.

[0107] Reference Fig.10 and Fig.11 , the low PWM dimming part starts at time point t1, and the capacitor voltage Vc starts to be charged. The off-time converter 315 provides the second control signal CON2 of the second frequency provided from the second control unit 313 to the selection switch 314 without converting it. Therefore, the period d1 of the converted second control signal CON2_MOD is the same as the period of the second control signal CON2.

[0108] When the capacitor voltage Vc is charged to be as large as the timing selection signal TSEL at the time point t2, a high-level control selection signal SEL_CON is output. The high-level control selection signal SEL_CON is provided to the off-time converter 315. The off-time converter 315 receives the high-level control selection signal SEL_CON, converts the frequency of the second control signal CON2 to a third frequency, and generates a converted second control signal CON2_MOD. The period d2 of the converted second control signal CON2_MOD may be greater than the period d1 of the second control signal CON2 and less than the period d4 of the first control signal CON1.

[0109] In one or more embodiments of the present disclosure, the off-time converter 315 may generate a converted second control signal CON2_MOD by converting the second control signal CON2 so that the period of the second control signal CON2 increases with the passage of time. In this case, the converted second control signal CON2_MOD may be generated so that the period d3 of the next pulse increases more than the period d2 of the previous pulse.

[0110] In one or more embodiments of the present disclosure, the selection switch 314 may further include a comparator (not shown). The comparator may compare the period of the converted second control signal CON2_MOD with the period d4 of the first control signal CON1. ​​When the period of the converted second control signal CON2_MOD is greater than or equal to the period d4 of the first control signal CON1, the comparator may output a switch change signal. According to the switch change signal, the selection switch 314 may select the first control signal CON1 having the first frequency, and may output it to the switch driving unit 320. Therefore, the normal PWM dimming part may start at time point t3.

[0111] The comparator may compare the frequency of the control signal and output a switch change signal. According to an embodiment of the present disclosure, when the frequency of the converted second control signal CON2_MOD is equal to or less than the frequency of the first control signal CON1, the comparator may output a switch change signal. Therefore, the selection switch 314 may select the first control signal CON1 having the first frequency according to the switch change signal. The normal PWM dimming part may start at time point t3.

[0112] Reference Fig.12 , the LED driving circuit 20 starts to operate in the low PWM dimming part at time point t1, and starts to operate in the frequency conversion part at time point t2. In the low PWM dimming part, the gate signal GATE having the second frequency is provided to the driving switch element 140. In the frequency conversion part, the gate signal GATE having a third frequency less than the second frequency is provided to the driving switch element 140. The LED driving circuit 20 provides the gate signal GATE having a first frequency less than the third frequency to the driving switch element 140 at time point t3.

[0113] That is, the LED driving circuit 20 includes a frequency conversion part between the low PWM dimming part and the normal PWM dimming part, and drives the driving switch element 140 by using the gate signal GATE having a third frequency greater than the first frequency and less than the second frequency in the frequency conversion part. Therefore, it is possible to prevent undershoot or overshoot from occurring in the current flowing through the LED module 110 due to a sudden frequency change between the low PWM dimming part and the normal PWM dimming part.

[0114] Although the present disclosure includes specific examples, it will be apparent after understanding the disclosure of the present application that various changes in form and detail may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are considered to be illustrative only and not for limiting purposes. The description of the features or aspects in each example is considered to be applicable to similar features or aspects in other examples. Suitable results may be obtained if the techniques are performed in a different order, and / or if the components in the systems, structures, devices, or circuits are combined in a different manner, and / or replaced or supplemented by other components or their equivalents. Therefore, the scope of the present disclosure is defined by the claims and their equivalents, rather than by a detailed description, and all changes within the scope of the claims and their equivalents are considered to be included in the present disclosure.

Claims

1. A switch control circuit, configured to turn on a drive switch element connected in series to an LED by providing a gate signal to the drive switch element, the switch control circuit comprising: An off-time controller, the off-time controller comprising an off-time setting unit, a first control unit and a second control unit, the off-time setting unit being configured to receive a timing selection signal from an outside, the first control unit being configured to generate a first control signal of a first frequency, the second control unit being configured to generate a second control signal of a second frequency, the second frequency being greater than the first frequency, Wherein, the switch control circuit is configured as follows: dividing the PWM dimming signal into a normal PWM dimming portion and a low PWM dimming portion based on the timing selection signal, wherein the off-time controller is configured to determine the length of the low PWM dimming portion according to a voltage level of the timing selection signal; When the first control signal is received from the first control unit in the normal PWM dimming section, providing a gate signal of the first frequency to the driving switching element; and When the second control signal is received from the second control unit in the low PWM dimming section, a gate signal of the second frequency is provided to the driving switching element.

2. The switch control circuit according to claim 1, wherein The off-time controller is configured to: select and output the second control signal of the second frequency during the low PWM dimming section; and select and output the first control signal of the first frequency during the normal PWM dimming section; and The switch control circuit further includes a switch driving unit configured to generate the gate signal according to the selected result.

3. The switch control circuit according to claim 2, wherein: The off time setting unit is configured to: compare a capacitor voltage charged by the start of the low PWM dimming part with a voltage level of the timing selection signal and output a control selection signal; and The off-time controller further includes a selection switch configured to select and output any one of the first control signal of the first frequency and the second control signal of the second frequency according to the control selection signal.

4. The switch control circuit according to claim 3, in, The off time setting unit is further configured to: output a control selection signal having a low level when the capacitor voltage is less than a voltage level of the timing selection signal; and output a control selection signal having a high level when the capacitor voltage is higher than a voltage level of the timing selection signal, and The selection switch is further configured to: output the second control signal of the second frequency through a control selection signal with a low level, and output the first control signal of the first frequency through a control selection signal with a high level.

5. The switch control circuit according to claim 2, wherein: The off time setting unit is configured to compare a result value obtained by counting clocks in the low PWM dimming section with a voltage level of the timing selection signal and output a control selection signal; and The off-time controller further includes a selection switch configured to select and output any one of the first control signal of the first frequency and the second control signal of the second frequency according to the control selection signal.

6. The switch control circuit according to claim 5, in, The off time setting unit is further configured to: output a control selection signal having a low level when a result value obtained by counting the clock is less than a voltage level of the timing selection signal, and output a control selection signal having a high level when a result value obtained by counting the clock is greater than the voltage level of the timing selection signal, and The selection switch is further configured to: output the second control signal of the second frequency through a control selection signal with a low level, and output the first control signal of the first frequency through a control selection signal with a high level.

7. The switch control circuit according to claim 2, wherein: The off time controller also includes: an off-time converter configured to: receive the second control signal of the second frequency in a frequency conversion portion between the low PWM dimming portion and the normal PWM dimming portion, and output a third control signal of a third frequency greater than the first frequency and less than the second frequency; and A selection switch is configured to select and output the third control signal of the third frequency in the frequency conversion section.

8. The switch control circuit according to claim 7, wherein: The off-time converter is further configured to output the third control signal of the third frequency such that the third frequency decreases over time in the frequency conversion portion.

9. The switch control circuit according to claim 8, in, The selection switch further includes a comparator configured to output a switch change signal when the third frequency is equal to or less than the first frequency, and The selection switch is further configured to select and output the first control signal of the first frequency according to the switch change signal.

10. The switch control circuit according to claim 2, further comprising a comparison unit configured to compare the source terminal voltage of the driving switch element with a reference voltage, in, The switch driving unit includes an SR latch.

11. An LED driving circuit, comprising: A buck converter configured to include a driving switch element connected in series to the LED module; as well as A switch control circuit, the switch control circuit comprising an off-time controller, the off-time controller comprising an off-time setting unit, a first control unit and a second control unit, the off-time setting unit being configured to receive a timing selection signal from an outside, the first control unit being configured to generate a first control signal of a first frequency, the second control unit being configured to generate a second control signal of a second frequency, the second frequency being greater than the first frequency, wherein the switch control circuit is configured to: provide a gate signal to the driving switch element; divide a PWM dimming signal into a normal PWM dimming portion and a low PWM dimming portion based on the timing selection signal, wherein the off-time controller is configured to determine the length of the low PWM dimming portion according to a voltage level of the timing selection signal; When receiving the first control signal from the first control unit in the normal PWM dimming section, providing the gate signal of the first frequency to the driving switch element; and providing a gate signal of the second frequency to the driving switching element when the second control signal is received from the second control unit in the low PWM dimming section.

12. The LED driving circuit according to claim 11, wherein: The buck converter further comprises: A capacitor connected in parallel to the LED module; an inductor connected in series to the LED module; a diode configured to supply energy released from the inductor to the LED module; and A source resistor is configured to sense a source terminal voltage of the driving switching element.

13. The LED driving circuit according to claim 11, in, The off-time controller is configured to: select and output the second control signal of the second frequency during the low PWM dimming section; and select and output the first control signal of the first frequency during the normal PWM dimming section; as well as The LED driving circuit further includes a switch driving unit configured to generate the gate signal according to the selected result.

14. The LED driving circuit according to claim 13, in, The off time setting unit is configured to: compare a capacitor voltage charged by the start of the low PWM dimming part with a voltage level of the timing selection signal and output a control selection signal; and The off-time controller includes a selection switch, and the selection switch is configured to select and output any one of the first control signal of the first frequency and the second control signal of the second frequency according to the control selection signal.

15. The LED driving circuit according to claim 14, in, The off time setting unit is further configured to: output a control selection signal having a low level when the capacitor voltage is less than a voltage level of the timing selection signal; and output a control selection signal having a high level when the capacitor voltage is higher than a voltage level of the timing selection signal, and The selection switch is further configured to: output the second control signal of the second frequency through a control selection signal with a low level; and output the first control signal of the first frequency through a control selection signal with a high level.

16. The LED driving circuit according to claim 13, in, The off time setting unit is configured to compare a result value obtained by counting clocks in the low PWM dimming section with a voltage level of the timing selection signal and output a control selection signal; and The off-time controller further includes a selection switch, and the selection switch is configured to select and output any one of the first control signal of the first frequency and the second control signal of the second frequency according to the control selection signal.

17. The LED driving circuit according to claim 16, in, The off time setting unit is further configured to: output a control selection signal having a low level when a result value obtained by counting the clock is less than a voltage level of the timing selection signal, and output a control selection signal having a high level when a result value obtained by counting the clock is greater than the voltage level of the timing selection signal, and The selection switch is further configured to: output the second control signal of the second frequency through a control selection signal with a low level, and output the first control signal of the first frequency through a control selection signal with a high level.

18. The LED driving circuit according to claim 13, wherein: The off time controller comprises: an off-time converter configured to: receive the second control signal of the second frequency in a frequency conversion portion between the low PWM dimming portion and the normal PWM dimming portion, and output a third control signal of a third frequency greater than the first frequency and less than the second frequency; and A selection switch is configured to select and output the third control signal of the third frequency in the frequency conversion section.

19. The LED driving circuit according to claim 18, wherein: The off-time converter is further configured to output the third control signal of the third frequency so that the third frequency decreases over time in the frequency conversion portion.

20. The LED driving circuit according to claim 19, in, The selection switch further includes a comparator configured to output a switch change signal when the third frequency is equal to or less than the first frequency, and The selection switch is further configured to select and output the first control signal of the first frequency according to the switch change signal.

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