Electronic device

Abstract

An electronic device includes a driving circuit, an integrated circuit, and a plurality of signal lines. The driving circuit includes a plurality of transistors and signal lines. Each transistor includes a control terminal for receiving a frequency signal. The signal line is coupled to the control terminal of each transistor, and the signal line includes a first node, a second node, and a third node. The second node is located between the first node and the third node, and each of the first node, the second node, and the third node is used to receive the frequency signal. The integrated circuit is used to transmit the frequency signal. The plurality of conductive lines are coupled between the integrated circuit and the signal line. The integrated circuit transmits the frequency signal to the first node, the second node, and the third node of the signal line through the plurality of conductive lines.

Description

Technical Field

[0001] The present invention relates to an electronic device, and more particularly to an electronic device that provides a frequency signal to at least three nodes of a signal line through a plurality of transmission lines, and then provides the frequency signal to a plurality of transistors of the driving circuit. Background Art

[0002] As the resolution of the panel continues to increase, the number and complexity of components inside the circuit also increase. In the circuit routing design, there are many cross-lines and the line width gradually becomes thinner, resulting in an increase in the resistance and inductance load, which is not conducive to the driving of the panel circuit and is also prone to the loss that the control signal is distorted due to delay.

[0003] However, there is no suitable solution in the art to improve the circuit driving ability, support high resolution at the same time, and meet the specifications of products such as virtual reality devices. Summary of the Invention

[0004] An embodiment provides an electronic device, including a driving circuit, an integrated circuit, and a plurality of signal lines. The driving circuit includes a plurality of transistors and signal lines. Each transistor includes a control terminal for receiving a frequency signal. The signal line is coupled to the control terminal of each transistor. The signal line includes a first node, a second node, and a third node. The second node is located between the first node and the third node, and each of the first node, the second node, and the third node is used to receive the frequency signal. The integrated circuit is used to transmit the frequency signal. The plurality of transmission lines are coupled between the integrated circuit and the signal line. The integrated circuit transmits the frequency signal to the first node, the second node, and the third node of the signal line through the plurality of transmission lines. Brief Description of the Drawings

[0005] Figure 1 It is a schematic diagram of using an electronic device in an embodiment.

[0006] Figure 2 It is a schematic diagram of using an electronic device in another embodiment.

[0007] Figure 3 It is a schematic diagram of using an electronic device in another embodiment.

[0008] Figure 4 It includes Figure 1 The layout schematic diagram of the electronic device.

[0009] Figure 5 It is Figure 4 The partial sectional view along the tangent line 5-5' in.

[0010] Figure 6 It is a schematic diagram of the electronic device of the embodiment.

[0011] Description of reference numerals: 100, 200, 300, 600-electronic device; DL11, DL12, DL13, DL21, DL22, DL23, DLn1, DLn2, DLn3, L1, L2, L3-signal line; 110, 120, 130, 210, 220, 230, n10, n20, n30-transistor; WV1, WV2, WV3-waveform; P1-first Area; P2-second area; P3-third area; P4-fourth area; 510, 520, 530, 540, 545-position; S1, S2, Sn-signal source; CKH1, CKH2, CKH3-frequency signal; 155-integrated circuit; DC-drive circuit; AA-display area; 158, 42-wire bonding area; W11, W12, W13, W21, W22, W23, W31, W32 , W33, WS1, WS2, WSn, W14, W24, W34-conduction line; N1, N21, N31-first node; N2, N22, N32-second node; N3, N23, N33-third node; N4, N24, N34-fourth node; X-first reference axis; Y-second reference axis; 511-signal path; PAD11, PAD12, PAD13-pad; 410, 415-area; K-K'-reference line; 420-fan-out area; 430-electrostatic discharge area; 550-insulating layer; 555-planar layer; 560-dielectric layer; 565-gate dielectric layer; 570-buffer layer; 575-substrate; ST-source; DT-drain; GT1, GT2-gate; DR1, DR2-doped area; TL1, TL2-transparent thin film conductive layer; M1, M2, M3-conductive layer. DETAILED DESCRIPTION

[0012] In order to improve the circuit driving capability, the following Figures 1 to 6 , illustrating the solution provided by the embodiment. Figures 1 to 6 The structure, number of components, number of layers, position distribution, ratio, etc. are only examples to help explain and understand the embodiments, and are not used to limit the form and scope of the embodiments. If the first, second, etc. are mentioned in this article, they are only used to separate different components, and do not limit the order or importance of the process.

[0013] Certain words are used throughout this disclosure and in the claims that follow to refer to specific components. It should be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following description and claims, the words "having" and "including" are open-ended words and should therefore be interpreted as "including but not limited to..."

[0014] It should be understood that when an element or a film layer is defined as being "on" or "connected to" another element or film layer, it can be directly on this other element or film layer or directly connected to this other element or layer, or there are other intervening elements or film layers (non-direct contact) between the two. Conversely, when an element is defined as being "directly" "on" another element or film layer or "directly connected to" another element or film layer, there are no intervening elements or film layers between the two.

[0015] The terms "about", "equal to", "equivalent", or "substantially the same" generally represent within 20% of a given numerical value or range, or represent within 10%, 5%, 3%, 2%, 1%, or 0.5% of a given numerical value or range.

[0016] In addition, the term "in the range from a first value to a second value" means that the range includes the first value, the second value, and other values therebetween.

[0017] Although terms such as first, second, third, etc. can be used to describe different constituent elements, these constituent elements are not limited by these terms. These terms are only used to distinguish the constituent elements in the specification from other constituent elements. The claims may not use the same terms, but may use first, second, third, etc. terms to indicate the order in which the elements are defined. Thus, in the following description, the first constituent element may be the second constituent element in the claims.

[0018] It should be noted that in the following embodiments, without departing from the spirit of this disclosure or conflicting therewith, the technical features in several different embodiments can be replaced, recombined, and mixed to complete other embodiments.

[0019] Figure 1 In the embodiment, it is a schematic diagram of the electronic device 100. The electronic device 100 may include a driving circuit DC, a display area AA, signal lines DL11~DLn, conductive lines W11~WSn, a wire bonding portion 158, and an integrated circuit 155.

[0020] As Figure 1 shown, the driving circuit DC can be coupled to the display area AA through signal lines DL11, signal lines DL12, signal lines DL13, signal lines DL21, signal lines DL22, signal lines DL23, signal lines DLn1, signal lines DLn2, and signal lines DLn3.

[0021] The drive circuit DC may include a plurality of transistors and signal lines, such as transistor 110, transistor 120, transistor 130, transistor 210, transistor 220, transistor 230, transistor n10, transistor n20, transistor n30, signal line L1, signal line L2, and signal line L3. Among them, signal line L1 is coupled to the control terminals of transistor 110, transistor 210, and transistor 130; signal line L2 is coupled to the control terminals of transistor 120, transistor 220, and transistor n20; and signal line L3 is coupled to the control terminals of transistor 130, transistor 230, and transistor n30.

[0022] As Figure 1 shown, transistor 110, transistor 120, and transistor 130 may be the first group of transistors; transistor 210, transistor 220, and transistor 230 may be the second group of transistors; and transistor n10, transistor n20, and transistor n30 may be the nth group of transistors. Among them, between the second group of transistors and the nth group of transistors, more groups of transistors may be included. Therefore, in this example, n may be a positive integer and n > 2. Figure 1 Herein, each group of transistors may include three transistors. This is only an example, but the embodiments are not limited thereto.

[0023] As Figure 1 shown, transistor 110, transistor 120, and transistor 130 may be provided with signals by signal source S1 through transmission wire WS1; transistor 210, transistor 220, and transistor 230 may be provided with signals by signal source S2 through transmission wire WS2; and transistor n10, transistor n20, and transistor n30 may be provided with signals by signal source Sn through transmission wire WSn.

[0024] Signal source S1, signal source S2, and signal source Sn may be located in integrated circuit 155, and the transmission wires WS1, WS2, and WSn between signal source S1, signal source S2, and signal source Sn and drive circuit DC may be connected by wire bonding.

[0025] As Figure 1 shown, the first ends of transistor 110, transistor 120, and transistor 130 may be respectively coupled to signal lines DL11, DL12, and DL13; the first ends of transistor 210, transistor 220, and transistor 230 may be respectively coupled to signal lines DL21, DL22, and DL23; and the first ends of transistor n10, transistor n20, and transistor n30 may be respectively coupled to signal lines DLn1, DLn2, and DLn3.

[0026] For example, signal lines DL11, DL12, DL13, DL21, DL22, DL23, DLn1, DLn2, and DLn3 can be used to provide signals to the display area AA of a display device.

[0027] Transistor 110 can receive a signal from signal source S1 through conduction line WS1 and accordingly send a signal to display area AA through signal line DL11, so that display area AA can display accordingly.

[0028] Similarly, each of transistor 120 and transistor 130 can receive a signal from signal source S1 through conduction line WS1 and accordingly send a signal to display area AA through signal line DL12 or signal line DL13, so that display area AA can display accordingly.

[0029] Similarly, each of transistors 210 to 230 can receive a signal from signal source S2 through conduction line WS2 and accordingly send a signal to display area AA through signal lines DL21, DL22, or DL23, so that display area AA can display accordingly.

[0030] Similarly, each of transistors n10 to n30 can receive a signal from signal source Sn through conduction line WSn and accordingly send a signal to display area AA through signal lines DLn1, DLn2, or DLn3, so that display area AA can display one or more pixels accordingly.

[0031] As Figure 1 shown, the control terminals of transistor 110, transistor 210, and transistor n10 can receive frequency signal CKH1 through signal line L1; the control terminals of transistor 120, transistor 220, and transistor n20 can receive frequency signal CKH2 through signal line L2; and the control terminals of transistor 130, transistor 230, and transistor n30 can receive frequency signal CKH3 by switching signal line L3.

[0032] Taking transistor 110, transistor 210, transistor n10, signal line L1, conduction lines W11, W12, and W13 as examples, the embodiments will be described.

[0033] Each of the transistors 110, 210, and n10 includes a control terminal for receiving a frequency signal CKH1. A signal line L1 is coupled to the control terminals of each of the transistors 110, 210, and n10. The signal line L1 includes a first node N1, a second node N2, and a third node N3. The second node N2 is located between the first node N1 and the third node N3, and each of the first node N1, the second node N2, and the third node N3 is used to receive the frequency signal CKH1. An integrated circuit 155 is used to transmit the frequency signal CKH1. Conductive lines W11, W12, and W13 are coupled between the integrated circuit 155 and the signal line L1. The integrated circuit 155 can transmit the frequency signal CKH1 to the first node N1, the second node N2, and the third node N3 of the signal line L1 through the conductive lines W11, W12, and W13.

[0034] According to an embodiment, the driving circuit DC can be a demultiplexer or a gate-level driver. The first node N1, the second node N2, and the third node N3 of the signal line L1 can respectively correspond to a first region P1, a second region P2, and a third region P3 of the wire bonding portion 158, where the second region P2 can be located between the first region P1 and the third region P3. In this embodiment, the first region P1 is formed by a plurality of pads PAD11 coupled to the first node N1. That is to say, the second region P2 and the third region P3 are formed by a plurality of pads PADP12 and PAD13 coupled to the second node N2 and the third node N3. Among them, if a fourth node N4 is set on the signal line L1 due to the requirements of the actual product (such as Figure 3 ), its wire bonding region 158 will also have a fourth region P4 (such as Figure 3 ) and a plurality of pads PAD14 (such as Figure 3 ). In addition, in this embodiment, the number of pads in each region is exemplified as 3, but it is not limited thereto. As Figure 1 shown, the frequency signal CKH1 is transmitted to the second node N2 through the conductive line W12, and the waveform WV2 of the frequency signal CKH1 at the second portion P2 can be similar to the waveform WV1 at the first portion P1 and the waveform WV3 at the third portion P3, so that the frequency signal CKH1 can be free from delay and distortion.

[0035] Similarly, the first node N21, the second node N22, and the third node N23 of the signal line L2 can respectively correspond to the first portion P1, the second portion P2, and the third portion P3, and are used to receive the frequency signal CKH2, so that the waveform of the frequency signal CKH2 can be free from delay and distortion at the second portion P2.

[0036] Similarly, the first node N31, the second node N32, and the third node N33 of the signal line L3 can respectively correspond to the first part P1, the second part P2, and the third part P3, and are used to receive the frequency signal CKH3, so that the waveform of the frequency signal CKH3 at the second part P2 can be free from delay and distortion.

[0037] Since the frequency signal CKH1, the frequency signal CKH2, and the frequency signal CKH3 can be free from delay and distortion at the second part P2, the driving ability and operation correctness of the driving circuit DC can be improved.

[0038] According to the embodiment, the signal line L1 can be arranged along the first reference axis X, multiple conductive lines (such as the conductive lines W12, W22, and W32) can be arranged along the second reference axis Y, and the second reference axis Y can be substantially perpendicular to the first reference axis X. The first reference axis X and the second reference axis Y can be defined from a top view during circuit layout.

[0039] According to the embodiment, in the driving circuit DC, multiple conductive lines (such as Figure 1 the conductive lines W11 to W33) can be located in the conductive layer, and multiple transistors (such as Figure 1 the transistors 110 to n30) are not manufactured in the conductive layer where the conductive lines are located, but are manufactured in a different conductive layer.

[0040] Such as Figure 1 shown, the integrated circuit 155 can include a wire bonding area 158 for performing wire bonding, and each of the multiple conductive lines can be coupled to the integrated circuit 155 at the pads in the wire bonding area 158.

[0041] For example, as Figure 1 shown, the conductive lines W11, W12, and W13 can be respectively coupled to the integrated circuit 155 in a wire bonding manner through the pads PAD11, PAD12, and PAD13. Similarly, the conductive lines W21, W22, W23, W31, W32, W33, WS1, WS2, and WSn can also be respectively coupled to the wire bonding area 158 of the integrated circuit 155 in a wire bonding manner through the pads (schematically shown in Figure 1 a grid).

[0042] Figure 2 is a schematic diagram of using the electronic device 200 in another embodiment. If the number of pads PAD11 and PAD13 in the wire bonding area 158 of the integrated circuit 155 is less than the number of nodes N1 to N3 on the signal line L1, the Figure 2 structure can be used. Figure 2In the [description], at the wire bonding area 158, a conductive wire W151 can be used to connect the pads PAD11 and PAD13 of the integrated circuit 155, so as to transmit the frequency signal CKH1. At the second part P2, the transmission wire W12 can be coupled to the conductive wire W151 in the wire bonding area 158 to transmit the frequency signal CKH1 to the second node N2. Among them Figure 2 and Figure 1 the similarities are not repeated here. In another embodiment, another node can also be provided between the second node N2 and the first node N1 or between the second node N2 and the third node N3, and is coupled to the conductive wire W151 through another transmission wire, so that the frequency signal CKH1 is transmitted to another node.

[0043] In other words, the integrated circuit 155 can include the conductive wire W151, and multiple transmission wires (such as the transmission wire W11, the transmission wire W12, and the transmission wire W13) can be electrically connected to each other in the integrated circuit 155 through the conductive wire W151. Figure 2 In the [description], the signal path 511 located on the transmission wire W12 will be described later.

[0044] Similarly, as Figure 2 shown, the integrated circuit 155 can further include a conductive wire W152, and the transmission wires W21, W22, and W23 can be electrically connected to each other in the integrated circuit 155 through the conductive wire W152 to transmit the frequency signal CKH2.

[0045] Similarly, the integrated circuit 155 can further include a conductive wire W153, and the transmission wires W31, W32, and W33 can be electrically connected to each other in the integrated circuit 155 through the conductive wire W153 to transmit the frequency signal CKH3.

[0046] Figure 2 In the [description], the transmission wires W12, W22, and W32 located at the second part P2 can be fabricated on a glass substrate.

[0047] Through Figure 2 the structure, when the number of pads is less than the number of nodes of the signal lines, transmission wires can still be provided to transmit the frequency signal to the driving circuit DC, thereby improving the driving ability of the transistor.

[0048] According to the embodiment, the transmission wires W12, W22, and W32 can be disposed in a region with a lower wire bonding density in the wire bonding area 158 to reduce the load on other circuits. The bonding density is defined as the number of transmission wires in the same unit area.

[0049] Such as Figure 1 and Figure 2As shown, frequency signals can be transmitted from three parts of the electronic device (such as the first part P1, the second part P2, and the third part P3) to the driving circuit DC to improve the driving ability. However, Figure 1 and Figure 2 are only examples. According to the embodiment, the number of parts for inputting signals can also be increased, such as Figure 3 shown.

[0050] Figure 3 is a schematic diagram of using the electronic device 300 in another embodiment. Compared with Figure 1 , Figure 3 the electronic device 300 further includes conductive wires W14, W24, and W34. The conductive wires W14, W24, and W34 can be respectively coupled between the integrated circuit 155 and the signal line L1, between the integrated circuit 155 and the signal line L2, and between the integrated circuit 155 and the signal line L3 to respectively transmit the frequency signal CKH1 to the fourth node N4 of the signal line L1, transmit the frequency signal CKH2 to the fourth node N24 of the signal line L2, and transmit the frequency signal CKH3 to the fourth node N34 of the signal line L3. The conductive wires W14, W24, and W34 can correspond to the fourth area P4.

[0051] Taking the signal line L1 as an example, compared with Figure 1 , Figure 3 the signal line L1 can further include a fourth node N4. The fourth node N4 is located between the first node N1 and the second node N2, and the integrated circuit 155 can transmit the frequency signal CKH1 to the fourth node N4 through the conductive wire W14.

[0052] Figure 3 are only examples to describe that the frequency signals can be input to the signal line of the driving circuit DC from four parts. According to the embodiment, the frequency signals can also be input to the signal line of the driving circuit DC from four parts, five parts, or more parts to further avoid frequency signal distortion and improve the driving ability.

[0053] Figure 4 is a layout schematic diagram of the driving circuit DC including Figure 1 . Figure 4 can be a top view of the layout. As shown in Figure 4 , the integrated circuit 155 on the substrate can be electrically connected to the driving circuit DC through the wire bonding area 158 via the conductive wires W12, W22, and W32.

[0054] The electronic device may further include an electrostatic discharge part 430, which is located between the driving circuits DC. Each of the transmission lines W12, W22, and W32 may pass through the electrostatic discharge area 430 and be coupled between the integrated circuit 155 and the driving circuit DC. The electrostatic discharge area 430 is provided to avoid charge accumulation. Therefore, in another embodiment, the transmission lines W12, W22, and W32 are also coupled to the integrated circuit 155 and the driving circuit DC, so that they do not need to pass through the electrostatic discharge part 430.

[0055] For the sake of simplicity, in Figure 1 , Figure 2 and Figure 3 , the wire bonding area and the electrostatic discharge area 430 are omitted, and are shown in Figure 4 .

[0056] According to an embodiment, the transmission lines W12, W22, and W32 may transmit signals through the bridging of the conductive layer. Taking the transmission line W12 in Figure 1 and Figure 4 as an example, the bridging of the conductive layer is described. The conductive layers M1 to the transmission line W12 mentioned below can be seen in Figure 5 .

[0057] Figure 5 is Figure 4 a partial cross-sectional view along the tangent line 5-5' in Figure 5 . As shown, the parts 510 and 530 are located in the wire bonding area 42. At the part 530, the signal can be transmitted from the conductive wire M3 (for example, Figure 2 the conductive wire W151) to the transmission line W12. Therefore, the frequency signal CKH1 can be transmitted on the transmission line W12 to the conductive wires M3 and M2 (which can be exemplified as pads) located at the part 520, and then transmitted to the transistors DR1 and DR2 of the driving circuit DC.

[0058] Figure 5 The transmission line W12 can be used to transfer any one of the frequency signals CKH1 to CKH3. Since it is only used for short-distance signal transfer, the thickness of the transmission line W12 can be relatively thin to reduce the process risk of the ramp. It can also be placed under the flat layer to reduce the load.

[0059] Figure 5 In

[0060] In the wire bonding region 42 and the driving circuit DC may also include an insulating layer 550, a planarizing layer 555, a dielectric layer 560, a gate dielectric layer 565, a buffer layer 570, a substrate 575, a source ST, a drain DT, a gate GT1, a gate GT2, a doped region DR1, a doped region DR2, a transparent thin film conductive layer TL1, and a transparent thin film conductive layer TL2. The buffer layer 570 is disposed on the substrate 575, and the gate dielectric layer 565, the doped region DR1, and the doped region DR2 are disposed on the buffer layer 570. The dielectric layer 560 covers the gate dielectric layer 565, the doped region DR1, and the doped region DR2. The source ST and the drain DT pass through the dielectric layer 560 and are electrically connected to the doped region DR1 and the doped region DR2. The gates GT1 and GT2 are disposed on the gate dielectric layer 565 to form a transistor 110 as shown in Figure 1 In the example, the substrate may be a copper foil or a resin, the buffer layer 570 may be aluminum nitride or polyimide, the dielectric layer may be silicon dioxide or silicon nitride, the gate dielectric layer may be silicon dioxide, and the transparent thin film conductive layers TL1 and TL2 may be indium tin oxide layers. Figure 5 This is only an example for illustrating the embodiments, but the embodiments are not limited thereto.

[0061] Taking Figure 1 and Figure 5 as an example, the conductive layer where the transmission lines W12, W22, and W32 are located can be formed of a low-reflection material, such as a low-reflection metal like molybdenum, to be used as a black matrix, and it can reduce the aperture ratio variation caused by the misalignment between the thin film transistor array and the color filter pair. The conductive layer where the transmission lines W12, W22, and W32 are located can be disposed below a part of the common electrode to be used as a black matrix; in another embodiment, the conductive layer where the transmission lines W12, W22, and W32 are located can be disposed below the entire common electrode to be used as multiple black matrices. According to the embodiment, the conductive layer where the transmission lines W12, W22, and W32 are located can be electrically connected to the transparent thin film conductive layers TL1 and TL2 to increase the electrical uniformity of the common electrode.

[0062] Figure 6 is a schematic diagram of an electronic device 600 of an embodiment. The electronic device 600 may include Figure 1 Figure 2 , Figure 3 , Figure 4 and / or Figure 5 structures. The electronic device 600 may include a display area AA, a driving circuit DC, and an integrated circuit 155. The driving circuit DC may be Figure 1 , Figure 2 , Figure 3 and Figure 4The driving circuit DC. According to an embodiment, the device 600 may include, for example, but not limited to, a liquid crystal display, a light-emitting diode display, a mini light-emitting diode display, a micro light-emitting diode display, an organic light-emitting diode display, a quantum dot color filter display, a flexible display, etc. The electronic device 600 may support a display with a high pixel density (high pixels per inch) and / or a high resolution. The electronic device 600 may meet the lower border specifications and other specifications of the display of a virtual reality product.

[0063] In summary, in an electronic device, by providing a frequency signal to at least three nodes of a signal line through multiple transmission wires, and then providing the frequency signal to multiple transistors of a driving circuit, the attenuation, distortion, and waveform deterioration of the frequency signal can be effectively reduced, and the operation accuracy can also be improved. Therefore, it is really helpful for dealing with the problems in this field.

[0064] The above are only embodiments of the present disclosure and are not used to limit the present disclosure. For those skilled in the art, the present disclosure may have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. An electronic device, characterized in that, Comprising: A driving circuit, comprising: A first transistor, having a first end coupled to the display area, a second end, and a control end for receiving a frequency signal; A second transistor, having a first end coupled to the display area, a second end, and a control end for receiving the frequency signal; And A third transistor, having a first end coupled to the display area, a second end, and a control end for receiving the frequency signal; and A signal line, coupled to each of the transistors, the signal line including a first node, a second node, and a third node, wherein the second node is located between the first node and the third node, and each of the first node, the second node, and the third node is for receiving the frequency signal; An integrated circuit for sending the frequency signal to the control end of the first transistor, the control end of the second transistor, and the control end of the third transistor, wherein the integrated circuit includes a first signal source, a second signal source, and a third signal source, and the first signal source, the second signal source, and the third signal source respectively send signals to the second end of the first transistor, the second end of the second transistor, and the second end of the third transistor; A first transmission line, coupled between the integrated circuit and the first node of the signal line for transmitting the frequency signal; A second transmission line, coupled between the integrated circuit and the second node of the signal line for transmitting the frequency signal; And A third transmission line, coupled between the integrated circuit and the third node of the signal line for transmitting the frequency signal; Wherein the integrated circuit transmits the frequency signal to the first node, the second node, and the third node of the signal line through the first transmission line, the second transmission line, and the third transmission line.

2. The electronic device according to claim 1, wherein Further comprising: A wire bonding portion having a first pad and a third pad respectively disposed corresponding to the first node and the third node of the signal line, wherein the first transmission line is electrically connected to the integrated circuit through the first pad, and the third transmission line is electrically connected to the integrated circuit through the third pad.

3. The electronic device according to claim 2, wherein The wire bonding portion further includes a second pad disposed corresponding to the second node of the signal line.

4. The electronic device according to claim 2, wherein Further comprising: An electrostatic discharge area located between the driving circuit and the wire bonding portion; Wherein each of the first transmission line, the second transmission line, and the third transmission line passes through the wire bonding portion and the electrostatic discharge area and is coupled between the integrated circuit and the signal line.

5. The electronic device according to claim 2, wherein The wire bonding portion further includes a conductive wire, and the first transmission line, the second transmission line, and the third transmission line are electrically connected to each other through the conductive wire at the wire bonding portion.

6. The electronic device according to claim 1, characterized in that, The first transmission line, the second transmission line, and the third transmission line are made of a low-reflection material.

7. The electronic device according to claim 1, characterized in that, The signal line is arranged along a first reference axis, the first transmission line is arranged along a second reference axis, and the second reference axis is substantially perpendicular to the first reference axis.

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